Drive circuit and battery protection system

Abstract

The present invention discloses a driving circuit and a battery protection system, wherein the driving circuit comprises a control unit, a first switch device and a first resistor connected in series between a first electrode and a second electrode, and a second switch device connected in parallel with the first resistor and having a resistance smaller than the first resistor when turned on, a protection pin connected to the control end of the third switch device is arranged between the first switch device and the first resistor, in a first state, the control unit controls the second switch device to be cut off and the first switch device to be turned on to form a path, and the protection pin outputs a first electrode voltage that can turn on the third switch device; in a second state, the control unit controls the first switch device to be cut off and the second switch device to be turned on for a set time so that the protection pin outputs a second electrode voltage that can turn off the third switch device and then turns off. The driving circuit and the battery protection system of the present invention can avoid the negative impact of excessive driving on electromagnetic interference and can achieve strong driving to ensure the switching speed of the external third switch device.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a driving circuit and a battery protection system. Background Art

[0002] At present, the battery protection circuit includes a driving circuit for driving the external MOSFET (MOSFET originally means: MOS-Metal Oxide Semiconductor Metal Oxide Semiconductor, FET-Field Effect Transistor Field Effect Transistor, that is, a field effect transistor that uses the gate of the metal layer M to control the semiconductor S through the oxide layer O using the effect of the electric field). When the drive is too strong (that is, the equivalent resistance in the circuit is small and the current is strong), it has a certain negative impact on the EMI (Electro Magnetic Interference) of the chip; when the drive is too weak (that is, the equivalent resistance in the circuit is large and the current is weak), the switching speed of the MOSFET is greatly reduced. Summary of the invention

[0003] The purpose of the present invention is to overcome the above technical problems and provide a driving circuit that can avoid excessive driving and thus produce a negative impact on electromagnetic interference and can achieve strong driving to ensure the switching speed of external switching devices such as MOSFET.

[0004] Another object of the present invention is to provide a battery protection system including the above-mentioned driving circuit.

[0005] In order to achieve the above-mentioned purpose, on one hand, the present invention provides a driving circuit, including a control unit, a first switching device and a first resistor connected in series between a first electrode and a second electrode, and a second switching device connected in parallel with the first resistor, the second switching device having a resistance smaller than the first resistor when turned on, and a protection pin for connecting to a control end of a third switching device being arranged between the first switching device and the first resistor, wherein: in a first state, the control unit controls the second switching device to be cut off and at the same time controls the first switching device to be turned on to form a path between the first electrode and the second electrode through the first resistor, so that the protection pin outputs a voltage of the first electrode that can turn on the third switching device; in a second state, the control unit controls the first switching device to be cut off and at the same time controls the second switching device to be turned on for a setting time so that the protection pin outputs a voltage of the second electrode that can turn off the third switching device and then turns off.

[0006] In some embodiments, the first switch device is a first PMOS transistor, a drain of which is connected to the first resistor, a source of which is connected to the first electrode, and a gate of which is connected to the output terminal of the control unit.

[0007] In some embodiments, the second switching device is a first NMOS transistor, whose drain is connected to one end of the first resistor connected to the first switching device, whose source is connected to the other end of the first resistor, and whose gate is coupled to the output end of the control unit.

[0008] In some embodiments, the second switching device is a second PMOS transistor, whose source is connected to one end of the first resistor connected to the first switching device, whose drain is connected to the other end of the first resistor, and whose gate is coupled to the output end of the control unit.

[0009] In some embodiments, the driving circuit also includes a second NMOS transistor, a current mirror unit and a second resistor, wherein the substrate of the second NMOS transistor is connected to a third electrode, the source thereof is connected to a current bias source, the gate thereof is connected to the output end of the control unit and the drain thereof is connected to the input end of the current mirror unit, the voltage of the third electrode is less than the voltage of the first electrode and the voltage of the second electrode, the output end of the current mirror unit is coupled to one end of the second resistor, the other end of the second resistor is connected to the second electrode, and the control end of the second switching device is coupled between the output end of the current mirror unit and the second resistor.

[0010] In some embodiments, the driving circuit includes a third NMOS transistor, a drain and a gate of which are connected to the other end of the second resistor, and a source of which is connected to the second electrode.

[0011] In some embodiments, the current mirror unit includes a third PMOS transistor and a fourth PMOS transistor, the source of the third PMOS transistor and the source of the fourth PMOS transistor are connected to the first electrode, the drain and gate of the third PMOS transistor and the gate of the fourth PMOS transistor are connected to the drain of the second NMOS transistor, and the drain of the fourth PMOS transistor is coupled to one end of the second resistor.

[0012] In some embodiments, the driving circuit includes a fifth PMOS transistor, whose source is connected to the drain of the fourth PMOS transistor, whose drain is connected to one end of the second resistor, whose gate is connected to the third electrode, and the control end of the second switching device is connected between the fifth PMOS transistor and the second resistor.

[0013] In some embodiments, the third switching device is a MOS transistor, and the first electrode is the positive electrode of the battery cell, and the second electrode is the negative electrode of the battery; or, the first electrode is the negative electrode of the battery cell, and the second electrode is the positive electrode of the battery.

[0014] A second aspect of the present invention provides a battery protection system, comprising a battery, a discharge protection switch for turning on or off a discharge path, a charging protection switch for turning on or off a charging path, and the above-mentioned drive circuit, wherein the third switch device comprises the discharge protection switch and the charging protection switch, the protection pin comprises a charging protection pin and the discharge protection pin, the discharge protection pin is connected to the control end of the discharge protection switch, and the charging protection pin is connected to the control end of the charging protection switch.

[0015] In the above technical solution, in a first state such as normal charging or discharging, the control unit controls the second switch device to be turned off and controls the first switch device to be turned on at the same time, and a path is formed between the first electrode and the second electrode through the first resistor, so that the protection pin outputs the voltage of the first electrode that can turn on the third switch device. A resistor with a large resistance value is selected as the first resistor as needed, and the current in the circuit is weak, thereby avoiding the negative impact of electromagnetic interference on electrical components such as chips in the case of excessive driving. In a second state such as abnormal charging or discharging, the control unit controls the first switch device to be turned off and controls the second switch device to be turned on for a set time so that the protection pin outputs the voltage of the second electrode that can turn off the third switch device. Since the second switch device has a resistance smaller than the first resistor when turned on, the equivalent resistance in the circuit is small, the current is large, and strong driving can be achieved. The voltage of the protection pin can be quickly changed from the voltage of the first electrode to the voltage of the second electrode within a set time to quickly turn off the third switch device, thereby ensuring the switching speed of the external third switch device such as MOSFET. That is to say, this driving mode ensures that the driving of the protection pin in the first state is a weak driving determined by the first resistor which is conducive to electromagnetic interference, and also ensures a strong driving of fast shutdown determined by the second switching device when the external third switching device needs to be cut off to disconnect circuits such as charging and discharging tubes.

[0016] Other features and advantages of the present invention will be described in detail in the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0018] Figure 1 It is a structural schematic diagram of a battery protection system;

[0019] Figure 2 A schematic diagram of the structure of a driving circuit provided in the first embodiment of the present invention;

[0020] Figure 3 for Figure 2 A view of a drive signal output by a control unit of a drive circuit in FIG.

[0021] Figure 4 A schematic diagram of the structure of a driving circuit provided in a second embodiment of the present invention;

[0022] Figure 5 for Figure 4 A view of a drive signal output by a control unit of a drive circuit in FIG.

[0023] Figure 6 A schematic diagram of the structure of a driving circuit provided in a third embodiment of the present invention;

[0024] Figure 7 for Figure 6 FIG. 1 is a view of a drive signal output by a control unit of a drive circuit. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] On the one hand, the present invention provides a driving circuit, including a control unit, a first switching device and a first resistor R1 connected in series between a first electrode and a second electrode, and a second switching device connected in parallel with the first resistor, the second switching device having a resistance less than the first resistor R1 when turned on, and a protection pin for connecting to a control end of a third switching device being arranged between the first switching device and the first resistor R1, wherein: in a first state, the control unit controls the second switching device to be cut off and simultaneously controls the first switching device to be turned on to form a path between the first electrode and the second electrode through the first resistor R1, so that the protection pin outputs a voltage of the first electrode that can turn on the third switching device; in a second state, the control unit controls the first switching device to be cut off and simultaneously controls the second switching device to be turned on for a setting time so that the protection pin outputs a voltage of the second electrode that can turn off the third switching device and then turns off.

[0027] In the above technical solution, in a first state such as normal charging or discharging, the control unit controls the second switch device to be turned off and controls the first switch device to be turned on at the same time, and a path is formed between the first electrode and the second electrode through the first resistor R1, so that the protection pin outputs the voltage of the first electrode that can turn on the third switch device. A resistor with a large resistance is selected as the first resistor R1 as needed, and the current in the circuit is weak, thereby avoiding the negative impact of electromagnetic interference on electrical components such as chips in the case of excessive driving. In a second state such as abnormal charging or discharging, the control unit controls the first switch device to be turned off and controls the second switch device to be turned on for a set time so that the protection pin outputs the voltage of the second electrode that can turn off the third switch device. Since the second switch device has a resistance less than the first resistor R1 when turned on, the equivalent resistance in the circuit is small, the current is large, and strong driving can be achieved. The voltage of the protection pin can be quickly changed from the voltage of the first electrode to the voltage of the second electrode within a set time to quickly turn off the third switch device, thereby ensuring the switching speed of the external third switch device such as MOSFET. That is to say, this driving mode ensures that the driving of the protection pin in the first state is a weak driving determined by the first resistor R1 which is conducive to electromagnetic interference, and also ensures a strong driving of fast shutdown determined by the second switching device when the external third switching device needs to be cut off to disconnect circuits such as charging and discharging tubes.

[0028] Among them, the third switching device is a MOS transistor, specifically, it can be a PMOS transistor, or it can also be an NMOS transistor, and the first electrode is the positive electrode of the battery cell, and the second electrode is the negative electrode of the battery; or, the first electrode is the negative electrode of the battery cell, and the second electrode is the positive electrode of the battery.

[0029] Figure 1 Figure 1 is a schematic diagram of the structure of a battery protection system. Figure 1 As shown, the battery protection system includes a battery, a discharge protection switch 200 for turning on or off the discharge path, a charging protection switch 300 for turning on or off the charging path, and the above-mentioned drive circuit 100. The third switch device includes a discharge protection switch 200 and a charging protection switch 300, wherein two N-channel MOSFETs can be used as the discharge protection switch 200 and the charging protection switch 300, respectively, to provide protection for the battery. The protection pin includes a charging protection pin COUT and a discharge protection pin DOUT, wherein the discharge protection pin DOUT is connected to the control end of the discharge protection switch 200, and the charging protection pin COUT is connected to the control end of the charging protection switch 300.

[0030] The first state may be used during normal charging or discharging, and the second state may be used during abnormal charging or discharging, such as charging overvoltage or overcurrent, or discharging overvoltage or overcurrent. When charging overvoltage and / or charging overcurrent occurs, an effective charging protection signal is output through the charging protection pin COUT to turn off the charging protection switch 300, disconnecting the charging path of the battery, thereby preventing the battery from being damaged due to overcharging; when discharging overvoltage and / or discharging overcurrent occurs, an effective discharge protection signal is output through the discharge protection pin DOUT to turn off the discharge protection switch 200, disconnecting the discharge path of the battery, thereby preventing the battery from being damaged due to overdischarging.

[0031] like Figure 1 As shown, when the first electrode is the positive electrode of the battery cell and the second electrode is the negative electrode of the battery, a VCC pin connected to the positive electrode of the battery cell, a VSS pin connected to the negative electrode of the battery cell, and a VM pin connected to the negative electrode BP- of the battery can be set, and the first switching device and the first resistor R1 of the driving circuit can be connected in series between the VCC pin and the VM pin.

[0032] The driving circuit may be provided with a charging protection pin COUT or a discharging protection pin DOUT. The following description will be made by taking the pull-down driving of the charging protection pin COUT as an example.

[0033] Figure 2 FIG. 1 is a schematic diagram of the structure of a driving circuit provided in the first embodiment of the present invention. Figure 2As shown, the first switch device is a first PMOS transistor PM1, which is connected in series with the first resistor R1 between the VCC pin and the VM pin. Specifically, its drain is connected to the first resistor R1, its source is connected to the first electrode, that is, connected to the VCC pin connected to the positive electrode of the battery cell, and its gate is connected to the output end of the control unit. In addition, preferably, the second switch device is a first NMOS transistor NM1, its drain is connected to one end of the first resistor R1 connected to the first switch device, its source is connected to the other end of the first resistor R1, and its gate is coupled to the output end of the control unit.

[0034] Figure 3 for Figure 2 FIG. 1 is a view of the drive signal output by the control unit of the drive circuit in FIG. Figure 3 As shown, during normal charging, CDRV and CDRV_P are at a low level VM, at which time PM1 is turned on and NM1 is turned off, and a path is formed between the positive electrode of the battery cell (i.e., the VCC pin) and the negative electrode BP- (i.e., the VM pin) of the battery through the first resistor R1. The first resistor R1 selects a large resistance so that the charging protection pin COUT outputs a high level VCC, that is, the control end of the charging protection switch 300 is at a high level, the charging protection switch 300 is turned on, and the external charging path is connected. Since the resistance of the first resistor R1 is large, the current in the circuit is weak, which avoids the negative impact on the EMI of the battery protection chip when the drive is too strong. Continue to refer to Figure 3 When charging is overvoltage and / or overcurrent, CDRV jumps to high level VCC and maintains this state, PM1 is cut off, and at the same time CDRV_P also jumps to high level VCC and jumps to low level VM again after time T. When CDRV_P jumps to high level VCC, NM1 is turned on. Since NM1 has a resistance less than the first resistor R1 when turned on, the equivalent resistance in the circuit is small and the current is large, so strong driving can be achieved. The voltage of the charging protection pin COUT can be quickly pulled down from the high level VCC to the low level VM within the set time T, so that the charging protection switch 300 is cut off to shut off the charging path, thereby improving the switching speed of the external MOSFET.

[0035] Figure 4 FIG. 1 is a schematic diagram of the structure of a driving circuit provided in the second embodiment of the present invention. Figure 4 As shown, the second switch device is a second PMOS transistor, whose source is connected to one end of the first resistor R1 connected to the first switch device, whose drain is connected to the other end of the first resistor R1, and whose gate is coupled to the output end of the control unit.

[0036] Figure 5 for Figure 4 FIG. 1 is a view of the drive signal output by the control unit of the drive circuit in FIG. Figure 5 As shown, during normal charging, CDRV is at a low level VM, PM1 is turned on, CDRV_P is at a high level VCC, PM2 is turned off, and a path is formed between the positive electrode of the battery cell (i.e., the VCC pin) and the negative electrode of the battery BP- (i.e., the VM pin) through the first resistor R1. The first resistor R1 selects a large resistance, and the charging protection pin COUT outputs a high level VCC, that is, the control end of the charging protection switch 300 is at a high level, the charging protection switch 300 is turned on, and the external charging path is connected. Since the resistance of the first resistor R1 is large, the current in the circuit is weak, which avoids the negative impact on the EMI of the battery protection chip when the drive is too strong. Continue to refer to Figure 5 When charging is overvoltage and / or overcurrent, CDRV jumps to high level VCC and maintains this state, PM1 is cut off, and at the same time CDRV_P also jumps to low level VM and jumps to high level VCC again after time T. When CDRV_P jumps to low level VM, PM2 is turned on. Since PM2 has a resistance less than the first resistor R1 when turned on, the equivalent resistance in the circuit is small and the current is large, and strong driving can be achieved. The voltage of the charging protection pin COUT can be quickly pulled down from the high level VCC to the low level VM within the set time T, so that the charging protection switch 300 is cut off to shut off the charging path, thereby improving the switching speed of the external MOSFET.

[0037] Figure 6 FIG. 1 is a schematic diagram of the structure of a driving circuit provided in the third embodiment of the present invention. Figure 6 As shown, the driving circuit also includes a second NMOS transistor NM2, a current mirror unit 10 and a second resistor R2, wherein the substrate of the second NMOS transistor is connected to a third electrode, the source thereof is connected to a current bias source IB, the gate thereof is connected to the output end of the control unit and the drain thereof is connected to the input end of the current mirror unit 10, the voltage of the third electrode is less than the voltage of the first electrode and the voltage of the second electrode, wherein the third electrode may be the negative electrode of the battery cell, the substrate of the second NMOS transistor may be connected to a VSS pin connected to the negative electrode of the battery cell, the output end of the current mirror unit 10 is coupled to one end of the second resistor R2, the other end of the second resistor R2 is connected to the second electrode, that is, connected to the VM pin connected to the negative electrode of the battery, and the control end of the second switch device is coupled between the output end of the current mirror unit 10 and the second resistor R2.

[0038] Figure 7 for Figure 6 FIG. 1 is a view of the drive signal output by the control unit of the drive circuit in FIG. Figure 7As shown, during normal charging, CDRV and CDRV_P are at a low level VSS, PM1 is turned on, NM3 is turned off, the gate of NM1 is at a low level, NM1 is turned off, and a path is formed between the positive electrode of the battery cell (i.e., the VCC pin) and the negative electrode of the battery BP- (i.e., the VM pin) through the first resistor R1. The first resistor R1 selects a large resistance, so that the charging protection pin COUT outputs a high level VCC, the charging protection switch 300 is turned on, and the external charging path is connected. Since the resistance of the first resistor R1 is relatively large, the current in the circuit is relatively weak, which avoids the negative impact on the EMI of the battery protection chip when the drive is too strong. Continue to refer to Figure 7 When charging is overvoltage and / or overcurrent, CDRV jumps to high level VCC and maintains this state, PM1 is cut off, and at the same time CDRV_P also jumps to high level VCC and jumps to low level again after time T. When CDRV_P jumps to high level VCC, NM3 is turned on, the gate of NM1 is high level, and NM1 is turned on. Since NM1 has a resistance less than the first resistor R1 when turned on, the equivalent resistance in the circuit is small and the current is large at this time, and strong driving can be achieved. The voltage of the charging protection pin COUT can be quickly pulled down from the high level VCC to the low level VM within the set time T, so that the charging protection switch 300 is cut off to shut down the charging path, thereby improving the switching speed of the external MOSFET.

[0039] Furthermore, if Figure 6 As shown, the driving circuit includes a third NMOS transistor, whose drain and gate are connected to the other end of the second resistor R2, and whose source is connected to the second electrode, that is, connected to the VM pin connected to the negative electrode of the battery. In this way, when the second resistor R2 is selected to have a smaller resistance value, the second switch device can also be turned on. Specifically, when the second switch device is the first NMOS transistor NM1, when CDRV_P is at a high level VCC, the gate voltage of NM1 is greater than the source, and NM1 is turned on.

[0040] In addition, preferably, the current mirror unit 10 includes a third PMOS transistor PM3 and a fourth PMOS transistor PM4, the source of the third PMOS transistor PM3 and the source of the fourth PMOS transistor PM4 are connected to the first electrode, that is, connected to the VCC pin connected to the positive electrode of the battery cell, the drain and gate of the third PMOS transistor PM3 and the gate of the fourth PMOS transistor PM4 are connected to the drain of the second NMOS transistor NM2, and the drain of the fourth PMOS transistor PM4 is coupled to one end of the second resistor R2. In this way, the fourth PMOS transistor PM4 can replicate the current of the third PMOS transistor PM3 at a certain ratio.

[0041] In order to enable the third PMOS transistor PM3 and the fourth PMOS transistor PM4 to select low-voltage tubes to reduce costs, preferably, the driving circuit includes a fifth PMOS transistor PM5, whose source is connected to the drain of the fourth PMOS transistor PM4, whose drain is connected to one end of the second resistor R2, and whose gate is connected to the third electrode, that is, connected to the VSS pin connected to the negative electrode of the battery cell, and the control end of the second switching device is connected between the fifth PMOS transistor PM5 and the second resistor R2.

[0042] In summary, the appropriate sizes of R2, NM1, and NM3 and the high level setting time T of CDRV_P can be selected according to specific work needs. When CDRV_P is at a high level, the switch tube NM2 is turned on, and the current bias IB and the current determined by PM3 and PM4 and the voltage acting on R2 and NM3 ensure that the R of NM1 is ON Meet the driving requirements and complete the action of pulling COUT down to VM within the set time T; when CDRV_P is low, R ON Much larger than R1, at this time, a path is formed between the positive electrode of the battery cell and the negative electrode of the battery through the first resistor R1, and a large resistor is selected as the first resistor R1 to make the current in the circuit smaller. This driving method ensures that the pull-down drive of COUT is determined by R1 in most cases, which is a weak drive that is conducive to EMI, and ensures the strong drive of fast shutdown determined by NM1 when the external charging tube needs to be shut down.

[0043] The professionals should further realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to the function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0044] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A driving circuit, characterized in that: The invention comprises a control unit, a first switch device and a first resistor connected in series between a first electrode and a second electrode, and a second switch device connected in parallel with the first resistor, wherein the second switch device has a resistance smaller than the first resistor when turned on, and a protection pin connected to the control end of the third switch device is arranged between the first switch device and the first resistor, and the drive circuit further comprises a second NMOS transistor, a current mirror unit and a second resistor, wherein the substrate of the second NMOS transistor is connected to the third electrode, the source thereof is connected to the current bias source, the gate thereof is connected to the output end of the control unit, and the drain thereof is connected to the input end of the current mirror unit, the voltage of the third electrode is smaller than the voltage of the first electrode and the voltage of the second electrode, and the current mirror unit The output end of the element is coupled to one end of the second resistor, the other end of the second resistor is connected to the second electrode, and the control end of the second switch device is coupled between the output end of the current mirror unit and the second resistor; wherein: in a first state, the control unit controls the second switch device to be cut off and at the same time controls the first switch device to be turned on to form a path between the first electrode and the second electrode through the first resistor, so that the protection pin outputs a voltage of the first electrode that can turn on the third switch device; in a second state, the control unit controls the first switch device to be cut off and at the same time controls the second switch device to be turned on for a setting time so that the protection pin is cut off after outputting a voltage of the second electrode that can turn off the third switch device.

2. The driving circuit according to claim 1, characterized in that: The first switch device is a first PMOS transistor, a drain of which is connected to the first resistor, a source of which is connected to the first electrode, and a gate of which is connected to the output end of the control unit.

3. The driving circuit according to claim 1, characterized in that: The second switch device is a first NMOS transistor, a drain of which is connected to one end of the first resistor connected to the first switch device, a source of which is connected to the other end of the first resistor, and a gate of which is coupled to the output end of the control unit.

4. The driving circuit according to claim 1, characterized in that: The second switch device is a second PMOS transistor, a source of which is connected to one end of the first resistor connected to the first switch device, a drain of which is connected to the other end of the first resistor, and a gate of which is coupled to the output end of the control unit.

5. The driving circuit according to claim 1, characterized in that: The driving circuit includes a third NMOS transistor, a drain and a gate of which are connected to the other end of the second resistor, and a source of which is connected to the second electrode.

6. The driving circuit according to claim 1, characterized in that: The current mirror unit includes a third PMOS transistor and a fourth PMOS transistor, the source of the third PMOS transistor and the source of the fourth PMOS transistor are connected to the first electrode, the drain and gate of the third PMOS transistor and the gate of the fourth PMOS transistor are connected to the drain of the second NMOS transistor, and the drain of the fourth PMOS transistor is coupled to one end of the second resistor.

7. The driving circuit according to claim 6, characterized in that: The driving circuit includes a fifth PMOS transistor, whose source is connected to the drain of the fourth PMOS transistor, whose drain is connected to one end of the second resistor, and whose gate is connected to the third electrode, and the control end of the second switching device is connected between the fifth PMOS transistor and the second resistor.

8. The driving circuit according to any one of claims 1 to 7, characterized in that: The third switching device is a MOS transistor, and The first electrode is the positive electrode of the battery cell, and the second electrode is the negative electrode of the battery; or, The first electrode is the negative electrode of the battery cell, and the second electrode is the positive electrode of the battery.

9. A battery protection system, characterized in that: It comprises a battery, a discharge protection switch for turning on or off a discharge path, a charge protection switch for turning on or off a charge path, and a drive circuit according to any one of claims 1 to 8, wherein the third switch device comprises the discharge protection switch and the charge protection switch, the protection pin comprises a charge protection pin and the discharge protection pin, the discharge protection pin is connected to the control end of the discharge protection switch, and the charge protection pin is connected to the control end of the charge protection switch.

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