Conductive cap and semiconductor device package

Abstract

A conductive cap and a semiconductor device package are provided. The conductive cap includes a main body. The main body includes a first portion extending from the main body and curved toward a first direction, a second portion extending from the main body and curved toward the first direction, and a third portion extending from the second portion and curved toward a second direction different from the first direction.

Description

Technical Field

[0001] This disclosure relates to a semiconductor device package. More specifically, this disclosure relates to a semiconductor device package having a conductive cap. Background Technology

[0002] A semiconductor device package may contain a semiconductor device on a carrier / substrate. A heat sink / heat radiator is used to dissipate heat from the semiconductor device package. The heat sink / heat radiator may be in thermal contact with the semiconductor device and / or the substrate used for heat dissipation. However, the connection between the heat sink / heat radiator and the semiconductor device can be vulnerable to damage. Furthermore, heat generated through the semiconductor device package may not be dissipated in time, which can damage the semiconductor device package. Summary of the Invention

[0003] In some embodiments, the conductive cap includes a body. The body includes a first portion, a second portion, and a third portion. The first portion extends from the body and is curved toward a first direction. The second portion extends from the body and is curved toward the first direction. The third portion extends from the second portion and is curved toward a second direction different from the first direction.

[0004] In some embodiments, a semiconductor device package includes a semiconductor component, a substrate, and a conductive cap. The semiconductor component is disposed above the substrate. The conductive cap is disposed above the semiconductor component and includes a body. The body includes: a first portion extending from the body and bent toward a first direction, a second portion extending from the body and bent toward the first direction, and a third portion extending from the second portion and bent toward a second direction different from the first direction.

[0005] In some embodiments, a semiconductor device package includes a semiconductor component, a first substrate, a second substrate, and a conductive cap. The semiconductor component is disposed over the first substrate. The first substrate is disposed over the second substrate. The conductive cap includes a body. The body includes: a first portion extending from the body and bent toward a first direction, a second portion extending from the body and bent toward the first direction, and a third portion extending from the second portion and bent toward a second direction different from the first direction. The first portion is connected to the first substrate, and the third portion is connected to the second substrate.

[0006] Other aspects and embodiments of this disclosure are also considered. The foregoing summary and the following description are not intended to limit this disclosure to any particular embodiment, but merely to describe some embodiments of this disclosure. Attached Figure Description

[0007] To better understand the nature and objectives of some embodiments of this disclosure, reference should be made to the following embodiments in conjunction with the accompanying drawings. In the drawings, unless otherwise specified, identical or functionally identical elements are given the same reference numerals.

[0008] Figure 1A A perspective view of a conductive cover according to some embodiments of the present disclosure is shown.

[0009] Figure 1B Plot the intercept along line x-x' Figure 1A Cross-sectional view of the conductive cover.

[0010] Figure 1C Plot the intercept along line y-y' Figure 1A Cross-sectional view of the conductive cap.

[0011] Figures 2(a) to 2(e) The illustration depicts one or more steps of a method for manufacturing a conductive cover 1 according to some embodiments of the present disclosure.

[0012] Figure 3 A perspective view of a conductive cover according to some embodiments of the present disclosure is shown.

[0013] Figure 4 A perspective view of a conductive cover according to some embodiments of the present disclosure is shown.

[0014] Figure 5 A perspective view of a conductive cover according to some embodiments of the present disclosure is shown.

[0015] Figure 6A A perspective view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0016] Figure 6B for Figure 6A An exploded perspective view of a semiconductor device package.

[0017] Figure 7A A perspective view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0018] Figure 7B for Figure 7A An exploded perspective view of a semiconductor device package.

[0019] Figure 8A A perspective view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0020] Figure 8B for Figure 8A An exploded perspective view of a semiconductor device package.

[0021] Figure 9A A perspective view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0022] Figure 9B for Figure 9A An exploded perspective view of a semiconductor device package.

[0023] Figure 10A A perspective view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0024] Figure 10B for Figure 10A An exploded perspective view of a semiconductor device package.

[0025] Figure 11A A perspective view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0026] Figure 11B for Figure 11A An exploded perspective view of a semiconductor device package.

[0027] Figure 12A A perspective view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0028] Figure 12B for Figure 12A An exploded perspective view of a semiconductor device package.

[0029] Figure 13 A cross-sectional view of a semiconductor device package 13 according to another embodiment of the present disclosure is shown.

[0030] Figure 14 A perspective view of a semiconductor device package 14 according to some embodiments of the present disclosure is shown. Detailed Implementation

[0031] Figure 1A A perspective view of a conductive cover 1 according to some embodiments of the present disclosure is shown. Figure 1B Plot the intercept along line x-x' Figure 1A A cross-sectional view of the conductive cover 1. Figure 1C Plot the intercept along line y-y' Figure 1A A cross-sectional view of the conductive cover 1. (See figure) Figure 1A As shown, the conductive cover 1 includes a body 10. The body 10 includes portions 121, 122, 123, and 124. Portions 121 and 122 extend from the body 10 and are curved in a clockwise direction. Portions 123 and 124 extend from the body 10 and are curved in a counter-clockwise direction. Figure 1A and 1BAs shown, portions 121, 122, 123, and 124 are curved toward the lower surface of the body 10. In some embodiments of this disclosure, portions 121, 122, 123, and 124 form a first type of heat dissipation contact portion. The body 10 further includes portions 141, 142, 143, and 144. Portion 141 extends from the body 10 and is curved in a clockwise direction. Portion 142 extends from the second portion 141 and is curved in a counterclockwise direction. Portion 143 extends from the body 10 and is curved in a counterclockwise direction. Portion 144 extends from portion 143 and is curved in a clockwise direction. Figure 1A and 1C As shown, portions 141 and 142 form a stepped shape, and portions 143 and 144 also form a stepped shape. In some embodiments of this disclosure, the lower surfaces of portions 142 and 144 may be connected to external contacts to form a second type of heat dissipation contact portion. In some embodiments, the thermal conductivity of portions 141, 142, 143, and 144 is greater than that of portions 121, 122, 123, and 124.

[0032] In this embodiment, the conductive cover 1 includes four holes 121o, 122o, 123o, and 124o for accommodating locking accessories (e.g., push pins, screws, DIP pins, card hoods, etc.). Figure 1A As shown, holes 121o, 122o, 123o, and 124o are respectively disposed on portions 121, 122, 123, and 124. Note that the number of holes on the conductive cover may be less than or more than four, and can be determined based on the needs of the situation, and is not limited thereto. Reference Figure 1B In this embodiment, the width W1 of the hole 121o on the upper portion of portion 121 is smaller than the width W2 of the hole 121o on the lower portion of portion 121. Similarly, the width W1 of the hole 124o on the upper portion of portion 124 is smaller than the width W2 of the hole 124o on the lower portion of portion 124. In this embodiment, holes 121o, 122o, 123o, and 124o are preferably used to receive push pins. In some embodiments, the width W1 of each of the holes on the upper portions of portions 121, 122, 123, and 124 may be equal to the width W2 of each of the holes on the lower portions of portions 121, 122, 123, and 124. In some other embodiments, the width W1 of each of the holes on the upper portions of portions 121, 122, 123, and 124 may be greater than the width W2 of each of the holes on the lower portions of portions 121, 122, 123, and 124. Widths W1 and W2 can be determined based on the needs of the situation and are not limited thereto.

[0033] Figures 2(a) to 2(e)The illustration depicts one or more steps of a method for manufacturing a conductive cover 1 according to some embodiments of the present disclosure. Referring to FIG2(a), a body 10 having an upper surface 101 and a lower surface 102 is provided, and then a material release is performed on the body 10 by stamping. As shown in FIG2(a), portions r1, r2, r3, and r4 are removed from the body 10. The material of the body 10 of the conductive cover 1 may be, for example, copper, aluminum, aluminum alloys (e.g., aluminum alloys 1050, 1060, 6061, 5052, 7075, etc.), stainless steel, or other metallic materials. Referring to FIG2(b), a further material release is performed on the body 10 by punching to form eight holes 121o1, 121o2, 122o1, 122o2, 123o1, 123o2, 124o1, and 124o2 on the body 10. In this embodiment, the dimensions of holes 121o1, 122o1, 123o1, and 124o1 are smaller than the dimensions of holes 121o2, 122o2, 123o2, and 124o2. For example, the diameter of holes 121o1, 122o1, 123o1, and 124o1 can be 3.5 mm, and the diameter of holes 121o2, 122o2, 123o2, and 124o2 can be 4.5 mm. (See reference...) Figure 2(b) and 2(c) Parts 121, 122, 123, and 124 are formed by bending parts b1, b2, b3, and b4 toward the lower surface 102 of the body 10 so that holes 121o1, 122o1, 123o1, and 124o1 are aligned with holes 121o2, 122o2, 123o2, and 124o2, respectively. (Reference) Figure 2(c) and 2(d) Part 141 is formed by bending part c1 in a clockwise direction, and part 143 is formed by bending part c2 in a counterclockwise direction. (See reference) Figure 2(d) and 2(e) Part 142 is formed by bending part d1 in a counterclockwise direction, and part 144 is formed by bending part d2 in a clockwise direction. As shown in FIG2(e), the entire conductive cover 1 is formed. In some embodiments, the conductive cover 1 can be formed by continuous molding.

[0034] Figure 3 A perspective view of a conductive cover 3 according to some embodiments of the present disclosure is shown. Figure 3 The conductive cover 3 shown in the figure is similar to the conductive cover 1 shown in Figure 1. Figure 3The difference between the conductive cover 3 shown in Figure 3 and the conductive cover 1 shown in Figure 1 is that the conductive cover 3 further includes holes 142h1 and 142h2 on portion 142 and holes 144h1 and 144h2 on portion 144. Holes 142h1, 142h2, 144h1 and 144h2 can be used to accommodate locking fittings.

[0035] Figure 4 A perspective view of a conductive cover 4 according to some embodiments of the present disclosure is shown. Figure 4 The conductive cover 4 shown in the figure is similar to the conductive cover 1 shown in Figure 1. Figure 4 The difference between the conductive cover 4 shown in the figure and the conductive cover 1 shown in Figure 1 is that the conductive cover 4 further includes two additional stepped portions 41 and 42, and the conductive cover 4 further includes retainers 161, 162, 163, and 164 that are bent substantially perpendicular to the body 10. Figure 4 As shown, retainers 161, 162, 163 and 164 further include hook structures 161c, 162c, 163c and 164c, respectively.

[0036] Figure 5 A perspective view of a conductive cover 5 according to some embodiments of the present disclosure is shown. Figure 5 As shown, the conductive cover 5 has a swastika design. Specifically, the conductive cover 5 includes portions 521, 522, 523, and 524 forming a first type of heat dissipation contact portion. The conductive cover 5 further includes stepped portions 525, 526, 527, and 528 forming a second type of heat dissipation contact portion. The conductive cover 5 further includes four holes 521o, 522o, 523o, and 524o on portions 521, 522, 523, and 524o, respectively, for receiving locking accessories (e.g., push pins, screws, DIP pins, hooks, etc.).

[0037] Figure 6A A perspective view of a semiconductor device package 6 according to some embodiments of the present disclosure is shown. Figure 6B for Figure 6A An exploded perspective view of semiconductor device package 6 in the image. (Reference) Figure 6A and 6B The semiconductor device package 6 includes a semiconductor component 60, a substrate 62, and a conductive cap 1. Please note that... Figure 6A and 6B The conductive cover 1 in this example is the same as the conductive cover 1 in Figure 1, and therefore, the structural details of the conductive cover 1 are not repeated here. The semiconductor component 60 may be, for example, a chip. The semiconductor component 60 is disposed above the substrate 62. The conductive cover 1 is disposed above the semiconductor component 60 and the substrate 62. Figure 6BAs shown, the semiconductor device package 6 further includes a thermal interface material (TIM) 66 and tapes 641, 642, 643, and 644. The TIM 66 is disposed between the conductive cap 1 and the semiconductor assembly 60. Tape 641 has a hole and is disposed between the lower surface of portion 121 of the conductive cap 1 and the substrate 62. Tape 642 has a hole and is disposed between the lower surface of portion 122 of the conductive cap 1 and the substrate 62. Tape 643 has a hole and is disposed between the lower surface of portion 123 of the conductive cap 1 and the substrate 62. Tape 644 has a hole and is disposed between the lower surface of portion 124 of the conductive cap 1 and the substrate 62.

[0038] Figure 7A A perspective view of a semiconductor device package 7 according to some embodiments of the present disclosure is shown. Figure 7B for Figure 7A An exploded perspective view of semiconductor device package 7 in the image. (Reference) Figure 7A and 7B The semiconductor device package 7 includes a semiconductor component 60, a substrate 62, and a conductive cap 1. Please note that... Figure 7A and 7B The conductive cover 1 in this example is the same as the conductive cover 1 in Figure 1, and therefore, the structural details of the conductive cover 1 are not repeated here. The semiconductor component 60 may be, for example, a chip. The semiconductor component 60 is disposed above the substrate 62. The conductive cover 1 is disposed above the semiconductor component 60 and the substrate 62. Figure 7B As shown, the semiconductor device package 7 includes a TIM 66 and tapes 641, 642, 643, and 644. The TIM 66 is disposed between the conductive cover 1 and the semiconductor assembly 60. Tape 641 has a hole and is disposed between the lower surface of portion 121 of the conductive cover 1 and the substrate 62. Tape 642 has a hole and is disposed between the lower surface of portion 122 of the conductive cover 1 and the substrate 62. Tape 643 has a hole and is disposed between the lower surface of portion 123 of the conductive cover 1 and the substrate 62. Tape 644 has a hole and is disposed between the lower surface of portion 124 of the conductive cover 1 and the substrate 62. Heat generated by the semiconductor assembly 60 can be conducted to the substrate 62 via portions 121, 122, 123, and 124.

[0039] Figure 7A and 7B Semiconductor device package 7 and Figure 6A and 6BThe difference between the semiconductor device packages 6 and 7 is that the semiconductor device package 7 further includes a substrate 71, a heat sink 72, push pins 731, 732, 733 and 734, springs 735, 736, 737 and 738, and adhesive tapes 745 and 746. Specifically, the substrate 71 is disposed below the substrate 62. In some embodiments, the substrate 62 may be, for example, a ball grid array (BGA) substrate, and the substrate 71 may be, for example, a printed circuit board (PCB). Adhesive tapes 745 and 746 are disposed between the lower surfaces of portions 142 and 144 of the conductive cover 1 and the substrate 71, such that the conductive cover 1 can be secured to the substrate 71. In this embodiment, heat generated by the semiconductor component 60 can be conducted to both the substrate 62 and the substrate 71. The heat sink 72 is disposed on the conductive cover 1. The heat sink 72 further includes holes 721, 722, 723 and 724 at the four corners. In this embodiment, since the conductive cover 1 has holes 121o, 122o, 123o and 124o, the heat sink 72 can be fixed to the conductive cover 1 using push pins 731, 732, 733 and 734 and springs 735, 736, 737 and 738.

[0040] Figure 8A A perspective view of a semiconductor device package 8 according to some embodiments of the present disclosure is shown. Figure 8B for Figure 8A An exploded perspective view of a semiconductor device package 8. Figure 8A and 8B The semiconductor device package 8 is similar to Figure 7A and 7B Semiconductor device package 7. The difference between semiconductor device package 8 and semiconductor device package 7 is that... Figure 8A and 8B The locking accessories are screws 831, 832, 833, and 834, rather than push pins and springs, and the tapes 841, 842, 843, and 844 do not have holes. In this embodiment, since the conductive cover 1 has holes 121o1, 122o1, 123o1, and 124o1, the heat sink 72 can be fixed to the conductive cover 1 using screws 831, 832, 833, and 834.

[0041] Figure 9A A perspective view of a semiconductor device package 9 according to some embodiments of the present disclosure is shown. Figure 9B for Figure 9A An exploded perspective view of semiconductor device package 9. (See attached image.) Figure 9A and 9B As shown, the semiconductor device package 9 includes a semiconductor component 60, a substrate 62, a substrate 71, a conductive cap 4, and a heat sink 92. Please note that... Figure 9A and 9BThe conductive cover 4 in the middle and Figure 4 The conductive cover 4 is identical to that in the previous embodiment, and therefore, the structural details of the conductive cover 4 are not repeated here. In this embodiment, the semiconductor device package 9 includes eight tapes 841, 842, 843, 844, 845, 846, 847, and 848. Tapes 841, 842, 843, and 844 are disposed between the conductive cover 4 and the substrate 62, so that the conductive cover 4 can be secured to the substrate 62. Tapes 845, 846, 847, and 848 are disposed between the conductive cover 4 and the substrate 71, so that the conductive cover 4 can be secured to the substrate 71. In this embodiment, the heat sink 92 can be secured to the conductive cover 4 using the hook structures 161c, 162c, 163c, and 164c of the retainers 161, 162, 163, and 164 of the conductive cover 4.

[0042] Figure 10A A perspective view of a semiconductor device package 10' according to some embodiments of the present disclosure is shown. Figure 10B for Figure 10A Exploded perspective view of a 10' semiconductor device package. (Reference) Figure 10A and 10B The semiconductor device package 10' includes a semiconductor component 60, a substrate 62, tapes 641, 642, 643, and 644, a TIM 66, a conductive cap 3, a substrate 71, a heat sink 72, push pins 731, 732, 733, and 734, springs 735, 736, 737, and 738, and tape 745. In this embodiment, the semiconductor device package 10' further includes DIP pins 1001, 1002, 1003, and 1004, and thermal grease 1005 and 1006. Please note that... Figure 10A and 10B The semiconductor device package 10' is similar to Figure 7A and 7B The semiconductor device package 7 is described above. The difference between semiconductor device package 10' and semiconductor device package 7 is that the conductive cap 3 of semiconductor device package 10' further includes holes 142h1, 142h2, 144h1, and 144h2, and holes h1, h2, h3, and h4 are retained on the substrate 71 so that the conductive cap 3 can be fixed to the substrate 71 using DIP pins 1001, 1002, 1003, and 1004. In some embodiments, semiconductor device package 10' may further include two sheets of thermal paste 1005 and 1006, which are disposed between the conductive cap 3 and the substrate 71 to increase the contact area between the conductive cap 3 and the substrate 71, thereby improving heat dissipation.

[0043] Figure 11A A perspective view of a semiconductor device package 11 according to some embodiments of the present disclosure is shown. Figure 11B for Figure 11AAn exploded perspective view of the semiconductor device package 11. (Reference) Figure 11A and 11B The semiconductor device package 11 includes a semiconductor component 60, a substrate 62, tapes 841, 842, 843, 844, a TIM 66, a conductive cap 3, a substrate 71, a heat sink 72, screws 831 to 838, and tapes 1005 and 1006. Figure 11A and 11B The semiconductor device package 11 is similar to Figure 10A and 10B Semiconductor device package 10' is included. The difference between semiconductor device package 11 and semiconductor device package 10' is that... Figure 11A and 11B The locking mechanism is a screw, not a push pin or spring. Therefore, the heat sink 72 can be secured to the conductive cover 3 using screws 831, 832, 833, and 834. Furthermore, due to the reserved holes 142h1, 142h2, 144h1, and 144h2 on the conductive cover 3 and the reserved holes h1, h2, h3, and h4 on the substrate 71, the conductive cover 3 can be secured to the substrate 71 using screws 835, 836, 837, and 838 and nuts (not shown) on the lower surface of the substrate 71. Note in this embodiment that the diameter of the reserved holes h1, h2, h3, and h4 on the substrate 71 is approximately 3.0 mm to 3.5 mm. In conventional structures, due to the lack of the conductive cover of this disclosure, the diameter of the reserved holes on the substrate (e.g., a PCB) is approximately 5.0 mm to 6.0 mm. Conventional structures have larger reserved holes, thereby reducing the usable space on the substrate (e.g., a PCB).

[0044] Figure 12A A perspective view of a semiconductor device package 12 according to some embodiments of the present disclosure is shown. Figure 12B for Figure 12A An exploded perspective view of the semiconductor device package 12. (Reference) Figure 12A and 12BThe semiconductor device package 12 includes a semiconductor component 60, a substrate 62, a TIM 66, a conductive cap 5, a substrate 71, a heat sink 72, push pins 731, 732, 733, and 734, and springs 735, 736, 737, and 738. The heat sink 72 can be secured to the conductive cap 5 using the push pins 731, 732, 733, and 734 and the springs 735, 736, 737, and 738. The semiconductor device package 12 further includes tapes 941, 942, 943, and 944 disposed between the lower surface of portions 521, 522, 523, and 524 of the conductive cap 5 (i.e., the heat dissipation contact portions of the first type) and the substrate 62, such that the conductive cap 5 can be secured to the substrate 62 and heat generated by the semiconductor component 60 can be conducted to the substrate 62. The semiconductor device package 12 further includes tapes 945, 946, 947 and 948 disposed between the lower surface of portions 525, 526, 527 and 528 of the conductive cover 5 (i.e., the heat dissipation contact portion of the second type) and the substrate 71, such that the conductive cover 5 can be fixed to the substrate 71 and the heat generated by the semiconductor component 60 can be conducted to the substrate 71.

[0045] Figure 13 A cross-sectional view of a semiconductor device package 13 according to another embodiment of the present disclosure is shown. Figure 13 As shown, the semiconductor device package 13 includes a PCB 1300, a BGA substrate 1301, a chip 1302, a cover 1303, and a heat sink 1304. The cover 1303 has a cap shape, which differs from the conductive covers 1, 3, 4, and 5 of the embodiments of this disclosure. The semiconductor device package 13 may further include a TIM 1305 disposed between the cover 1303 and the heat sink 1304, and another TIM 1307 disposed between the chip 1302 and the cover 1303. The semiconductor device package 13 may further include an adhesive 1306 disposed between the cover 1303 and the BGA substrate 1301. The semiconductor device package 13 may further include an adhesive 1308 disposed between the BGA substrate 1301 and the chip 1302, and another adhesive 1309 disposed between the PCB 1300 and the BGA substrate 1301.

[0046] Figure 14 A perspective view of a semiconductor device package 14 according to some embodiments of the present disclosure is shown. Figure 14 The semiconductor device package 14 in the figure is similar to the semiconductor device package 7 in Figure 7, and the only difference is that the semiconductor device package 14 further includes a fan 1410 mounted on a heat sink 72. The fan 1410 can be fixed to the heat sink 72 by thermal paste, adhesive, etc.

[0047] The table below provides a comparison. Figure 13The heat dissipation effect between semiconductor device package 13 (with heat sink 1304 and fan 1310 removed) and semiconductor device package 7 (with heat sink 72 removed) in Figure 7 is illustrated. Note that the materials of the cover 1303 of semiconductor device package 13 and the conductive cover 1 of semiconductor device package 7 are copper (Cu). Table 1 shows the junction temperature and thermal characteristics θ of semiconductor device package 7 under the same conditions. JA , and θ JB All are lower than the junction temperature and thermal characteristics θ of the semiconductor device package 13. JA , and θ JB This means that semiconductor device package 7 has a better heat dissipation effect than semiconductor device package 13. Note the thermal characteristic parameter θ. JA The ability to conduct heat energy throughout a semiconductor device package; parameters of thermal properties. The ability to conduct heat energy from a semiconductor component toward the upper portion of a semiconductor device package; the parameter θ of the thermal characteristics. JB This refers to the ability to conduct heat energy from the chip toward the lower part of the semiconductor device package.

[0048] Table 1

[0049]

[0050] The table below provides a comparison. Figure 13 The heat dissipation effect between semiconductor device package 13 (with heat sink 1304 and fan 1310 removed) and semiconductor device package 7 (with heat sink 72 removed) in Figure 7 is illustrated. Note that in this case, the cover 1303 of semiconductor device package 13 is made of copper (Cu), and the conductive cover 1 of semiconductor device package 7 is made of aluminum (Al). Table 2 shows the junction temperature and thermal characteristics θ of semiconductor device package 7 despite the lower thermal conductivity of aluminum compared to copper. JA , and θ JB All are lower than the junction temperature and thermal characteristics θ of the semiconductor device package 13. JA , and θ JB This means that semiconductor device package 7 still has a better heat dissipation effect than semiconductor device package 13.

[0051] Table 2

[0052]

[0053] The table below provides a comparison. Figure 13 Semiconductor device package 13 and Figure 14The heat dissipation effect between semiconductor device packages 14 is shown. Note that the materials of the cover 1303 of semiconductor device package 13 and the conductive cover 1 of semiconductor device package 7 are copper (Cu), and the fan speed is 0 m / s. Table 3 shows the junction temperature and thermal characteristics θ of semiconductor device package 14 under the same conditions. JA , and θ JB All are lower than the junction temperature and thermal characteristics θ of the semiconductor device package 13. JA , and θ JB This means that semiconductor device package 14 has a better heat dissipation effect than semiconductor device package 13.

[0054] Table 3

[0055]

[0056] The table below provides a comparison. Figure 13 Semiconductor device package 13 and Figure 14 The heat dissipation effect between semiconductor device packages 14 is shown. Note that the material of the cover 1303 of semiconductor device package 13 and the material of the conductive cover 1 of semiconductor device package 7 are copper (Cu), and the airflow speeds of fans 1401 and 1310 are 2 m / s. Table 4 shows the junction temperature and thermal characteristics θ of semiconductor device package 14 under the same conditions. JA , and θ JB All are lower than the junction temperature and thermal characteristics θ of the semiconductor device package 13. JA , and θ JB This means that semiconductor device package 14 has a better heat dissipation effect than semiconductor device package 13.

[0057] Table 4

[0058]

[0059] Unless the context clearly specifies otherwise, as used herein, the singular terms “a / an” and “the” may include multiple indicators. For example, unless the context clearly specifies otherwise, a reference to an electronic device may include multiple electronic devices.

[0060] As used herein, the term "connection" refers to operational coupling or linking. Connected components can be directly or indirectly coupled to each other, for example, via another set of components.

[0061] Additionally, quantities, ratios, and other values ​​are sometimes presented in range format in this document. It should be understood that this range format is used for convenience and brevity, and should be flexibly interpreted to include not only the values ​​explicitly specified as range limits, but also all individual values ​​or subranges covered within that range, as if each value and subrange were explicitly specified.

[0062] While this disclosure has been described and illustrated with reference to specific embodiments thereof, such descriptions and illustrations are not limiting. Those skilled in the art will understand that various changes and substitutions may be made without departing from the true spirit and scope of this disclosure as defined by the appended claims. Illustrations need not be drawn to scale. Differences may exist between artistic representations in this disclosure and actual devices due to manufacturing processes and limitations. Other embodiments of this disclosure may exist that are not specifically illustrated. This specification and the accompanying drawings should be considered illustrative rather than limiting. Modifications may be made to adapt particular circumstances, materials, compositions, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications are intended to be within the scope of the appended claims. Although the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless otherwise specifically indicated herein, the order and grouping of operations are not limitations of this disclosure.

Claims

1. A conductive cap, comprising: The main body includes: The first part extends from the body and bends toward a first direction and bends toward and extends beneath the lower surface of the body; The second part extends from the main body and bends toward the first direction; The third part extends from the second part and bends toward a second direction different from the first direction; The fourth part extends from the body and bends toward the second direction and toward the lower surface of the body and extends thereunder; The fifth part extends from the main body and curves toward the second direction; and The sixth part extends from the fifth part and bends toward the first direction, which is different from the second direction. The first part is on a first side of the body and the fourth part is on a second side of the body, with the first side opposite to the second side. One end of the first part extending below the lower surface of the body and one end of the fourth part extending below the lower surface of the body face each other.

2. The conductive cover according to claim 1, wherein the first direction is clockwise, and wherein the first portion has two holes aligned with each other.

3. The conductive cover according to claim 2, wherein the second direction is counterclockwise, wherein the first portion is at a corner of the body, and the second portion is at the center of the side of the body.

4. The conductive cover of claim 1, wherein each of the first portion and the fourth portion includes a hole for receiving a locking fitting, and wherein the width of the hole on the upper portion of the first portion is smaller than the width of the hole on the lower portion of the first portion, and the width of the hole on the upper portion of the fourth portion is smaller than the width of the hole on the lower portion of the fourth portion.

5. The conductive cap of claim 1, wherein the first portion and the fourth portion are connected to a substrate, and wherein a thermal interface material is located between the first portion and the fourth portion and connected to the semiconductor component.

6. The conductive cover of claim 1, wherein the third portion and the sixth portion are connected to an external contact, and wherein a heat sink is disposed on the body, and the projections of the first portion and the fourth portion onto the body fall within the projection of the heat sink onto the body.

7. A semiconductor device package comprising: Semiconductor components; A substrate, wherein the semiconductor component is disposed above the substrate; and A conductive cap, disposed above the semiconductor assembly and comprising a body, wherein the body includes: The first part extends from the body and bends toward a first direction and toward and beneath the lower surface of the body; The second part extends from the main body and bends toward the first direction; The third part extends from the second part and bends toward a second direction different from the first direction; The fourth part extends from the body and bends toward the second direction and toward the lower surface of the body and extends thereunder; The fifth part extends from the main body and curves toward the second direction; and The sixth part extends from the fifth part and bends toward the first direction, which is different from the second direction. The first part is on a first side of the body and the fourth part is on a second side of the body, with the first side opposite to the second side. One end of the first part extending below the lower surface of the body and one end of the fourth part extending below the lower surface of the body face each other.

8. A semiconductor device package comprising: Semiconductor components; A first substrate, wherein the semiconductor component is disposed above the first substrate; A second substrate, wherein the first substrate is disposed above the second substrate; and A conductive cap includes a body, wherein the body includes: a first portion extending from the body and curved toward and below a first direction, also toward a lower surface of the body; a second portion extending from the body and curved toward the first direction; a third portion extending from the second portion and curved toward a second direction different from the first direction; a fourth portion extending from the body and curved toward the second direction, and curving toward and below the lower surface of the body; a fifth portion extending from the body and curved toward the second direction; and a sixth portion extending from the fifth portion and curved toward a first direction different from the second direction. The first portion is connected to the first substrate, and the third portion is connected to the second substrate. The first part is on a first side of the body and the fourth part is on a second side of the body, with the first side opposite to the second side. One end of the first part extending below the lower surface of the body and one end of the fourth part extending below the lower surface of the body face each other.

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