Display Devices

Abstract

The display device includes: a first pixel electrode, which includes a first electrode part having a first slit and a second electrode part having a second slit; and a first data line and a second data line overlapping the first pixel electrode, the first data line and the second data line being adjacent to each other in a first direction, wherein the first data line overlaps the first electrode part and the first slit, and the second data line overlaps the second electrode part and the second slit; and a first area defined by a first overlapping area between the first slit and the first data line is different from a second area defined by a second overlapping area between the second slit and the second data line.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2018-0121117, filed on October 11, 2018, which is hereby incorporated by reference for all purposes as if fully set forth herein. Technical Field

[0003] Exemplary embodiments of the present invention generally relate to a display device, and more particularly, to a liquid crystal display having improved display quality. Background Art

[0004] Liquid crystal displays are widely used as display devices. The liquid crystal display includes two display panels and a liquid crystal layer arranged between field electrodes such as pixel electrodes and common electrodes. Generally, a voltage applied to the field electrodes of the liquid crystal display to generate an electric field in the liquid crystal layer determines the tilt direction of the liquid crystal molecules of the liquid crystal layer, and an image is displayed by controlling the polarization of incident light.

[0005] However, the wiring that transmits signals such as data voltages may affect the electric field in the liquid crystal layer and deteriorate the display quality of the display device. When more wiring and electrodes are arranged in a limited area of ​​a display device (such as a display device with higher resolution), the influence from the wiring may be greater.

[0006] The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art. Summary of the invention

[0007] Applicants have discovered that adverse effects caused by reducing the spacing between data wiring and electrodes in a liquid crystal display, such as undesirably increasing pixel brightness, can be reduced or eliminated by protecting the liquid crystal layer from electric fields caused by activation of closely spaced data wiring and electrodes.

[0008] Therefore, the display device constructed according to the exemplary embodiment of the present invention can suppress the increase in brightness from the data field, thereby improving the display quality of the display device.

[0009] A display device according to an exemplary embodiment includes: a first pixel electrode, the first pixel electrode including a first electrode part having a first slit and a second electrode part having a second slit; and a first data line and a second data line overlapping the first pixel electrode, the first data line and the second data line being adjacent to each other in a first direction, wherein: the first data line overlaps the first electrode part and the first slit, and the second data line overlaps the second electrode part and the second slit; and a first area defined by a first overlapping region between the first slit and the first data line is different from a second area defined by a second overlapping region between the second slit and the second data line.

[0010] The first slit may have a first width, and the second slit may have a second width different from the first width.

[0011] The first data line may be electrically connected to the first pixel electrode, and a first width of the first slit may be smaller than a second width of the second slit.

[0012] The first slit may include a first slit portion having a first slit width and a second slit portion having a second slit width smaller than the first slit width, and the second slit portion may overlap the first data line.

[0013] The display device may further include a second pixel electrode adjacent to the first pixel electrode in a second direction intersecting the first direction, wherein the second data line is electrically connected to the second pixel electrode.

[0014] The second pixel electrode may include a third electrode part and a fourth electrode part respectively aligned with the first electrode part and the second electrode part of the first pixel electrode in the second direction, and in the second pixel electrode, the third electrode part may include a third slit, the fourth electrode part may include a fourth slit, and a width of the fourth slit may be smaller than a width of the third slit.

[0015] The display device may further include a gate line extending substantially in the first direction, wherein the gate line may include a first sub-gate line electrically connected to the first pixel electrode and a second sub-gate line electrically connected to the second pixel electrode.

[0016] The first pixel electrode may include a transverse stem part, a longitudinal stem part intersecting the transverse stem part, and a plurality of branch parts extending from the transverse stem part or the longitudinal stem part, and the first electrode part may be arranged on one side of the longitudinal stem part, and the second electrode part may be arranged on the other side of the longitudinal stem part.

[0017] The first slit and the second slit may be spaced apart at an interval between adjacent branch parts among the plurality of branch parts.

[0018] The first slit and the second slit may be symmetrically arranged with respect to the longitudinal stem member.

[0019] The first data line and the second data line may be configured to transmit data voltages having polarities different from each other during one frame.

[0020] A first acute angle defined between an extending direction of the first slit and a second direction intersecting the first direction may be different from a second acute angle defined between an extending direction of the second slit and the second direction.

[0021] The first data line may be electrically connected to the first pixel electrode, and the first acute angle may be greater than the second acute angle.

[0022] The display device may further include a second pixel electrode adjacent to the first pixel electrode in a second direction intersecting the first direction; wherein: the second data line may be electrically connected to the second pixel electrode, the second pixel electrode may include a third electrode component and a fourth electrode component respectively aligned with the first electrode component and the second electrode component of the first pixel electrode in the second direction, and in the second pixel electrode, the third electrode component may include a third slit, the fourth electrode component may include a fourth slit, and a third acute angle defined between an extension direction of the fourth slit and the second direction may be greater than the fourth acute angle defined between the extension direction of the third slit and the second direction.

[0023] A display device according to an exemplary embodiment includes: a gate line extending in a first direction; a first transistor and a second transistor electrically connected to the gate line; a pixel electrode including a first sub-pixel electrode and a second sub-pixel electrode, the first sub-pixel electrode including a first slit and a second slit and electrically connected to the first transistor, the second sub-pixel electrode including a third slit and a fourth slit and electrically connected to the second transistor; and a first data line and a second data line overlapping the first sub-pixel electrode and the second sub-pixel electrode and extending substantially in a second direction intersecting the first direction, wherein the first data line overlaps the first slit and the third slit, the second data line overlaps the second slit and the fourth slit, a first area defined by a first overlapping region between the first slit and the first data line is different from a second area defined by a second overlapping region between the second slit and the second data line, and a third area defined by a third overlapping region between the third slit and the first data line is different from a fourth area defined by a fourth overlapping region between the fourth slit and the second data line.

[0024] The width of the first slit may be different from the width of the second slit, and the width of the third slit may be different from the width of the fourth slit.

[0025] The first data line may be electrically connected to the first subpixel electrode and the second subpixel electrode, a width of the first slit may be smaller than a width of the second slit, and a width of the third slit may be smaller than a width of the fourth slit.

[0026] The first data line may be electrically connected to the first subpixel electrode, the second data line may be electrically connected to the second subpixel electrode, and a width of the first slit may be smaller than a width of the second slit, and a width of the fourth slit may be smaller than a width of the third slit.

[0027] A first acute angle defined between the extension direction of the first slit and the second direction may be different from a second acute angle defined between the extension direction of the second slit and the second direction, and a third acute angle defined between the extension direction of the third slit and the second direction may be different from a fourth acute angle defined between the extension direction of the fourth slit and the second direction.

[0028] The first data line may be electrically connected to the first subpixel electrode and the second subpixel electrode, and the first acute angle may be greater than the second acute angle, and the third acute angle may be greater than the fourth acute angle.

[0029] The first data line may be electrically connected to the first subpixel electrode, the second data line may be electrically connected to the second subpixel electrode, the first acute angle may be greater than the second acute angle, and the fourth acute angle may be greater than the third acute angle.

[0030] According to the principles and exemplary embodiments of the present invention, brightness variation caused by a data field formed by a data line overlapping a pixel electrode can be suppressed, thereby improving the display quality of a display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the inventive concept.

[0032] Figure 1 is a schematic layout diagram of a display device constructed according to an exemplary embodiment of the present invention.

[0033] Figure 2 is a top view layout diagram of two pixels of a display device constructed according to an exemplary embodiment of the present invention.

[0034] Figure 3 yes Figure 2 A top plan view of a pixel electrode and a data line.

[0035] Figure 4 is along Figure 2 1 is a cross-sectional view taken along line IVa-IVb of the display device.

[0036] Figure 5 is a schematic diagram exemplarily illustrating the influence of a data field in a display device according to the principles of the present invention.

[0037] Figure 6is a schematic diagram exemplarily illustrating the relationship between a slit of a pixel electrode and a data line in a display device according to the principles of the present invention.

[0038] Figure 7 is a top view layout diagram of four adjacent pixels of a display device constructed according to an exemplary embodiment of the present invention.

[0039] Figure 8 According to an exemplary embodiment Figure 7 A top plan view of a pixel electrode and a data line of a pixel of a display device.

[0040] Fig. 9 According to an exemplary embodiment Figure 7 A top-down layout diagram of a pixel of a display device.

[0041] Fig.10 yes Fig. 9 A top plan view of a pixel electrode and a data line in a pixel.

[0042] Fig.11 is a schematic diagram exemplarily illustrating the relationship between a slit of a pixel electrode and a data line in a display device.

[0043] Fig.12 is a top view layout diagram of one pixel of a display device according to an exemplary embodiment.

[0044] Fig.13 yes Fig.12 Equivalent circuit diagram of a representative pixel.

[0045] Fig.14 is a top view layout diagram of one pixel of a display device according to an exemplary embodiment.

[0046] Fig.15 is a top view layout diagram of one pixel of a display device according to an exemplary embodiment.

[0047] Fig.16 yes Fig.15 Equivalent circuit diagram of a representative pixel.

[0048] Fig.17 is a top view layout diagram of one pixel of a display device according to an exemplary embodiment. DETAILED DESCRIPTION

[0049] In the following description, for the purpose of explanation, many specific details are set forth to provide a comprehensive understanding of various exemplary embodiments or implementations of the present invention. "Embodiment" and "implementation" as used herein are interchangeable words for non-limiting examples of devices or methods using one or more inventive concepts disclosed herein. However, it is apparent that various exemplary embodiments can be practiced without these specific details or one or more equivalent settings. In other examples, well-known structures and devices are shown in the form of block diagrams to avoid unnecessary obscurity of various exemplary embodiments. In addition, various exemplary embodiments may be different, but not necessarily exclusive. For example, the specific shape, configuration, and characteristics of an exemplary embodiment may be used in another exemplary embodiment or implemented in another exemplary embodiment without departing from the inventive concept.

[0050] Unless otherwise specified, the illustrated exemplary embodiments should be understood as providing exemplary features of different details of some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects of the various embodiments (hereinafter referred to as "elements" respectively or collectively) can be further combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0051] The use of cross-hatching and / or shading in the drawings is generally provided to make the boundaries between adjacent elements clear. Therefore, unless otherwise specified, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between the illustrated elements and / or any other characteristics, attributes, properties, etc. of the elements. Further, in the drawings, the size and relative size of the elements may be exaggerated for clarity and / or description purposes. When the exemplary embodiments may be implemented differently, a particular process may be performed in an order different from the order described. For example, two processes described in succession may be performed substantially simultaneously, or in an order opposite to the order described. In addition, the same reference numerals represent the same elements.

[0052] When an element such as a layer is referred to as being "on", "connected to" or "coupled to" another element or layer, it may be directly on, directly connected to or directly coupled to the other element or layer, or there may be an intermediate element or layer. However, when an element or layer is referred to as being "directly" "on", "directly connected to" or "directly coupled to" another element or layer, there is no intermediate element or layer. For this reason, the term "connection" may refer to a physical connection, an electrical connection and / or a fluid connection with or without an intermediate element. Further, the D1 axis, the D2 axis and the D3 axis are not limited to the three axes of a rectangular coordinate system, such as the x-axis, the y-axis and the z-axis, but may be interpreted in a broader sense. For example, the D1 axis, the D2 axis and the D3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0053] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, the first element discussed below can be referred to as the second element without departing from the teachings of the present disclosure.

[0054] For descriptive purposes, spatially relative terms such as "below," "below," "below," "lower," "above," "upper," "above," "higher," "side" (e.g., as in "sidewall"), etc. may be used herein, and thereby describe the relationship of one element to another element as illustrated in the accompanying drawings. Spatially relative terms are intended to include different orientations of the device when in use, in operation, and / or in manufacture other than the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is flipped, an element described as being "below" or "below" other elements or features will be oriented "above" the other elements or features. Thus, the exemplary term "below" can include both above and below orientations. In addition, the device can be oriented otherwise (e.g., rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein are therefore interpreted accordingly.

[0055] The terms used herein are for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, the singular forms of "a" and "the" are intended to also include plural forms, unless the context clearly indicates otherwise. In addition, when used in this specification, the terms "include" and / or "comprise" specify the existence of the features, wholes, steps, operations, elements, parts and / or their groups, but do not exclude the existence or addition of one or more other features, wholes, steps, operations, elements, parts and / or their groups. It should also be noted that, as used herein, the terms "substantially", "approximately" and other similar terms are used as approximate terms and not as terms of degree, and therefore, are utilized to consider the inherent deviations in the numerical values ​​measured, calculated and / or provided that should be recognized by those of ordinary skill in the art.

[0056] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. Terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense unless expressly defined as such herein.

[0057] Figure 1 is a schematic layout diagram of a display device constructed according to an exemplary embodiment of the present invention.

[0058] refer to Figure 1 The display device 1 includes a display panel 10, gate drivers 20a and 20b, and a data driver 30. The display device 1 also includes a signal controller 40 that controls the gate drivers 20a and 20b and the data driver 30, and may further include a backlight unit for providing light to the display panel 10.

[0059] The display panel 10 includes a display area DA and a non-display area NA around the display area DA. The display area DA is a region corresponding to a screen in which an image is displayed and pixels PX, gate lines 121, and data lines 171a and 171b are disposed.

[0060] Pixel PX can be a basic unit for configuring a screen. Each pixel PX can display color and contrast, and the pixels PX can be combined to display an image. The pixels PX can be arranged in a substantially matrix form. As used herein, a group of pixels PX arranged in the row direction is referred to as a pixel row PXR, and a group of pixels PX arranged in the column direction is referred to as a pixel column PXC. The row direction corresponds to a first direction "x", and the column direction corresponds to a second direction "y" intersecting the first direction "x".

[0061] Each pixel PX includes at least one switching element electrically connected to the gate line 121 and the data lines 171a and 171b and at least one pixel electrode connected to the at least one switching element. As used herein, the term "electrically connected to" refers to an element being electrically connected to another element directly or indirectly (such as through a switching element). The switching element may be an electronic element, such as a transistor integrated in the display panel 10, and the transistor may include a gate terminal, an input terminal, and an output terminal. The switching element may be turned on or off according to the gate signal of the gate line 121 to selectively transfer the data voltage from the data lines 171a and 171b to the pixel electrode. The pixel PX may display a predetermined grayscale depending on the data voltage applied to the pixel electrode.

[0062] Each pixel PX may represent one of the primary colors. The primary colors may be, for example, three primary colors of red, green, and blue, and may further include white in some exemplary embodiments. The pixels PX of each pixel column PXC may display the same primary color. The pixels PX of each pixel row PXR may represent the same primary color, or four adjacent pixels PX arranged in a substantially rectangular shape may display two or more different primary colors.

[0063] The gate lines 121 may transmit gate signals such as a gate-on voltage and a gate-off voltage. Each gate line 121 may extend substantially in a first direction x, and the gate lines 121 may be substantially arranged in a second direction y.

[0064] The gate line 121 for transmitting the gate signal may include a first sub-gate line 121a and a second sub-gate line 121b electrically connected to each other. Each of the first sub-gate line 121a and the second sub-gate line 121b may be substantially completely extended in the first direction x, and the first sub-gate line 121a and the second sub-gate line 121b may be substantially parallel to each other in the display area DA. The first sub-gate line 121a and the second sub-gate line 121b are substantially arranged in the second direction y. The first sub-gate line 121a and the second sub-gate line 121b in one gate line 121 may be electrically connected to the pixels PX of two different pixel rows PXR. For example, two different pixel rows PXR may be pixel rows PXR adjacent in the second direction y. The first sub-gate line 121a and the second sub-gate line 121b included in one gate line 121 may be connected to each other near the right / left edge of the display area DA or in the non-display area NA to transmit the same gate signal.

[0065] The data lines 171a and 171b may transmit data voltages corresponding to image signals input to the display device 1. Each of the data lines 171a and 171b may extend substantially in the second direction y, and the data lines 171a and 171b may be substantially arranged in the first direction x.

[0066] A pair of data lines 171a and 171b may be provided for each pixel column PXC. A pair of data lines 171a and 171b corresponding to one pixel column PXC may pass through the pixel PX of the corresponding pixel column PXC and may overlap with the pixel electrode. A pair of data lines 171a and 171b includes a first data line 171a and a second data line 171b. The first data line 171a and the second data line 171b may transmit data voltages of different polarities. For example, the first data line 171a may transmit a data voltage of a positive polarity, and the second data line 171b may transmit a data voltage of a negative polarity. As used herein, "positive polarity" refers to a voltage higher than a common voltage, and "negative polarity" refers to a voltage lower than a common voltage. The polarity of the data voltage transmitted by the first data line 171a and the second data line 171b may vary frame by frame. The first data line 171a and the second data line 171b may be alternately provided in the first direction x. Alternatively, in each pair of data lines 171 a and 171 b adjacent to each other in the first direction x, the first data lines 171 a may be adjacent to each other, or the second data lines 171 b may be adjacent to each other.

[0067] A pair of data lines 171a and 171b corresponding to one pixel column PXC is electrically connected to the pixels PX of the pixel column PXC. More specifically, in one pixel column PXC, two pixels PX electrically connected to the first sub-gate line 121a and the second sub-gate line 121b of one gate line 121, respectively, may be electrically connected to different data lines in the pair of data lines 171a and 171b, respectively. For example, in each pixel column PXC, the pixels PX arranged in the second direction y may each be electrically connected to one data line in the pair of data lines 171a and 171b in an alternating order, such as Figure 1 As shown in . As another example, the pixels PX of the odd-numbered pixel columns PXC may be electrically connected to the first data line 171a, and the pixels PX of the even-numbered pixel columns PXC may be electrically connected to the second data line 171b. However, the inventive concept is not limited thereto. For example, the pixels PX of the odd-numbered pixel columns PXC may be electrically connected to the second data line 171b, and the pixels PX of the even-numbered pixel columns PXC may be electrically connected to the first data line 171a. Therefore, in one pixel column PXC, adjacent pixels PX connected to one gate line 121 may receive data voltages with different polarities simultaneously (e.g., in the same frame) through data lines 171a and 171b.

[0068] In some exemplary embodiments, in the display panel 10 including the pixels PX, the gate lines 121, and the data lines 171a and 171b arranged and connected as described above, the number of the gate lines 121 may be approximately half the number of all the pixel rows PXR, and the number of the data lines 171a and 171b may be approximately twice the number of all the pixel columns PXC.

[0069] The gate drivers 20a and 20b and the signal lines for transmitting various signals applied to the display area DA and the gate drivers 20a and 20b are arranged in the non-display area NA. The gate drivers 20a and 20b are connected to the gate line 121, and can receive the control signal GCS from the signal controller 40 to generate the gate signal and apply the gate signal to the gate line 121. The gate drivers 20a and 20b may include a first gate driver 20a and a second gate driver 20b arranged on the respective sides of the display area DA. Each of the gate drivers 20a and 20b may include a stage substantially arranged in the second direction y, and each stage may be connected to each gate line 121 to transmit the gate signal. The stage may sequentially output the gate signal in the second direction y or in the direction opposite to the second direction y. In some exemplary embodiments, one of the two gate drivers 20a and 20b may be omitted. The gate drivers 20a and 20b may be integrated in the non-display area NA of the display panel 10 with other electronic components (such as transistors in the display area DA) by substantially the same process.

[0070] The data driver 30 is connected to the data lines 171a and 171b. The data driver 30 may receive a control signal DCS and image data from the signal controller 40, convert the image data into a data voltage by using a gray voltage generated by a gray voltage generator, and transmit the data voltage to the data lines 171a and 171b. The data driver 30 may be mounted on a flexible printed circuit film or a printed circuit board (PCB) electrically connected to the display panel 10 in the form of an integrated circuit chip, or may be mounted in the non-display area NA of the display panel 10.

[0071] Next, we will refer to Figures 2 to 6 and Figure 1 A detailed structure of a display device according to an exemplary embodiment is described together.

[0072] Figure 2 is a top view layout diagram of two pixels of a display device constructed according to an exemplary embodiment of the present invention. Figure 3 yes Figure 2 A top plan view of a pixel electrode and a data line. Figure 4 is along Figure 2 1 is a cross-sectional view taken along line IVa-IVb of the display device.

[0073] refer to Figures 1 to 4 According to an exemplary embodiment, a display panel 10 of a display device 1 includes a first substrate 110, a liquid crystal layer 3, and a second substrate 210 which are sequentially arranged in a third direction z, the first substrate 110 and the second substrate 210 face each other, and the liquid crystal layer 3 is arranged between the first substrate 110 and the second substrate 210.

[0074] A gate conductive layer including a gate line 121, a gate electrode 124, and a storage electrode line 131 may be disposed on the first substrate 110. The gate conductive layer may include a metal such as molybdenum (Mo), copper (Cu), aluminum (Al), magnesium (Mg), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), nickel (Ni), neodymium (Nd), iridium (Ir), tungsten (W), titanium (Ti), chromium (Cr), tantalum (Ta), and alloys thereof.

[0075] A gate line 121 may include a pair of line portions 122 and 123. A pair of line portions 122 and 123 may extend substantially parallel to each other in a first direction x. A gate electrode 124 is arranged between a pair of line portions 122 and 123, and the gate electrode 124 may be directly connected to a pair of line portions 122 and 123. In this way, a pair of line portions 122 and 123 may be electrically connected to each other through the gate electrode 124, and may transmit the same gate signal to each other. An opening 25 is formed in the gate line 121 between two adjacent gate electrodes 124 in the first direction x. In this way, a pair of line portions 122 and 123 of the gate line 121 may face each other and be substantially parallel to each other across the opening 25 in a region where the gate electrode 124 is not arranged.

[0076] In a plan view, the storage electrode line 131 is separated from the gate line 121 and the gate electrode 124. The storage electrode line 131 may transmit a constant voltage, such as a common voltage. The storage electrode line 131 may include a main line 131a extending substantially in a first direction x, an extension 131b extending substantially in a second direction y and connected to the main line 131a, and an extension 131c extending from a portion of the main line 131a. The spacing of the extension 131b connected to the main line 131a in the first direction x and the spacing of the extension 131c in the first direction x may be substantially the same as the spacing of the pixels PX in the first direction x.

[0077] The first insulating layer 140 may be disposed on the gate conductive layer. The first insulating layer 140 may include an inorganic insulating material such as silicon oxide (SiO x ), silicon nitride (SiN x ) etc. Hereinafter, the first insulating layer 140 may also be referred to as a gate insulating layer.

[0078] A semiconductor layer including semiconductors 153 and 156 is disposed on the first insulating layer 140. The semiconductor layer may include amorphous silicon, polysilicon, or an oxide semiconductor material. In a plan view, the semiconductor 153 may substantially overlap the gate electrode 124.

[0079] Ohmic contact layers 163 and 165 may be disposed on semiconductor 153. In some exemplary embodiments, when the semiconductor layer includes silicon, ohmic contact layers 163 and 165 may include materials such as n+ hydrogenated amorphous silicon (in which n-type impurities such as phosphorus are doped at a high density) or silicide. In some exemplary embodiments, ohmic contact layers 163 and 165 may be omitted.

[0080] A data conductive layer including the data lines 171a and 171b, the source electrode 173, and the drain electrode 175 may be disposed on the ohmic contact layers 163 and 165 and the first insulating layer 140. The data conductive layer may include a metal such as aluminum (Al), copper (Cu), magnesium (Mg), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), nickel (Ni), neodymium (Nd), iridium (Ir), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), tantalum (Ta), and alloys thereof.

[0081] The data lines 171a and 171b extend substantially in the second direction y and may intersect the gate line 121. The data lines 171a and 171b may include a curved portion CV, and the curved portion CV may include a portion extending substantially in the first direction x and a portion extending substantially in the second direction y. One of the data lines 171a and 171b may be directly connected to the source electrode 173. The source electrode 173 may extend from one of the data lines 171a and 171b toward the gate electrode 124 and may have a substantially "U" shape. The drain electrode 175 may include a portion facing the source electrode 173 in an area overlapping with the gate electrode 124 and an extension portion 177. In a plan view, the extension portion 177 may be arranged above the gate line 121 and the gate electrode 124. Most of the area facing each other between the drain electrode 175 and the source electrode 173 may overlap with the semiconductor 153.

[0082] In a plan view, the extension portion 177 may overlap the extension portion 131c of the storage electrode line 131. The extension portion 177 overlaps the extension portion 131c of the storage electrode line 131 via the first insulating layer 140 interposed between the extension portion 177 and the extension portion 131c to form a storage capacitor Cst. When no data voltage is applied to the data lines 171a and 171b, the storage capacitor Cst may maintain a voltage applied to the drain electrode 175 and the pixel electrode 191 connected to the storage capacitor Cst.

[0083] The gate electrode 124, the source electrode 173, and the drain electrode 175 form a transistor Q together with the semiconductor 153, and the transistor Q can be used as a switching element. The channel of the transistor Q is formed in the semiconductor 153 between the source electrode 173 and the drain electrode 175. One pixel PX can be electrically connected to at least one of the first data line 171a and the second data line 171b through the transistor Q. Figure 2 It is exemplarily shown that the pixel PX is connected to the first data line 171 a .

[0084] In a plan view, the opening 25 in the gate line 121 overlaps with the data lines 171a and 171b to reduce signal delay caused by coupling between the gate line 121 and the data lines 171a and 171b. Each semiconductor 156 can be arranged in a portion where the gate line 121, the gate electrode 124, or the storage electrode line 131 intersects with the data lines 171a and 171b to prevent an electrical short circuit between the gate conductive layer and the data conductive layer.

[0085] In an exemplary embodiment, the ohmic contact layers 163 and 165 may be formed only between the semiconductor 153 below and the data conductive layer thereon to reduce the contact resistance between the semiconductor 153 and the data conductive layer. The semiconductor 153 may have a portion not covered by the data conductive layer, such as a portion between the source electrode 173 and the drain electrode 175.

[0086] The second insulating layer 180a may be disposed on the data conductive layer, and the third insulating layer 180b may be disposed on the second insulating layer 180a. The second insulating layer 180a and the third insulating layer 180b may include an inorganic insulating material and / or an organic insulating material. The second insulating layer 180a and the third insulating layer 180b include a contact hole 185 overlapping the extension portion 177 of the drain electrode 175.

[0087] The color filter layer 230 may be arranged between the second insulating layer 180a and the third insulating layer 180b. The color filter layer 230 includes color filters having different colors, and each color filter may include a pigment having a color represented by a corresponding pixel PX. The third insulating layer 180b may prevent the material of the color filter layer 230 from penetrating into the liquid crystal layer 3. The color filter layer 230 may include an opening 235 overlapping the contact hole 185 of the second insulating layer 180a and the third insulating layer 180b. The contact hole 185 may be arranged in the opening 235.

[0088] In a plan view, two adjacent color filter layers 230 may partially overlap each other at a boundary between pixels PX. More specifically, when each color filter layer 230 extends along each pixel column PXC and one color filter layer 230 is arranged on one pixel column PXC, the two color filter layers 230 may partially overlap each other between adjacent pixel columns PXC, and the region where the two color filter layers 230 overlap may overlap with the extension 131 b of the storage electrode line 131.

[0089] A pixel electrode layer including a pixel electrode 191 and a shielding electrode 199 may be disposed on the third insulating layer 180b. The pixel electrode layer may include a transparent conductive material such as ITO (Indium Tin Oxide) and IZO (Indium Zinc Oxide), or aluminum, silver, chromium, or an alloy thereof.

[0090] refer to Figure 2 and Figure 3 , the pixel electrode 191 may have a substantially quadrilateral shape in which a pattern is formed. The pixel electrode 191 includes a transverse stem part 192, a longitudinal stem part 193, and a branch part 194. An extension 196 and an extension part 197 may be connected to the pixel electrode 191.

[0091] The transverse stem member 192 extends substantially in the first direction x, and the longitudinal stem member 193 extends substantially in the second direction y. The transverse stem member 192 includes a first transverse stem member 192a and a second transverse stem member 192b arranged on the left and right sides of the longitudinal stem member 193, respectively. The second transverse stem member 192b protrudes from the longitudinal stem member 193 substantially in the first direction x, and the first transverse stem member 192a protrudes from the longitudinal stem member 193 substantially in a direction opposite to the first direction x. The pixel electrode 191 may be divided into four sub-regions by the transverse stem member 192 and the longitudinal stem member 193. When an electric field is applied, the liquid crystal molecules 31 of the liquid crystal layer 3 in the four sub-regions may be tilted in directions different from each other, thereby achieving a wide viewing angle.

[0092] The width of the longitudinal stem member 193 in the first direction x may be substantially constant, or may vary along the second direction y. The width of the transverse stem member 192 in the second direction y may be substantially constant, or may vary along the first direction x.

[0093] The branch parts 194 are arranged in four sub-areas and connected to the transverse stem part 192 or the longitudinal stem part 193. The branch parts 194 may extend substantially in an inclined direction relative to the first direction x and the second direction y, and extend from an acute angle of about 30° to about 60°, about 40° to about 50°, or about 45° to the first direction x or the second direction y. The branch parts 194 include a first branch part 194a and a second branch part 194b arranged on the left and right sides of the longitudinal stem part 193, respectively. The first branch part 194a and the second branch part 194b facing each other via the longitudinal stem part 193 between the first branch part 194a and the second branch part 194b extend in different directions. The extension direction of the first branch part 194a and the extension direction of the second branch part 194b may be substantially symmetrical relative to the longitudinal stem part 193.

[0094] The first slit Sa as a spacing slit is arranged between adjacent first branch parts 194a. The second slit Sb is arranged between adjacent second branch parts 194b. The first slit Sa and the second slit Sb may have substantially parallelogram shapes, respectively. In a plan view, when the portion of the pixel electrode 191 arranged on the left side of the longitudinal stem part 193 is referred to as the first electrode part 191a, the first electrode part 191a includes the first transverse stem part 192a and the first branch part 194a, and the first slit Sa is formed in the first electrode part 191a. When the portion of the pixel electrode 191 arranged on the right side of the longitudinal stem part 193 is referred to as the second electrode part 191b, the second electrode part 191b includes the second transverse stem part 192b and the second branch part 194b, and the second slit Sb is formed in the second electrode part 191b. The first electrode part 191a overlaps the first data line 171a, and the second electrode part 191b overlaps the second data line 171b. In addition, the first slit Sa overlaps the first data line 171 a , and the second slit Sb overlaps the second data line 171 b .

[0095] The first width Wa of the first slit Sa is different from the second width Wb of the second slit Sb. As used herein, the first width Wa refers to a width measured in a direction substantially perpendicular to the extension direction of the first slit Sa. The extension direction of the first slit Sa may be substantially parallel to the extension direction of the adjacent first branch part 194a inserted into the first slit Sa. Similarly, the second width Wb refers to a width measured in a direction substantially perpendicular to the extension direction of the second slit Sb, and the extension direction of the second slit Sb may be substantially parallel to the extension direction of the adjacent second branch part 194b inserted into the second slit Sb. According to an exemplary embodiment, the width of the first branch part 194a may be different from the width of the second branch part 194b. In addition to the first width Wa of the first slit Sa and the second width Wb of the second slit Sb being different, for the longitudinal stem part 193, the first electrode part 191a and the second electrode part 191b may have a substantially symmetrical shape. In addition to the first width Wa and the second width Wb being different, the first slit Sa and the second slit Sb may be substantially symmetrical with respect to the longitudinal stem part 193. However, the inventive concept is not limited thereto. For example, in some exemplary embodiments, the first slit Sa and the second slit Sb may be asymmetric with respect to the longitudinal stem part 193. The first width Wa of the first slit Sa may be substantially constant in the first electrode part 191a and may be different depending on the position. The second width Wb of the second slit Sb may be substantially constant in the second electrode part 191b and may be different depending on the position. The first width Wa and the second width Wb may be formed differently from each other to reduce the overlapping area between the slit and the data line, thereby suppressing the brightness increase caused by the data field, which will be described in more detail below.

[0096] The extension 196 includes a first extension 196a and a second extension 196b connected to the first electrode part 191a and the second electrode part 191b, respectively. The first extension 196a may extend from the first branch part 194a of the first electrode part 191a, and the second extension 196b may extend from the second branch part 194b of the second electrode part 191b. The first extension 196a and the second extension 196b are connected to an extension portion 197 disposed therebetween. The extension portion 197 overlaps with the extension portion 177 of the drain electrode 175 of the transistor Q in a plan view, and is connected to the extension portion 177 of the drain electrode 175 via the contact hole 185 to receive a data voltage.

[0097] like Figure 2As shown in , the ends of the left and right edges of the pixel electrode 191 may not overlap with the extension 131b, but in some exemplary embodiments, they may overlap each other. In some exemplary embodiments, the extension 131b may include an extension that overlaps with the longitudinal stem 193 of the pixel electrode 191.

[0098] The shielding electrode 199 is spaced apart from the pixel electrode 191 and may extend substantially in the first direction x and may be located between two adjacent pixel rows PXR in the second direction y. The shielding electrode 199 overlaps at least a portion of the gate line 121 to prevent light leakage that may occur near the gate line 121. The shielding electrode, which may be formed of a pixel electrode layer, may also be disposed on the extension 131 b of the storage electrode line 131.

[0099] The light shielding member 220 may be disposed under the second substrate 210. The light shielding member 220 may block light leakage between adjacent pixel electrodes 191. Specifically, the light shielding member 220 may be disposed in a region between adjacent pixel electrodes 191 in the second direction y, and may extend substantially in the first direction x. In a plan view, the light shielding member 220 may prevent light leakage by covering a majority of a region where the transistor Q, the gate line 121, and the drain electrode 175 are disposed.

[0100] On the other hand, the extension portion 131 b of the storage electrode line 131 may block light leakage between adjacent pixel electrodes 191 by overlapping most of a space between two adjacent pixel electrodes 191 in the first direction x.

[0101] The common electrode 270 may be arranged under the second substrate 210 and the light shielding member 220. The common electrode 270 may be continuously formed at a portion of the area corresponding to the display area DA. The common electrode 270 may include a transparent conductive material such as ITO or IZO, or aluminum, silver, chromium, or an alloy thereof. The color filter layer 230 may be arranged under the second substrate 210, for example, between the second substrate 210 and the common electrode 270.

[0102] The liquid crystal layer 3 may include liquid crystal molecules 31 having negative dielectric anisotropy. However, in some exemplary embodiments, the liquid crystal molecules 31 may have positive dielectric anisotropy. When no electric field is applied in the liquid crystal layer 3, the liquid crystal molecules 31 may be oriented so that its long axis is substantially vertical or at an acute angle relative to the surfaces of the first substrate 110 and the second substrate 210. The liquid crystal molecules 31 may be pre-tilted according to the patterned portion of the pixel electrode 191 (e.g., the edge field between the edge of the branch part 194 and the common electrode 270).

[0103] The alignment layer 11 may be disposed on the pixel electrode 191, and the alignment layer 21 may be disposed under the common electrode 270. Both the alignment layer 11 and the alignment layer 21 may be vertical alignment layers. Polymer protrusions (ridges) including active liquid crystal primitives that react to light such as ultraviolet light may be disposed on surfaces of the alignment layer 11 and the alignment layer 21 adjacent to the liquid crystal layer 3, so that the pre-tilt of the liquid crystal molecules 31 of the liquid crystal layer 3 may be maintained by the polymer protrusions.

[0104] In the display device 1 according to the exemplary embodiment, when the data voltage is applied to the pixel electrode 191 and the common voltage is applied to the common electrode 270, an electric field is generated in the liquid crystal layer 3. The electric field includes a vertical component and a fringe field component, the vertical component is substantially vertical to the surfaces of the first substrate 110 and the second substrate 210, and the fringe field component may be formed by the edges of the pattern of the transverse stem part 192, the longitudinal stem part 193, and the branch part 194 of the pixel electrode 191. The liquid crystal molecules 31 may tilt in a direction substantially parallel to the surfaces of the first substrate 110 and the second substrate 210 in response to the applied electric field, and in the region where the branch part 194 is formed, the liquid crystal molecules 31 may tilt toward the inside of each branch part 194 by the fringe field, and finally tilt in a direction substantially parallel to the extension direction of the branch part 194. Therefore, the liquid crystal layer 3 corresponding to each pixel electrode 191 may be divided into four regions having different directions in which the liquid crystal molecules 31 may tilt. These four regions correspond to the four sub-regions of the above-mentioned pixel electrode 191.

[0105] When a pair of data lines 171a and 171b of each pixel column PXC is arranged in a light shielding area between two adjacent pixel columns PXC, two data lines 171a and 171b of different pixel columns PXC may become close to each other, thereby increasing the risk of being short-circuited and increasing the crosstalk between adjacent data lines 171a and 171b. In addition, in the manufacturing process of the display device 1, when the alignment between the layers is not accurate, the parasitic capacitance between the data lines 171a and 171b and the pixel electrode 191 may be different on each side of the pixel electrode 191. In addition, increasing the interval between the two adjacent data lines 171a and 171b to reduce the possibility of short circuits and crosstalk may deteriorate the aperture ratio of the display device, which may be detrimental to providing high resolution. In this way, a pair of data lines 171a and 171b according to an exemplary embodiment can be arranged to overlap the pixel electrode 191 in the corresponding pixel column PXC, which can reduce the risk of causing a short circuit and crosstalk between the data lines 171a and 171b, and can reduce or prevent changes in parasitic capacitance between the data lines 171a and 171b and the pixel electrode 191.

[0106] However, when a pair of data lines 171a and 171b is arranged to overlap the pixel electrode 191 arranged in the corresponding pixel column PXC, an electric field caused by a data voltage transmitted through the data lines 171a and 171b (hereinafter may be referred to as a "data field") may affect the liquid crystal layer 3 and distort the electric field in the liquid crystal layer 3. In this way, the brightness of a specific area of ​​the screen may be increased or decreased.

[0107] Figure 5 is a schematic diagram exemplarily illustrating the influence of a data field in a display device according to the principles of the present invention. Figure 6 is a schematic diagram exemplarily illustrating the relationship between a slit of a pixel electrode and a data line in a display device according to the principles of the present invention. Figure 5 The relevant configuration is only schematically shown to illustrate the influence of the data fields of the data lines 171a and 171b.

[0108] Return to reference Figures 2 to 4 Since the first data line 171a and the second data line 171b overlap the first electrode part 191a and the second electrode part 191b, respectively, the first data line 171a and the second data line 171b overlap the first slit Sa and the second slit Sb, respectively. Due to the first slit Sa and the second slit Sb, the data field of the first data line 171a and the second data line 171b is not completely shielded, and therefore, the electric field in the liquid crystal layer 3 may be affected through the first slit Sa and the second slit Sb. For example, when a high grayscale is displayed after a low grayscale is displayed in the second direction y (the second direction y is the sequential output direction of the gate signal), the influence of the data field may be manifested as an increase in brightness in the low grayscale display area.

[0109] More specifically, during a specific frame, the first data line 171a may transmit a positive data voltage, and the second data line 171b may transmit a negative data voltage. In a specific pixel column PXC during a corresponding frame, a pixel PX (hereinafter referred to as a "previous pixel") connected to the first data line 171a and receiving a positive data voltage (e.g., a data voltage of 10V when the common voltage is 7.5V) to display a low grayscale (e.g., a grayscale of about 25 to 32 in 255 grayscales) may be charged with a positive data voltage. In the previous pixel, a first region overlapping the first data line 171a may have a potential increased by a higher positive data voltage (e.g., 15V) applied to a different pixel PX (hereinafter referred to as a "next pixel") displaying a high grayscale, and therefore, the brightness of the first region may be increased. On the other hand, in the previous pixel, the second area overlapping the second data line 171b may have a potential reduced by a lower negative data voltage (e.g., 0V) applied to the next pixel displaying a high grayscale, and therefore, the brightness of the second area may be reduced. Similarly, when the previous pixel is electrically connected to the second data line 171b, the brightness of the second area overlapping the second data line 171b may be increased, and the brightness of the first area overlapping the first data line 171a may be reduced. In low grayscale, the effect of the brightness increase is greater than the effect of the brightness reduction, so the brightness of the previous pixel may be increased in general.

[0110] When the electrically connected data line transmits a negative data voltage and the adjacent data line transmits a positive data voltage, the influence of the brightness increase of the previous pixel is substantially the same. For example, when the previous pixel is electrically connected to the first data line 171a, the first data line 171a transmits a negative data voltage, and the second data line 171b transmits a positive data voltage. When the previous pixel is charged with a negative data voltage, the potential of the first region can be reduced by a lower negative data voltage applied to the next pixel. This is because the negative data voltage is charged into the previous pixel, and the intensity of the electric field increases. In this way, the brightness of the first region can be increased. In the second region, the potential of the second region can be increased by a higher positive data voltage applied to the next pixel. This is because the negative data voltage is charged into the previous pixel, and the intensity of the electric field decreases. In this way, the brightness of the second region can be reduced. Therefore, the brightness of the corresponding pixel PX can be increased in general, thereby deteriorating the image quality.

[0111] According to an exemplary embodiment, the first width Wa may be formed to be different from the second width Wb to prevent the increased brightness caused by the overlap between the pixel electrode 191 and the pair of data lines 171a and 171b from causing deterioration of the image. More specifically, when the first width Wa is formed to be smaller than the second width Wb, the data field may be reduced in an area that may have increased brightness (e.g., a first area overlapping the first data line 171a electrically connected to the corresponding pixel PX among the pair of data lines 171a and 171b). When the corresponding pixel PX is electrically connected to the second data line 171b, the second width Wb may be formed to be smaller than the first width Wa, thereby suppressing an increase in brightness.

[0112] According to another exemplary embodiment, the influence of the data field can be controlled by changing the thickness of the insulating layer between the pair of data lines 171a and 171b and the pixel electrode 191. For example, the insulating layer of the area overlapping with the data line electrically connected to the corresponding pixel can be formed to be thicker than the insulating layer of the area overlapping with the data line not electrically connected to the corresponding pixel. Since the increased thickness of the insulating layer has a greater influence on voltage enhancement, the data field of the data line electrically connected to the corresponding pixel can be reduced. For example, when the pixel electrode 191 is electrically connected to the first data line 171a, the thickness of the second insulating layer 180a and / or the third insulating layer 180b can be formed to be thicker in the area overlapping with the first electrode part 191a than in the area overlapping with the second electrode part 191b.

[0113] refer to Figure 6 , the first width Wa of the first slit Sa is smaller than the second width Wb of the second slit Sb, and the area of ​​the region Aa where the first slit Sa overlaps with the first data line 171a is smaller than the area of ​​the region Ab where the second slit Sb overlaps with the second data line 171b. Therefore, the first electrode part 191a formed with the first slit Sa can further shield the data field than the second electrode part 191b formed with the second slit Sb. In this way, when the pixel electrode 191 is connected to the first data line 171a and receives the data voltage from the first data line 171a, the influence of the increased brightness in the region overlapping with the first data line 171a can be reduced, thereby substantially offsetting or reducing the brightness change in the corresponding pixel.

[0114] On the other hand, when a low grayscale is displayed after a high grayscale is displayed in the sequential output direction of the gate signal, the above-mentioned problem of increased brightness may also occur in the low grayscale display area. This is because the low grayscale display area of ​​a particular frame increases or decreases the potential of the first region (due to a higher positive data voltage or a lower negative data voltage being applied to the high grayscale display area of ​​the next frame), thereby increasing the brightness. In this case, the first width Wa of the first slit Sa and the second width Wb of the second slit Sb can be changed according to the principles of the present invention described above to substantially offset or reduce the brightness variation in the corresponding pixel.

[0115] Figure 7 is a top view layout diagram of four adjacent pixels of the display device 1 constructed according to an exemplary embodiment. Figure 7 The pixel electrodes 191 arranged in the pixel row PXR are shown connected to Figure 1 The structure of a pair of data lines 171a and 171b is shown in FIG.

[0116] refer to Figure 7 , among the pixel rows PXR, the pixel electrode 191 of the upper pixel row PXR is electrically connected to the first transistor Qa, the first transistor Qa is electrically connected to the first sub-gate line 121a and the first data line 171a, and the pixel electrode 191 of the lower pixel row PXR is electrically connected to the second transistor Qb, the second transistor Qb is electrically connected to the second sub-gate line 121b and the second data line 171b. Therefore, in the lower pixel row PXR, the width of the second slit Sb overlapping the second data line 171b may be smaller than the width of the first slit Sa overlapping the first data line 171a.

[0117] The first sub-gate line 121a and the second sub-gate line 121b are electrically connected to each other to transmit the same gate signal. Therefore, the pixel electrodes 191 of two adjacent pixel rows PXR in the second direction y can be alternately connected to different data lines 171a and 171b through transistors Qa and Qb. A pair of data lines 171a and 171b corresponding to a pixel column PXC can extend substantially in the second direction y across the pixel electrodes 191 of the corresponding pixel column PXC.

[0118] Next, refer to Figure 8 and the above-mentioned drawings to describe a display device according to an exemplary embodiment.

[0119] Figure 8 According to an exemplary embodiment Figure 7 A top plan view of a pixel electrode and a data line of a pixel of a display device.

[0120] refer to Figure 8, the display device according to the exemplary embodiment is substantially the same as the above-described display device 1, except that the widths Wa1 and Wa2 of the first slit Sa of the first electrode part 191a are substantially different when the first data line 171a is electrically connected to the pixel electrode 191. More specifically, the first slit Sa includes a portion having a relatively wide width Wa1 and a portion having a relatively narrow width Wa2. In the first slit Sa, the portion having the width Wa2 overlaps the first data line 171a. The portion having the width Wa1 in the first slit Sa may not overlap the first data line 171a. The width Wa1 may be equal to or substantially equal to the width Wb of the second slit Sb of the second electrode part 191b. In this way, when the widths Wa1 and Wa2 of the first slit Sa are formed to be relatively narrow only in the area overlapping with the first data line 171a while minimizing the design variation of the branch parts 194a and 194b of the pixel electrode 191, the area of ​​the portion of the first slit Sa overlapping with the first data line 171a can be reduced, thereby reducing the influence of the data field caused by the first data line 171a electrically connected to the corresponding pixel PX.

[0121] On the other hand, when the second data line 171b is electrically connected to the pixel electrode 191, the widths Wa1 and Wa2 of the first slits Sa of the first electrode part 191a may be substantially the same as each other, and the width Wb of the second slits Sb of the second electrode part 191b may be formed to have at least two different widths, wherein a relatively narrow one is arranged in a portion overlapping with the second data line 171b.

[0122] Next, refer to Figures 9 to 11 and the above-mentioned drawings to describe a display device according to an exemplary embodiment.

[0123] Fig. 9 According to an exemplary embodiment Figure 7 A top-down layout diagram of a pixel of a display device. Fig.10 yes Fig. 9 A top plan view of a pixel electrode and a data line in a pixel of Fig.11 is a schematic diagram exemplarily illustrating the relationship between a slit of a pixel electrode and a data line in a display device according to the principles of the present invention.

[0124] refer to Fig. 9 and Fig.10 , a display device according to the illustrated exemplary embodiment and Figure 2 and Figure 3The display device of the embodiment of the present invention is substantially the same except for the shape of the pixel electrode 191. Specifically, in the pixel electrode 191 according to the illustrated exemplary embodiment, the first angle α, which is an acute angle formed between the extension direction of the first slit Sa of the first electrode part 191a and the second direction y, and the second angle β, which is formed between the extension direction of the second slit Sb of the second electrode part 191b and the second direction y, are different. The extension direction of the first slit Sa corresponds to the extension direction of the first branch part 194a adjacent to the first slit Sa, and the extension direction of the second slit Sb corresponds to the extension direction of the second branch part 194b adjacent to the second slit Sb. When the pixel electrode 191 is electrically connected to the first data line 171a, the first angle α may be greater than the second angle β. Specifically, the first branch part 194a and the first slit Sa are more inclined toward the transverse stem part 192 than the second branch part 194b and the second slit Sb. For example, the first angle α may be greater than the second angle β by about 1° to about 30° or about 5° to about 20°. When the first angle α and the second angle β are different from each other, the area of ​​the first slit Sa overlapped with the first data line 171a and the area of ​​the second slit Sb overlapped with the second data line 171b may also be different from each other. Fig.11 , even if the width of the first slit Sa is the same as the width of the second slit Sb, when the first angle α is greater than the second angle β, the area of ​​the region Aa where the first slit Sa overlaps the first data line 171a is smaller than the area of ​​the region Ab where the second slit Sb overlaps the second data line 171b. Therefore, since the first electrode part 191a formed with the first slit Sa can shield the data field more than the second electrode part 191b formed with the second slit Sb, when the pixel electrode 191 is electrically connected to the first data line 171a to receive the data voltage from the first data line 171a, the increase in brightness in the region overlapping the first data line 171a can be suppressed.

[0125] On the other hand, when the pixel electrode 191 is electrically connected to the second data line 171 b , the second angle β may be greater than the inclined first angle α of the first slit Sa.

[0126] In some exemplary embodiments, the first angle α and the second angle β may be formed as follows: Fig. 9 and Fig.10 , and the first width Wa and the second width Wb may be formed as shown in FIG. Figure 2 and Figure 3 , so as to suppress the increase in brightness in the area overlapping with the electrically connected data line of the pair of data lines 171a and 171b. For example, when the pixel electrode 191 is electrically connected to the first data line 171a, the first angle α may be greater than the second angle β, and the first width Wa may be less than the second width Wb.

[0127] Fig.12 is a top view layout diagram of one pixel of a display device according to an exemplary embodiment, and Fig.13 yes Fig.12 An equivalent circuit diagram of a representative pixel shown in . The display device according to the illustrated exemplary embodiment is substantially similar to the above-described display device, and therefore, descriptions of substantially similar components will be omitted to avoid redundancy, and differences will be mainly described.

[0128] refer to Fig.12 , one pixel PX is divided into two sub-pixels sPX1 and sPX2, and the first data line 171a overlapping the pixel PX of a pair of data lines 171a and 171b is electrically connected to the pixel PX to improve lateral visibility. The first sub-pixel electrode 1911 and the second sub-pixel electrode 1912 are electrically connected to the first data line 171a.

[0129] refer to Fig.13 , the pixel PX is connected to the gate line 121, the first data line 171a and the reference voltage line 172. The pixel PX includes a first sub-pixel sPX1 and a second sub-pixel sPX2. The first sub-pixel sPX1 includes a first transistor Qa, a first liquid crystal capacitor Clc1 and a first storage capacitor Cst1, and the second sub-pixel sPX2 includes a second transistor Qb, a third transistor Qc, a second liquid crystal capacitor Clc2 and a second storage capacitor Cst2.

[0130] The first transistor Qa and the second transistor Qb are connected to the gate line 121 and the first data line 171 a , respectively, and the third transistor Qc is connected to an output terminal of the second transistor Qb and the reference voltage line 172 .

[0131] The output terminal of the first transistor Qa is connected to the first liquid crystal capacitor Clc1 and the first storage capacitor Cst1, and the output terminal of the second transistor Qb is connected to the second liquid crystal capacitor Clc2, the second storage capacitor Cst2, and the input terminal of the third transistor Qc. The control terminal of the third transistor Qc is connected to the gate line 121, the input terminal of the third transistor Qc is connected to the second liquid crystal capacitor Clc2 and the second storage capacitor Cst2, and the output terminal is connected to the reference voltage line 172.

[0132] As in Fig.13As shown in the equivalent circuit diagram of the pixel PX shown in , if the gate-on voltage is applied to the gate line 121, the first transistor Qa, the second transistor Qb and the third transistor Qc are turned on. In this way, the data voltage applied to the first data line 171a is applied to the first liquid crystal capacitor Clc1 and the second liquid crystal capacitor Clc2 through the turned-on first transistor Qa and the second transistor Qb, respectively, and the first liquid crystal capacitor Clc1 and the second liquid crystal capacitor Clc2 are charged to the difference between the data voltage and the common voltage. In this case, the same data voltage is applied to the first liquid crystal capacitor Clc1 and the second liquid crystal capacitor Clc2 through the first transistor Qa and the second transistor Qb, respectively, and the charging voltage of the second liquid crystal capacitor Clc2 is shared by the third transistor Qc. Therefore, the charging voltage of the second liquid crystal capacitor Clc2 becomes less than the charging voltage of the first liquid crystal capacitor Clc1, thereby distinguishing the brightness of the two sub-pixels sPX1 and sPX2. By properly adjusting the voltage charged in the first liquid crystal capacitor Clc1 and the voltage charged in the second liquid crystal capacitor Clc2, an image observed from the side can be made as close as possible to an image observed from the front, thereby improving lateral visibility.

[0133] Return to reference Fig.12 , the first subpixel sPX1 includes a first subpixel electrode 1911, and the second subpixel sPX2 includes a second subpixel electrode 1912. The first subpixel electrode 1911 corresponds to one electrode of the first liquid crystal capacitor Clc1, and the second subpixel electrode 1912 corresponds to one electrode of the second liquid crystal capacitor Clc2. A gate line 121, which may include a pair of line portions 122 and 123, is disposed between the first subpixel electrode 1911 and the second subpixel electrode 1912.

[0134] The first sub-pixel electrode 1911 includes a transverse stem part 1921, a longitudinal stem part 1931, and a branch part 1941. The transverse stem part 1921 includes a first transverse stem part 1921a and a second transverse stem part 1921b respectively arranged on the left and right sides of the longitudinal stem part 1931. The branch part 1941 includes a first branch part 1941a and a second branch part 1941b respectively arranged on the left and right sides of the longitudinal stem part 1931. The first slit S1a is arranged between adjacent first branch parts 1941a, and the second slit S1b is arranged between adjacent second branch parts 1941b. When the portion of the first sub-pixel electrode 1911 arranged on the left side of the longitudinal stem part 1931 is referred to as the first electrode part 1911a, the first electrode part 1911a includes the first transverse stem part 1921a and the first branch part 1941a, and the first slit S1a is formed in the first electrode part 1911a. When a portion of the first subpixel electrode 1911 disposed on the right side of the longitudinal stem part 1931 is referred to as a second electrode part 1911b, the second electrode part 1911b includes a second transverse stem part 1921b and a second branch part 1941b, and a second slit S1b is formed in the second electrode part 1911b.

[0135] As with the first subpixel electrode 1911, the second subpixel electrode 1912 includes a transverse stem part 1922, a longitudinal stem part 1932, and a branch part 1942. The transverse stem part 1922 includes a first transverse stem part 1922a and a second transverse stem part 1922b, which are respectively arranged on the left and right sides of the longitudinal stem part 1932. The branch part 1942 includes a first branch part 1942a and a second branch part 1942b, which are respectively arranged on the left and right sides of the longitudinal stem part 1932. The third slit S2a is arranged between adjacent first branch parts 1942a, and the fourth slit S2b is arranged between adjacent second branch parts 1942b. The third electrode part 1912a includes a first transverse stem part 1922a and a first branch part 1942a, and the third electrode part 1912a has a third slit S2a. The fourth electrode part 1912b includes a second transverse stem part 1922b and a second branch part 1942b, and the fourth electrode part 1912b includes a fourth slit S2b. The third electrode part 1912a and the fourth electrode part 1912b of the second subpixel electrode 1912 are aligned with the first electrode part 1911a and the second electrode part 1911b of the first subpixel electrode 1911 in the second direction y, respectively.

[0136] A pair of data lines 171a and 171b extending substantially in the second direction y overlaps the first sub-pixel electrode 1911, and also overlaps the second sub-pixel electrode 1912. The first data line 171a overlaps the first electrode part 1911a and the first slit S1a of the first sub-pixel electrode 1911, and overlaps the third electrode part 1912a and the third slit S2a of the second sub-pixel electrode 1912. The second data line 171b overlaps the second electrode part 1911b and the second slit S1b of the first sub-pixel electrode 1911, and overlaps the fourth electrode part 1912b and the fourth slit S2b of the second sub-pixel electrode 1912.

[0137] The first width W1a of the first slit S1a in the first subpixel electrode 1911 is different from the second width W1b of the second slit S1b. In the second subpixel electrode 1912, the third width W2a of the third slit S2a is different from the fourth width W2b of the fourth slit S2b. When the first data line 171a is electrically connected to the first subpixel electrode 1911 and the second subpixel electrode 1912, as shown in FIG. Fig.12 As shown in , the first width W1a may be smaller than the second width W1b, and the third width W2a may be smaller than the fourth width W2b. Alternatively, when the second data line 171b is electrically connected to the first subpixel electrode 1911 and the second subpixel electrode 1912, the second width W1b may be smaller than the first width W1a, and the fourth width W2b may be smaller than the third width W2a. In this way, for example, the overlapping area between the slit and the data line can be reduced by relatively narrowing the width of the slit overlapping the data line electrically connected to the corresponding pixel PX among a pair of data lines 171a and 171b, and thus, the low grayscale display area can suppress the increase in brightness due to the data field that may be caused by the data voltage applied to the high grayscale display area.

[0138] Fig.14 is a top view layout diagram of one pixel of a display device according to an exemplary embodiment.

[0139] refer to Fig.14 , a display device according to the illustrated exemplary embodiment and Fig.12The display device shown in is substantially the same except for the shapes of the first sub-pixel electrode 1911 and the second sub-pixel electrode 1912. Specifically, in the first sub-pixel electrode 1911, a first angle α1 as an acute angle between an extension direction of the first slit S1a of the first electrode part 1911a and the second direction y and a second angle β1 as an acute angle between an extension direction of the second slit S1b of the second electrode part 1911b and the second direction y are different. In the second sub-pixel electrode 1912, a third angle α2 as an acute angle between an extension direction of the third slit S2a of the third electrode part 1912a and the second direction y and a fourth angle β2 as an acute angle between an extension direction of the fourth slit S2b of the fourth electrode part 1912b and the second direction y are different. When the first data line 171a is electrically connected to the first sub-pixel electrode 1911 and the second sub-pixel electrode 1912, as Fig.14 As shown, the first angle α1 may be greater than the second angle β1, and the third angle α2 may be greater than the fourth angle β2. Alternatively, when the second data line 171b is electrically connected to the first subpixel electrode 1911 and the second subpixel electrode 1912, the second angle β1 may be greater than the first angle α1, and the fourth angle β2 may be greater than the third angle α2. In this way, relatively increasing the angle of the slit overlapping the data line electrically connected to the corresponding pixel PX among the pair of data lines 171a and 171b can reduce the overlapping area between the slit and the data line, and therefore, the low grayscale display area can suppress the increase in brightness that may be caused by the data voltage applied to the high grayscale display area.

[0140] Fig.15 is a top view layout diagram of one pixel of a display device according to an exemplary embodiment, and Fig.16 yes Fig.15 An equivalent circuit diagram of a representative pixel shown in . The display device according to the illustrated exemplary embodiment is substantially similar to the above-described display device, and therefore, descriptions of substantially similar components will be omitted to avoid redundancy, and differences will be mainly described.

[0141] refer to Fig.15 , one pixel PX is divided into two sub-pixels sPX1 and sPX2, a first data line 171a overlapping the pixel PX of a pair of data lines 171a and 171b is electrically connected to the first sub-pixel sPX1, and a second data line 171b is electrically connected to the second sub-pixel sPX2 to improve side visibility.

[0142] like Fig.16As shown in the equivalent circuit diagram of , the pixel PX is connected to the gate line 121, the first data line 171a and the second data line 171b. The pixel PX includes a first sub-pixel sPX1 and a second sub-pixel sPX2. The first sub-pixel sPX1 includes a first transistor Qa, a first liquid crystal capacitor Clc1 and a first storage capacitor Cst1, and the second sub-pixel sPX2 includes a second transistor Qb, a second liquid crystal capacitor Clc2 and a second storage capacitor Cst2.

[0143] The first transistor Qa includes a control terminal connected to the gate line 121 and an input terminal connected to the first data line 171a. The output terminal of the first transistor Qa is connected to the first liquid crystal capacitor Clc1 and the first storage capacitor Cst1. The second transistor Qb includes a control terminal connected to the gate line 121 and an input terminal connected to the second data line 171b. The output terminal of the second transistor Qb is connected to the second liquid crystal capacitor Clc2 and the second storage capacitor Cst2.

[0144] The first liquid crystal capacitor Clc1 and the second liquid crystal capacitor Clc2 can receive different data voltages based on one image signal through the first transistor Qa and the second transistor Qb connected to the first data line 171a and the second data line 171b, respectively. By properly adjusting the data voltage charged to the first liquid crystal capacitor Clc1 and the data voltage charged to the second liquid crystal capacitor Clc2, the image observed from the side can be made as close as possible to the image observed from the front, thereby improving the lateral visibility.

[0145] Return to reference Fig.15 The first subpixel sPX1 includes a first subpixel electrode 1911, and the second subpixel sPX2 includes a second subpixel electrode 1912. The first subpixel electrode 1911 corresponds to one electrode of the first liquid crystal capacitor Clc1, and the second subpixel electrode 1912 corresponds to one electrode of the second liquid crystal capacitor Clc2.

[0146] The first sub-pixel electrode 1911 includes a transverse stem part 1921, a longitudinal stem part 1931, and a branch part 1941. The transverse stem part 1921 includes a first transverse stem part 1921a and a second transverse stem part 1921b respectively arranged on the left and right sides of the longitudinal stem part 1931. The branch part 1941 includes a first branch part 1941a and a second branch part 1941b respectively arranged on the left and right sides of the longitudinal stem part 1931. The first slit S1a is arranged between adjacent first branch parts 1941a, and the second slit S1b is arranged between adjacent second branch parts 1941b. When the portion of the first sub-pixel electrode 1911 arranged on the left side of the longitudinal stem part 1931 is referred to as the first electrode part 1911a, the first electrode part 1911a includes the first transverse stem part 1921a and the first branch part 1941a, and the first slit S1a is formed in the first electrode part 1911a. When a portion of the first subpixel electrode 1911 disposed on the right side of the longitudinal stem part 1931 is referred to as a second electrode part 1911b, the second electrode part 1911b includes a second transverse stem part 1921b and a second branch part 1941b, and a second slit S1b is formed in the second electrode part 1911b.

[0147] As with the first subpixel electrode 1911, the second subpixel electrode 1912 includes a transverse stem part 1922, a longitudinal stem part 1932, and a branch part 1942. The transverse stem part 1922 includes a first transverse stem part 1922a and a second transverse stem part 1922b, which are respectively arranged on the left and right sides of the longitudinal stem part 1932. The branch part 1942 includes a first branch part 1942a and a second branch part 1942b, which are respectively arranged on the left and right sides of the longitudinal stem part 1932. The third slit S2a is arranged between adjacent first branch parts 1942a, and the fourth slit S2b is arranged between adjacent second branch parts 1942b. The third electrode part 1912a includes a first transverse stem part 1922a and a first branch part 1942a, and the third electrode part 1912a has a third slit S2a. The fourth electrode part 1912b includes a second transverse stem part 1922b and a second branch part 1942b, and the fourth electrode part 1912b includes a fourth slit S2b. The third electrode part 1912a and the fourth electrode part 1912b of the second subpixel electrode 1912 are aligned with the first electrode part 1911a and the second electrode part 1911b of the first subpixel electrode 1911 in the second direction y, respectively.

[0148] A pair of data lines 171a and 171b extending substantially in the second direction y overlaps the first sub-pixel electrode 1911 and the second sub-pixel electrode 1912. The first data line 171a overlaps the first electrode part 1911a and the first slit S1a of the first sub-pixel electrode 1911, and overlaps the third electrode part 1912a and the third slit S2a of the second sub-pixel electrode 1912. The second data line 171b overlaps the second electrode part 1911b and the second slit S1b of the first sub-pixel electrode 1911, and overlaps the fourth electrode part 1912b and the fourth slit S2b of the second sub-pixel electrode 1912.

[0149] The first width W1a of the first slit S1a in the first subpixel electrode 1911 is different from the second width W1b of the second slit S1b. The third width W2a of the third slit S2a in the second subpixel electrode 1912 is different from the fourth width W2b of the fourth slit S2b. The first data line 171a is electrically connected to the first subpixel electrode 1911, and the second data line 171b is electrically connected to the second subpixel electrode 1912. When a high grayscale is displayed after a high grayscale is displayed in the sequential output direction of the gate signal, the first subpixel sPX1 increases the brightness in the area overlapping with the first data line 171a, and the second subpixel sPX2 increases the brightness in the area overlapping with the second data line 171b. Due to the above reference Figure 5 For substantially the same reasons described above, this increase in brightness may be particularly problematic when the first data line 171a and the second data line 171b transmit data voltages of different polarities.

[0150] According to an exemplary embodiment, the first width W1a may be smaller than the second width W1b, and the fourth width W2b may be smaller than the third width W2a, so as to suppress the increase in brightness. Alternatively, when the second data line 171b is electrically connected to the first subpixel electrode 1911 and the first data line 171a is electrically connected to the second subpixel electrode 1912, the second width W1b may be smaller than the first width W1a, and the third width W2a may be smaller than the fourth width W2b. In this way, for example, by relatively narrowing the width of the slit overlapping the data line electrically connected to the corresponding subpixels sPX1 and sPX2 among a pair of data lines 171a and 171b to reduce the overlapping area between the slit and the data line, the low grayscale display area can suppress the increase in brightness due to the data field that may be caused by the data voltage applied to the high grayscale display area.

[0151] Fig.17 is a top view layout diagram of one pixel of a display device according to an exemplary embodiment.

[0152] A display device according to the illustrated exemplary embodiment and Fig.15The display device shown in is substantially the same except for the shapes of the first sub-pixel electrode 1911 and the second sub-pixel electrode 1912. Specifically, in the first sub-pixel electrode 1911, a first angle α1 as an acute angle between an extension direction of the first slit S1a of the first electrode part 1911a and the second direction y and a second angle β1 as an acute angle between an extension direction of the second slit S1b of the second electrode part 1911b and the second direction y are different. In the second sub-pixel electrode 1912, a third angle α2 as an acute angle between an extension direction of the third slit S2a of the third electrode part 1912a and the second direction y and a fourth angle β2 as an acute angle between an extension direction of the fourth slit S2b of the fourth electrode part 1912b and the second direction y are different. When the first data line 171a is electrically connected to the first sub-pixel electrode 1911 and the second data line 171b is electrically connected to the second sub-pixel electrode 1912, as Fig.17 As shown in , the first angle α1 may be greater than the second angle β1, and the fourth angle β2 may be greater than the third angle α2. Alternatively, when the second data line 171b is electrically connected to the first subpixel electrode 1911 and the first data line 171a is electrically connected to the second subpixel electrode 1912, the second angle β1 may be greater than the first angle α1, and the third angle α2 may be greater than the fourth angle β2.

[0153] In this way, by relatively increasing the angle of the slit overlapping the data lines 171a and 171b among a pair of data lines 171a and 171b that are electrically connected to the corresponding sub-pixels sPX1 and sPX2 to reduce the overlapping area between the slit and the data lines, the low grayscale display area can suppress the increase in brightness caused by the data voltage applied to the high grayscale display area, thereby preventing the image quality of the display device from deteriorating.

[0154] Although specific exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such embodiments, but rather to the broader scope of the appended claims and various obvious modifications and equivalent arrangements, as will be apparent to those of ordinary skill in the art.

Claims

1. A display device, comprising: a first pixel electrode including a first electrode part having a first slit and a second electrode part having a second slit; as well as a first data line and a second data line overlapping the first pixel electrode, the first data line and the second data line being adjacent to each other in a first direction, in: The first data line overlaps the first electrode part and the first slit, and the second data line overlaps the second electrode part and the second slit; The portion where the first data line overlaps with the first slit includes a straight line portion of the first data line extending in a second direction intersecting the first direction and excluding a portion extending parallel to the first slit, the portion where the second data line overlaps with the second slit includes a straight line portion of the second data line extending in the second direction and excluding a portion extending parallel to the second slit, and the straight line portion of the first data line and the straight line portion of the second data line cross the first pixel electrode; The first data line is electrically connected to the first pixel electrode, and a first area defined by a first overlapping region between the first slit and the first data line is smaller than a second area defined by a second overlapping region between the second slit and the second data line; The first pixel electrode includes a horizontal stem part, a vertical stem part intersecting the horizontal stem part, and a plurality of branch parts extending from the horizontal stem part or the vertical stem part; The first electrode member is arranged on one side of the longitudinal stem member, and the second electrode member is arranged on the other side of the longitudinal stem member; The transverse stem component comprises a first transverse stem component and a second transverse stem component respectively arranged on the one side and the other side of the longitudinal stem component; The branch components include a first branch component and a second branch component respectively arranged on the one side and the other side of the longitudinal trunk component; The first electrode member includes the first transverse stem member and the first branch member; and The second electrode member includes the second lateral stem member and the second branch members.

2. The display device according to claim 1, wherein: The first slit has a first width, and the second slit has a second width that is smaller than the first width.

3. The display device according to claim 2, wherein: The first slit includes a first slit portion having a first slit width and a second slit portion having a second slit width smaller than the first slit width; and The second slit portion overlaps the first data line.

4. The display device according to claim 2, further comprising a second pixel electrode adjacent to the first pixel electrode in the second direction, in, The second data line is electrically connected to the second pixel electrode.

5. The display device according to claim 4, wherein: the second pixel electrode comprises a third electrode part and a fourth electrode part respectively aligned with the first electrode part and the second electrode part of the first pixel electrode in the second direction; and In the second pixel electrode, the third electrode part includes a third slit, the fourth electrode part includes a fourth slit, and a width of the fourth slit is smaller than a width of the third slit.

6. The display device according to claim 4, further comprising gate lines extending in the first direction, in, The gate line includes a first sub-gate line electrically connected to the first pixel electrode and a second sub-gate line electrically connected to the second pixel electrode.

7. The display device according to claim 1, wherein: The first slit and the second slit are spaced apart at an interval between adjacent branch parts among the plurality of branch parts.

8. The display device according to claim 1, wherein: The first slit and the second slit are symmetrically arranged with respect to the longitudinal stem member.

9. The display device according to claim 1, wherein: The first data line and the second data line are configured to transmit data voltages having polarities different from each other during one frame.

10. The display device according to claim 1, wherein: A first acute angle defined between an extension direction of the first slit and the second direction is greater than a second acute angle defined between an extension direction of the second slit and the second direction.

11. The display device according to claim 10, further comprising a second pixel electrode adjacent to the first pixel electrode in the second direction, in: The second data line is electrically connected to the second pixel electrode; the second pixel electrode comprises a third electrode part and a fourth electrode part respectively aligned with the first electrode part and the second electrode part of the first pixel electrode in the second direction; and In the second pixel electrode, the third electrode part includes a third slit, the fourth electrode part includes a fourth slit, and a third acute angle defined between an extension direction of the fourth slit and the second direction is greater than a fourth acute angle defined between an extension direction of the third slit and the second direction.

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