Display device

Abstract

A display device is provided, comprising: a substrate; a first electrode disposed on the substrate; a second electrode disposed on the substrate and spaced apart from the first electrode; a plurality of first protruding electrodes disposed on the first electrode; a plurality of second protruding electrodes disposed on the second electrode; and a plurality of light-emitting elements electrically connected to the plurality of first protruding electrodes and the plurality of second protruding electrodes.

Description

[0001] This patent application claims priority to Korean Patent Application No. 10-2018-0135435, filed on November 6, 2018, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] The present disclosure relates to a display device and a method for manufacturing the display device, and more particularly, to a display device capable of improving the degree of alignment of a light emitting element and a method for manufacturing the display device. Background Art

[0003] Generally, a display device includes a plurality of pixels for displaying an image. There are various types of pixels, such as a pixel including a liquid crystal layer, a pixel including an electrowetting layer, a pixel including an electrophoretic layer, and a pixel including a light-emitting element. Among them, a display device including a self-luminous element does not require a separate light source.

[0004] Recently, as a light-emitting element, a micro light-emitting diode (LED) element is being developed. The micro LED element can be manufactured in nano units or micro units and has a rod shape or a strip shape. The micro LED element can be arranged horizontally and electrically connected to a first electrode and a second electrode having opposite polarities.

[0005] Voltages of opposite polarities are applied to the first electrode and the second electrode, and the plurality of micro LED elements are arranged toward the first electrode and the second electrode by an electric field formed between the first electrode and the second electrode. However, when a plurality of micro LED elements are arranged with respect to the first electrode and the second electrode, the micro LED elements may be arranged unevenly. Summary of the invention

[0006] The present disclosure provides a display device capable of improving the degree of alignment of a light emitting element and a method of manufacturing the display device.

[0007] An embodiment of the inventive concept provides a display device comprising: a substrate; a first electrode disposed on the substrate; a second electrode disposed on the substrate and spaced apart from the first electrode; a plurality of first protruding electrodes disposed on the first electrode; a plurality of second protruding electrodes disposed on the second electrode; and a plurality of light-emitting elements electrically connected to the plurality of first protruding electrodes and the plurality of second protruding electrodes.

[0008] In an embodiment of the inventive concept, a method for manufacturing a display device includes: disposing a first conductive material on a substrate; disposing a second conductive material on the first conductive material; disposing a first photoresist pattern, the first photoresist pattern including a first portion on the second conductive material and a plurality of second portions spaced apart from each other and disposed on the first portion; removing portions of the first conductive material and the second conductive material exposed by the first photoresist pattern to form a first electrode and a second electrode defined by a remaining portion of the first conductive material; removing the first photoresist pattern from an upper portion of the first photoresist pattern by a thickness of the first portion to form a second photoresist pattern; removing portions of the second conductive material exposed by the second photoresist pattern to form a plurality of first protruding electrodes and a plurality of second protruding electrodes; and electrically connecting a plurality of light-emitting elements to the plurality of first protruding electrodes and the plurality of second protruding electrodes. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The accompanying drawings are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification. The accompanying drawings illustrate exemplary embodiments of the inventive concept and together with the description serve to explain the principles of the inventive concept. In the drawings:

[0010] Figure 1 is a plan view of a display device according to an embodiment of the inventive concept;

[0011] Figure 2 yes Figure 1 An equivalent circuit diagram of a pixel shown in ;

[0012] Figure 3 It is shown Figure 2 A plan view of a pixel including a first electrode and a second electrode connected to a light emitting element as shown in FIG.

[0013] Figure 4 yes Figure 3 A perspective view of a light emitting element shown in ;

[0014] Figure 5 is along Figure 3 A cross-sectional view taken along line II';

[0015] Figure 6 is along Figure 3 A cross-sectional view taken along line II-II'; and

[0016] Figures 7 to 14 2 is a view for illustrating a method of manufacturing a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0017] In this specification, a component (or region, layer, part, etc.) referred to as being "on", "connected to" or "coupled to" another component means that the component may be directly on, directly connected to or directly coupled to the other component, or a third component located therebetween may exist.

[0018] The same reference numerals denote the same elements. In addition, in the drawings, the thickness, proportion and size of components are exaggerated for convenience of description.

[0019] The term "and / or" includes all of one or more combinations defined by the listed components.

[0020] It will be understood that the terms "first" and "second" are used herein to describe various components, but these components should not be limited by these terms. The above terms are only used to distinguish one component from another component. For example, a first component may be referred to as a second component, and vice versa, without departing from the scope of the inventive concept. Unless the context clearly indicates otherwise, a singular expression also includes a plural expression.

[0021] In addition, terms such as "below", "below", "on", and "on" are used to describe the relationship of the configurations shown in the drawings. These terms are described as relative concepts based on the orientations shown in the drawings. For example, if the orientation of the drawings is turned upside down or upside down, "below" may become "on", and "on" may become "below".

[0022] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. In addition, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with the meaning in the context of the relevant art, and terms should not be interpreted in an idealized or overly formal sense unless they are clearly defined herein.

[0023] In various embodiments of the inventive concept, the term "comprises" or its variations or "includes" or its variations specifies properties, regions, fixed numbers, steps, processes, elements and / or components, but does not exclude other properties, regions, fixed numbers, steps, processes, elements and / or components.

[0024] Hereinafter, exemplary embodiments of the inventive concept are described in more detail with reference to the accompanying drawings.

[0025] Figure 1 is a plan view of a display device according to an embodiment of the inventive concept.

[0026] Reference Figure 1, the display device DD according to an embodiment of the present disclosure may include a display panel DP, a scan driver SDV, and a data driver DDV. The scan driver SDV and the data driver DDV may be disposed on the display panel DP.

[0027] The display panel DP may have a rectangular shape having short sides in a first direction DR1 and long sides in a second direction DR2 crossing the first direction DR1. However, the present disclosure is not limited thereto, and the display panel DP may have various shapes such as a circular shape and a polygonal shape.

[0028] The display panel DP may include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA may correspond to an area for displaying an image, and the non-display area NDA may correspond to an area where an image is not displayed.

[0029] The display panel DP may include a plurality of pixels PX, a plurality of scan lines SL1 to SLm, and a plurality of data lines DL1 to DLn, where m and n are positive integers. Illustratively, the pixels PX may be arranged in a matrix form, but the arrangement form of the pixels PX is not limited thereto.

[0030] The pixels PX may be disposed in the display area DA and connected to the scan lines SL1 to SLm and the data lines DL1 to DLn. Each pixel PX may include a light emitting element for displaying an image.

[0031] The scan driver SDV and the data driver DDV may be disposed in the non-display area NDA. The scan driver SDV may be disposed in the non-display area NDA adjacent to one long side of the display panel DP. The data driver DDV may be disposed in the non-display area NDA adjacent to one short side of the display panel DP.

[0032] The scan lines SL1 to SLm may extend in a first direction DR1 and may be connected to a scan driver SDV. The data lines DL1 to DLn may extend in a second direction DR2 and may be connected to a data driver DDV.

[0033] The scan driver SDV generates a plurality of scan signals, and the scan signals may be applied to the pixels PX through the scan lines SL1 to SLm. The scan signals may be sequentially applied to the pixels PX. The data driver DDV generates a plurality of data voltages, and the data voltages may be applied to the pixels PX through the data lines DL1 to DLn.

[0034] Although not shown in the figure, the display device DD may include a timing controller for controlling the operation of the scan driver SDV and the data driver DDV. For example, the timing controller may generate a scan control signal and a data control signal in response to a control signal received from the outside. The timing controller may also receive an image signal from the outside, convert the data format of the image signal so that the interface specification matches the data driver DDV, and provide the converted image signal to the data driver DDV. Note that if the image signal complies with the interface specification of the data driver DDV, it may not be necessary to convert the data format of the image signal received from the outside.

[0035] The scan driver SDV may generate a scan signal in response to the scan control signal. The data driver DDV may receive an image signal from the timing controller and may generate a data voltage corresponding to the image signal in response to the data control signal.

[0036] The pixels PX may be supplied with data voltages through the data lines DL1 to DLn in response to scan signals received through the scan lines SL1 to SLm. The pixels PX may display an image by emitting light having brightness corresponding to the data voltages.

[0037] Figure 2 yes Figure 1 Equivalent circuit diagram of the pixel shown in .

[0038] although Figure 2 Shows Figure 1 , but Figure 1 The other pixels PX shown in FIG. 1 may have Figure 2 The same equivalent circuit diagram of the pixel PX shown in FIG. illustratively, Figure 2 Pixels PX connected to scan lines SLi and data lines DLj are shown in , where i and j are natural numbers equal to or greater than 1 and equal to or less than m and n, respectively.

[0039] Reference Figure 2 , the pixel PX may include a light emitting element ED (e.g., a light emitting diode), a driving element DT (e.g., a driving transistor), a capacitive element C (e.g., a capacitor), and a switching element ST (e.g., a switching transistor). The light emitting element ED may collectively represent a plurality of light emitting elements ED included in the pixel PX. Figure 3 , a plurality of light emitting elements ED included in a pixel PX are shown.

[0040] According to one embodiment, the driving element DT and the switching element ST may be P-type transistors. However, the present disclosure is not limited thereto, and the driving element DT and the switching element ST may be N-type transistors. The capacitive element C may be a capacitor.

[0041] The driving element DT includes an input terminal connected to a first capacitor electrode of the capacitor element C and a first power line PL1, an output terminal connected to the light emitting element ED, and a control terminal connected to an output terminal of the switching element ST. The driving element DT may receive a first power supply voltage ELVDD through the first power line PL1. A second capacitor electrode of the capacitor element C may be connected to the control terminal of the driving element DT at a first node N1.

[0042] The switching element ST may include an input terminal connected to the data line DLj, an output terminal connected to the control terminal of the driving element DT through the first node N1, and a control terminal connected to the scan line SLi.

[0043] The light emitting element ED may be connected to the driving element DT and the second power line PL2. For example, the light emitting element ED may be connected to a first electrode E1 electrically connected to the driving element DT and a second electrode E2 electrically connected to the second power line PL2. The light emitting element ED may receive a second power voltage ELVSS through the second power line PL2. The second power voltage ELVSS may be lower than the first power voltage ELVDD.

[0044] A scan signal may be applied to a control terminal of the switching element ST through the scan line SLi, and the switching element ST may be turned on in response to the scan signal. When the switching element ST is turned on, the switching element ST may provide a data voltage received through the data line DLj to the first node N1.

[0045] The capacitance element C may be charged with an amount of charges corresponding to a difference between the data voltage supplied to the first node N1 and the first power source voltage ELVDD, and maintain the charges even after the switching element ST is turned off.

[0046] The driving element DT may be turned on according to the amount of charge charged in the capacitive element C. The on-time of the driving element DT may be determined according to the amount of charge charged in the capacitive element C. Current may flow through the light emitting element ED when the driving element DT is turned on, and the light emitting element ED emits light. The light emitting element ED may emit light to produce an image.

[0047] The light emitting element ED may represent one or more micro LED elements. The micro LED element may have a length of several nanometers to several hundred micrometers. Note that this is only an example, and the length of the micro LED element is not limited to the above numerical range.

[0048] Figure 3 It is shown Figure 2 0 is a plan view of a pixel including a first electrode and a second electrode connected to a light emitting element.

[0049] Reference Figure 3The first electrode E1 includes a first extension portion E1_1 extending in a first direction DR1 and a plurality of first branch portions E1_2 extending from the first extension portion E1_1 toward the second electrode E2 in a second direction DR2. Although two first branch portions E1_2 are illustratively shown, the number of the first branch portions E1_2 is not limited thereto.

[0050] The second electrode E2 may include a second extension portion E2_1 extending in the first direction DR1 and a plurality of second branch portions E2_2 extending from the second extension portion E2_1 toward the first electrode E1 in the second direction DR2. Although two second branch portions E2_2 are illustratively shown, the number of second branch portions E2_2 is not limited thereto. The first branch portions E1_2 and the second branch portions E2_2 may be disposed to be alternately spaced apart from each other in a 1:1 manner in the first direction DR1.

[0051] The pixel PX may include a plurality of first protruding electrodes PE1 disposed on the first electrode E1 and a plurality of second protruding electrodes PE2 disposed on the second electrode E2. The first protruding electrodes PE1 may be disposed on the first branch portion E1_2 in one or more rows corresponding to the number of rows of the micro LEDs. Similarly, the second protruding electrodes PE2 may be disposed on the second branch portion E2_2 in one or more rows corresponding to the number of rows of the micro LEDs. Although three rows of micro LEDs, three rows of first protruding electrodes PE1, and three rows of second protruding electrodes PE2 are illustratively shown, the number of rows of the micro LEDs, the first protruding electrodes PE1, and the second protruding electrodes PE2 is not limited thereto.

[0052] The first protruding electrode PE1 may be electrically connected to the first electrode E1 by contacting the first branch portion E1_2. The second protruding electrode PE2 may be electrically connected to the second electrode E2 by contacting the second branch portion E2_2.

[0053] The first protruding electrodes PE1 may be arranged in the second direction DR2. The first protruding electrodes PE1 may be evenly spaced apart in the second direction DR2. The second protruding electrodes PE2 may be arranged in the second direction DR2. The second protruding electrodes PE2 may be evenly spaced apart in the second direction DR2. A space gap between the first protruding electrodes PE1 and the second protruding electrodes PE2 adjacent to each other in the first direction DR1 may be substantially the same as a space gap between the first branch portions E1_2 and the second branch portions E2_2 adjacent to each other in the first direction DR1.

[0054] The pixel PX may include a plurality of light emitting elements ED. The light emitting elements ED are disposed to overlap at least a portion of the first protruding electrode PE1 and the second protruding electrode PE2 and are electrically connected to the first protruding electrode PE1 and the second protruding electrode PE2. Both sides of each light emitting element ED may be disposed on a corresponding pair of first protruding electrodes PE1 and second protruding electrodes PE2 included in the pixel PX, respectively. Both sides of each light emitting element ED may contact the corresponding pair of first protruding electrodes PE1 and second protruding electrodes PE2, respectively.

[0055] The pixel PX may include, in a plan view, a pixel area PA and a non-pixel area NPA around the pixel area PA. The light emitting element ED may be disposed in the pixel area PA.

[0056] Figure 4 yes Figure 3 0 is a perspective view of one light emitting element ED shown in FIG.

[0057] although Figure 4 One light emitting element ED is illustratively shown in FIG. 1 , but other light emitting elements ED included in the pixel PX will have the same Figure 4 The structure of the light emitting element ED shown in FIG.

[0058] Reference Figure 4 , the light emitting element ED may have a cylindrical shape extending in the first direction DR1. However, the present disclosure is not limited thereto, and the light emitting element ED may have a polygonal columnar shape extending in the first direction DR1. The light emitting element ED may be arranged horizontally (eg, in the first direction DR1) and disposed on a pair of first protruding electrodes PE1 and second protruding electrodes PE2.

[0059] The light emitting element ED may include an n-type semiconductor layer NS, a p-type semiconductor layer PS, and an active layer AL disposed between the n-type semiconductor layer NS and the p-type semiconductor layer PS. The n-type semiconductor layer NS may be formed by doping an n-type dopant into the semiconductor layer. The p-type semiconductor layer PS may be formed by doping a p-type dopant into the semiconductor layer. The semiconductor layer may include a semiconductor material. For example, the semiconductor layer may include gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium nitride (InN), indium aluminum gallium nitride (InAlGaN), or aluminum indium nitride (AlInN), but the present disclosure is not limited thereto.

[0060] The n-type dopant may be silicon (Si), germanium (Ge), tin (Sn), selenium (Se), tellurium (Te), or a combination thereof, but the present disclosure is not limited thereto. The p-type dopant may be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or a combination thereof, but the present disclosure is not limited thereto.

[0061] The active layer AL may be formed of at least one of a single quantum well structure, a multi-quantum well structure, a quantum wire structure, and a quantum dot structure. The active layer AL may correspond to a region where electrons injected through the n-type semiconductor layer NS and holes injected through the p-type semiconductor layer PS are recombined. The active layer AL may be defined by a layer that emits light having energy determined by a specific energy band of a material. The position of the active layer AL may vary depending on the type of the light emitting element ED.

[0062] The n-type semiconductor layer NS may be connected to one of the first electrode E1 and the second electrode E2. The p-type semiconductor layer PS may be connected to the other of the first electrode E1 and the second electrode E2.

[0063] The length LT of the light emitting element ED may be between a few nanometers and a few hundred micrometers. For example, the length LT of the light emitting element ED may be from 1 micrometer to 100 micrometers.

[0064] Figure 5 is along Figure 3 A cross-sectional view taken along line II'. Figure 6 is along Figure 3 A cross-sectional view taken along line II-II'.

[0065] Reference Figure 3 , Figure 5 and Figure 6 The pixel PX may include a driving element DT, a switching element ST, a first electrode E1, a second electrode E2, and a light emitting element ED. The driving element DT, the switching element ST, the first and second electrodes E1 and E2, and the light emitting element ED may be disposed on the first base substrate BS1.

[0066] The second base substrate BS2 may face the first base substrate BS1. The driving element DT, the switching element ST, the first and second electrodes E1 and E2, and the light emitting element ED may be disposed between the first and second base substrates BS1 and BS2. Each of the first and second base substrates BS1 and BS2 may be a silicon substrate, a plastic substrate, a glass substrate, an insulating film, or a stacked structure including one or more insulating layers.

[0067] According to one embodiment, the configuration of the driving element DT and the configuration of the switching element ST may be substantially the same. Hereinafter, the configuration of the driving element DT will be mainly described, and the configuration of the switching element ST will be briefly described or omitted.

[0068] The buffer layer BFL may be disposed on the first base substrate BS1. The buffer layer BFL may include an inorganic material. The driving element DT and the switching element ST may be disposed on the buffer layer BFL.

[0069] The driving element DT may include a first gate electrode GE1, a first source electrode SE1, a first drain electrode DE1, and a first semiconductor layer SM1. The switching element ST may include a second gate electrode GE2, a second source electrode SE2, a second drain electrode DE2, and a second semiconductor layer SM2.

[0070] The second gate electrode GE2, the second source electrode SE2, the second drain electrode DE2 and the second semiconductor layer SM2 of the switching element ST may respectively have the same structure as the first gate electrode GE1, the first source electrode SE1, the first drain electrode DE1 and the first semiconductor layer SM1 of the driving element DT, and may be respectively arranged on the same layer.

[0071] The first semiconductor layer SM1 may be disposed on the buffer layer BFL. The first semiconductor layer SM1 may include an inorganic semiconductor material (such as amorphous silicon or polycrystalline silicon) or an organic semiconductor material. In addition, the first semiconductor layer SM1 may include an oxide semiconductor material. Figure 5 , but the first semiconductor layer SM1 may include a source region, a drain region, and a channel region disposed between the source region and the drain region.

[0072] Before the first semiconductor layer SM1 is disposed on the buffer layer BFL, the surface of the buffer layer BFL corresponding to the first semiconductor layer SM1 may be modified or processed. In this case, the first semiconductor layer SM1 may be more strongly attached to the buffer layer BFL than when the surface of the buffer layer BFL is an unmodified or unprocessed surface. The buffer layer BFL may serve as a barrier layer for protecting the lower surface of the first semiconductor layer SM1. In this case, the buffer layer BFL may prevent contaminants or moisture from penetrating into the first semiconductor layer SM1 through the first base substrate BS1.

[0073] The first insulating layer INS1 may be disposed on the buffer layer BFL and cover the first semiconductor layer SM1. The first insulating layer INS1 may include an inorganic material. For example, the first insulating layer INS1 may include silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, or aluminum oxide, but the present disclosure is not limited thereto.

[0074] The first gate electrode GE1 may be disposed on the first insulating layer INS1 overlapping the first semiconductor layer SM1. For example, the first gate electrode GE1 may overlap the channel region of the first semiconductor layer SM1. The second insulating layer INS2 may be disposed on the first insulating layer INS1 and cover the first gate electrode GE1. The second insulating layer INS2 may include an inorganic material.

[0075] Capacitor element C( Figure 2 ) may include a first capacitor electrode (not shown) and a second capacitor electrode CPa. The first capacitor electrode may be branched from the second gate electrode GE2, and the second capacitor electrode CPa may be disposed on the second insulating layer INS2.

[0076] The third insulating layer INS3 may be disposed on the second insulating layer INS2 and cover the second capacitor electrode CPa. The third insulating layer INS3 may be referred to as an interlayer insulating layer. The third insulating layer INS3 may include an organic material and / or an inorganic material.

[0077] The first source electrode SE1 and the first drain electrode DE1 may be spaced apart from each other and disposed on the third insulating layer INS3. The first source electrode SE1 is connected to the source region of the first semiconductor layer SM1 through a first contact hole CH1 that penetrates the first insulating layer INS1, the second insulating layer INS2, and

[0078] The first drain electrode DE1 is connected to the drain region of the first semiconductor layer SM1 through a second contact hole CH2 defined by penetrating the first insulating layer INS1, the second insulating layer INS2, and the third insulating layer INS3.

[0079] The fourth insulating layer INS4 may be disposed on the third insulating layer INS3 and cover the first source electrode SE1 and the first drain electrode DE1. The fourth insulating layer INS4 may include a planarization film providing a planar upper surface, and may include an organic material.

[0080] The first substrate SUB1 may be defined to include a first base substrate BS1, a buffer layer BFL, and first to fourth insulating layers INS1 to INS4. First and second partition wall layers BR1 and BR2 may be disposed on the first substrate SUB1 and spaced apart from each other. The first and second partition wall layers BR1 and BR2 may include organic materials.

[0081] The first electrode E1 may be disposed on the first substrate SUB1 and cover the first partition wall layer BR1. For example, the first electrode E1 may be disposed on the first partition wall layer BR1 and extend to be disposed on a portion of the first substrate SUB1 adjacent to the first partition wall layer BR1. Therefore, the first partition wall layer BR1 may be disposed between the first substrate SUB1 and the first electrode E1, and the first electrode E1 may completely cover the first partition wall layer BR1.

[0082] The second electrode E2 may be disposed on the first substrate SUB1 and cover the second partition wall layer BR2, and the second electrode E2 may be spaced apart from the first electrode E1. For example, the second electrode E2 may be disposed on the second partition wall layer BR2 and extend to be disposed on a portion of the first substrate SUB1 adjacent to the second partition wall layer BR2. Therefore, the second partition wall layer BR2 may be disposed between the first substrate SUB1 and the second electrode E2, and the second electrode E2 may completely cover the second partition wall layer BR2.

[0083] The first electrode E1 may be connected to the first drain electrode DE1 through a third contact hole CH3 defined by penetrating the fourth insulating layer INS4. Thus, the first electrode E1 may be electrically connected to the driving element DT.

[0084] Each of the first electrode E1 and the second electrode E2 may have a single-layer structure or a multi-layer structure. As an example of a single-layer structure, each of the first electrode E1 and the second electrode E2 may include a reflective electrode. As an example of a multi-layer structure, each of the first electrode E1 and the second electrode E2 may include a reflective electrode and a transparent electrode disposed on the reflective electrode.

[0085] The reflective electrode may include one or more of copper (Cu), aluminum (Al) and silver (Ag), and may reflect light. The transparent electrode may include at least one of indium zinc oxide (IZO), indium tin oxide (ITO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), and mixtures / compounds thereof, and may transmit light.

[0086] The first protruding electrode PE1 may be disposed on the first electrode E1, and the second protruding electrode PE2 may be disposed on the second electrode E2. Figure 6 As shown in , a plurality of first protruding electrodes PE1 may be disposed on the first electrode E1. Exemplarily, Figure 6 2 shows a cross-sectional view of the plurality of first protruding electrodes PE1. It is understood that the plurality of second protruding electrodes PE2 may be disposed on the second electrode E2, and the cross-sectional view of the plurality of second protruding electrodes PE2 is substantially the same as the cross-sectional view of the first protruding electrode PE1.

[0087] The first protruding electrode PE1 may be electrically connected to the first electrode E1 by contacting the first electrode E1. The second protruding electrode PE2 may be electrically connected to the second electrode E2 by contacting the second electrode E2. The first protruding electrode PE1 and the second protruding electrode PE2 may include a conductive material different from those of the first electrode E1 and the second electrode E2.

[0088] The light emitting element ED may be disposed between the first partition wall layer BR1 and the second partition wall layer BR2. Figure 5 In the cross-sectional view of FIG. 1 , a first side of the light emitting element ED may be disposed on the first protruding electrode PE1, and a second side of the light emitting element ED opposite to the first side may be disposed on the second protruding electrode PE2. The first side of the light emitting element ED may contact the upper surface of the first protruding electrode PE1, the second side of the light emitting element ED may contact the upper surface of the second protruding electrode PE2, and the light emitting element ED may be electrically connected to the first protruding electrode PE1 and the second protruding electrode PE2. The light emitting element ED may be electrically connected to the first electrode E1 and the second electrode E2 through the first protruding electrode PE1 and the second protruding electrode PE2.

[0089] The first contact electrode CTE1 may be disposed on the first protruding electrode PE1 and may cover the first side of the light emitting element ED. Illustratively, the first contact electrode CTE1 is disposed on a portion of the first protruding electrode PE1 adjacent to the first side of the light emitting element ED, but the present disclosure is not limited thereto. For example, the first contact electrode CTE1 may be disposed on the entire first protruding electrode PE1. The first contact electrode CTE1 may contact both a side of the first protruding electrode PE1 close to the first side of the light emitting element ED and the first side of the light emitting element ED.

[0090] The second contact electrode CTE2 may be disposed on the second protruding electrode PE2 and may cover the second side of the light emitting element ED. Illustratively, the second contact electrode CTE2 is disposed on a portion of the second protruding electrode PE2 adjacent to the second side of the light emitting element ED, but the present disclosure is not limited thereto. For example, the second contact electrode CTE2 may be disposed on the entire second protruding electrode PE2. The second contact electrode CTE2 may contact both a side of the second protruding electrode PE2 close to the second side of the light emitting element ED and the second side of the light emitting element ED.

[0091] The first contact electrode CTE1 and the second contact electrode CTE2 may include a transparent material. For example, the first contact electrode CTE1 and the second contact electrode CTE2 may include at least one of indium zinc oxide (IZO), indium tin oxide (ITO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), and mixtures / compounds thereof, but the present disclosure is not limited thereto.

[0092] The light emitting element ED has Figure 4 In the cylindrical embodiment shown in , the side surface (or outer circumferential surface) of the cylindrical shape may contact the first protruding electrode PE1 and the second protruding electrode PE2, and the light emitting element ED may be in line contact with the first protruding electrode PE1 and the second protruding electrode PE2. Line contact has a smaller contact area than the contact area of ​​surface contact, and the contact resistance may increase due to the smaller contact area. In general, the contact resistance may interfere with the flow of current.

[0093] However, the first contact electrode CTE1 and the second contact electrode CTE2 cover both sides of the light emitting element ED and are disposed on the first protruding electrode PE1 and the second protruding electrode PE2, so that the first contact electrode CTE1 and the second contact electrode CTE2 can increase the contact area between the light emitting element ED and the first protruding electrode PE1 and the second protruding electrode PE2. The increased contact area between the light emitting element ED and the first protruding electrode PE1 and the second protruding electrode PE2 can reduce the contact resistance between the light emitting element ED and the first protruding electrode PE1 and the second protruding electrode PE2.

[0094] The fifth insulating layer INS5 may be disposed on the first substrate SUB1 and cover the first and second protruding electrodes PE1 and PE2, the light emitting element ED, and the first and second contact electrodes CTE1 and CTE2. The fifth insulating layer INS5 may include an inorganic material.

[0095] The light conversion layer LCL and the black matrix BM may be disposed on a surface of the second base substrate BS2 facing the first base substrate BS1. The light conversion layer LCL may be disposed in the pixel area PA, and the black matrix BM may be disposed in the non-pixel area NPA. Some pixels PX may not include the light conversion layer LCL. Figure 5 It is shown that the light conversion layer LCL and the black matrix BM are disposed in the same layer, but the present disclosure is not limited thereto. For example, the light conversion layer LCL and the black matrix BM may be disposed in different layers on the second base substrate BS2.

[0096] The light conversion layer LCL may include an emitter. For example, the emitter may convert the wavelength of the first color light generated by the light emitting element ED to emit a second color light having a color different from the first color light. In some embodiments, the emitter may include one or more quantum dots. The first color light may be blue light, and the second color light may be red light or green light.

[0097] A plurality of pixels PX including a light conversion layer LCL for converting blue light into red light, a plurality of pixels PX including a light conversion layer LCL for converting blue light into green light, and a plurality of pixels PX not including a light conversion layer LCL may be disposed on the display panel DP. Thus, red light, blue light, and green light may be generated by the plurality of pixels PX.

[0098] However, the embodiments of the present disclosure are not limited thereto. For example, the light conversion layer LCL may be replaced by a color filter. In addition, the light conversion layer LCL may be omitted in some pixels PX or all pixels PX. In this case, the light emitting element ED may emit blue light, green light, or red light. The black matrix BM may prevent light leakage between multiple pixels PX.

[0099] The second substrate SUB2 may be defined to include a second base substrate BS2, a light conversion layer LCL, and a black matrix BM.

[0100] The sixth insulating layer INS6 may be disposed between the first substrate SUB1 and the second substrate SUB2. The sixth insulating layer INS6 may be an optically transparent adhesive film or a pressure-sensitive adhesive film.

[0101] The second substrate SUB2 may be attached to the first substrate SUB1 through the sixth insulating layer INS6. However, this is merely an example, and in another embodiment of the present disclosure, the second substrate SUB2 and the sixth insulating layer INS6 may be omitted.

[0102] If the first protruding electrode PE1 and the second protruding electrode PE2 are not provided on the first electrode E1 and the second electrode E2, the light emitting element ED is not arranged in a predetermined direction relative to the first electrode E1 and the second electrode E2. Figure 3 Unlike as shown in , the light emitting elements ED are not arranged relative to the first and second electrodes E1 and E2 in the first direction DR1 and / or are not uniformly spaced apart from each other in the second direction DR2.

[0103] However, in the embodiments of the present disclosure, Figure 3 As shown in FIG. 1 , the first protruding electrode PE1 and the second protruding electrode PE2 are disposed on the first electrode E1 and the second electrode E2, and the light emitting elements ED may be arranged in the first direction DR1 and are evenly spaced apart from each other relative to the first protruding electrode PE1 and the second protruding electrode PE2 in the second direction DR2. Therefore, the alignment degree of the light emitting elements ED may be improved. Figures 7 to 14 A more specific reason for improving the degree of alignment of the light emitting element ED is described in detail.

[0104] Figures 7 to 14 2 is a view for explaining a method of manufacturing a display device according to an embodiment of the present disclosure.

[0105] For ease of explanation, Figures 7 to 11 With Figure 6 The corresponding cross-sectional view shows that Fig.12 and Fig.14 With Figure 5 The corresponding cross-sectional view is shown. Fig.13An enlarged view of the light emitting element ED provided between the first protruding electrode PE1 and the second protruding electrode PE2 is shown.

[0106] Below, illustratively, reference will be made to Figures 7 to 11 The manufacturing method for forming the first protruding electrode PE1 is described, but it is understood that the second protruding electrode PE2 may also be formed in the same manner as Figures 7 to 11 The manufacturing method shown in is basically the same as that shown in FIG.

[0107] Reference Figure 7 , a first conductive material CM1 may be disposed on the first substrate SUB1, and a second conductive material CM2 may be disposed on the first conductive material CM1. The first conductive material CM1 may be disposed on the first substrate SUB1 and cover the first partition wall layer BR1.

[0108] The first conductive material CM1 may be a material for forming the first electrode E1, and the second conductive material CM2 may be a material for forming the first protruding electrode PE1. For example, the first conductive material CM1 may include a first metal material, and the second conductive material CM2 may include a second metal material different from the first metal material.

[0109] A first photoresist pattern PR1 may be disposed on the second conductive material CM2. The first photoresist pattern PR1 may include a photosensitive resin. The first photoresist pattern PR1 may include a first portion L1 and a plurality of second portions L2 disposed on the first portion L1 and spaced apart from each other. In one embodiment, the first photoresist pattern PR1 may be formed by patterning a layer or film of uniform thickness and removing a selected portion thereof except for the plurality of second portions L2. In another embodiment, a layer or film having a first portion L1 of uniform thickness is disposed, and another layer or film having a pattern of the plurality of second portions L2 is disposed on the first portion L1.

[0110] Reference Figure 8 , the first photoresist pattern PR1 may be used as a mask to remove a portion of the first conductive material CM1 and a portion of the second conductive material CM2. For example, a portion of the second conductive material CM2 exposed by the first photoresist pattern PR1 may be removed first to expose a portion of the first conductive material CM1 underneath, and a portion of the first conductive material CM1 exposed by the first photoresist pattern PR1 may be removed.

[0111] A portion of the first conductive material CM1 exposed by the first photoresist pattern PR1 may be removed to form a first electrode E1. The first electrode E1 may correspond to a remaining portion of the first conductive material CM1. Although not shown in the figure, the second electrode E2 may be similarly formed from another remaining portion of the first conductive material CM1.

[0112] According to one embodiment, a wet etching method may be used to etch the first conductive material CM1 and the second conductive material CM2. Since the first conductive material CM1 and the second conductive material CM2 may include different materials, a first etchant may be used to etch the first conductive material CM1, and a second etchant may be used to remove the second conductive material CM2. The first etchant may be an etchant different from the second etchant.

[0113] Reference Fig. 9 and Fig.10 , the upper portion of the first photoresist pattern PR1 may be removed by the thickness TH of the first portion L1. The thickness TH of the first portion L1 may be defined by the distance difference between the lower surface and the upper surface of the first portion L1 in the vertical direction. In addition, a portion of the first photoresist pattern PR1 disposed on the side surface of the first partition wall layer BR1 may also be removed. According to one embodiment, a dry etching method using a fluorine-based gas may be used to remove the upper portion of the first photoresist pattern PR1.

[0114] Since the first photoresist pattern PR1 is removed by the thickness TH of the first portion L1, a portion of the first photoresist pattern PR1 having the thickness TH may be removed, and a portion of the first photoresist pattern PR1 having a thickness greater than the thickness TH may remain. Fig.10 As shown in FIG. 8 , a second photoresist pattern PR2 defined by a remaining portion of the first photoresist pattern PR1 may be formed.

[0115] Reference Fig.11 , the portion of the second conductive material CM2 exposed by the second photoresist pattern PR2 may be removed to form a first protruding electrode PE1 on the first electrode E1. Although not shown in the figure, the second protruding electrode PE2 may also be formed on the second electrode E2 in the same method as the first protruding electrode PE1. As described above, the second conductive material CM2 may be etched using a second etchant to form the first protruding electrode PE1.

[0116] If the first conductive material CM1 and the second conductive material CM2 include the same metal material, the same etchant will be used. In this case, the portion of the second conductive material CM2 exposed by the second photoresist pattern PR2 and the portion of the first electrode E1 exposed by the second photoresist pattern PR2 will be removed. However, in the present embodiment, the second conductive material CM2 includes a material different from the first conductive material CM1, and the second etchant is used to selectively etch the second conductive material CM2, so that Fig.11 As shown in FIG. 8 , the second conductive material CM2 may be removed, and the first electrode E1 may remain.

[0117] As discussed above, the second photoresist pattern PR2 may be formed by removing an upper portion of the first photoresist pattern PR1 so that the second photoresist pattern PR2 corresponds to the remaining portion of the first photoresist pattern PR1. In this case, a single photoresist may be used to form the first photoresist pattern PR1 and the second photoresist pattern PR2. Therefore, a single photoresist may be used to form the first and second electrodes E1 and E2 and the first and second protruding electrodes PE1 and PE2. This is advantageous over a process in which the first and second electrodes E1 and E2 may be formed using a first photoresist and the first and second protruding electrodes PE1 and PE2 may be formed using a second photoresist different from the first photoresist.

[0118] Reference Fig.12 , the second photoresist pattern PR2 may be removed, and a solution LQ containing the light emitting element ED may be provided between the first partition wall layer BR1 and the second partition wall layer BR2. The solution LQ may be ink or paste. The solution LQ may be a substance that can evaporate at room temperature or by heating.

[0119] Reference Fig.13 , voltages of opposite polarities may be applied to the first electrode E1 and the second electrode E2. A DC voltage or an AC voltage may be applied to the first electrode E1 and the second electrode E2. Voltages of opposite polarities may be applied to the first protruding electrode PE1 and the second protruding electrode PE2 through the first electrode E1 and the second electrode E2. Therefore, an electric field may be formed between the first protruding electrode PE1 and the second protruding electrode PE2.

[0120] like Fig.13 As shown in FIG. 1 , charges may be concentrated on the first protruding electrode PE1 and the second protruding electrode PE2 having a structure protruding from the first electrode E1 and the second electrode E2. Therefore, a stronger electric field may be formed between the first protruding electrode PE1 and the second protruding electrode PE2. Bipolarity is induced in the light emitting element ED by the electric field, and the light emitting element ED may be self-aligned with the first protruding electrode PE1 and the second protruding electrode PE2 by a dielectrophoretic force.

[0121] By forming a stronger electric field between the first protruding electrode PE1 and the second protruding electrode PE2, the light emitting element ED can be easily aligned toward the first protruding electrode PE1 and the second protruding electrode PE2. Therefore, a plurality of light emitting elements ED can be evenly arranged in the first direction DR1 and evenly spaced apart in the second direction DR2 to be connected to the first protruding electrode PE1 and the second protruding electrode PE2. As a result, the alignment of the light emitting elements ED can be improved.

[0122] Reference Fig.14 , the first contact electrode CTE1 and the second contact electrode CTE2 may be disposed on the light emitting element ED and the first protruding electrode PE1 and the second protruding electrode PE2, respectively. The fifth insulating layer INS5 may be disposed on the first substrate SUB1 and cover the first protruding electrode PE1 and the second protruding electrode PE2, the light emitting element ED, and the first contact electrode CTE1 and the second contact electrode CTE2. The display device DD may be manufactured by disposing a sixth insulating layer INS6 on the fifth insulating layer INS5 and disposing a second substrate SUB2 on the sixth insulating layer INS6.

[0123] With respect to the display device and the method of manufacturing the display device according to the embodiments of the present disclosure, the alignment of the light emitting elements of the display device can be improved by aligning the light emitting elements to the first protruding electrode disposed on the first electrode and the second protruding electrode disposed on the second electrode.

[0124] Although exemplary embodiments of the present disclosure have been described, it is understood that the present disclosure should not be limited to these exemplary embodiments, but various changes and modifications may be made by one of ordinary skill in the art within the spirit and scope of the present disclosure as claimed.

Claims

1. A display device, comprising: substrate; A first electrode is disposed on the surface of the substrate; a second electrode disposed on the substrate and spaced apart from the first electrode; a plurality of first protruding electrodes disposed on the first electrode and having a length equal to a width of a corresponding portion of the first electrode below the plurality of first protruding electrodes; a plurality of second protruding electrodes, disposed on the second electrode; as well as a plurality of light emitting elements electrically connected to the plurality of first protruding electrodes and the plurality of second protruding electrodes, A portion of one of the plurality of first protruding electrodes is disposed between a corresponding light emitting element of the plurality of light emitting elements and the first electrode in a direction perpendicular to the surface of the substrate.

2. The display device according to claim 1, further comprising: A first partition wall layer is disposed between the substrate and the first electrode; as well as The second partition wall layer is disposed between the substrate and the second electrode.

3. The display device according to claim 2, wherein: The plurality of light emitting elements are disposed between the first partition wall layer and the second partition wall layer.

4. The display device according to claim 1, wherein: The first electrode comprises: a first extending portion extending in a first direction; and a plurality of first branch portions extending from the first extending portion in a second direction intersecting the first direction, Wherein, the second electrode comprises: a second extending portion extending in the first direction; and a plurality of second branch portions extending from the second extending portion in the second direction, The plurality of first branch portions and the plurality of second branch portions are alternately arranged in the first direction.

5. The display device according to claim 4, wherein: The plurality of first protruding electrodes are disposed on the plurality of first branch portions, and the plurality of second protruding electrodes are disposed on the plurality of second branch portions.

6. The display device according to claim 5, wherein: The plurality of first protruding electrodes are arranged in the second direction and contact the first electrode.

7. The display device according to claim 6, wherein: The plurality of first protruding electrodes are evenly spaced apart in the second direction.

8. The display device according to claim 5, wherein: The plurality of second protruding electrodes are arranged in the second direction and contact the second electrode.

9. The display device according to claim 8, wherein: The plurality of second protruding electrodes are evenly spaced apart in the second direction.

10. The display device according to claim 1, wherein: Both sides of each of the plurality of light emitting elements are respectively disposed on a corresponding pair of first protruding electrodes and second protruding electrodes among the plurality of first protruding electrodes and the plurality of second protruding electrodes.

11. The display device according to claim 10, further comprising: a first contact electrode configured to cover a first side of each of the plurality of light emitting elements and disposed on a first protruding electrode of the corresponding pair of first and second protruding electrodes; as well as The second contact electrode is configured to cover the second side of each of the plurality of light emitting elements and is disposed on the second protruding electrode of the corresponding pair of the first and second protruding electrodes.

12. The display device according to claim 1, wherein: The plurality of first protruding electrodes and the plurality of second protruding electrodes include a conductive material different from a conductive material of the first electrodes and the second electrodes.

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