Polar code encoding method and system

Abstract

The present invention discloses a system and method for polar code encoding in which information bits are placed in specific bit indexes. In one embodiment, a method for channel coding includes: associating a first bit sequence with a first bit index of a polar code input by a polar code encoder; associating a second bit sequence with a second bit index by the polar code encoder, wherein the first bit index has a higher reliability than the second bit index; and encoding the first bit sequence and the second bit sequence by the polar code encoder according to a generator matrix to generate encoded bits.

Description

Technical Field

[0001] The present disclosure relates generally to wireless communications, and more particularly, to systems and methods for polar code encoding in which information bits are placed in specific bit indices. Background Art

[0002] In communication systems, channel coding is usually performed to improve the reliability of data transmission and ensure communication quality. Polar code refers to a coding technique that can reach the Shannon limit and has low encoding and decoding complexity. Polar code is a linear block code. The encoding process of polar code can be expressed as x N =u N G N . G N It is usually called the generator matrix of the polar code. N (x N ={x1,x2,…,x N}) is often called polar code output or coding block. N (u N ={u1,u2,…,u N}) is usually called polar code input. N represents the mother code length (e.g., the length of the encoded bit), which is required to be a power of 2 (e.g., 2 n , where n is a positive integer).

[0003] In general, the bit sequence to be encoded (e.g., as part of the polar code input) can be placed in multiple indices and generated by the generator matrix G N Since the polar code input and output are respectively required to be integer powers of 2, when the bit length of the codeword to be transmitted is not an integer power of 2, a rate matching technique is usually performed to discard one or more coded bits (for example, one or more bits of the polar code output).

[0004] However, due to various application requirements in New Radio (NR) wireless communication systems or networks, the existing polar code encoding technology is not completely satisfactory. Summary of the invention

[0005] The exemplary embodiments disclosed herein are intended to solve problems related to one or more problems existing in the prior art, as well as to provide additional features, which will become apparent by reference to the detailed description below when combined with the accompanying drawings. According to various embodiments, exemplary systems, methods, devices, and computer program products are disclosed herein. However, it should be understood that these embodiments are presented by way of example and not limitation, and it will be apparent to those of ordinary skill in the art who have read this disclosure that various modifications may be made to the disclosed embodiments while remaining within the scope of the invention.

[0006] In one embodiment, a method for channel coding includes: associating, by a polar code encoder, a first bit sequence with a first bit index of a polar code input; associating, by the polar code encoder, a second bit sequence with a second bit index, wherein the first bit index has a higher reliability than the second bit index; and encoding, by the polar code encoder, the first bit sequence and the second bit sequence using a generator matrix to generate coded bits.

[0007] In another embodiment, a method for channel coding includes: receiving, by a polar code decoder, a polar code including a first bit sequence and a second bit sequence, wherein: the first bit sequence is associated with a first bit index, the second bit sequence is associated with a second bit index, the first bit index has a higher reliability than the second bit index, and encoding the polar code using the first bit sequence, the second bit sequence, and a generator matrix; and decoding the polar code by the polar code decoder. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Various exemplary embodiments of the present invention are described in detail below with reference to the following drawings. The drawings are provided for illustrative purposes only and depict only exemplary embodiments of the present invention to facilitate the reader's understanding of the present invention. Therefore, the drawings should not be construed as limiting the breadth, scope or applicability of the present invention. It should be noted that for clarity and ease of description, these drawings are not necessarily drawn to scale.

[0009] Figure 1 An exemplary cellular communication network according to an embodiment of the present disclosure is shown, in which the techniques disclosed herein may be implemented.

[0010] Figure 2 A block diagram of an exemplary base station and user equipment according to some embodiments of the present disclosure is shown.

[0011] Figure 3 A graph of bit error rate versus bit sequence index is shown according to some embodiments of the present disclosure.

[0012] Figure 4 A flow chart of an exemplary polar code encoding process according to some embodiments of the present invention is shown. DETAILED DESCRIPTION

[0013] Various exemplary embodiments of the present invention are described below with reference to the accompanying drawings so that those of ordinary skill in the art can implement and use the present invention. After reading this disclosure, it will be apparent to those of ordinary skill in the art that various changes or modifications can be made to the examples described herein without departing from the scope of the present invention. Therefore, the present invention is not limited to the exemplary embodiments and applications described and illustrated herein. In addition, the specific order or hierarchy of steps in the methods disclosed herein are merely exemplary. Based on design preferences, the specific order or hierarchy of steps of the disclosed methods or processes can be rearranged while still within the scope of the present invention. Therefore, it will be understood by those of ordinary skill in the art that the methods and techniques disclosed herein present various steps or actions in a sample order, and unless otherwise stated, the present invention is not limited to the specific order or hierarchy presented.

[0014] The following discussion may involve functional entities or processes similar to those described above with respect to conventional communication systems. However, as will be appreciated by one of ordinary skill in the art, such conventional functional entities or processes do not perform the functions described below and, therefore, need to be modified or specially configured to perform one or more operations described below. Furthermore, one of ordinary skill in the art will be able to configure the functional entities to perform the operations described herein after reading the present invention.

[0015] Figure 1 An exemplary wireless communication network 100 is shown in accordance with an embodiment of the present disclosure, in which the techniques disclosed herein may be implemented. Such exemplary network 100 includes a base station 102 (hereinafter referred to as "BS 102") and a user equipment 104 (hereinafter referred to as "UE 104"), which may communicate with each other via a communication link 110 (e.g., a wireless communication channel) and a cluster of conceptual cells 126, 130, 132, 134, 136, 138, and 140 covering a geographic area 101. Figure 1 1, BS 102 and UE 104 are contained within the respective geographic boundaries of cell 126. Each of the other cells 130, 132, 134, 136, 138, and 140 may include at least one base station operating on its allocated bandwidth to provide adequate radio coverage to its intended users.

[0016] For example, BS 102 can operate on the allocated channel transmission bandwidth to provide sufficient coverage to UE 104. BS 102 and UE 104 can communicate via downlink radio frame 118 and uplink radio frame 124, respectively. Each radio frame 118 / 124 can be further divided into subframes 120 / 127, which can include data symbols 122 / 128. In the present disclosure, BS 102 and UE 104 are generally described herein as non-limiting examples of "communication nodes", which can practice the methods disclosed herein. According to various embodiments of the present invention, such communication nodes can implement wireless and / or wired communications.

[0017] Figure 2 A block diagram of an exemplary wireless communication system 200 for sending and receiving wireless communication signals (e.g., OFDM / OFDMA signals) according to some embodiments of the present invention is shown. System 200 may include components and elements configured to support known or conventional operating features that need not be described in detail herein. In an exemplary embodiment, as described above, system 200 may be used in applications such as Figure 1 The wireless communication network 100 may be used to send and receive data symbols in a wireless communication environment.

[0018] System 200 generally includes a base station 202 (hereinafter referred to as "BS 202") and a user equipment 204 (hereinafter referred to as "UE 204"). BS 202 includes a BS (base station) transceiver module 210, a BS antenna 212, a BS processor module 214, a BS memory module 216, and a network communication module 218, each of which is coupled and interconnected to each other via a data communication bus 220 as needed. UE 204 includes a UE (user equipment) transceiver module 230, a UE antenna 232, a UE memory module 234, and a UE processor module 236, each of which is coupled and interconnected to each other via a data communication bus 240 as needed. BS 202 communicates with UE 204 via a communication channel 250, which can be any wireless channel or other medium known in the art suitable for data transmission as described herein.

[0019] As will be appreciated by those skilled in the art, the system 200 may also include Figure 2Any number of modules other than the modules shown in . It will be appreciated by those skilled in the art that various illustrative blocks, modules, circuits, and processing logic described in conjunction with the embodiments disclosed herein can be implemented in hardware, computer-readable software, firmware, or any actual combination thereof. In order to clearly illustrate this interchangeability and compatibility of hardware, firmware, and software, various illustrative components, blocks, modules, circuits, and steps are generally described according to their functions. Whether this function is implemented as hardware, firmware, or software depends on specific applications and design constraints imposed on the entire system. A technician familiar with the concepts described herein can implement this function in a suitable manner for each specific application, but the decision of this implementation should not be interpreted as limiting the scope of the present invention.

[0020] According to some embodiments, the UE transceiver module 230 may be referred to herein as an "uplink" transceiver module 230, which includes RF transmitter and receiver circuits each coupled to an antenna 232. A duplex switch (not shown) may alternatively couple the uplink transmitter or receiver to the uplink antenna in a time duplex manner. Similarly, according to some embodiments, the BS transceiver module 210 may be referred to herein as a "downlink" transceiver module 210, which includes RF transmitter and receiver circuits each coupled to an antenna 212. The downlink duplex switch may alternatively couple the downlink transmitter or receiver to the downlink antenna 212 in a time duplex manner. The operation of the two transceiver modules 210 and 230 is coordinated in time so that the uplink receiver is coupled to the uplink antenna 232 to receive transmissions over the communication channel 250 while the downlink transmitter is coupled to the downlink antenna 212. Preferably, there is tight time synchronization with only a minimum guard time between changes in duplex direction.

[0021] The UE transceiver module 230 and the BS transceiver module 210 are configured to communicate via a communication channel 250 and cooperate with an appropriately configured RF antenna arrangement 212 / 232 capable of supporting a specific wireless communication protocol and modulation scheme. In some exemplary embodiments, the UE transceiver module 210 and the BS transceiver module 210 are configured to support industrial standards such as Long Term Evolution (LTE) and emerging 5G standards. However, it should be understood that the present invention need not be limited to specific standards and related protocols in application. Instead, the UE transceiver module 230 and the BS transceiver module 210 can be configured to support alternative or additional wireless data communication protocols, including future standards or variations thereof.

[0022] According to various embodiments, each of the BS transceiver module 210 and the UE transceiver module 230 includes a polarization coding module 211 and 231. The polarization coding module may also be referred to as a polarization code encoder. In some embodiments, the polarization coding module is configured to apply the G N matrix to perform polar code encoding to generate polar code output. In some embodiments, the polarization encoding module can be divided into an independent module that performs encoding and an independent module that performs decoding. Therefore, the polarization encoding module that performs polar code encoding can be referred to as a polar code encoder, and the polarization encoding module that performs polar code decoding can be referred to as a polar code decoder. As will be discussed below, such polar code input and output can be processed by at least one of various disclosed techniques to meet respective application requirements. In other embodiments, each of the BS processor module 214 and the UE processor module 236 includes a polarization encoding module (e.g., as firmware or a processor configured to perform aspects of polar code encoding (e.g., encoding and / or decoding), as further discussed below). In yet another embodiment, each of the BS memory module 216 and the UE memory module 234 includes a polarization encoding module (e.g., as non-transitory computer-readable instructions for the processor module to perform polar code encoding).

[0023] According to various embodiments, BS 202 may be, for example, an evolved Node B (eNB), a serving eNB, a target eNB, a femto station, or a micro station. In some embodiments, UE 204 may be embodied in various types of user equipment, such as a mobile phone, a smart phone, a personal digital assistant (PDA), a tablet, a laptop computer, a wearable computing device, etc. Processor modules 214 and 236 may be implemented or realized using a general purpose processor, a content addressable memory, a digital signal processor, an application specific integrated circuit, a field programmable gate array, any suitable programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. In this manner, the processor may be implemented as a microprocessor, a controller, a microcontroller, a state machine, etc. The processor may also be implemented as a combination of computing devices, such as a combination of a digital signal processor and a microprocessor, a plurality of microprocessors, one or more microprocessors combined with a digital signal processor core, or any other such configuration.

[0024] In addition, the steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be directly embodied in hardware, firmware, software modules executed by processor modules 214 and 236, or any practical combination thereof. Memory modules 216 and 234 may be implemented as RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art. In this regard, memory modules 216 and 234 may be coupled to transceiver modules 210 and 230, respectively, so that transceiver modules 210 and 230 may read information from and write information to memory modules 216 and 234, respectively. Memory modules 216 and 234 may also be integrated into their respective transceiver modules 210 and 230. In some embodiments, memory modules 216 and 234 may each include a cache memory for storing temporary variables or other intermediate information during the execution of instructions to be executed by transceiver modules 210 and 230, respectively. Memory modules 216 and 234 may also each include non-volatile memory for storing instructions to be executed by transceiver modules 210 and 230, respectively.

[0025] The network communication module 218 generally represents the hardware, software, firmware, processing logic and / or other components of the base station 202, which implements two-way communication between the BS transceiver module 210 and other network components and network nodes configured to communicate with the base station 202. For example, the network communication module 218 can be configured to support Internet or WiMAX services. In a typical deployment, without limitation, the network communication module 218 provides an 802.3 Ethernet interface so that the BS transceiver module 210 can communicate with a traditional Ethernet-based computer network. In this way, the network communication module 218 may include a physical interface for connection with a computer network (e.g., a mobile switching center (MSC)). The terms "configured for", "configured to" and their coordination with respect to a specific operation or function used herein refer to a device, component, circuit, structure, machine, signal, etc. that is physically or substantially constructed, programmed, formatted and / or arranged to perform the specific operation or function.

[0026] The present disclosure provides various embodiments of systems and methods for polar coding in which a bit sequence is placed in a specific bit index of a polar code input. By placement, the bit sequence can be associated, located, or mapped to a specific bit index for polar coding (e.g., for processing by a generator matrix to produce a coding block or a polar code output). In certain embodiments, a bit sequence (e.g., a bit sequence to be encoded) may include a first bit sequence and a second bit sequence different from the first bit sequence. For example, the first bit sequence may carry specific information, or a specific type or category of information, which will be discussed further below. The first bit sequence may have a lower bit error rate requirement than the second bit sequence, and may be placed in a bit index with a higher reliability (e.g., a lower bit error rate) than other bit indexes in which the second bit sequence is placed. The bit error rate (BER) may be the number of erroneous bits divided by the total number of transmitted (e.g., transmitted) bits within a specific time. Therefore, the reliability of the first bit sequence may be higher relative to other bit sequences that may be placed in other bit indexes of the second bit sequence.

[0027] As mentioned above, the polar code can be expressed as x N =u N G N , where G N is the generator matrix of the polar code, x N (x N ={x1,x2,…,x N}) is the polar code output (e.g., coded block), u N (u N ={u1,u2,…,u N}) is the polar code input (which may include a bit sequence to be encoded), and N represents the mother code length (e.g., the length of the encoded bit), and N is required to be a power of 2 (i.e., 2 n , where n is a positive integer). As will be discussed further below, the bit error rate (BER) or reliability of the bit sequence to be encoded can vary with the value of the bit index (e.g., the bit position in the polar code input). In other words, the BER can vary with the specific index value of the bit sequence to be encoded. For example, each bit within the bit sequence can be placed in a specific index (e.g., associated with a specific index value), such as the first bit of the bit sequence can be placed in the first index of the bit index set, the second bit of the bit sequence can be placed in the second index of the bit index set, and so on, until the last bit of the bit sequence can be placed in the last index of the bit index set. The sum of the bit indices of the bit sequence can be referred to as a bit index set.

[0028] In some embodiments, it may be determined that a specific index (e.g., index value) of the bit index set may have a lower BER than other indexes of the bit index set. The specific index may be referred to as a reliable index of the bit index set relative to other indexes of the bit index set, which may be less reliable or have a higher BER than the reliable index. The specific index of the bit index set that may be a reliable index may be predefined (e.g., an absolute number of bit indices, such as 5 indices, and independent of the code length of the bit index set or polar code input), or may be related to factors such as the length of the polar code input and / or the length of the mother code and / or the length of the transmitted bit. As will be further discussed below, these reliable indices of the bit index set may be initial indices (e.g., the first index, or the index with the lowest bit index value). These reliable indices of the bit index set may also be final indices (e.g., the last index, or the index with the largest bit index value). These reliable indices may also be intermediate indices of the bit indexes between the initial index and the final index. These reliable indices of the bit index set can be determined by a metric value (e.g., thresholding or selecting the maximum or minimum metric value), which is derived from analysis results based on functions such as density evolution, Gaussian approximation, polarization weights, or row / column weight-based relationships, as will be discussed further below. In some embodiments, these reliable indices of the bit index set can be indices of the bit index set that meet predefined reliability criteria (e.g., have predefined reliability values).

[0029] Therefore, it is desirable to associate a first bit sequence (e.g., a bit sequence having a higher reliability requirement than other bit sequences) with these reliable indexes (e.g., when performing polar coding, more important information bits are placed in reliable indices), so that the reliability of the first bit sequence is higher relative to other bit sequences placed in other indices of the bit index set.

[0030] In some embodiments, polarization coding may be used for control channels of specific radio access technologies, such as 5G New Radio (NR). Certain types of information (e.g., control information) as part of a control channel have higher reliability requirements than other types of information. These types of information may be represented as a first bit sequence and are the first bit sequence placed in a reliable index (e.g., a reliable index of a bit index set) of a polarization code input. For example, a control channel may include information such as a rank indicator (RI), a channel state information reference signal resource index (CSI-RS RI or CRI, CSI-RS Resource Indicator), a precoding type indicator (PTI, Precoding Type Indicator), a precoding matrix indicator (PMI, Precoding Matrix Indicator), a channel quality indicator (CQI, Channel Quality Indicator), an acknowledgement (ACK, acknowledge) and / or a negative acknowledgement (NACK, negative acknowledgement), etc. In some embodiments, RI, CRI, PTI, ACK, or NACK has higher reliability requirements than other information carried by the coded bit sequence. Therefore, these types of information (e.g., at least one of RI, CRI, PTI, ACK and / or NACK) can be placed in the first bit sequence of reliable indexes of the polar code input. For example, RI can be represented as three bits, which are placed in three reliable indexes of the bit index set of the polar code input. The reliable indexes of the bit index set can be co-located (e.g., continuously located in the bit index set). These reliable indexes of the bit index set of the polar code input can also be non-co-located (e.g., non-continuously located in the bit index set, such as, two of the three reliable indexes of the bit index set are the first two indexes of the bit index set (e.g., index values), and the other of the three reliable indexes is the last index of the bit index set (e.g., index value). The same principle can be applied to a specific information combination (e.g., a first bit sequence including RI, CRI, PTI, ACK, NACK information type or category), where different types of information of the first bit sequence can be co-located and / or non-co-located.

[0031] Figure 3A graph 300 of bit error rate versus bit sequence index according to some embodiments of the present disclosure is shown. The X-axis includes the index of the bit sequence (e.g., bits 1-80 in the bit sequence), and the Y-axis includes the bit error rate (BER). K is the length of the bit sequence (e.g., the number of indices in the bit index set), and R is the code rate. Different lines 302 represent the relationship between the bit error rate and the index value for different signal-to-noise ratios (SNRs). The exact SNR value is not important and is not illustrated.

[0032] From the graph 300 of bit error rate versus index value of a bit sequence, an overall trend of specific index values ​​having lower or higher BER relative to other index values ​​can be determined. For example, at each channel SNR, the graph 300 of bit error rate versus index value of a bit sequence has the same shape. In other words, for each SNR, the shape of each graph is mostly parallel (e.g., symmetrical), with the same corresponding features (e.g., corresponding BER values ​​for each index value) for each SNR. For example, at the same SNR, bits placed in the initial index 310 (e.g., approximately the first 12 bits) may have a lower BER than other bits placed in other indexes. In addition, the shape of each graph is a bell curve shape, such as, where the BER for each SNR is lower at bits placed in the initial index 310 (e.g., index values ​​from approximately 1-12) or bits placed in the final index 312 (e.g., index values ​​from approximately 78-80) relative to bits placed in certain intermediate indexes 314 (e.g., index values ​​from approximately 30-40). Additionally, there may be valleys 316 among bits located in intermediate indices (eg, intermediate index values) where the BER is lower than at bits located in other intermediate indices.

[0033] In various embodiments, a bit sequence (e.g., a first bit sequence) may be placed in (e.g., associated with) reliable indexes having a particular BER and / or reliability criterion or metric. For example, these reliable indexes may have a lower BER and / or higher reliability relative to other indexes in the set of bit indices. Reliable indexes may be determined using any type of criterion or metric for distinguishing the reliability of bits at a particular index in the set of bit indices, or more generally, for identifying bits at a particular index in the set of bit indices, such as a particular BER value threshold (e.g., below 10 -2BER), a relative BER threshold (e.g., a BER below the BER of 80% of the bits at the index in the bit index set), a predefined index set of arbitrary indices that are independent of the index length (e.g., the first five indices), a metric value determined by a probability function distribution of the bit index BER or capacity (e.g., density evolution or Gaussian approximation), or a function based on the index value (e.g., a function with polarization weights or row weights or column weights or predefined reliability values ​​that conform to specific index values). Therefore, a first bit sequence (which may carry control information) is placed in a reliable index of the bit index set that is associated with a lower BER (e.g., higher reliability) than other indices of the bit index set. In addition, the reliability of the first bit sequence is higher relative to other bit sequences placed in other indices of the bit index set.

[0034] In some embodiments, the reliable index may be an initial index or a minimum index of a bit index set. Thus, the initial index of a bit index set (e.g., a minimum index value of a bit index set) may be used to place a first bit sequence. For example, when an index in Set_I (e.g., a bit index set) is used to place a bit sequence, the L1 minimum index in Set_I may be used to place a first bit sequence, where L1 / K≤P1, K is the length of Set_I, and 0≤P1≤1 (e.g., P1=0.2 or 0.5). These first bit sequences may be bit sequences associated with at least one of RI, CRI, PTI, ACK, NACK, etc.

[0035] In some embodiments, the reliable index may be an initial index and a final index of a bit index set (e.g., a maximum index value of a bit index set). Therefore, both the initial index and the final index of a bit index set may be used to place a first bit sequence. For example, when an index in Set_I (e.g., a bit index set) is used to place a bit sequence, the L2 minimum index and the L3 maximum index in Set_I may be used to place the first bit sequence, where L2 / K≤P2, and L3 / K≤P3, K is the length of Set_I, and 0≤P2≤1 (e.g., P2=0.2 or 0.5), 0≤P3≤1 (e.g., P3=0.1). These first bit sequences may be sequence bits associated with at least one of RI, CRI, PTI, ACK, NACK, etc.

[0036] In some embodiments, the reliable index of the bit index set can be determined by a metric value (e.g., by thresholding or selecting the maximum or minimum metric value), which is derived from the analysis result according to the function. For example, the function can be the bit index set BER, or a probability distribution (e.g., density evolution or Gaussian approximation) or a capacity based on a function of the bit index set (e.g., a function with polarization weights or row weights or column weights or predefined reliability values ​​that conform to specific index values). The output (e.g., result) of these functions can be a metric value that can be evaluated, such as by thresholding (e.g., determining the reliable index as a value that exceeds or is below a threshold), or by selecting the index with the maximum or minimum L4 metric value, where 0≤L4 / K≤1 (e.g., L4 / K=0.2 or 0.5). For example, the reliable index can be an index of a bit index set with a specific probability BER or capacity distribution (e.g., a probability BER or capacity distribution above or below a specific threshold). Functions such as probability distributions (e.g., as density evolution or Gaussian approximations) may be suitable for determining reliable indices by applying them to polar codes, but are otherwise conventional and will not be discussed in detail herein for the sake of brevity. In some embodiments, these functions may apply weights that may vary based on factors such as the index values ​​of the bit index set (e.g., certain indexes with higher BER values ​​may have correspondingly smaller weights). In addition, as an example of polarization weights or row / column weight-based relationships, reliable indices for a bit index set may be associated with a subset of the index values ​​of the bit index set (or with a subset of weighted polar code rows or weighted polar code columns). For example, for index i, the polarization weight may be obtained by Calculate, where index i = 0, 1, ..., N-1, b n-1 b n-2 …b1b0 is the binary representation of i. For index i, the row / column weight is the number of one of the i-th row / column of the polar code generator matrix. As an example of a predefined reliability value, for index i, the predefined reliability can be any R i , where i = 0, 1, ..., N-1 and R i =0,1,..,N-1.

[0037] In various embodiments, when an index in Set_I (e.g., a bit index set) is used to place a bit sequence, an L5 index in Set_I that exceeds a threshold of a metric value (e.g., a value determined by a function) may be determined as a reliable index value for placing a first bit sequence (e.g., bits associated with at least one of RI, CRI, PTI, ACK, or NACK, etc.). In some embodiments, 0≤L5 / K≤1 (e.g., L5 / K=0.2 or 0.5), K is the length of Set_I. These functions may be applied to determine the reliability (e.g., BER) of each index value (e.g., each index value of the bit index set) before polar coding.

[0038] Figure 4 4 is a flowchart of an exemplary polar code encoding process 400 according to some embodiments of the present disclosure. As described above, the polar code encoding process 400 may be performed by a communication node and / or a polar coding module. Note that the process 400 is merely an example and is not intended to limit the present disclosure. Therefore, it should be understood that the polar code encoding process 400 may be performed by a communication node and / or a polar coding module. Figure 4 Additional operations may be provided before, during, and after process 400, some operations may be omitted, some operations may be performed concurrently with other operations, and some other operations may be only briefly described herein.

[0039] At box 402, the polarization coding module can identify a first bit sequence. The first bit sequence can be any bit sequence associated with information that can be distinguished from other information. In some embodiments, the first bit sequence can be associated with information that is system critical information or information that other information in the communication system depends on. For example, polarization coding can be used for control channels of specific wireless access technologies such as 5G New Radio (NR) or 4G Long Term Evolution (LTE). Therefore, certain types of information that are part of the control channel may have higher BER requirements than other types of information. These types of information with higher BER requirements can be represented as a first bit sequence and are the first bit sequences placed in a reliable index of a bit index set. For example, the first bit sequence may include at least one of a rank indication (RI), a channel state information reference signal resource index (CSI-RS resource index, or CRI), a precoding type indication (PTI), an acknowledgement (ACK), a negative acknowledgement (NACK), etc.

[0040] At box 404, the polar coding module can identify reliable indexes of the bit index set. The reliable index of the bit index set can be an index of the bit index set associated with a lower BER or a higher reliability. The reliable index of the bit index set can be a predefined specific index (for example, it can be a specific index of the bit index set, such as 5 initial indexes, regardless of the length of the bit index set or the mother code length or the code length of the transmission bit), or it can vary with factors such as the length of the bit index set or the mother code length or the code length of the transmission bit. As described above, these reliable indexes of the bit index set can be initial indexes (for example, the first index, or the index of the minimum value in the bit index set). These reliable indexes of the bit index set can also be final indexes (for example, the last index, or the index of the maximum value in the bit index set). These reliable indexes of the bit index set can also be intermediate indexes between the initial index or the final index. These reliable indices of the bit index set can be determined by a metric value (e.g., by thresholding or selecting the maximum or minimum metric value) that is derived from an analysis result according to a function such as density evolution, Gaussian approximation, or polarization weights, or a relationship based on row / column weights or predefined reliability values. These reliable indices of the bit index set can be associated with a subset of the index values ​​of the bit index set. Further discussion of reliable indices of the bit index set is provided above.

[0041] At block 406, the polarization coding module may associate (e.g., place) the first bit sequence with a reliable bit index. In other words, the bits of the first bit sequence may be placed in a reliable index for polarization coding. For example, the first bit sequence may include a bit carrying the RI. Thus, the RI may be represented as three bits, which are placed in three reliable indexes of a bit index set. These reliable indexes of the bit index set may be co-located (e.g., located continuously in the bit index set). These reliable indexes of the bit index set may also be separated, or non-co-located (e.g., located non-continuously in the bit index set, such as making two of the three reliable indexes the first two indexes of the bit index set, and another of the three reliable indexes the last index of the bit index set). The same principle may be applied to different information combinations or types, where different types of first information may be co-located and / or non-co-located. In some embodiments, the reliable indexes may be graded with reliability and different types, or different levels of first information may be placed in reliable indexes of different reliabilities.

[0042] At block 408, the polar coding module may associate (e.g., place) other information (e.g., other bit sequences) in other indices of the set of bit indices. Thus, other indices of the set of bit indices (e.g., indices of unreliable indices) may be associated with other information that is not part of the information placed in the reliable indices.

[0043] At block 410, the polar coding module may perform polar coding using bits of the first bit sequence placed in a reliable index of the bit index set as described above. Polar coding is discussed further above and will not be described again here for the sake of brevity.

[0044] Although various embodiments of the present invention have been described above, it should be understood that they are presented only in an exemplary and not limiting manner. Similarly, various figures may depict example architectures or configurations, which are provided so that those of ordinary skill in the art can understand the exemplary features and functions of the present invention. However, such personnel will understand that the present invention is not limited to the example architectures or configurations shown, but can use a variety of alternative architectures and configurations to implement the present invention. In addition, as those of ordinary skill in the art will understand, one or more features of an embodiment may be combined with one or more features of another embodiment described herein. Therefore, the breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments.

[0045] It should also be understood that any reference to an element herein using names such as "first," "second," etc. does not generally limit the number or order of those elements. Rather, these names may be used herein as a convenient means of distinguishing between two or more elements or instances of an element. Thus, a reference to a first and a second element does not mean that only two elements may be used, or that the first element must be located before the second element in some manner.

[0046] In addition, those of ordinary skill in the art will appreciate that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, and symbols such as those referenced in the description above may be represented by voltage, current, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0047] It will be further understood by those of ordinary skill in the art that any of the various schematic logic blocks, modules, processors, devices, circuits, methods, and functions described in conjunction with the aspects disclosed herein may be implemented by electronic hardware (e.g., digital implementations, analog implementations, or a combination of the two), firmware, various forms of design code or programs containing instructions (for convenience, may be referred to herein as "software" or "software modules"), or any combination of these technologies. In order to clearly illustrate this interchangeability of hardware, firmware, and software, various schematic components, blocks, modules, circuits, and steps have been described above generally according to their functions. Whether such functionality is implemented as hardware, firmware, or software, or a combination of these technologies, depends on the specific application and the design constraints imposed on the overall system. Technicians may implement the described functionality in various ways for each specific application, but such implementation decisions will not cause a departure from the scope of the present disclosure.

[0048] In addition, it will be understood by those of ordinary skill in the art that the various illustrative logic blocks, modules, devices, components and circuits described herein may be implemented within or performed by an integrated circuit (IC), which may include: a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, or any combination thereof. The logic blocks, modules and circuits may further include antennas and / or transceivers to communicate with various components within a network or within a device. The general purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller or state machine. The processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors combined with a DSP core, or any other suitable configuration to perform the functions described herein.

[0049] If the function is implemented in software, the function can be stored as one or more instructions or codes on a computer-readable medium. Therefore, the steps of the method or algorithm disclosed herein can be implemented as software stored on a computer-readable medium. Computer-readable media include both computer storage media and communication media, and communication media include any media that can enable a computer program or code to be transferred from one place to another. The storage medium can be any available medium that a computer can access. By way of example and in a non-limiting manner, such a computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, or any other medium that can be used to store desired program codes in the form of instructions or data structures and can be accessed by a computer.

[0050] In this document, the term "module" as used herein refers to software, firmware, hardware, and any combination of these elements for performing the associated functions described herein. In addition, for the purpose of discussion, various modules are described as discrete modules; however, it is obvious to those of ordinary skill in the art that two or more modules can be combined to form a single module that performs the associated functions according to embodiments of the present invention.

[0051] In addition, memory or other storage devices and communication components can be used in embodiments of the present invention.It should be understood that, for the sake of clarity, the above description has described embodiments of the present invention with reference to different functional units and processors.However, it will be apparent that any appropriate functional distribution between different functional units, processing logic elements or domains can be used without departing from the present invention.For example, the function illustrated as being performed by a separate processing logic element or controller can be performed by the same processing logic element or controller.Therefore, reference to a specific functional unit is only a reference to an appropriate device for providing the described function, rather than indicating a strict logical or physical structure or organization.

[0052] Various modifications to the embodiments described in this disclosure will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the embodiments shown herein, but is to be given the widest scope consistent with the novel features and principles disclosed herein, as set forth in the claims below.

Claims

1. A method for channel coding, comprising: Acquire information bits to be encoded, wherein the information bits include a first bit sequence and a second bit sequence, wherein the first bit sequence requires a lower bit error rate than the second bit sequence; Associating, by a polar code encoder, a first bit sequence of the information bits with a first bit index of a polar code input; Associating, by the polar code encoder, a second bit sequence of the information bits with a second bit index of the polar code input, wherein the first bit index has a higher reliability than the second bit index; as well as The polar code encoder encodes the first bit sequence and the second bit sequence to generate encoded bits.

2. The method according to claim 1, wherein: The first bit index has a lower bit error rate than the second bit index. The method of claim 1 , wherein the first bit sequence is associated with control information.

4. The method of claim 1, wherein the first bit sequence is associated with at least one of a rank indication, a channel state information reference signal resource index, a precoding type indication, an acknowledgement, and a negative acknowledgement.

5. The method according to claim 1, wherein: The bit index set includes the first bit index and the second bit index, and The first bit index comprises an initial index of the bit index set.

6. The method according to claim 1, wherein: The bit index set includes the first bit index and the second bit index, and The first bit index comprises a final index of the set of bit indices.

7. The method according to claim 1, wherein: The bit index set includes the first bit index and the second bit index, and The first bit index is determined by analyzing the set of bit indices using at least one of the following techniques: density evolution, Gaussian approximation, polarization weight, row weight, column weight, and a predefined reliability value.

8. The method according to claim 1, wherein: The bit index set includes the first bit index and the second bit index, and The first bit index is defined regardless of the size of the bit index set.

9. A method for channel coding, comprising: The polar code decoder receives coded information bits including a first bit sequence and a second bit sequence, wherein: The first bit sequence requires a lower bit error rate than the second bit sequence The first bit sequence is associated with a first bit index of a polar code, The second bit sequence is associated with a second bit index of the polar code, The first bit index has a higher reliability than the second bit index, The first bit sequence and the second bit sequence are encoded based on the polar code; and The polar code decoder decodes the encoded information bits based on the polar code.

10. The method according to claim 9, wherein: The first bit index has a lower bit error rate than the second bit index.

11. The method according to claim 9, wherein: The first bit sequence is associated with control information.

12. The method according to claim 9, wherein: The first bit sequence is associated with at least one of a rank indication, a channel state information reference signal resource index, a precoding type indication, an acknowledgement, and a negative acknowledgement.

13. The method of claim 9, wherein: The bit index set includes the first bit index and the second bit index, and The first bit index comprises an initial index of the bit index set.

14. The method of claim 9, wherein: The bit index set includes the first bit index and the second bit index, and The first bit index comprises a final index of the set of bit indices.

15. The method of claim 9, wherein: The bit index set includes the first bit index and the second bit index, and The first bit index is determined by analyzing the set of bit indices using at least one of the following techniques: density evolution, Gaussian approximation, polarization weight, row weight, column weight, and a predefined reliability value.

16. The method of claim 9, wherein: The bit index set includes the first bit index and the second bit index, and The first bit index is defined regardless of the size of the bit index set.

17. A computing device comprising a processor and a memory, wherein: The processor reads instructions from the memory and implements the method according to any one of claims 1 to 16.

18. A non-transitory computer-readable medium having stored thereon computer-executable instructions which, when executed by a processor, cause the processor to implement the method according to any one of claims 1 to 16.

Images