A low power LED constant current drive circuit

Abstract

The invention discloses a low-power LED constant-current driving circuit, which comprises a power input circuit, a constant-current source circuit, an output voltage detection circuit and a reference current control circuit. The invention has the advantage of low power consumption.

Description

Technical Field

[0001] The invention relates to the field of LED drive circuits, and in particular to a low-power LED constant-current drive circuit. Background Art

[0002] LED is a solid-state semiconductor device that can directly convert electricity into light. The inherent characteristics of LED determine that it is the most ideal light source to replace traditional light sources and has a wide range of uses. In addition to meeting safety requirements, the basic functions of LED driving circuits should have two aspects: one is to maintain constant current characteristics as much as possible, especially when the power supply voltage changes by ±15%, the output current should still be able to change within the range of ±10%; the second is that the driving circuit should maintain low power consumption, so that the LED system efficiency can be maintained at a high level. However, the existing multi-channel constant current driving circuits used to drive multi-channel LED loads still have the problem of high power consumption. The power consumption of the multi-channel constant current driving circuit may even be equal to the power consumption of the LED load. The high power consumption of the multi-channel constant current driving circuit means that the chip packaged by the multi-channel constant current driving circuit will have a problem of high heat generation, so the chip packaged by the multi-channel constant current driving circuit is easy to be damaged; for example, with Figure 1 As shown, an existing multi-channel constant current drive circuit has three outputs, and the resistance value of the resistor RISET' determines the size of each output, wherein the input voltage of the input end of the multi-channel constant current drive circuit is 12V, and when the output current of each channel is 100mA, and the voltage of the load of each output end is 6V, the input current of the input end of the multi-channel constant current drive circuit is 302mA, and the total power of the multi-channel constant current drive circuit and each output end load is 302mA*12V=3.624W, and the total power of each output end load is 6V*100mA*3=1.8W, thereby it can be obtained that the power of the multi-channel constant current drive circuit is 3.624W-1.8W=1.824W, and the proportion of the multi-channel constant current drive circuit to the total power is 50.3%, and the power proportion of the multi-channel constant current drive circuit is high. Summary of the invention

[0003] The object of the present invention is to provide a low-power LED constant current driving circuit, which can output multiple stable circuits, and the power consumption of the multiple constant current driving circuits of the low-power LED constant current driving circuit is low.

[0004] In order to achieve the above object, the solution of the present invention is:

[0005] A low-power LED constant current drive circuit, comprising a power input circuit and a multi-channel constant current drive circuit; the power input circuit comprises a common input terminal, a first power terminal, a second power terminal and a power resistor, wherein the first power terminal and one end of the power resistor are connected to the common input terminal, and the other end of the power resistor is connected to the second power terminal; the multi-channel constant current drive circuit comprises a constant current source circuit, an output voltage detection circuit and a reference current control circuit; the constant current source circuit comprises N current source circuits with the same structure, N being an integer greater than or equal to 2; each current source circuit comprises two current-controlled current sources with the same structure, and the two current-controlled current sources of each current source circuit are divided into a first current-controlled current source and a second current-controlled current source, and the first current-controlled current source is a first current-controlled current source and a second current-controlled current source. The amplification factor of the first current-controlled current source and the second current-controlled current source of each current source circuit is the same, the input ends of the first current-controlled current source and the second current-controlled current source of each current source circuit are connected to the first power supply end and the second power supply end respectively; the output end of the first current-controlled current source of each current source circuit is connected to the output end of the second current-controlled current source and serves as the output end of the current source circuit; the output voltage detection circuit includes N voltage detection circuits with the same structure; each voltage detection circuit has two input ends and one output end; wherein the i-th voltage detection circuit is used to detect the difference between the output end voltage of the i-th current source circuit and the second power supply end voltage and output the corresponding i-th current signal; the first input end of the i-th voltage detection circuit is connected to the second power supply end, and ... The second input end of the i-th voltage detection circuit is connected to the output end of the i-th current source circuit; i is any integer from 1 to N; the reference current control circuit includes a total current setting circuit, a first differential voltage circuit, a second differential voltage circuit and n reference current output circuits with the same structure; each reference current output circuit has two control ends, two differential ends and two output ends; wherein the total current setting circuit is connected to the first control end of each reference current output circuit, and the total current setting circuit is used to control the sum of the first output end current and the second output end current of each reference current output circuit; the second control end of the i-th reference current output circuit is connected to the output end of the i-th voltage detection circuit; the first differential voltage circuit, the second differential voltage circuit and the reference current output circuit of each reference current output circuit are ... The voltage circuits are respectively connected to the first differential end and the second differential end of each reference current output circuit, the first differential voltage circuit is used to provide a same reference voltage signal to the first differential end of each reference current output circuit, and the second differential voltage circuit is used to provide an i-th voltage signal reflecting the size of the i-th current signal to the second differential end of the i-th reference current output circuit according to the i-th current signal; the i-th reference current output circuit controls the ratio of the current at the first output end and the current at the second output end of the i-th reference current output circuit according to the i-th voltage signal; the first output end and the second output end of the i-th reference current output circuit are respectively connected to the control end of the first current-controlled current source and the control end of the second current-controlled current source of the i-th current source circuit.

[0006] The first current-controlled current source of each current source circuit includes a first resistor, a second resistor, a first PMOS tube and a first amplifier; wherein one end of the first resistor is connected to one end of the second resistor and serves as the input end of the first current-controlled current source, the other end of the first resistor is connected to the in-phase input end of the first amplifier and serves as the control end of the first current-controlled current source, the inverting input end of the first amplifier is connected to the other end of the second resistor and the source of the first PMOS tube, the output end of the first amplifier is connected to the gate of the first PMOS tube, and the drain of the first PMOS tube serves as the output end of the first current-controlled current source; the second current-controlled current source of each current source circuit includes a third resistor, a fourth resistor, a second PMOS tube and a second amplifier an amplifier; wherein the resistance value of the third resistor is the same as that of the first resistor, the resistance value of the fourth resistor is the same as that of the second resistor, the transconductance of the second PMOS tube is the same as that of the first PMOS tube, and the amplification factor of the second amplifier is the same as that of the first amplifier; wherein one end of the third resistor is connected to one end of the fourth resistor and serves as the input end of the second current-controlled current source, the other end of the third resistor is connected to the in-phase input end of the second amplifier and serves as the control end of the second current-controlled current source, the inverting input end of the second amplifier is connected to the other end of the fourth resistor and the source of the second PMOS tube, the output end of the second amplifier is connected to the gate of the second PMOS tube, and the drain of the second PMOS tube serves as the output end of the second current-controlled current source.

[0007] Each of the voltage detection circuits comprises a fifth resistor, a sixth resistor, a seventh resistor, a first NMOS tube, a second NMOS tube, a third NMOS tube, a third PMOS tube and a first current source, wherein one end of the fifth resistor is connected to one end of the sixth resistor and serves as a first input end of the voltage detection circuit, the other end of the fifth resistor is connected to the drain of the first NMOS tube, the gate of the first NMOS tube serves as a second input end of the voltage detection circuit, the source of the first NMOS tube is connected to the gate of the third PMOS tube and is grounded through the seventh resistor, the other end of the sixth resistor is connected to the source of the third PMOS tube, the drain of the third PMOS tube is connected to the drain of the second NMOS tube, the gate of the second NMOS tube and the gate of the third NMOS tube, the source of the second NMOS tube is connected to the source of the third NMOS tube and is grounded, and the drain of the third NMOS tube is connected to the output end of the first current source and serves as the output end of the voltage detection circuit.

[0008] The total current setting circuit comprises an adjusting resistor, a fourth PMOS tube, a fourth NMOS tube and a third amplifier, wherein the source of the fourth PMOS tube is connected to a DC power supply, the gate of the fourth PMOS tube is connected to the drain of the fourth PMOS tube and the drain of the fourth NMOS tube, the in-phase input end of the third amplifier is connected to a reference voltage, the inverting input end of the third amplifier is connected to the source of the fourth NMOS tube and one end of the adjusting resistor, the output end of the third amplifier is connected to the gate of the fourth NMOS tube, the other end of the adjusting resistor is grounded, the gate of the fourth PMOS tube serves as the output end of the total current setting circuit, and the output end of the total current setting circuit The first differential voltage circuit includes an eighth resistor, a fifth NMOS tube and a second current source; wherein the output end of the second current source is connected to one end of the eighth resistor and serves as the output end of the first differential voltage circuit, and the output end of the first differential voltage circuit is connected to the first differential end of each reference current output circuit; the other end of the eighth resistor is connected to the drain and gate of the fifth NMOS tube, and the source of the fifth NMOS tube is grounded; the second differential voltage circuit includes a ninth resistor and a tenth NMOS tube, wherein the resistance value of the ninth resistor is the same as the resistance value of the eighth resistor, and the transconductance of the tenth NMOS tube is the same as that of the fifth NMOS tube. The transconductances of the NMOS tubes are the same; one end of the ninth resistor is connected to the drain of the tenth NMOS tube and the gate of the tenth NMOS tube, the source of the tenth NMOS tube is grounded, the other end of the ninth resistor is used as the output end of the second differential voltage circuit, and the output end of the second differential voltage circuit is connected to the second differential end of each reference current output circuit; each reference current output circuit includes a first triode, a fifth PMOS tube, a sixth PMOS tube, a seventh PMOS tube, a sixth NMOS tube, a seventh NMOS tube, an eighth NMOS tube and a ninth NMOS tube, wherein the transconductances of the sixth PMOS tube and the seventh PMOS tube are the same, and the transconductances of the sixth NMOS tube and the seventh NMOS tube are the same, and the transconductances of the sixth NMOS tube and the seventh NMOS tube are the same. The transconductance of the OS tube and the seventh NMOS tube is the same, and the transconductance of the eighth NMOS tube and the ninth NMOS tube is the same; the gate of the fifth PMOS tube serves as the first control terminal of the reference current output circuit, the source of the fifth PMOS tube is connected to the DC power supply, the drain of the fifth PMOS tube is connected to the source of the sixth PMOS tube and the source of the seventh PMOS tube, the gate of the sixth PMOS tube serves as the first differential terminal of the reference current output circuit, the drain of the sixth PMOS tube is connected to the gate of the sixth NMOS tube, the gate of the seventh NMOS tube and the drain of the seventh NMOS tube, and the source of the sixth NMOS tube and the source of the seventh NMOS tube are grounded;The drain of the sixth NMOS tube serves as the first output terminal of the reference current output circuit, the drain of the seventh PMOS tube is connected to the gate of the eighth NMOS tube, the drain of the eighth NMOS tube and the gate of the ninth NMOS tube, the source of the eighth NMOS tube and the source of the ninth NMOS tube are grounded, the drain of the ninth NMOS tube serves as the second output terminal of the reference current output circuit, the gate of the seventh PMOS tube is connected to the emitter of the first transistor, the gate of the seventh PMOS tube serves as the second differential terminal of the reference current output circuit, the base of the first transistor is connected to the collector of the first transistor and serves as the second control terminal of the reference current output circuit. ;

[0009] After adopting the above scheme, the present invention can output multiple stable currents, and compared with the existing multiple constant current driving circuits, the present invention can divide part of the power consumption of a low-power LED constant current driving circuit of the present invention through a power supply resistor, thereby reducing the power consumption proportion of the multiple constant current driving circuits of the low-power LED constant current driving circuit of the present invention; in addition, the present invention can perform feedback adjustment through the output voltage detection circuit and the reference current control circuit to ensure that the output current of each current source circuit remains unchanged when the voltage of the common input end decreases. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a circuit structure schematic diagram of an existing multi-channel constant current drive circuit;

[0011] Figure 2 It is a schematic diagram of the circuit structure of the present invention. DETAILED DESCRIPTION

[0012] In order to further explain the technical solution of the present invention, the present invention is described in detail below through specific embodiments.

[0013] like Figure 2 As shown, the present invention discloses a low-power LED constant current drive circuit, which includes a power input circuit and a multi-channel constant current drive circuit; wherein the multi-channel constant current drive circuit includes a constant current source circuit, an output voltage detection circuit and a reference current control circuit.

[0014] Cooperate Figure 2 As shown, the power input circuit includes a common input terminal VBAT, a first power terminal VCCA, a second power terminal VCCB and a power resistor RT, wherein one end of the first power terminal VCCA and the power resistor RT are connected to the common input terminal VBAT, and the other end of the power resistor RT is connected to the second power terminal VCCB.

[0015] Cooperate Figure 2As shown, the constant current source circuit includes N current source circuits with the same structure, N is an integer greater than or equal to 2; each current source circuit includes two current-controlled current sources with the same structure, and the two current-controlled current sources of each current source circuit are divided into a first current-controlled current source and a second current-controlled current source, and the input ends of the first current-controlled current source and the second current-controlled current source of each current source circuit are respectively connected to the first power supply end VCCA and the second power supply end VCCB; the output end of the first current-controlled current source of each current source circuit is connected to the output end of the second current-controlled current source and serves as the output end of the current source circuit, so that the output end current of each current source circuit is It is equal to the sum of the output current of the first current-controlled current source and the output current of the second current-controlled current source; and the output current of the first current-controlled current source is equal to M times the control current of the first current-controlled current source, and the output current of the second current-controlled current source is also equal to M times the control current of the second current-controlled current source, M is the amplification factor of the first current-controlled current source and the second current-controlled current source, that is, the amplification factors of the first current-controlled current source and the second current-controlled current source are the same, so it can be known that the output current of each current source circuit is equal to M times the sum of the control current of the first current-controlled current source and the output current of the second current-controlled current source.

[0016] Cooperate Figure 2 As shown, the output voltage detection circuit includes N voltage detection circuits with the same structure; each voltage detection circuit has two input terminals and an output terminal; wherein the i-th voltage detection circuit is used to detect the difference between the output terminal voltage of the i-th current source circuit and the voltage of the second power supply terminal VCCB and output the corresponding i-th current signal; the first input terminal of the i-th voltage detection circuit is connected to the second power supply terminal VCCB, and the second input terminal of the i-th voltage detection circuit is connected to the output terminal of the i-th current source circuit; i is any integer from 1 to N.

[0017] Cooperate Figure 2As shown, the reference current control circuit includes a total current setting circuit, a first differential voltage circuit, a second differential voltage circuit and n reference current output circuits with the same structure; each reference current output circuit has two control terminals, two differential terminals and two output terminals. The total current setting circuit is connected to the first control terminal of each reference current output circuit, and the total current setting circuit is used to control the sum of the first output terminal current and the second output terminal current of each reference current output circuit; since the sum of the first output terminal current and the second output terminal current of each reference current output circuit are controlled by the total current setting circuit, the sum of the first output terminal current and the second output terminal current of each reference current output circuit is equal, and the first output terminal and the second output terminal of the i-th reference current output circuit are respectively connected to the control terminal of the first current control current source and the control terminal of the second current control current source of the i-th current source circuit, so that the output terminal current of each current source circuit is equal, realizing multi-channel constant current output. The second control end of the i-th reference current output circuit is connected to the output end of the i-th voltage detection circuit; the first differential voltage circuit and the second differential voltage circuit are respectively connected to the first differential end and the second differential end of each reference current output circuit, the first differential voltage circuit is used to provide a same reference voltage signal to the first differential end of each reference current output circuit, and the second differential voltage circuit is used to provide the second differential end of the i-th reference current output circuit with an i-th voltage signal reflecting the size of the i-th current signal according to the i-th current signal, and the i-th reference current output circuit controls the first output end current and the second output end current of the i-th reference current output circuit according to the i-th voltage signal , so that when the voltage of the common input terminal VBAT decreases, each voltage detection circuit will increase the current of the first output terminal of each reference current output circuit and decrease the current of the second output terminal of each reference current output circuit, thereby increasing the control terminal current of the first current-controlled current source of each current source circuit and decreasing the control terminal current of the second current-controlled current source of each current source circuit, thereby increasing the input terminal current of the first current-controlled current source of each current source circuit and decreasing the input terminal current of the second current-controlled current source of each current source circuit, so as to reduce the current flowing through the power supply resistor RT, thereby reducing the power consumption of the power supply resistor RT, and maintaining the output terminal current of each current source circuit unchanged.

[0018] Cooperate Figure 2As shown, the first current-controlled current source of each current source circuit includes a first resistor R1_N, a second resistor R2_N, a first PMOS transistor PM1_N and a first amplifier OP1_N; wherein one end of the first resistor R1_N is connected to one end of the second resistor R2_N and serves as an input end of the first current-controlled current source, the other end of the first resistor R1_N is connected to the in-phase input end of the first amplifier OP1_N and serves as a control end of the first current-controlled current source, the inverting input end of the first amplifier OP1_N is connected to the other end of the second resistor R2_N and the source of the first PMOS transistor PM1_N, and the input end of the first amplifier OP1_N is connected to the in-phase input end of the first amplifier OP1_N. The output end is connected to the gate of the first PMOS tube PM1_N, and the drain of the first PMOS tube PM1_N serves as the output end of the first current-controlled current source, wherein the amplification factor of the first current-controlled current source is equal to the resistance value of the first resistor R1_N divided by the resistance value of the second resistor R2_N; the working principle of the first current-controlled current source is: the first amplifier OP1_N amplifies the differential voltage signal of its positive and negative input ends, and through the negative feedback effect of the first PMOS tube PM1_N on the first current-controlled current source loop, the loop of the first current-controlled current source reaches a balanced state, and the positive and negative input voltages of the first amplifier OP1_N are approximately equal, so that the voltage across the first resistor R1_N is approximately equal to the voltage across the second resistor R2_N. According to Ohm's law, when the voltage across the first resistor R1_N is equal to the voltage across the second resistor R2_N, the ratio of the current of the first resistor R1_N to the current of the second resistor R2_N and the ratio of the resistance value of the first resistor R1_N to the resistance value of the second resistor R2_N are in inverse proportion. The current of the second resistor R2_N is M times the current of the first resistor R1_N, where M is equal to the resistance value of the first resistor R1_N divided by the resistance value of the second resistor R2_N, and the current of the second resistor R2_N is the first current control current. The output current of the source, the current of the first resistor R1_N is the control end current of the first current-controlled current source; the second current-controlled current source of the current source circuit includes a third resistor R3_N, a fourth resistor R4_N, a second PMOS transistor PM2_N and a second amplifier OP2_N; wherein the resistance value of the third resistor R3_N is the same as the resistance value of the first resistor R1_N, the resistance value of the fourth resistor R4_N is the same as the resistance value of the second resistor R2_N, the transconductance of the second PMOS transistor PM2_N is the same as the transconductance of the first PMOS transistor PM1_N, and the amplification factor of the second amplifier OP2_N is the same as the amplification factor of the first amplifier OP1_N;One end of the third resistor R3_N is connected to one end of the fourth resistor R4_N and serves as the input end of the second current-controlled current source, the other end of the third resistor R3_N is connected to the in-phase input end of the second amplifier OP2_N and serves as the control end of the second current-controlled current source, the inverting input end of the second amplifier OP2_N is connected to the other end of the fourth resistor R4_N and the source of the second PMOS tube PM2_N, the output end of the second amplifier OP2_N is connected to the gate of the second PMOS tube PM2_N, and the drain of the second PMOS tube PM2_N serves as the output end of the second current-controlled current source, wherein the amplification factor M of the second current-controlled current source is equal to the resistance value of the third resistor R3_N divided by the resistance value of the fourth resistor R4_N; the working principle of the second current-controlled current source is: the second amplifier OP2_N amplifies the differential voltage signal of its positive and negative input ends, and amplifies the second current-controlled current source through the second PMOS tube PM2_N. The negative feedback effect of the control current source loop makes the loop of the second current-controlled current source reach a balanced state, and the voltages of the positive and negative input terminals of the second amplifier OP2_N are approximately equal, so that the voltages across the third resistor R3_N and the voltages across the fourth resistor R4_N are approximately equal. According to Ohm's law, when the voltages across the third resistor R3_N and the voltages across the fourth resistor R4_N are equal, the ratio of the current of the third resistor R3_N to the current of the fourth resistor R4_N and the ratio of the resistance of the third resistor R3_N to the resistance of the fourth resistor R4_N are in inverse proportion. The current of the fourth resistor R4_N is M times the current of the third resistor R3_N, where M is equal to the resistance of the third resistor R3_N divided by the resistance of the fourth resistor R4_N. The current of the fourth resistor R4_N is the output current of the second current-controlled current source, and the current of the third resistor R3_N is the control terminal current of the second current-controlled current source. ;

[0019] Cooperate Figure 2As shown, each of the voltage detection circuits includes a fifth resistor R5_N, a sixth resistor R6_N, a seventh resistor R7_N, a first NMOS tube NM1_N, a second NMOS tube NM2_N, a third NMOS tube NM3_N, a third PMOS tube PM3_N and a first current source I1_N, wherein one end of the fifth resistor R5_N is connected to one end of the sixth resistor R6_N and serves as a first input end of the voltage detection circuit, the other end of the fifth resistor R5_N is connected to the drain of the first NMOS tube NM1_N, the gate of the first NMOS tube NM1_N serves as a second input end of the voltage detection circuit, and the first NMOS The source of the transistor NM1_N is connected to the gate of the third PMOS transistor PM3_N and is grounded through the seventh resistor R7_N, the other end of the sixth resistor R6_N is connected to the source of the third PMOS transistor PM3_N, the drain of the third PMOS transistor PM3_N is connected to the drain of the second NMOS transistor NM2_N, the gate of the second NMOS transistor NM2_N and the gate of the third NMOS transistor NM3_N, the source of the second NMOS transistor NM2_N is connected to the source of the third NMOS transistor NM3_N and is grounded, and the drain of the third NMOS transistor NM3_N is connected to the output end of the first current source I1_N and serves as the output end of the voltage detection circuit. The second NMOS tube NM2_N and the third NMOS tube NM3_N form a current drain circuit structure. When the voltage detection circuit is working, the first NMOS tube NM1_N and the third PMOS tube PM3_N work in the deep linear region, wherein the width-to-length ratio of the first NMOS tube NM1_N and the third PMOS tube PM3_N can be large enough and the resistance value of the seventh resistor R7_N can be large enough. For example, the width-to-length ratio of the first NMOS tube NM1_N and the third PMOS tube PM3_N is 20, and the resistance value of the seventh resistor R7_N is 2 megohms, so as to ensure that the first NMOS tube NM1_N and the third PMOS tube PM3_N work in the deep linear region. The principle of the N-th voltage detection circuit is: the first NMOS tube NM1_N and the third PMOS tube PM3_N work in the deep linear region, and the voltage V of the sixth resistor R6_N of the N-th voltage detection circuit r6 ≈V VCCB -(V OUT-N -V THN +V THP ), where V VCCB is the voltage of the first input terminal of the Nth voltage detection circuit (i.e., the voltage of the second power supply terminal VCCB), V OUT-N is the second input terminal voltage of the Nth voltage detection circuit (i.e., the output terminal voltage of the Nth current source circuit), V THN is the threshold voltage of the first NMOS transistor NM1_N, V THP is the threshold voltage of the third PMOS transistor PM3_N, and the current I r6=V r6 / r6; r6 is the resistance value of the sixth resistor R6_N, and the current of the second NMOS transistor NM2_N is equal to the current I of the sixth resistor R6_N. r6 , the current of the third NMOS tube NM3_N mirrors the current of the second NMOS tube NM2_N, so the output current ISH-N of the Nth voltage detection circuit is I1_N-(V r6 / r6); in this way, the voltage V at the second input terminal of the N-th voltage detection circuit OUT-N Much lower than the first input voltage V of the Nth voltage detection circuit VCCB , VR6 / R6 is larger, and the output current ISH-N of the Nth voltage detection circuit is close to 0mA, that is, the Nth current signal is close to 0mA; and when the second input voltage V OUT-N Increase and approach the first input terminal voltage V of the Nth voltage detection circuit VCCB When the output terminal current ISH-N of the Nth voltage detection circuit is larger, that is, the Nth current signal is larger, so the magnitude of the Nth current signal can reflect the difference between the output terminal voltage of the Nth current source circuit and the second power supply terminal voltage.

[0020] Cooperate Figure 2As shown, the total current setting circuit includes an adjusting resistor RISET, a fourth PMOS transistor PM4, a fourth NMOS transistor NM4 and a third amplifier OP3, wherein the source of the fourth PMOS transistor PM4 is connected to a DC power supply VDD, the gate of the fourth PMOS transistor PM4 is connected to the drain of the fourth PMOS transistor PM4 and the drain of the fourth NMOS transistor NM4, the non-inverting input terminal of the third amplifier OP3 is connected to a reference voltage Vref, the inverting input terminal of the third amplifier OP3 is connected to the source of the fourth NMOS transistor NM4 and one end of the adjusting resistor RISET, and the output terminal of the third amplifier OP3 is connected to the fourth NMOS transistor NM4. The gate of the S transistor NM4 is connected to the ground, and the other end of the regulating resistor RISET is grounded. The gate of the fourth PMOS transistor PM4 serves as the output end of the total current setting circuit, and the output end of the total current setting circuit is connected to the first control end of each reference current output circuit; the first differential voltage circuit includes an eighth resistor R8, a fifth NMOS transistor NM5 and a second current source I2; wherein the output end of the second current source I2 is connected to one end of the eighth resistor R8 and serves as the output end of the first differential voltage circuit, and the output end of the first differential voltage circuit is connected to the first differential end of each reference current output circuit; the other end of the eighth resistor R8 is connected to the The drain and gate of the fifth NMOS tube NM5 are connected, and the source of the fifth NMOS tube NM5 is grounded; the second differential voltage circuit includes a ninth resistor R9 and a tenth NMOS tube NM10, wherein the resistance of the ninth resistor R9 is the same as the resistance of the eighth resistor R8, and the transconductance of the tenth NMOS tube NM10 is the same as the transconductance of the fifth NMOS tube NM5; one end of the ninth resistor R9 is connected to the drain of the tenth NMOS tube NM10 and the gate of the tenth NMOS tube NM10, and the source of the tenth NMOS tube NM10 is grounded, and the other end of the ninth resistor R9 serves as the output end of the second differential voltage circuit, and the output end of the second differential voltage circuit is connected to the output end of each reference current output circuit. The second differential terminal; each reference current output circuit includes a first transistor Q1_N, a fifth PMOS transistor PM5_N, a sixth PMOS transistor PM6_N, a seventh PMOS transistor PM7_N, a sixth NMOS transistor NM6_N, a seventh NMOS transistor NM7_N, an eighth NMOS transistor NM8_N and a ninth NMOS transistor NM9_N, wherein the sixth PMOS transistor PM6_N and the seventh PMOS transistor PM7_N have the same transconductance, the sixth NMOS transistor NM6_N and the seventh NMOS transistor NM7_N have the same transconductance, and the eighth NMOS transistor NM8_N and the ninth NMOS transistor NM9_N have the same transconductance;The gate of the fifth PMOS tube PM5_N serves as the first control terminal of the reference current output circuit, the source of the fifth PMOS tube PM5_N is connected to the DC power supply VDD, the drain of the fifth PMOS tube PM5_N is connected to the source of the sixth PMOS tube PM6_N and the source of the seventh PMOS tube PM7_N, the gate of the sixth PMOS tube PM6_N serves as the first differential terminal of the reference current output circuit, the drain of the sixth PMOS tube PM6_N is connected to the gate of the sixth NMOS tube NM6_N, the gate of the seventh NMOS tube NM7_N and the drain of the seventh NMOS tube NM7_N, the source of the sixth NMOS tube NM6_N and the source of the seventh NMOS tube NM7_N are grounded; the drain of the sixth NMOS tube NM6_N serves as the base The first output end of the quasi-current output circuit, the drain of the seventh PMOS tube PM7_N is connected to the gate of the eighth NMOS tube NM8_N, the drain of the eighth NMOS tube NM8_N and the gate of the ninth NMOS tube NM9_N, the source of the eighth NMOS tube NM8_N and the source of the ninth NMOS tube NM9_N are grounded, the drain of the ninth NMOS tube NM9_N serves as the second output end of the reference current output circuit, the gate of the seventh PMOS tube PM7_N is connected to the emitter of the first transistor Q1_N, the gate of the seventh PMOS tube PM7_N serves as the second differential end of the reference current output circuit, and the base of the first transistor Q1_N is connected to the collector of the first transistor Q1_N and serves as the second control end of the reference current output circuit. To facilitate understanding of the working principle of the reference current control circuit, the working principle of the reference current control circuit is introduced below: In the total current setting circuit, the fourth PMOS tube PM4, the fourth NMOS tube NM4 and the third amplifier OP3 form a negative feedback loop, the positive and negative inputs of the third amplifier OP3 have an amplifying effect on its differential voltage signal, and one end of the adjustment resistor RISET is connected to the negative input terminal of the third amplifier OP3. When this negative feedback loop is in a balanced state, the voltages of the positive and negative input terminals of the third amplifier OP3 are close to being equal, and the current I0 of the adjustment resistor RISET is approximately V; Vref / R0,V Vrefis the voltage value of the reference voltage Vref, R0 is the resistance value of the adjustment resistor RISET; and the channel current of the fourth PMOS tube PMOS4 is equal to the current I0 of the adjustment resistor RISET; and the fifth PMOS tube PMOS5_N of each reference current output circuit mirrors the current of the fourth PMOS tube PMOS4, so the current of the fifth PMOS tube PMOS5_N of each reference current output circuit is equal to the current I0 of the adjustment resistor RISET. In each reference current output circuit, the sixth NMOS tube NM6_N and the ninth NMOS tube NM9_N respectively mirror the currents of the seventh NMOS tube NM7_N and the eighth NMOS tube NM8_N, the sixth PMOS tube PMOS6_N and the seventh PMOS tube PMOS7_N form a differential pair tube, the current of the fifth PMOS tube PMOS5_N determines the sum of the first output terminal current and the second output terminal current of the reference current output circuit, and due to the i-th current signal output by the i-th voltage detection circuit, the seventh PMOS tube PMOS7_N of the i-th reference current output circuit The gate of the ith current signal is larger, and the gate of the seventh PMOS tube PMOS7_N of the ith reference current output circuit is higher through the second differential circuit, and the channel current of the seventh PMOS tube PMOS7_N of the ith reference current output circuit is smaller, thereby making the first output end current of the ith reference current output circuit larger and the second output end current of the ith reference current output circuit smaller, making the control end current of the first current control current source of the corresponding ith current source circuit larger, and the control end current of the first current control current source of the corresponding ith current source circuit smaller. It can be seen from the above that when the voltage value of the reference voltage Vref remains unchanged, the resistance value of the adjusting resistor RISET determines the current of the fifth PMOS tube PM5_N of each reference current output circuit, and the current of the fifth PMOS tube PM5_N determines the sum of the first output terminal current and the second output terminal current of each reference current output circuit, and the sum of the first output terminal current and the second output terminal current of each reference current output circuit determines the output terminal current of each current source circuit. Therefore, the resistance value of the adjusting resistor RISET determines the output terminal current of each current source circuit, and the output terminal current of each current source circuit can be controlled by controlling the resistance value of the adjusting resistor RISET; and the i-th current signal controls the ratio of the first output terminal current and the second output terminal current of the i-th reference current output circuit.

[0021] When the input voltage at the total input end (i.e., the common input end VBAT voltage) of the low power consumption LED constant current driving circuit of the present invention is 12V, and it has three constant current outputs, i.e., when N=3, the Figure 1 and Figure 2As shown, compared with the existing multi-channel constant current drive circuit, when the output current of each output is 100mA and the voltage of the load of each output end is 6V, the total input current (i.e., the input current of the common input end VBAT) of the low-power LED constant current drive circuit of the present invention is also 302mA, that is, the low-power LED constant current drive circuit of the present invention has the same power consumption as the existing multi-channel constant current drive circuit, so the present invention can divide part of the power consumption of the low-power LED constant current drive circuit of the present invention through the power supply resistor RT, thereby reducing the power consumption proportion of the multi-channel constant current drive circuit.

[0022] In summary, the present invention can output multiple stable currents; and compared with the existing multiple constant current drive circuits, the present invention can divide part of the power consumption of a low-power LED constant current drive circuit of the present invention through the power supply resistor RT, which can reduce the power consumption ratio of the multiple constant current drive circuits of the low-power LED constant current drive circuit of the present invention; in addition, the present invention can perform feedback adjustment through the output voltage detection circuit and the reference current control circuit to ensure that the output current of each current source circuit remains unchanged when the voltage of the common input terminal drops.

[0023] The above embodiments and drawings do not limit the product form and style of the present invention. Any appropriate changes or modifications made by ordinary technicians in the relevant technical field should be deemed to be within the patent scope of the present invention.

Claims

1. A low power LED constant current drive circuit, characterized in that: It includes a power input circuit and a multi-channel constant current drive circuit; The power input circuit comprises a common input terminal, a first power terminal, a second power terminal and a power resistor, wherein the first power terminal and one end of the power resistor are connected to the common input terminal, and the other end of the power resistor is connected to the second power terminal; The multi-channel constant current driving circuit includes a constant current source circuit, an output voltage detection circuit and a reference current control circuit; The constant current source circuit comprises N current source circuits with the same structure, where N is an integer greater than or equal to 2; each current source circuit comprises two current-controlled current sources with the same structure, the two current-controlled current sources of each current source circuit are divided into a first current-controlled current source and a second current-controlled current source, the first current-controlled current source and the second current-controlled current source have the same amplification factor, and the input ends of the first current-controlled current source and the second current-controlled current source of each current source circuit are respectively connected to a first power supply end and a second power supply end; the output end of the first current-controlled current source of each current source circuit is connected to the output end of the second current-controlled current source and serves as the output end of the current source circuit; The output voltage detection circuit includes N voltage detection circuits with the same structure; each voltage detection circuit has two input terminals and one output terminal; The i-th voltage detection circuit is used to detect the difference between the output terminal voltage of the i-th current source circuit and the voltage of the second power supply terminal and output a corresponding i-th current signal; The first input end of the i-th voltage detection circuit is connected to the second power supply end, and the second input end of the i-th voltage detection circuit is connected to the output end of the i-th current source circuit; i is any integer from 1 to N; The reference current control circuit includes a total current setting circuit, a first differential voltage circuit, a second differential voltage circuit and n reference current output circuits with the same structure; Each reference current output circuit has two control terminals, two differential terminals and two output terminals; The total current setting circuit is connected to the first control terminal of each reference current output circuit, and the total current setting circuit is used to control the sum of the first output terminal current and the second output terminal current of each reference current output circuit; The second control terminal of the i-th reference current output circuit is connected to the output terminal of the i-th voltage detection circuit; The first differential voltage circuit and the second differential voltage circuit are respectively connected to the first differential end and the second differential end of each reference current output circuit, the first differential voltage circuit is used to provide a same reference voltage signal to the first differential end of each reference current output circuit, and the second differential voltage circuit is used to provide an i-th voltage signal reflecting the magnitude of the i-th current signal to the second differential end of the i-th reference current output circuit according to the i-th current signal; The i-th reference current output circuit controls the ratio of the current at the first output end to the current at the second output end of the i-th reference current output circuit according to the i-th voltage signal; The first output terminal and the second output terminal of the i-th reference current output circuit are respectively connected to the control terminal of the first current-controlled current source and the control terminal of the second current-controlled current source of the i-th current source circuit.

2. A low power consumption LED constant current driving circuit as claimed in claim 1, characterized in that: The first current-controlled current source of each current source circuit includes a first resistor, a second resistor, a first PMOS tube and a first amplifier; wherein one end of the first resistor is connected to one end of the second resistor and serves as an input end of the first current-controlled current source, the other end of the first resistor is connected to the in-phase input end of the first amplifier and serves as a control end of the first current-controlled current source, the inverting input end of the first amplifier is connected to the other end of the second resistor and the source of the first PMOS tube, the output end of the first amplifier is connected to the gate of the first PMOS tube, and the drain of the first PMOS tube serves as the output end of the first current-controlled current source; The second current-controlled current source of each current source circuit includes a third resistor, a fourth resistor, a second PMOS tube and a second amplifier; wherein the resistance value of the third resistor is the same as that of the first resistor, the resistance value of the fourth resistor is the same as that of the second resistor, the transconductance of the second PMOS tube is the same as that of the first PMOS tube, and the amplification factor of the second amplifier is the same as that of the first amplifier; wherein one end of the third resistor is connected to one end of the fourth resistor and serves as the input end of the second current-controlled current source, the other end of the third resistor is connected to the in-phase input end of the second amplifier and serves as the control end of the second current-controlled current source, the inverting input end of the second amplifier is connected to the other end of the fourth resistor and the source of the second PMOS tube, the output end of the second amplifier is connected to the gate of the second PMOS tube, and the drain of the second PMOS tube serves as the output end of the second current-controlled current source.

3. A low power consumption LED constant current drive circuit as claimed in claim 1 or 2, characterized in that: Each of the voltage detection circuits comprises a fifth resistor, a sixth resistor, a seventh resistor, a first NMOS tube, a second NMOS tube, a third NMOS tube, a third PMOS tube and a first current source, wherein one end of the fifth resistor is connected to one end of the sixth resistor and serves as a first input end of the voltage detection circuit, the other end of the fifth resistor is connected to the drain of the first NMOS tube, the gate of the first NMOS tube serves as a second input end of the voltage detection circuit, the source of the first NMOS tube is connected to the gate of the third PMOS tube and is grounded through the seventh resistor, the other end of the sixth resistor is connected to the source of the third PMOS tube, the drain of the third PMOS tube is connected to the drain of the second NMOS tube, the gate of the second NMOS tube and the gate of the third NMOS tube, the source of the second NMOS tube is connected to the source of the third NMOS tube and is grounded, and the drain of the third NMOS tube is connected to the output end of the first current source and serves as the output end of the voltage detection circuit.

4. A low power consumption LED constant current driving circuit as claimed in claim 2, characterized in that: The total current setting circuit comprises an adjusting resistor, a fourth PMOS tube, a fourth NMOS tube and a third amplifier, wherein the source of the fourth PMOS tube is connected to a DC power supply, the gate of the fourth PMOS tube is connected to the drain of the fourth PMOS tube and the drain of the fourth NMOS tube, the in-phase input terminal of the third amplifier is connected to a reference voltage, the inverting input terminal of the third amplifier is connected to the source of the fourth NMOS tube and one end of the adjusting resistor, the output terminal of the third amplifier is connected to the gate of the fourth NMOS tube, the other end of the adjusting resistor is grounded, the gate of the fourth PMOS tube serves as the output terminal of the total current setting circuit, and the output terminal of the total current setting circuit is connected to the first control terminal of each reference current output circuit; The first differential voltage circuit includes an eighth resistor, a fifth NMOS transistor and a second current source; wherein the output end of the second current source is connected to one end of the eighth resistor and serves as the output end of the first differential voltage circuit, and the output end of the first differential voltage circuit is connected to the first differential end of each reference current output circuit; the other end of the eighth resistor is connected to the drain and gate of the fifth NMOS transistor, and the source of the fifth NMOS transistor is grounded; The second differential voltage circuit includes a ninth resistor and a tenth NMOS transistor, wherein the resistance of the ninth resistor is the same as that of the eighth resistor, and the transconductance of the tenth NMOS transistor is the same as that of the fifth NMOS transistor; one end of the ninth resistor is connected to the drain of the tenth NMOS transistor and the gate of the tenth NMOS transistor, and the source of the tenth NMOS transistor is grounded; the other end of the ninth resistor serves as the output end of the second differential voltage circuit, and the output end of the second differential voltage circuit is connected to the second differential end of each reference current output circuit; Each reference current output circuit comprises a first triode, a fifth PMOS tube, a sixth PMOS tube, a seventh PMOS tube, a sixth NMOS tube, a seventh NMOS tube, an eighth NMOS tube and a ninth NMOS tube, wherein the transconductance of the sixth PMOS tube is the same as that of the seventh PMOS tube, the transconductance of the sixth NMOS tube is the same as that of the seventh NMOS tube, and the transconductance of the eighth NMOS tube is the same as that of the ninth NMOS tube; the gate of the fifth PMOS tube serves as a first control terminal of the reference current output circuit, the source of the fifth PMOS tube is connected to a DC power supply, the drain of the fifth PMOS tube is connected to the source of the sixth PMOS tube and the source of the seventh PMOS tube, the gate of the sixth PMOS tube serves as a first differential terminal of the reference current output circuit, the drain of the sixth PMOS tube is connected to the sixth NMOS tube, and the gate of the sixth PMOS tube serves as a first differential terminal of the reference current output circuit. The gate of the S tube, the gate of the seventh NMOS tube and the drain of the seventh NMOS tube, and the source of the sixth NMOS tube and the source of the seventh NMOS tube are grounded; the drain of the sixth NMOS tube serves as the first output end of the reference current output circuit, the drain of the seventh PMOS tube is connected to the gate of the eighth NMOS tube, the drain of the eighth NMOS tube and the gate of the ninth NMOS tube, the source of the eighth NMOS tube and the source of the ninth NMOS tube are grounded, the drain of the ninth NMOS tube serves as the second output end of the reference current output circuit, the gate of the seventh PMOS tube is connected to the emitter of the first triode, the gate of the seventh PMOS tube serves as the second differential end of the reference current output circuit, and the base of the first triode is connected to the collector of the first triode and serves as the second control end of the reference current output circuit.

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