Charging control device, electricity storage device, charging method
By adopting a structure in which multiple charging paths are connected in parallel and switches in series in the lithium-ion secondary battery, and switching the charging paths with the control unit, the problem of voltage drop component failure caused by current concentration is solved, and safe and reliable charging control is achieved.
Patent Information
- Application Number
- CN201880075998.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2017-12-04
- Filing Date
- 2018-12-04
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2038-12-04
AI Technical Summary
During the charging and discharging process of large lithium-ion secondary batteries, the failure of voltage drop components caused by current concentration, and the prior art is difficult to effectively solve.
Multiple charging paths are connected in parallel, combined with a series structure of voltage drop elements and switches, and the charging path is switched through the control unit to avoid current concentration.
It effectively suppresses the failure of the voltage drop component, ensures safe charging of the lithium-ion secondary battery, reduces the charging voltage, and extends the battery life.
Smart Images

Figure CN111406355B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a technique for charging a power storage element. Background Art
[0002] As an engine starting battery for a vehicle, a lithium ion secondary battery (hereinafter referred to as LIB) is mounted instead of a lead storage battery. As its advantages, there are longer battery life and improved acceptance of regenerative charging. In a lead storage battery and an LIB, the charging set voltage is different according to the difference in their characteristics, and therefore dedicated chargers are required respectively. Considering compatibility with the lead storage battery, the external shape and terminal structure are made common. However, if it is compatible with the lead storage battery, there is a case where charging is performed with a charging voltage different from the assumed charging set voltage, such as charging with a charger for the lead storage battery. In Patent Document 1 described below, there is a description about providing a diode in the charging path in order to limit charging of the battery.
[0003] Prior Art Documents
[0004] Patent Documents
[0005] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2008-199717 Summary of the Invention
[0006] Problems to be Solved by the Invention
[0007] In a large lithium ion secondary battery such as an engine starting battery for a vehicle, the charge and discharge current is large and the power loss in the conduction path is large. Therefore, a method can be considered in which a plurality of voltage dropping elements are connected in parallel to reduce the current flowing through one voltage dropping element so that a voltage dropping element such as a diode does not fail. However, due to the deviation of the characteristics of the elements themselves and the temperature characteristics, there is a concern that even if a plurality of voltage dropping elements are connected in parallel, current concentration may occur in one of the voltage dropping elements and a failure may occur.
[0008] The present invention has been completed based on the above-described situation, and an object thereof is to suppress a failure of a voltage dropping element during charging due to current concentration.
[0009] Means for Solving the Problems
[0010] A charging control device that controls charging of a power storage element, comprising: a plurality of charging paths that are charging paths for the power storage element and are connected in parallel to each other; a voltage dropping element and a switch that are connected in series in the charging path; and a control unit that switches a non-conducting charging path among the plurality of charging paths by controlling the switch during charging.
[0011] These techniques can be applied to the charging method of electricity storage elements. They can be applied to an electricity storage device including an electricity storage element and a charge control device. They can be implemented in various ways such as an electricity storage system, a switching program for a charging path, and a recording medium storing the program.
[0012] Advantages of the Invention
[0013] In this structure, it is possible to suppress the occurrence of failures in voltage drop elements due to current concentration during charging. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1 It is a side view of an automobile in Embodiment 1.
[0015] Figure 2 It is a perspective view of a storage battery.
[0016] Figure 3 It is an exploded perspective view of the storage battery.
[0017] Figure 4 It is a block diagram showing the electrical structure of the storage battery.
[0018] Figure 5 It is a diagram showing the switching of conduction and cutoff of each FET.
[0019] Figure 6 It is a diagram showing the switching of a charging path.
[0020] Figure 7 It is a diagram showing the switching of a charging path.
[0021] Figure 8 It is a switching process of a charging path.
[0022] Figure 9 It is a diagram showing the change in the total voltage of a battery pack during charging.
[0023] Figure 10 It is a diagram showing a comparative example of a charging circuit.
[0024] Figure 11 It is a diagram showing the temperature characteristics of the forward voltage of a diode.
[0025] Figure 12 It is a switching process of a charging path in Embodiment 2.
[0026] Figure 13 It is a block diagram showing another embodiment of a charging path.
[0027] Figure 14 It is a block diagram showing another embodiment of a charging path.
[0028] Figure 15It is a diagram showing the switching of the charging path.
[0029] Figure 16 It is a block diagram showing other embodiments of the charging path.
[0030] Figure 17 It is a diagram showing the switching of conduction and cutoff of each FET.
[0031] Figure 18 It is a diagram showing the switching of conduction and cutoff of each FET. Detailed Embodiments
[0032] A charging control device controls the charging of a power storage element, and includes: a plurality of charging paths that are charging paths to the power storage element and are connected in parallel to each other; a voltage dropping element and a switch that are connected in series on the charging path; and a control unit that switches, during charging, the charging path that becomes non - energized among the plurality of charging paths by controlling the switch.
[0033] In this structure, the charging voltage to the power storage element can be reduced by the voltage dropping element disposed on the charging path. Moreover, since the charging path that becomes non - energized among the plurality of charging paths is switched during charging, current concentration in a part of the charging paths can be suppressed, and thus the temperature rise of the voltage dropping element can be suppressed. Therefore, the failure of the voltage dropping element can be suppressed, and the power storage element can be charged safely.
[0034] The voltage dropping element may be a diode. A diode has the following temperature characteristic, that is, the higher the temperature, the lower the forward voltage. Therefore, current tends to concentrate in one diode with a temperature rise, and it is difficult to perform parallel connection. By applying this technology, current concentration in the diode can be suppressed, and thus the failure of the diode can be suppressed.
[0035] The control unit may also execute the switching of the charging path when the charging voltage or the voltage of the power storage element is higher than a set voltage.
[0036] In this structure, when the charging voltage or the voltage of the power storage element is higher than the set voltage, the charging voltage can be reduced. Therefore, the power storage element can be charged safely.
[0037] The control unit may also perform the switching of the charging path based on a set time. In this structure, since the charging path is switched based on the set time, current bias flowing through a specific charging path can be suppressed.
[0038] The control unit may also switch the charging path based on the temperature condition of the voltage drop element. In this configuration, the charging path is switched according to the temperature condition of the voltage drop element. Therefore, regardless of the ambient temperature, the conditions inside the power storage device, etc., abnormal heating of the voltage drop element can be suppressed.
[0039] The control unit may also control the switch of the charging path so that there is an overlapping period during which the switch is simultaneously turned on between the charging paths in the switching control of the charging path. In this configuration, it is possible to suppress the charging stop due to multiple switches being simultaneously turned off when switching the charging path.
[0040] At least one of the charging paths connected in parallel may have: two FETs, connected back-to-back, with built-in parasitic diodes. In this configuration, among the two FETs connected back-to-back, the FET on the side where the built-in parasitic diode is forward with respect to the charging direction is turned off, and the FET on the other side where the built-in parasitic diode is reverse with respect to the charging direction is turned on. Thus, the charging current flows through the FET and the parasitic diode on the other side to the power storage element. Therefore, the parasitic diode can be used as a voltage drop element. The so-called back-to-back connection (back-to-back connection) means connecting two FETs back-to-back, that is, connecting the drains of the two FETs to each other or connecting the sources to each other. FET is a field effect transistor.
[0041] It may also be that each of the charging paths connected in parallel has: two FETs, connected back-to-back, with built-in parasitic diodes, and the control unit controls so that: when the charging voltage or the voltage of the power storage element is lower than the set voltage, at least one of the charging paths connected in parallel turns on the two FETs connected back-to-back simultaneously; when the charging voltage or the voltage of the power storage element is higher than the set voltage, among the two FETs connected back-to-back provided in each charging path, the FET on the side where the built-in parasitic diode is forward with respect to the charging direction is turned off, and the timing of the FET on the other side where the built-in parasitic diode is reverse with respect to the charging direction being turned on between the charging paths is different. The so-called different conduction timing means that the conduction times are not exactly the same, including the case of alternating conduction in a non-overlapping manner of the conduction times and the case of partial overlap of the conduction times and switching of the conducting switches. In short, regarding the FET on the other side where the built-in parasitic diode is reverse with respect to the charging direction, in order to allow charging, the control unit controls at least one FET in each charging path to be turned on so that there is no period when all FETs are turned off. Furthermore, it is only necessary to control the FETs so that the conduction times between the charging paths are staggered.
[0042] In this structure, two FETs connected back to back are turned on simultaneously in each charging path, so that the charging current can flow without passing through the parasitic diode. Therefore, it is not necessary to set the charging path in normal time as a dedicated one, and the circuit structure is simple. In addition, when the charging voltage or the voltage of the storage element is higher than the set voltage, the charging path is switched, and the charging current flows through the parasitic diode of the FET, so that the temperature rise of the parasitic diode can be suppressed and the charging voltage of the storage element can be reduced.
[0043] <Implementation Method 1>
[0044] 1. Battery Description
[0045] Figure 1 is the side view of the car, Figure 2 This is a three-dimensional diagram of a battery. Figure 3 This is an exploded perspective view of the battery. Figure 4 is a block diagram showing the electrical structure of a battery.
[0046] like Figure 1 As shown in FIG. 1 , the automobile 1 includes a battery 20 as an electric storage device. Figure 2 As shown, the storage battery 20 has a block-shaped battery case 21 , and a battery pack 30 composed of a plurality of secondary batteries B1 to B4 and a control substrate 28 are accommodated in the battery case 21 .
[0047] like Figure 3 As shown, the battery case 21 is composed of: a box-shaped case body 23 opened at the top, a positioning member 24 for positioning the plurality of secondary batteries B1 to B4, a middle cover 25 mounted on the upper part of the case body 23, and an upper cover 26. Figure 3 As shown, in the case body 23, a plurality of single cell chambers 23A for individually accommodating the secondary batteries B1 to B4 are arranged side by side in the X direction.
[0048] like Figure 3 As shown, the positioning member 24 has a plurality of bus bars 27 arranged on the upper surface. The positioning member 24 is arranged above the plurality of secondary batteries B1 to B4 arranged in the case body 23 , so that the plurality of secondary batteries B1 to B4 are positioned and connected in series by the plurality of bus bars 27 .
[0049] like Figure 2 As shown, the middle cover 25 is substantially rectangular in a plan view. A pair of terminal portions 22P and 22N for connecting to a harness terminal (not shown) are provided at both ends in the X direction of the middle cover 25. The pair of terminal portions 22P and 22N are made of metal such as lead alloy, for example, and the terminal portion 22P is a positive terminal portion, and the terminal portion 22N is a negative terminal portion.
[0050] An accommodation part 25A is provided on the upper surface of the middle cover 25. The control substrate 28 is accommodated inside the accommodation part 25A of the middle cover 25, and is mounted on the housing main body 23 through the middle cover 25, so that the secondary battery B and the control substrate 28 are connected. In addition, the upper cover 26 is mounted on the upper part of the middle cover 25, covering the upper surface of the accommodation part 25A that houses the control substrate 28.
[0051] Refer to Figure 4 The electrical structure of the storage battery 20 will be described. The storage battery 20 is a 12V system for engine starting, and includes a battery pack 30, a current sensor 41, a voltage detection unit 45, and a charge control device 50.
[0052] The battery pack 30 is composed of four lithium-ion secondary batteries B1 to B4 connected in series. The lithium-ion secondary batteries B1 to B4 are an example of the "electric energy storage element" of the present invention.
[0053] The current sensor 41 is provided inside the battery case 21 to detect the current I flowing through the battery pack 30. The current sensor 41 is electrically connected to the management unit 100 through a signal line, and the output of the current sensor 41 is taken in by the management unit 100.
[0054] The voltage detection unit 45 is provided inside the battery case 21 to detect the battery voltages V1 to V4 of the respective lithium-ion secondary batteries B1 to B4 and the total voltage Ev of the battery pack 30. The voltage detection unit 45 is electrically connected to the management unit 100 through a signal line, and the output of the voltage detection unit 45 is taken in by the management unit 100.
[0055] Ev = V1 + V2 + V3 + V4
[0056] The charge control device 50 includes a charge circuit 60 and a management unit 100. The charge circuit 60 includes a first charge path 61A, a second charge path 61B, and a temperature sensor 67. The first charge path 61A and the second charge path 61B are between the positive electrode of the battery pack 30 and the positive electrode side terminal portion 22P, and are connected in parallel with each other.
[0057] A first FET 63A and a second FET 65A are provided in the first charge path 61A. The first FET 63A and the second FET 65A are P-channel field effect transistors and are connected back-to-back. Specifically, the first FET 63A connects the source electrode to the positive electrode of the battery pack 30, and the second FET 65A connects the source electrode to the positive electrode side terminal portion 22P. The drains of the first FET 63A and the second FET 65A are commonly connected. The first FET 63A incorporates a parasitic diode 64A, and the second FET 65A incorporates a parasitic diode 66A. The forward direction of the parasitic diode 64A is the same as the charging direction, and the forward direction of the parasitic diode 66A is the same as the discharging direction.
[0058] A first FET 63B and a second FET 65B are provided in the second charging path 61B. The first FET 63B and the second FET 65B are P-channel field effect transistors and are connected back-to-back. Specifically, the first FET 63B connects the source to the positive electrode of the battery pack 30, and the second FET 65B connects the source to the positive electrode side terminal portion 22P. The drains of the first FET 63B and the second FET 65B are commonly connected. The first FET 63B has a parasitic diode 64B, and the second FET 65B has a parasitic diode 66B. The forward direction of the parasitic diode 64B is the same as the charging direction, and the forward direction of the parasitic diode 66B is the same as the discharging direction.
[0059] A temperature sensor 67 detects the temperatures of the respective FETs 63A, 63B, 65A, and 65B. The temperature sensor 67 is electrically connected to the management unit 100 through a signal line, and the output of the temperature sensor 67 is taken in by the management unit 100.
[0060] The management unit 100 includes a CPU (Central Processing Unit) 101 having an arithmetic function, a ROM 103, a memory 105, a communication unit 107, etc., and is provided on the control board 28.
[0061] The CPU 101 monitors the current I flowing through the battery pack 30 based on the output of the current sensor 41. Based on the output of the voltage detection unit 45, it monitors the voltages V1 to V4 of the respective lithium ion secondary batteries B1 to B4 and the total voltage Ev of the battery pack 30. In addition, based on the output of the temperature sensor 67, it monitors the temperatures of the respective FETs 63A, 65A, 63B, and 65B.
[0062] During charging, the CPU 101 detects the magnitude of the total voltage Ev of the battery pack 30 and executes a switching process for switching the charging paths 61A and 61B of the battery pack 30. The CPU 101 corresponds to the "control unit" of the present invention.
[0063] Stored in the ROM 103 is a program for executing the switching process of the charging path ( Figure 8 shown as S10 to S50). The program can be stored in a recording medium such as a CD-ROM for transfer, etc. The program can be distributed through an electrical communication line.
[0064] The communication unit 107 is provided for communication with the vehicle ECU (Electronic Control Unit) 150 mounted on the vehicle 1. After being mounted on the vehicle, the communication unit 107 is connected to the vehicle ECU 150 through a signal line. The management unit 100 can receive vehicle-related information such as the operating state (stop, drive) of the engine from the vehicle ECU 150.
[0065] As Figure 4As shown, a starting motor 160 for starting the engine, vehicle loads such as electrical equipment, and an alternator 170 are connected to the storage battery 20. During engine operation, when the power generation of the alternator 170 is greater than the power consumption of the vehicle loads, the storage battery 20 is charged by the alternator 170.
[0066] When the power generation of the alternator 170 is less than the power consumption of the vehicle loads, the storage battery 20 discharges to supplement the shortage. When the engine stops, the alternator 160 stops generating electricity. Therefore, the storage battery 20 is in a state where power supply is stopped (a state where it is not charged), and becomes a state where it only discharges to the vehicle loads.
[0067] In addition to the in-vehicle alternator 170, the storage battery 20 can also be charged by connecting an external charger 180 outside the vehicle during parking or the like. Both the alternator 170 and the external charger 180 outside the vehicle have a DC output.
[0068] The storage battery 20 includes lithium-ion secondary batteries B1 to B4, a current sensor 41, a voltage detection unit 45, and a charge control device 50, and thus corresponds to the "power storage device" of the present invention.
[0069] 2. Control of Charging Voltage and Parallel Connection of Diodes
[0070] Lead-acid batteries and lithium-ion secondary batteries have different charging set voltages (set values of charging voltage) according to the difference in characteristics. In the case of a 12V system, the charging set voltage Eo for lead-acid batteries is 14.8V, and the charging set voltage Eo for lithium-ion secondary batteries is 14V.
[0071] For example, there is a case where, for the storage battery 20 that uses a lithium-ion secondary battery as a power storage element, when charging with an external charger for lead-acid batteries, etc., charging is performed at a voltage (14.8V) higher than the supposed charging set voltage (14V). For safety reasons, the charging voltage preferably does not exceed the charging set voltage Eo.
[0072] Therefore, when the total voltage Ev of the battery pack 30 exceeds the supposed charging set voltage Eo, as Figure 10 shown, it is possible to consider reducing the charging voltage by the voltage drop caused by the diode D provided in the charging path L. In order to suppress the diode D from overheating and malfunctioning due to power loss in the charging path, a method of connecting multiple diodes D in parallel to shunt the current can be considered. In Figure 10 three diodes D1 to D3 are connected in parallel.
[0073] As Figure 11As shown, the diode D has the following characteristic, that is, the higher the temperature becomes, the more the forward voltage Vf decreases.
[0074] Due to individual differences and discharge performance deviations of the diodes D, there are deviations in the temperature rise during charging among the diodes D1 to D3 connected in parallel. The higher the temperature rise of the diode D, the more the forward voltage Vf decreases, and it becomes easier for current to flow. Therefore, even when multiple diodes D1 to D3 are connected in parallel, the current will concentrate on a part of the diodes D where the temperature has risen, and these diodes D will malfunction.
[0075] Therefore, when the total voltage Ev of the battery pack 30 is greater than the charging set voltage Eo during charging, as Figure 5 shown, the CPU 101 controls the FET 63A of the first charging path 61A and the FET 63B of the second charging path 61B to be cut off. Furthermore, for the FET 65A of the first charging path 61A, the CPU 101 inputs a conduction signal (a signal for controlling the FET to be conductive) at a given control period Ts. On the other hand, for the FET 65B of the second charging path 61B, the CPU 101 inputs the conduction signal with a phase shift of half a period. Through the input of the conduction signal, each of the FETs 65A and 65B conducts for half of the control period Ts alternately.
[0076] Thus, regarding the two charging paths 61A and 61B, the energized state and the non-energized state are switched every half of the control period Ts, i.e., Ts / 2. As Figure 6 shown, the charging current to the battery pack 30 alternately flows through the charging paths 61A and 61B. When the charging current flows through one charging path (e.g., 61A), the other charging path (e.g., 61B) becomes non-energized. The half period Ts / 2 corresponds to the "set time" of the present invention.
[0077] In this way, regardless of whether the charging current flows through the first charging path 61A or the second charging path 61B, a voltage drop caused by the parasitic diodes 64A and 64B is generated. Therefore, the charging voltage of the battery pack 30 can be reduced.
[0078] Since the charging current alternately flows through the two charging paths 61A and 61B, the current will not concentrate in any of the parasitic diodes 64A and 64B. Therefore, the malfunction of the parasitic diodes 64A and 64B can be prevented.
[0079] Figure 8 This is the switching process of the charging path executed by the CPU 101. The switching process consists of five steps S10 to S50 and is executed by the CPU 101 when detecting the charging of the battery pack 30. The presence or absence of charging can be judged based on the current detected by the current sensor 41.
[0080] Taking the case where the battery 20 is charged by the external charger 180 for lead-acid batteries as an example, the switching operation of the charging path will be described. The charging voltage of the external charger 180 is 14.8V.
[0081] If the CPU 101 detects charging based on the external charger 180, it obtains the total voltage Ev of the battery pack 30 from the output of the voltage detection unit 45 (S10).
[0082] Then, the CPU 101 compares the total voltage Ev of the battery pack 30 with the charging set voltage Eo, and performs a process of determining whether the total voltage Ev of the battery pack 30 is equal to or less than the charging set voltage Eo (S20). The charging set voltage Eo is 14V.
[0083] Figure 9 It is a graph showing the voltage change of the battery pack after the start of charging. As Figure 9 shown, at the moment t0 just after the start of charging, the total voltage Ev of the battery pack 30 is less than 14V, so it is determined to be yes in S20.
[0084] In the case where it is determined to be yes in S20, the CPU 101 controls all the FETs 63A, 65A, 63B, and 65B provided in the first charging path 61A and the second charging path 61B to be turned on. Thus, as Figure 7 shown, the charging current from the external charger 180 branches and flows into the two charging paths 61A and 61B to charge the battery pack 30 (S30). Then, the CPU 101 determines whether the charging is completed (S40), and if the charging is not completed, it returns to S10.
[0085] After the start of charging, the battery pack 30 is charged by the charging current that branches and flows into the two charging paths 61A and 61B, and the total voltage Ev rises. In the state where all the FETs are turned on, no current flows through the parasitic diodes 64 and 66, so the charging voltage does not drop and charging is performed.
[0086] When the total voltage Ev of the battery pack 30 reaches the charging set voltage Eo ( Figure 9 at the moment t1), the determination in S20 becomes no.
[0087] In the case where it is determined to be no in S20, the CPU 101 controls the FET 63A in the first charging path 61A and the FET 63B in the second charging path 61B to be turned off. The FET 65A in the first charging path 61A and the FET 65B in the second charging path 61B are controlled to be alternately turned on and off.
[0088] Thus, during the period T1 after the total voltage Ev of the battery pack 30 reaches the charging set voltage Eo, as Figure 6As shown, a charging current flows alternately from the external charger 180 to the two charging paths 61A and 61B, and the battery pack 30 is charged until the charging is completed (S40).
[0089] When a charging end condition is satisfied, such as the charging current value becoming less than a given value or reaching the upper limit voltage Em, the charging of the battery pack 30 is terminated.
[0090] Thus, in the period T1 after the total voltage Ev of the battery pack 30 reaches the charge setting voltage Eo, no matter whether the charging current flows through the first charging path 61A or the second charging path 61B, a voltage drop occurs due to the parasitic diodes 64A and 64B.
[0091] Therefore, when the charging voltage (output voltage) of the external charger 180 is higher than the charging setting voltage Eo, the charging voltage can be lowered by the parasitic diodes 64A and 64B, so that the battery pack 30 can be charged.
[0092] Figure 9 The transition of the total voltage Ev of the battery pack 30 during charging is shown. The "solid line" is the transition when the control of reducing the charging voltage is executed, and the "dashed line" is the transition when the control of reducing the charging voltage is not executed. Figure 9 The upper limit voltage Em shown is the upper limit voltage (charging stop voltage) of the battery pack 30. The upper limit voltage Em is a value larger than the charging setting voltage 14V and smaller than the charging voltage 14.8V of the external charger 180, and is 14.5V as an example.
[0093] After charging starts, Figure 9 At time t1, the total voltage Ev of the battery pack 30 exceeds the charging setting voltage Eo. If the control of reducing the charging voltage is not performed, the total voltage Ev of the battery pack 30 rises, and then at time t2 when the upper limit voltage Em is reached, the protection action of cutting off the charging circuit 60 (cutting off the current by turning off all FETs) takes effect, and charging stops.
[0094] When the total voltage Ev of the battery pack 30 exceeds the charge setting voltage Eo, the Figure 9 At the timing of time t1 shown, the two FETs 65A and 65B are alternately turned on, and the charging voltage of the battery pack Ev is reduced from 14.8 V to about 14.2 V. Therefore, the total voltage Ev of the battery pack 30 can be suppressed from rising to the upper limit voltage 14.5 V, and the battery pack 30 can be continuously charged after time t2.
[0095] In the above, an example was described in which when the total voltage Ev of the battery pack 30 becomes higher than the charging set voltage Eo during charging based on the external charger 180, current flows through the parasitic diodes 64A and 64B to reduce the charging voltage. In addition to this, current can also flow through the parasitic diodes 64A and 64B to reduce the charging voltage when the total voltage Ev of the battery pack 30 becomes higher than the charging set voltage Eo during charging based on the alternator 170. In the above, although the description mainly focused on charging, during discharging, all the FETs 63A, 63B, 65A, and 65B can be turned on to split the discharge current and make it flow through the two charging paths 61A and 61B.
[0096] 4. Explanation of Effects
[0097] In this structure, when the total voltage Ev of the battery pack 30 is higher than the charging set voltage Eo, the charging voltage for the battery pack 30 can be reduced by the charging circuit 60 inside the storage battery. Thus, the safety of the storage battery 20 is improved. Moreover, the charging current alternately flows through the two charging paths 61A and 61B, so current will not concentrate in either of the parasitic diodes 64A and 64B. Thus, failures of the parasitic diodes 64A and 64B can be suppressed.
[0098] In this structure, the charging voltage of the external charger 180 is 14.8V, and the upper limit voltage of the battery pack 30 is 14.5V. Therefore, the charging voltage can be decreased by 0.6V through the parasitic diodes 64A and 64B, thereby suppressing the total voltage Ev of the battery pack 30 to be below the upper limit voltage of 14.5V. Regarding the voltage drop amount of the charging voltage caused by voltage drop elements such as parasitic diodes, although it is desired that the charging voltage after the drop is less than the upper limit voltage Em so that the total voltage Ev of the battery pack 30 does not exceed the upper limit voltage Em, even assuming that the charging voltage after the drop is higher than the upper limit voltage, since the period until the total voltage Ev of the battery pack 30 reaches the upper limit voltage Em is delayed compared to the case where the charging voltage is not reduced, accordingly, there is an advantage that the charging time of the battery pack 30 will become longer.
[0099] In this structure, every half cycle Ts / 2, that is, every set time, the two charging paths 61A and 61B are switched, so the charging current can be prevented from flowing preferentially through a specific charging path 61A or 61B. Thus, failures of the parasitic diodes 64A and 64B can be suppressed.
[0100] When comparing the lithium-ion secondary batteries B1 to B4 with other secondary batteries, the internal resistance is high at low temperatures. Therefore, there is a problem that if charging is performed at low temperatures, overvoltage is likely to be reached. As a countermeasure, it is possible to consider restricting the charging current. In this structure, when the total voltage Ev of the battery pack 30 is higher than the charging set voltage Eo, control to reduce the charging voltage is performed. By reducing the charging voltage, the charging current can be restricted, and thus it is possible to suppress the lithium-ion secondary batteries B1 to B4 from reaching overvoltage due to charging at low temperatures.
[0101] <Embodiment 2>
[0102] In Embodiment 1, when the total voltage Ev of the battery pack 30 is higher than the charging set voltage Eo, the CPU 101 controls the FET 65A of the first charging path 61A and the FET 65B of the second charging path 61B so that conduction signals (signals for controlling the FETs to be conductive) are alternately input with a shift of half a cycle Ts / 2, and the energization and non-energization of the two charging paths 61A and 61B are alternately switched.
[0103] In Embodiment 2, when the total voltage Ev of the battery pack 30 is higher than the charging set voltage Eo, the CPU 101 controls the switching of the charging paths 61A and 61B according to the temperature conditions of the FETs 63A and 63B, specifically according to the temperature difference. The temperature information of each of the FETs 63A and 63B can be obtained by the temperature sensor 67.
[0104] Figure 12 It is a flowchart of the switching control of the charging path based on the temperature difference. When the total voltage Ev of the battery pack 30 is higher than the charging set voltage Eo, the CPU 101 controls the FET 63A of the first charging path 61A and the FET 63B of the second charging path 61B to be cutoff.
[0105] Furthermore, the CPU 101 controls the FET 65A of the first charging path 61A to be conductive and the FET 65B of the second charging path 61B to be cutoff. As a result, only the first charging path 61A becomes the energized state, and the battery pack 30 is charged using the first charging path 61A (S100).
[0106] While charging using the first charging path 61A, the CPU 101 obtains the temperature Ta of the FET 63A of the first charging path 61A and the temperature Tb of the FET 63B of the second charging path 61B from the output of the temperature sensor 67.
[0107] Then, the temperature difference Ta - Tb is calculated, and a process of comparing it with the threshold value Th is performed. When the temperature difference Ta - Tb is less than the threshold value Th, the CPU 101 continues charging based on the first charging path 61A (S110: Yes).
[0108] On the other hand, when the temperature difference Ta - Tb is greater than the threshold Th, the CPU 101 switches the charging path from the first charging path 61A to the second charging path 61B for charging (S120). Specifically, the FET 65A of the first charging path 61A is switched from on to off, and the FET 65B of the second charging path 61B is switched from off to on, thereby switching the charging path.
[0109] Then, after the switching of the charging path, the CPU 101 calculates the temperature difference Tb - Ta based on the output of the temperature sensor 67 and performs a process of comparing it with the threshold Th.
[0110] When the temperature difference Tb - Ta is less than the threshold Th, the CPU 101 continues charging based on the second charging path 61B (S130: Yes).
[0111] On the other hand, when the temperature difference Tb - Ta is greater than the threshold Th, the CPU 101 switches the charging path from the first charging path 61A to the second charging path 61B for charging (S100).
[0112] Thus, in the second embodiment, if the temperature differences Ta - Tb and Tb - Ta between the two FETs 63A and 63B become greater than the threshold Th, the charging path is switched. The temperature differences Ta - Tb and Tb - Ta between the two FETs 63A and 63B can be ensured to be less than the threshold Th. During charging, it is possible to suppress the temperature rise of the parasitic diodes 64A and 64B, thereby preventing the FETs 63A and 63B from malfunctioning. In this structure, the charging paths 61A and 61B are switched according to the actual temperatures of the FETs 63A and 63B. Therefore, regardless of the ambient temperature, the conditions inside the battery, etc., it is possible to suppress abnormal heating of the parasitic diodes 64A and 64B, which are voltage - dropping elements.
[0113] <Other Embodiments>
[0114] The present invention is not limited to the embodiments described above with reference to the description and the drawings. For example, embodiments such as the following are also included in the technical scope of the present invention.
[0115] (1) The electricity - storage element is not limited to the lithium - ion secondary batteries B1 to B4, and may also be other secondary batteries. It may also be a capacitor or the like. In the first and second embodiments, a method of connecting a plurality of lithium - ion secondary batteries B1 to B4 in series is illustrated, but a series - parallel connection or a single - cell structure may also be used.
[0116] Although the use of the storage battery 20 is assumed to be for an automobile (motor vehicle), it can also be for a motorcycle, an electric vehicle, or a hybrid electric vehicle. Further, although it is assumed to be for engine starting, it can also be for an auxiliary machine. It is not limited to vehicles, and for example, it can also be applied to a UPS, a power storage device of a solar power generation system, etc. The storage battery 20 mounted on a motorcycle sometimes does not have a communication function with the motorcycle. In the case of not having a communication function, even if the charging voltage (output voltage) of the alternator 170 mounted on the motorcycle is higher than the charging set voltage, an instruction cannot be sent from the storage battery 20 to the alternator 170 to adjust the charging voltage for reduction. There is a problem that the storage battery 20 mounted on a motorcycle is liable to be charged with a charging voltage higher than the charging set voltage. By applying the present technology to the storage battery 20 mounted on a motorcycle, the charging voltage of the battery pack 30 can be reduced by the charging circuit 60, and overvoltage of the battery pack 30 can be suppressed.
[0117] (2) In the first embodiment, the CPU 101 as the control unit controls the switching of the charging paths 61A and 61B during charging by the external charger 180, thereby reducing the charging voltage of the battery pack 30. The CPU 101 as the control unit may also control the switching of the charging paths 61A and 61B when the charging voltage (output voltage) of the alternator 170 is higher than the charging set voltage during the running of the automobile 1, thereby reducing the charging voltage of the battery pack 30.
[0118] (3) Alternatively, even if the charging voltage of the alternator 170 is higher than the charging set voltage, when the period during which the charging voltage is higher than the charging set voltage is shorter than a given time, the CPU 101 does not execute the control of switching the charging paths 61A and 61B to reduce the charging voltage. It is possible to suppress the switching of the charging paths 61A and 61B when the charging voltage of the alternator 170 temporarily rises due to regenerative charging associated with the deceleration of the automobile 1. The given time is, for example, a short time of about 50 msec.
[0119] (4) Embodiment 1 illustrates a structure in which a charging circuit 60 and a management unit 100 are provided inside the storage battery 20. The charging circuit 60 and the management unit 100 do not necessarily have to be provided inside the storage battery 20, and as long as they are mounted on the vehicle, they may be provided outside the storage battery 20. That is, the storage battery 20 may also be configured to have only the lithium ion secondary batteries B1 to B4 and sensors for measuring voltage and current, and the management unit 100 provided outside the storage battery monitors the output from the sensors and switches the charging paths 61A and 61B provided outside the storage battery. That is to say, the present technology can also be applied to the following power storage system, that is, the power storage system includes a power storage device (storage battery 20) including only a battery pack and sensors; a charging circuit 60 located outside the power storage device; and a control unit (management unit 100) located outside the power storage device. In addition, in the embodiment, an example is shown in which the charging circuit 60 is arranged on the positive electrode side of the battery pack 30. The charging circuit (a circuit in which voltage drop elements and switches are arranged on a plurality of charging paths) may also be arranged on the negative electrode side.
[0120] (5) In Embodiments 1 and 2, the parasitic diodes 64A and 64B of the FETs 63A and 63B are used to drop the charging voltage. The voltage drop element may be any element that drops the voltage when current flows therethrough, and may be an element other than a diode. In particular, in the case of an element having a negative temperature coefficient (the resistance value becomes smaller as the temperature becomes higher) among the elements that drop the voltage when current flows therethrough, if they are connected in parallel, the current concentrates on a part of the elements where the temperature rises. Therefore, when using a diode instead of an element having a negative temperature coefficient, it is preferable to apply the present technology. The collector-emitter voltage of a transistor has a negative temperature coefficient and has a saturation voltage of about 0.3 V (V ce = 0.3 V), so it can be used instead of a diode.
[0121] (6) In Embodiments 1 and 2, two back-to-back connected FETs 63A and 65A are arranged on the charging path 61A, and two back-to-back connected FETs 63B and 65B are arranged on the charging path 61B. The FETs 63A and 63B can be replaced with diodes (single units). In addition, as long as the FETs 65A and 65B are switches, they can also be replaced with bipolar transistors or the like.
[0122] (7)In Embodiment 1, two back-to-back connected FETs 63A and 65A are arranged on the charging path 61A, and two back-to-back connected FETs 63B and 65B are arranged on the charging path 61B. In addition, two back-to-back connected FETs 63A and 65A can be arranged on only one of the charging paths 61A, and a single diode and a single switch can be arranged on the other charging path 61B instead of the two back-to-back connected FETs 63B and 65B. In addition to the method of connecting the drains of the FETs to each other, the sources can also be connected to each other for back-to-back connection.
[0123] (8)In Embodiment 1, when the total voltage Ev of the battery pack 30 is equal to or lower than the charging set voltage Eo, all four FETs 63A, 63B, 65A, and 65B are turned on, so that both the first charging path 61A and the second charging path 61B can be energized. For example, only the FETs 63A and 65A of the first charging path 61A can be turned on to make only the first charging path 61A energizable.
[0124] (9)Embodiments 1 and 2 show an example in which when the total voltage Ev of the battery pack 30 is higher than the charging set voltage Eo, current flows through the parasitic diodes 64A and 64B of the FETs 63A and 63B to reduce the charging voltage. In addition, when the charging voltages (output voltages) of the alternator 170 and the external charger 180 are higher than the charging set voltage Eo, current can also flow through the parasitic diodes 64A and 64B of the FETs 63A and 63B to reduce the charging voltage. The charging voltage can also be obtained by detecting the potential difference between a pair of terminal portions 22P and 22N with a sensor.
[0125] When it is known in advance that a charger with a charging voltage higher than the charging set voltage Eo is used, it is also possible to always make current flow through the parasitic diodes 64A and 64B of the FETs 63A and 63B during charging to reduce the charging voltage, regardless of the magnitude relationship between the charging voltage and the charging set voltage Eo and the magnitude relationship between the total voltage Ev and the charging set voltage Eo. It is also possible to always make current flow through the parasitic diodes 64A and 64B of the FETs 63A and 63B to reduce the charging voltage according to the usage and the usage environment. It can be applied to applications where it is desired to reduce the charging voltage to delay the deterioration of the battery pack 30 or to charge the battery pack 30 at a voltage lower than the set value for use.
[0126] (10)In Embodiments 1 and 2, two charging paths, i.e., a first charging path 61A and a second charging path 61B, are provided as charging paths to the battery pack 30. Moreover, when the charging voltage is equal to or lower than the charging set voltage Eo, the current is branched and flows through the two charging paths 61A and 61B for charging. When the charging voltage is greater than the charging set voltage Eo, the current alternately flows through the two charging paths 61A and 61B for charging. In addition to the above, as in the storage battery 300 shown in Figure 13 , a charging path (main path) Lo used when the charging voltage is equal to or lower than the charging set voltage Eo and charging paths (auxiliary paths for voltage drop) L1 and L2 used when the charging voltage is greater than the charging set voltage Eo may be provided respectively. A switch SWo such as a relay is provided in the charging path Lo, and no voltage drop element such as a diode is provided. The charging paths L1 and L2 are connected in parallel with the charging path Lo. A diode D1 and a switch SW1 are provided in the charging path L1, and a diode D2 and a switch SW2 are provided in the charging path L2.
[0127] According to the storage battery 300, when the charging voltage is equal to or lower than the charging set voltage Eo, the management unit 100 only turns on the switch SWo and turns off the switches SW1 and SW2. Thus, when the charging voltage is equal to or lower than the charging set voltage Eo, only the charging path Lo without a voltage drop element becomes energized, and the charging current from the external charger 180 flows through the charging path Lo to charge the battery pack 30.
[0128] On the other hand, when the charging voltage is greater than the charging set voltage Eo, the management unit 100 turns off the switch SWo and alternately turns on the switches SW1 and SW2. Thus, when the charging voltage is greater than the charging set voltage Eo, the charging path Lo becomes non-energized, and the charging paths L1 and L2 with diodes D1 and D2 alternately become energized. Therefore, the charging current from the external charger 180 alternately flows through the charging paths L1 and L2 to charge the battery pack 30. Due to the voltage drop caused by the diodes D1 and D2 provided in the respective charging paths L1 and L2, the charging voltage can be reduced.
[0129] (11)As long as two or more charging paths used when the charging voltage is greater than the charging set voltage Eo are connected in parallel, as shown in Figure 14 , a structure in which four charging paths L1 to L4 are connected in parallel may also be used. Regarding the switching of the charging paths L1 to L4, as long as the charging paths that become non-energized during charging are switched, for example, as shown in Figure 15 , the energized multiple charging paths L1 to L4 may be switched in such a way that they are staggered at a given time interval.
[0130] (12) Figure 16 The battery 400 shown has a structure in which two charging circuits 460A and 460B are provided. The configurations of the charging circuit 460A and the charging circuit 460B have different numbers of series-connected diodes D in the charging paths L1 and L2. The number of series connections of the charging circuit 460A is "1", while the number of series connections of the charging circuit 460B is "3". If the forward voltage of the diode D is set to 0.6V, the voltage drop of the charging circuit 460A is 0.6V. In contrast, the voltage drop of the charging circuit 460B is 0.6×3. According to the battery 400, there is an advantage that the voltage drop amount of the charging voltage can be changed by switching between the charging circuits 460A and 460B. In addition, the charging circuit 460B can also use voltage drop elements other than diodes. By presetting the voltage drop amount of the charging circuit 460B to a value assumed in the case of connecting chargers of 24V systems and 48V systems, even chargers of voltage levels other than the 12V system such as 24V systems and 48V systems can charge the 12V system battery 400.
[0131] (13)In Embodiment 1, when the total voltage Ev of the battery pack 30 is higher than the charging set voltage Eo, as Figure 5 shown, the FET 63A of the first charging path 61A and the FET 63B of the second charging path 61B are controlled to be cut off, and the FET 65A of the first charging path 61A and the FET 65B of the second charging path 61B are controlled to alternately turn on and off every half cycle Ts / 2. In addition, the time for turning on the two FETs 65A and 65B can also be changed according to the temperature conditions of the charging paths 61A and 61B. Figure 17 The conduction and cutoff of each FET are shown when the temperature Ta of the FET 63A is higher than the temperature Tb of the FET 63B (Ta>Tb). The CPU 101 makes the conduction time Ton1 of the FET 65A of the first charging path 61A with a higher temperature shorter than the conduction time Ton2 of the FET 65B of the second charging path 61B with a lower temperature.
[0132] The conduction times Ton1 and Ton2 of the FETs 65A and 65B are changed according to the magnitudes of the temperatures Ta of the FET 63A and Tb of the FET 63B. When the temperature Ta of the FET 63A is smaller than the temperature Tb of the FET 63B (Ta<Tb), the conduction time Ton2 of the FET 65B of the second charging path 61B with a higher temperature is made shorter than the conduction time Ton1 of the FET 65A of the first charging path 61A with a lower temperature. In this way, the time when the high-temperature side charging path becomes non-energized becomes longer than the time when the low-temperature side charging path 61B becomes non-energized, so the heat generation of the high-temperature side charging path can be suppressed, and the temperature difference from the low-temperature side charging path can be reduced.
[0133] (14) In Embodiment 2, a method of switching the charging path according to the temperature difference between FETs 63A and 63B is shown. In addition, the charging path can also be switched when one of the two FETs 63A and 63B reaches the threshold temperature.
[0134] (15) In Embodiment 1, when the total voltage Ev of the battery pack 30 exceeds the charging set voltage Eo, the CPU 101 alternately turns on the FET 65A of the first charging path 61A and the FET 65B of the second charging path 61B, and charging currents alternately flow through the two charging paths 61A and 61B. As Figure 18 shown, the CPU 101 can also control the two FETs 65A and 65B so that there is an overlapping period W during which both the FET 65A of the first charging path 61A and the FET 65B of the second charging path 61B are turned on in the switching control of the charging paths 61A and 61B. By having the overlapping period W, it is possible to suppress the charging from stopping due to both FETs 65A and 65B being turned off simultaneously when switching the charging paths 61A and 61B. To set the overlapping period W, it is sufficient that the ratio of the on-time Ton of the FETs 65A and 65B to the control period Ts is greater than 50%. For example, when the ratio of the on-time Ton to the control period Ts is 60%, 10% of the control period Ts can be set as the overlapping period W.
[0135] (12) The techniques disclosed in Embodiments 1 and 2 can be implemented in various ways such as a switching program for the charging path for charging the energy storage element and a recording medium storing these programs.
[0136] A switching program is a switching program for the charging path for charging the energy storage element, which causes a computer (management unit 100) to execute the following processing (S40). That is, in a structure in which a plurality of the charging paths are connected in parallel and a voltage dropping element and a switch are connected in series in each charging path, during charging, the charging path that becomes non-powered among the plurality of charging paths is switched by controlling the switch.
[0137] Reference Signs
[0138] 20 Storage battery (corresponding to the "energy storage device" of the present invention);
[0139] 30 Battery pack;
[0140] 41 Current sensor;
[0141] 45 Voltage detection unit;
[0142] 50 Charging control device;
[0143] 60 Charging circuit;
[0144] 61A First charging path;
[0145] 61B Second charging path;
[0146] 63A, 65A FET;
[0147] 64A, 66A Parasitic diode;
[0148] 63B, 65B FET;
[0149] 64B, 66B Parasitic diode;
[0150] 100 Management department;
[0151] 101 CPU (equivalent to the "control unit" of the present invention).
Claims
1. A charging control device for controlling the charging of a power storage element, wherein, the charging control device includes: a plurality of charging paths, which are charging paths to the power storage element and are connected in parallel with each other; a voltage drop element and a switch, which are connected in series on the charging path; and a control unit, when the charging voltage or the voltage of the power storage element is lower than a set voltage, the control unit diverts the charging current to flow into the plurality of charging paths, when the charging voltage or the voltage of the power storage element is higher than the set voltage, during charging, the control unit switches the charging path that becomes non - energized among the plurality of charging paths by controlling the switch, so that the charging current alternately flows through the plurality of charging paths.
2. The charging control device according to claim 1, wherein, the voltage drop element is a diode.
3. The charging control device according to claim 1 or 2, wherein, the control unit switches the charging path based on a set time.
4. The charging control device according to claim 1 or 2, wherein, the control unit switches the charging path based on the temperature condition of the voltage drop element.
5. The charging control device according to claim 1 or 2, wherein, the control unit switches the charging path such that the charging path on the high - temperature side is non - energized for a longer time than the charging path on the low - temperature side.
6. The charging control device according to claim 1 or 2, wherein, the control unit controls the switch of the charging path such that there is an overlapping period during the switching control of the charging path in which the switches are simultaneously turned on between the charging paths.
7. The charging control device according to claim 1 or 2, wherein, at least one of the charging paths connected in parallel has: two FETs, which are connected back - to - back and have built - in parasitic diodes.
8. The charging control device according to claim 1 or 2, wherein, each of the charging paths connected in parallel has: two FETs, which are connected back - to - back and have built - in parasitic diodes, the control unit controls such that: when the charging voltage or the voltage of the power storage element is lower than the set voltage, at least one of the charging paths connected in parallel turns on the two FETs connected back - to - back simultaneously; when the charging voltage or the voltage of the power storage element is higher than the set voltage, among the two FETs connected back - to - back provided in each charging path, the FET on the side where the built - in parasitic diode is forward with respect to the charging direction is turned off, and the timing at which the FET on the other side where the built - in parasitic diode is reverse with respect to the charging direction conducts between the charging paths is different.
9. A power storage device having: a power storage element; and the charging control device according to any one of claims 1 to 8.
10. A charging method, which is a charging method of a power storage element using a plurality of charging paths connected in parallel, wherein, the charging path has a voltage drop element and a switch connected in series, When the charging voltage or the voltage of the electricity storage element is lower than the set voltage, the charging current is branched to flow through a plurality of the charging paths. When the charging voltage or the voltage of the electricity storage element is higher than the set voltage, charging is performed by lowering the charging voltage through the voltage drop element, and during charging, the non-energized charging path among the plurality of the charging paths is switched by controlling the switch, so that the charging current alternately flows through the plurality of the charging paths.
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