Storage device and data processing method thereof

Abstract

A storage device and a data processing method thereof are provided. The storage device includes a memory device, and the memory device includes a metadata area and a diary data area. A memory controller is configured to control the memory device to write a metadata block into the metadata area and a diary data block into the diary data area. The metadata block includes metadata, and the diary data block includes both diary data and metadata storage information. The diary data includes log information related to the metadata, and the metadata storage information includes information related to the storage of the metadata block.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0002399 filed in the Korean Intellectual Property Office on January 8, 2019, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to a storage device, and more particularly, to a storage device and a data processing method of the storage device. Background Art

[0004] Electronic devices such as smart phones, tablet computers, and personal computers may contain storage devices to store various data. The electronic device may additionally include a main memory (eg, random access memory (RAM)).

[0005] When a sudden / unexpected power problem or system crash occurs during the operation of such an electronic device, some data managed by the file system of the electronic device may be damaged. To prevent such damage, the electronic device may implement a journaling file system. A journaling file system tracks changes made to the data by recording the changes to the memory before applying the changes to the main components of the file system. Summary of the invention

[0006] A storage device including a memory device and a memory controller, the memory device including a metadata area and a diary data area. The memory controller is configured to control the memory device to write a metadata block into the metadata area and a diary data block into the diary data area. The metadata block includes metadata, and the diary data block includes both diary data and metadata storage information. The diary data includes log information related to the metadata, and the metadata storage information includes information related to the storage of the metadata block.

[0007] A method for processing data of a storage device includes: accumulating metadata in a metadata block using a memory controller. Accumulating journal data in a journal data block using the memory controller. The journal data includes journal information related to the metadata. When the metadata block is written to a metadata area of ​​a memory device of the storage device, metadata storage information related to the storage of the metadata block is added to the journal data block using the memory controller. When the amount of data accumulated in the journal data block reaches a first predetermined size, the journal data block is written to the journal data area of ​​the memory device.

[0008] A method for processing data of a storage device, comprising: accumulating first diary data in a diary data block by a memory controller. Writing the first metadata block to a metadata area of ​​a memory device of the storage device. Accumulating metadata storage information about storage of the first metadata block in the diary data block by the memory controller. Accumulating second diary data in the diary data block by the memory controller. Writing the diary data block to the diary data area of ​​the memory device. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] A more complete understanding of the inventive concept and its many attendant aspects will be obtained through the following detailed description in conjunction with the accompanying drawings, in which:

[0010] Figure 1 is a block diagram illustrating a data processing system according to an exemplary embodiment of the inventive concept;

[0011] Figure 2 is a block diagram illustrating a memory controller according to an exemplary embodiment of the inventive concept;

[0012] Figure 3 is a flowchart illustrating software layers of a data processing system according to an exemplary embodiment of the inventive concept;

[0013] Figure 4 is a block diagram illustrating a memory device according to an exemplary embodiment of the inventive concept;

[0014] Figure 5A and Figure 5B is a diagram showing a metadata block according to a comparative example;

[0015] Figure 6 is a diagram illustrating a metadata block and a journal data block according to an exemplary embodiment of the inventive concept;

[0016] Figure 7 is a flowchart illustrating a data processing method of a storage device according to an exemplary embodiment of the inventive concept;

[0017] Figure 8 is a flowchart illustrating a data processing method of a storage device according to an exemplary embodiment of the inventive concept;

[0018] Fig. 9 is a flowchart illustrating a data processing method of a storage device according to an exemplary embodiment of the inventive concept;

[0019] Fig.10 is a diagram illustrating a metadata block and a journal data block according to an exemplary embodiment of the inventive concept;

[0020] Fig.11is a diagram illustrating a memory cell array according to an exemplary embodiment of the inventive concept;

[0021] Fig.12 is a flowchart illustrating a data processing method of a storage device according to an exemplary embodiment of the inventive concept;

[0022] Fig.13 is a diagram illustrating a data processing system according to an exemplary embodiment of the inventive concept;

[0023] Fig.14 is a diagram illustrating an L1 cache, an L2 cache, and a journal data area according to an exemplary embodiment of the inventive concept;

[0024] Fig.15 is a flowchart illustrating a data processing method of a storage device according to an exemplary embodiment of the inventive concept;

[0025] Fig.16 is a diagram illustrating a journal data area and an L1 cache according to an exemplary embodiment of the inventive concept; and

[0026] Fig.17 is a diagram illustrating a solid state disk / solid state drive (SSD) system according to an exemplary embodiment of the inventive concept. DETAILED DESCRIPTION

[0027] Figure 1 1 is a diagram showing a data processing system 10 according to an exemplary embodiment of the inventive concept. The data processing system 10 may include a host device 100 and a memory system 400. The host device may be a computer device utilizing the memory system 400. The memory system 400 may include a memory controller 200 and a memory device 300. The data processing system 10 may be applied to one of the following various electronic devices: for example, an ultra mobile personal computer (UMPC), a workstation, a netbook, a personal digital assistant (PDA), a portable computer such as a laptop or notebook computer, a web tablet, a wireless phone, a mobile phone, a smart phone, an e-book reader, a portable multimedia player (PMP), a portable game console, a navigation device, a black box, a digital camera, etc.

[0028] The data processing system 10 may be implemented in various forms. For example, the host 100, the memory controller 200, and the memory device 300 may all be provided as a single chip, a single package, or a single module. However, the present invention is not limited thereto, and the memory controller 200 may be provided together with the memory device 300 as a memory system 400 or a storage device.

[0029] The memory system 400 may be embodied as a PC card, a compact flash card, a smart media card, a memory stick, a multimedia card (MMC), a secure digital (SD) card, or a universal flash memory (UFS). In an exemplary embodiment of the inventive concept, the memory system 400 may form a solid state disk / solid state drive (SSD). For ease of description, it is assumed that the memory system 400 is implemented as a single storage device, but the inventive concept is not limited thereto.

[0030] The host 100 may send a data operation request REQ and an address ADDR to the memory controller 200, and may exchange data with the memory controller 200. For example, the host 100 may exchange data with the memory controller 200 based on various interface protocols such as, for example, a Universal Serial Bus (USB) protocol, an MMC protocol, a Peripheral Component Interconnect (PCI) protocol, a PCI-Express (PCI-E) protocol, an Advanced Technology Attachment (ATA) protocol, a Serial ATA protocol, a Parallel ATA protocol, a Small Computer Interface (SCSI) protocol, an Enhanced Small Disk Interface (ESDI) protocol, an Integrated Drive Electronics (IDE) protocol, a Mobile Industry Processor Interface (MIPI) protocol, and / or a UFS protocol.

[0031] The memory controller 200 may control the memory device 300. For example, the memory controller 200 may control the memory device 300 in response to a data operation request REQ from the host 100 so as to read data stored in the memory device 300 or write data to the memory device 300. For example, the memory controller 200 may provide an address ADDR, a command CMD, and a control signal to the memory device 300 to control write, read, and erase operations of the memory device 300. In addition, data for these operations may be transmitted between the memory controller 200 and the memory device 300.

[0032] According to an exemplary embodiment of the inventive concept, the memory controller 200 may include a journal data manager 240 and may store a metadata block MDB and a journal data block JDB. The journal data manager 240 may manage the metadata block MDB and the journal data block JDB. The metadata block MDB may include metadata, and the journal data block JDB may include journal data and metadata storage information.

[0033] Here, metadata may refer to data for managing user data or data generated in the memory system 400 for managing the memory device 300. For example, the metadata may include mapping information for converting a logical address into a physical address in the memory device 300, physical block information about a memory page included in a physical block of the memory device 300, trimming data indicating data deleted from the host 100, and / or various information for managing a storage space of the memory device 300. In an exemplary embodiment of the inventive concept, metadata may also be data related to data itself regarded as metadata.

[0034] Journal data may refer to data including log information corresponding to changes in user data and / or changes in metadata. Journal data may include multiple log entry information. For example, journal data may include information about checkpoints of user data and / or metadata. In an exemplary embodiment of the present invention, the log entry information may include: information about the type of operation indicating the change that caused the metadata and actual data for recovering the change in metadata. The information about the type of operation indicating the change that caused the metadata may include: information defining the type of any operation (e.g., a write operation, a block allocation operation, and a page copy operation) that may cause a change in metadata. The actual data for recovering the change in metadata may include a logical address, a previous physical address, and a new physical address. The log entry information may be referred to as a log entry.

[0035] The metadata storage information may be data generated by the memory controller 200 when the metadata block is written to the memory device 300. In an exemplary embodiment of the inventive concept, the metadata storage information may include: the age of the metadata block assigned by the memory controller 200 (e.g., the length of time that has passed since the metadata block was created) and the physical page number (PNN) of the memory page in the memory device 300 in which the metadata block is stored.

[0036] In an exemplary embodiment of the inventive concept, the diary data manager 240 may accumulate data in the metadata block MDB and the diary data block JDB. For example, the diary data manager 240 may accumulate metadata in the metadata block MDB and accumulate diary data in the diary data block JDB. When the metadata block MDB is written to the memory device 300, the diary data manager 240 may add metadata storage information to the diary data block JDB. In an exemplary embodiment of the inventive concept, when the amount of data stored in the metadata block MDB reaches a first size, the diary data manager 240 may write the metadata block MDB to the metadata area 314 of the memory device 300. Herein, it is understood that when the diary data manager 240 or the memory controller 200 writes data to the memory device 300, the memory device 300 is controlled by the diary data manager 240 or the memory controller 200 to write the data. In an exemplary embodiment of the inventive concept, when the amount of data stored in the diary data block JDB reaches a second size, the diary data manager 240 may write the diary data block JDB to the diary data area 316 of the memory device 300. In an exemplary embodiment of the inventive concept, the first size and the second size may each be equal to a size of a memory page in the memory device 300 .

[0037] In an exemplary embodiment of the inventive concept, when the memory system 400 is powered on after power failure, the journal data manager 240 may read the metadata block and the journal data block from the memory device 300. The journal data manager 240 may determine the order in which the journal data is accumulated in the journal data block and the order in which the metadata is accumulated in the metadata block based on the metadata storage information included in each journal data block. The journal data manager 240 may restore or update the metadata using the journal data based on the order of accumulation. Here, the power failure event may refer to a sudden and / or unexpected power failure event that occurs when power to the memory system 400 is interrupted without inputting a power failure command to the memory system 400.

[0038] In an exemplary embodiment of the inventive concept, when the memory controller 200 receives a data guarantee request from the host 100, the journal data manager 240 may generate an L1 journal block using data stored in the entire area of ​​the L1 cache of the memory controller 200, and may write the L1 journal block to the journal data area 316. The operation of the journal data manager 240 will be more clearly understood with reference to the accompanying drawings.

[0039] The memory device 300 may include at least one memory cell array. The memory cell array may include a plurality of memory cells, each of which is arranged at a cross point between a plurality of word lines and a plurality of bit lines. The memory cell may include a non-volatile memory cell. Each of the memory cells may be a multi-level cell (MLC) storing at least two bits of data. For example, each memory cell may be a 2-bit MLC storing two bits of data, a three-level cell (TLC) storing three bits of data, a four-level cell (QLC) storing four bits of data, or an MLC storing at least five bits of data, but the present invention is not limited thereto. For example, some memory cells may be single-level cells (SLCs) storing one bit of data, while other memory cells may be MLCs.

[0040] The memory device 300 may include: NAND flash memory, vertical NAND (VNAND) flash memory, NOR flash memory, resistive random access memory (RRAM), phase change RAM (PRAM), magnetoresistive RAM (MRAM), ferroelectric RAM (FRAM), spin transfer torque RAM (STT-RAM) or a combination thereof. The memory device 300 may perform operations such as write operations, read operations and erase operations on data in response to signals from the memory controller 200.

[0041] According to an exemplary embodiment of the present disclosure, the memory device 300 may include a user data area 312, a metadata area 314, and a diary data area 316. For example, the memory cell array of the memory device 300 may include a user data area 312, a metadata area 314, and a diary data area 316. The user data area may store user data (e.g., normal data). The metadata area 314 may store at least one metadata block. The diary data area 316 may store at least one diary data block. Each of the user data area 312, the metadata area 314, and the diary data area 316 may be a separate area and may include at least one memory page.

[0042] According to an exemplary embodiment of the present disclosure, the data processing system 10 stores metadata and journal data as metadata blocks MDB and journal data blocks JDB, respectively, in separate areas of the memory device 300, thereby reducing the dependency of metadata on journal data. Therefore, the amount of metadata written to the memory device 300 can also be reduced. Therefore, the power consumption of the memory system 400 can be reduced, and the performance of the memory system 400 can be improved.

[0043] In addition, since metadata storage information is added to the journal data block JDB when the metadata block MDB is written to the memory device 300, consistency between metadata and journal data can be guaranteed even when an unexpected event such as a sudden / accidental power failure occurs. In addition, since all data stored in the L1 cache of the memory controller 200 is stored as a single block in the journal data area 316 based on the data guarantee request of the host 100, consistency between metadata and journal data can be guaranteed even when an unexpected event such as a sudden / accidental power failure occurs. In addition, even when the memory system 400 does not include a buffer memory (e.g., dynamic RAM (DRAM)) for storing metadata or includes a small-capacity buffer memory, the memory system 400 can ensure consistency between metadata and journal data. When consistency between metadata and journal data is ensured as described above, the reliability of the memory system 400 can be enhanced.

[0044] Figure 2 2 is a diagram showing a memory controller 200 according to an exemplary embodiment of the inventive concept. The memory controller 200 may include a system bus 210, a processor 220 (e.g., a microprocessor circuit), an internal memory 230, a host interface 250, a memory interface 260, and a cache 270. The memory controller 200 may also include various other elements. For example, the memory controller 200 may also include a command generation module that generates a command CMD for controlling memory operations. References to the memory controller 200 will be omitted. Figure 1 A redundant description of the memory controller 200 is given. Reference will be made to Figure 1 Let's describe it together Figure 2 .

[0045] The system bus 210 may provide a channel between internal elements of the memory controller 200. The system bus 210 may operate based on one of various bus protocols.

[0046] The processor 220 may control all operations of the memory controller 200. The processor 220 may include a processing unit such as a central processing unit (CPU) and a microcontroller unit (MCU). The processor 220 may run software and / or firmware for controlling the memory controller 200. For example, the software and / or firmware may be loaded into the internal memory 230 and then run by the processor 220.

[0047] The internal memory 230 may be used as a working memory, a buffer memory, or a cache memory of the processor 220. The internal memory 230 may include various memories. For example, the internal memory 230 may include a DRAM, a static RAM (SRAM), a PRAM, and / or a flash memory. In an exemplary embodiment of the inventive concept, a flash translation layer (FTL) may be loaded to the internal memory 230. In an exemplary embodiment of the inventive concept, the FTL may include firmware and all or part of the diary data manager 240.

[0048] According to an exemplary embodiment of the present disclosure, the internal memory 230 may store the metadata block MDB and the journal data block JDB. For example, the internal memory 230 may store the metadata block MDB until the metadata block MDB is written to the memory device 300, and the internal memory 230 may store the journal data block JDB until the journal data block JDB is written to the memory device 300.

[0049] The journal data manager 240 may manage metadata and / or journal data. For example, the journal data manager 240 may accumulate metadata in a metadata block MDB and accumulate journal data in a journal data block JDB. In an exemplary embodiment of the present invention, when the metadata block MDB is written to the memory device 300, the journal data manager 240 may add metadata storage information to the journal data block JDB, the metadata storage information including information related to the storage of the metadata block MDB. In an exemplary embodiment of the present invention, when the memory system 400 is powered on after being accidentally powered off, the journal data manager 240 may determine the accumulation order of metadata and journal data based on the metadata storage information included in each journal data block read from the memory device 300, and may use the journal data to restore or update at least a portion of the metadata based on the accumulation order.

[0050] The diary data manager 240 may be implemented in the memory controller 200 in various forms. According to an exemplary embodiment of the inventive concept, the diary data manager 240 may be implemented by hardware and / or software. In the case where the diary data manager 240 is implemented by hardware, the diary data manager 240 may include a circuit for managing metadata and / or diary data. In the case where the diary data manager 240 is implemented by software, data management may be performed when the processor 220 executes a program (or instruction) stored in the memory controller 200. However, the present invention is not limited thereto. The diary data manager 240 may be implemented by a combination of software and hardware (e.g., firmware). In an exemplary embodiment of the inventive concept, all or part of the diary data manager 240 may be included in the FTL.

[0051] The host interface 250 may provide an interface between the host 100 and the memory controller 200. The memory controller 200 may receive a data operation request REQ, an address ADDR, etc. from the host 100 via the host interface 250, and may exchange data with the host 100 via the host interface 250.

[0052] The memory interface 260 may provide an interface between the memory device 300 and the memory controller 200. For example, data that has been processed by the processor 220 may be stored in the memory device 300 via the memory interface 260. The data stored in the memory device 300 may be provided to the processor 220 via the memory interface 260. The memory controller 200 may send a command CMD, an address ADDR, etc. to the memory device 300 via the memory interface 260, and may exchange data with the memory device 300 via the memory interface 260.

[0053] The cache 270 may store data for the operation of the processor 220, and may send data to the processor 220 at the request of the processor 220. In an exemplary embodiment of the inventive concept, the cache 270 may be implemented as an SRAM. The cache 270 may include an L1 cache 272 and an L2 cache 274. In an exemplary embodiment of the inventive concept, the L1 cache 272 may store log entries in an unclassified form. When necessary, the log entries in the L1 cache 272 may be flushed to the L2 cache 274 and have a form suitable for storage in the memory device 300.

[0054] According to an exemplary embodiment of the present disclosure, in order to prevent events such as sudden / accidental power failure, when the memory controller 200 receives a data guarantee request from the host 100, the memory controller 200 may form or generate an L1 journal block using all data stored in the L1 cache 272, and store the L1 journal block in the journal data area 316 of the memory device 300. For example, the memory controller 200 may store the L1 journal block in the journal data area 316 of the memory device 300 as a journal data block.

[0055] According to an exemplary embodiment, the memory controller 200 stores metadata and journal data as metadata blocks MDB and journal data blocks JDB, respectively, in separate areas of the memory device 300, thereby reducing the dependency of metadata on journal data. Therefore, the amount of metadata written in the memory device 300 can also be reduced. Therefore, the power consumption of the memory system 400 can be reduced, and the performance of the memory system 400 can be improved.

[0056] In addition, since metadata storage information is added to the journal data block JDB when the metadata block MDB is written to the memory device 300, consistency between metadata and journal data can be guaranteed even when an unexpected event such as a sudden / accidental power failure occurs. In addition, since all data stored in the L1 cache 272 of the memory controller 200 is stored as a single block in the journal data area 316 based on the data guarantee request of the host 100, consistency between metadata and journal data can be guaranteed even when an unexpected event such as a sudden / accidental power failure occurs. In addition, even when the memory system 400 does not include a buffer memory (e.g., DRAM) for storing metadata or includes a small-capacity buffer memory, the memory system 400 can ensure consistency between metadata and journal data. When consistency between metadata and journal data is ensured as described above, the reliability of the memory system 400 can be enhanced.

[0057] Figure 3 1 is a diagram showing a software layer of a data processing system according to an exemplary embodiment of the inventive concept. The software layer may include an application 101, a file system 102, and an FTL 201. Figure 1 and Figure 2 Let's describe it together Figure 3 .

[0058] The application 101 may include various application programs running on the host 100. The file system 102 may organize files or data used by the application 101. For example, the file system 102 may use logical addresses to manage the storage space of the memory system 400. The file system 102 may allocate logical addresses to data to be or have been stored in the memory system 400 and manage the logical addresses. According to the operating system (OS) of the host 100, the file system 102 may have different forms. For example, the file system 102 may include a file allocation table (FAT), FAT32, a new technology file system (NTFS), a hierarchical file system (HFS), a journal file system 2 (JSF2), XFS, an on-disk structure-5 (ODS-5), UDF, ZFS, a unix file system (UFS), ext2, ext3, ext4, ReiserFS, Reiser5, ISO 9660, Gnome VFS, BFS and / or WinFS. In an exemplary embodiment of the inventive concept, the application 101 and the file system 102 may be software layers running on the host 100.

[0059] The FTL 201 may perform various maintenance operations between the host 100 and the memory device 300 so that the memory device 300 can be effectively used. For example, the FTL 201 may perform conversion between logical addresses and physical addresses. The FTL 201 may manage address conversion using a mapping table.

[0060] Figure 4 3 is a diagram showing a memory device 300 according to an exemplary embodiment of the inventive concept. The memory device 300 may include a memory cell array 310, a row decoder 320, a page buffer circuit 330, a voltage generator 340, a control logic 350, and a data input / output (I / O) circuit 360. Figure 1 A redundant description of the memory device 300 is given.

[0061] The memory cell array 310 may include a plurality of memory blocks. Each memory block may include a plurality of memory cells. The memory cell array 310 may be connected to a row decoder 320 through a word line WL, a string selection line SSL, and a ground selection line GSL, and may be connected to a page buffer circuit 330 through a bit line BL. The memory cell array 310 may include strings connected to the bit lines BL, respectively. Each string may include at least one string selection transistor, a plurality of memory cells, and at least one ground selection transistor, which are connected in series between a bit line and a common source line.

[0062] According to an exemplary embodiment, the memory cell array 310 may include a user data area 312, a metadata area 314, and a diary data area 316. The user data area 312 may store user data (or ordinary data). The metadata area 314 may store at least one metadata block MDB. The diary data area 316 may store at least one diary data block JDB. In an exemplary embodiment of the present invention, the user data area 312, the metadata area 314, and the diary data area 316 may be different from each other, and each area includes at least one memory page. According to an exemplary embodiment of the present invention, the user data area 312, the metadata area 314, and the diary data area 316 may be included in different memory blocks, respectively, but the present invention is not limited thereto. For example, at least two of the user data area 312, the metadata area 314, and the diary data area 316 may be included in one memory block. Alternatively, at least two of a portion of the user data area 312, a portion of the metadata area 314, and a portion of the diary data area 316 may be included in one memory block.

[0063] The row decoder 320 may select some word lines WL based on the row address X-ADDR. The row decoder 320 may apply a word line enable voltage to the word line. For example, during a data write operation, the row decoder 320 may apply a program voltage and a verification voltage to the selected word line, and apply a program inhibit voltage to an unselected word line. During a data read operation, the row decoder 320 may apply a read voltage to the selected word line, and apply a read inhibit voltage to an unselected word line. During a data erase operation, the row decoder 320 may apply a word line erase voltage to the word line. The row decoder 320 may select some string select lines SSL or some ground select lines GSL based on the row address X-ADDR.

[0064] The page buffer circuit 330 may be connected to the memory cell array 310 through the bit lines BL and may perform a data write or read operation in response to a page buffer control signal CTRL_PB received from the control logic 350. The page buffer circuit 330 may be connected to the data line by selecting the bit line using the decoded column address.

[0065] The voltage generator 340 may generate various voltages suitable for performing write, read, and erase operations on the memory cell array 310 based on the voltage control signal CTRL_vol received from the control logic 350. For example, the voltage generator 340 may generate a word line drive voltage VWL for driving the word line WL. At this time, the word line drive voltage VWL may include a write voltage, a read voltage, a word line erase voltage, and a write verification voltage. The voltage generator 340 may also generate a string selection line drive voltage for driving the string selection line SSL and a ground selection line drive voltage for driving the ground selection line GSL.

[0066] The control logic 350 may generate various internal control signals based on the command CMD, address ADDR, and control signal CTRL received from the memory controller 200 for writing data into the memory cell array 310 or reading data from the memory cell array 310. For example, the control logic 350 may control all operations in the memory device 300. The internal control signals generated by the control logic 350 may be provided to the page buffer circuit 330, the row decoder 320, and the voltage generator 340. For example, the control logic 350 may provide a page buffer control signal CTRL_PB to the page buffer circuit 330, a row address X-ADDR to the row decoder 320, and a voltage control signal CTRL_vol to the voltage generator 340. However, the types of control signals are not limited thereto, and the control logic 350 may provide other internal control signals. For example, the control logic 350 may provide a column address to the column decoder. The data I / O circuit 360 may be connected to the page buffer circuit 330 via a data line.

[0067] Figure 5A and Figure 5B Metadata blocks according to a comparative example are shown. Each of the metadata blocks includes diary data and metadata. The memory controller according to the comparative example accumulates diary data and metadata, and writes the diary data and metadata to the memory device as metadata blocks. For example, a first metadata block includes first diary data and first metadata, a second metadata block includes second diary data and second metadata, and a third metadata block includes third diary data and third metadata.

[0068] refer to Figure 5A , when a checkpoint occurs for user data and / or metadata, the memory controller can accumulate diary data. When a predetermined amount of diary data is accumulated, the memory controller writes the diary data and metadata corresponding to the predetermined amount to the memory device as a metadata block. For example, according to a comparative example, when the diary data has accumulated to a predetermined amount, the memory controller needs to newly write as much metadata as the predetermined amount to the memory device. According to the comparative example, the memory controller writes the diary data corresponding to the predetermined amount and the metadata corresponding to the predetermined amount to the memory device as a metadata block, because it is important to determine the order of the accumulation time of the diary data and the writing time of the metadata. Only when the memory controller determines the order of the diary data accumulation time and the metadata writing time, the memory control can use the diary data to restore or update the metadata when it is powered on after an event such as a sudden / accidental power outage.

[0069] Specifically, Figure 5B is a diagram showing the order in which metadata blocks are written over time. When the first diary data has accumulated to a predetermined amount, the memory controller writes the first diary data and the first metadata to the memory device as a first metadata block. Thereafter, when the second diary data has accumulated to a predetermined amount, the memory controller writes the second diary data and the second metadata to the memory device as a second metadata block. Thereafter, when the third diary data has accumulated to a predetermined amount, the memory controller writes the third diary data and the third metadata to the memory device as a third metadata block. For example, since the first metadata block to the third metadata block are written to the memory device in a chronological order (e.g., in the order of occurrence), the memory controller can determine the order of the accumulation time of the first diary data to the third diary data and the write time of the first metadata to the third metadata after power-on.

[0070] refer to Figure 5A and Figure 5B , since the memory controller according to the comparative example needs to write a predetermined amount of metadata when the journal data has accumulated to a predetermined amount, there are a large number of unnecessary metadata write operations.

[0071] Figure 62 is a diagram showing a metadata block MDB and a journal data block JDB according to an exemplary embodiment of the inventive concept. Figure 1 and Figure 2 Let's describe it together Figure 6 .

[0072] The metadata block MDB may include metadata, and the diary data block JDB may include diary data and metadata storage information. For example, the metadata block MDB may include first metadata, and the diary data block JDB may include first diary data, first metadata storage information MSI1, and second diary data.

[0073] The journal data manager 240 of the memory controller 200 may accumulate metadata in the internal memory 230. Forming a metadata block MDB by accumulating metadata in the internal memory 230 using the journal data manager 240 may refer to accumulating metadata in the metadata block MDB using the journal data manager 240. For example, the journal data manager 240 may accumulate metadata in the metadata block MDB. When the amount of metadata accumulated in the metadata block MDB reaches a first predetermined size, the journal data manager 240 may write the metadata block MDB to the metadata area 314 of the memory device 300. For example, when the amount of metadata accumulated in the metadata block MDB reaches a first predetermined size, the journal data manager 240 may control the memory device 300 to write the metadata block MDB to the metadata area 314. For example, the journal data manager 240 may control the memory controller 200 to send an address corresponding to the metadata area 314, a write command, and a metadata block MDB to the memory device 300.

[0074] The diary data manager 240 of the memory controller 200 may accumulate the diary data in the internal memory 230. Forming the diary data block JDB by accumulating the diary data in the internal memory 230 using the diary data manager 240 may refer to: accumulating the diary data in the diary data block JDB using the diary data manager 240. For example, the diary data manager 240 may accumulate the diary data in the diary data block JDB. In addition, when the metadata block MDB including the first metadata is written to the memory device 300, the diary data manager 240 may add the first metadata storage information MSI1 including the information related to the storage of the metadata block MDB to the diary data block JDB. In an exemplary embodiment of the inventive concept, the first metadata storage information MSI1 may include the metadata block age assigned to each metadata block MDB by the diary data manager 240 and the PPN of the storage metadata block MDB in the memory device 300. The metadata block age may refer to the information assigned to each metadata block MDB by the diary data manager 240. As a non-limiting example, the diary data manager 240 may assign an age incremented by 1 to the metadata block each time a new metadata block is generated. When the amount of data accumulated in the journal data block JDB reaches the second predetermined size, the journal data manager 240 may write the journal data block JDB to the journal data area 316 of the memory device 300. For example, when the amount of data accumulated in the journal data block JDB reaches the second predetermined size, the journal data manager 240 may control the memory device 300 to write the journal data block JDB to the journal data area 316. For example, the journal data manager 240 may control the memory controller 200 to send an address corresponding to the journal data area 316, a write command, and the journal data block JDB to the memory device 300.

[0075] According to an exemplary embodiment, the journal data manager 240 may manage metadata and journal data in separate data blocks, respectively, and store the metadata and journal data in separate areas of the memory device 300 as separate data blocks, respectively. Figure 5A and Figure 5B Compared with the case where the metadata is stored in the memory device 300, the dependency of the metadata on the journal data can be reduced, and the amount of metadata written to the memory device 300 can also be reduced.

[0076] In addition, since metadata storage information is added to the journal data block JDB when the metadata block MDB is written to the memory device 300, the memory controller 200 can determine the order of the journal data accumulation time and the metadata write time even when power is turned on after an event such as a sudden / accidental power failure. The order of the journal data accumulation time and the metadata write time can be referred to as a sequence of the journal data accumulation time and the metadata write time. Therefore, the memory system 400 can ensure consistency between the metadata and the journal data.

[0077] Figure 7 is a flowchart illustrating a data processing method of a storage device according to an exemplary embodiment of the inventive concept. Figure 1 and Figure 2 Let's describe it together Figure 7 .

[0078] In operation S120, the memory controller 200 may accumulate metadata in a metadata block MDB. For example, the diary data manager 240 may accumulate metadata in the metadata block MDB. In an exemplary embodiment of the inventive concept, the metadata block MDB may be stored in the internal memory 230 of the memory controller 200.

[0079] In operation S140, the memory controller 200 may accumulate the journal data in the journal data block JDB. For example, when a checkpoint occurs in the user data and / or metadata, the journal data manager 240 may generate new journal data and accumulate the journal data in the journal data block JDB. In an exemplary embodiment of the inventive concept, the journal data may include at least one log entry. In an exemplary embodiment of the inventive concept, the journal data block JDB may be stored in the internal memory 230 of the memory controller 200.

[0080] In operation S160, the memory controller 200 may add metadata storage information to the journal data block JDB in response to writing the metadata block MDB to the memory device 300. In an exemplary embodiment of the inventive concept, when the amount of metadata accumulated in the metadata block MDB reaches a first size, the journal data manager 240 may write the metadata block MDB to the metadata area 314 of the memory device 300 and add the metadata storage information including information related to the storage of the metadata block MDB to the journal data block JDB.

[0081] In operation S180, when the amount of data accumulated in the journal data block JDB reaches the second predetermined size, the memory controller 200 may write the journal data block JDB to the memory device 300. When the amount of data accumulated in the journal data block JDB reaches the second predetermined size, data up to the second predetermined size has been accumulated in the journal data block JDB. For example, when the amount of data accumulated in the journal data block JDB reaches the second predetermined size, the journal data manager 240 may write the journal data block JDB to the journal data area 316 of the memory device 300.

[0082] Figure 8 is a flowchart illustrating a data processing method of a storage device according to an exemplary embodiment of the inventive concept. Figure 1 and Figure 2 Let's describe it together Figure 8 .

[0083] In operation S210, the memory controller 200 may accumulate metadata and / or journal data. For example, the memory controller 200 may accumulate metadata in a metadata block MDB and accumulate journal data in a journal data block JDB. For example, operation S210 may be performed with Figure 7 The operations S120 and S140 in FIG.

[0084] In operation S220, the memory controller 200 may determine whether metadata of a first predetermined size has been accumulated in the metadata block MDB. When so much metadata has been accumulated in the metadata block MDB, the data processing method may proceed to operation S230. When so much metadata has not been accumulated in the metadata block MDB, the data processing method may return to operation S210.

[0085] When metadata of a first predetermined size has been accumulated in the metadata block MDB, in operation S230, the memory controller 200 may control the memory device 300 to write the metadata block MDB to the metadata area 314. For example, the journal data manager 240 may send an address corresponding to the metadata area 314, a write command, and the metadata block MDB to the memory device 300.

[0086] In operation S240 , the memory controller 200 may add metadata storage information including information related to storage of the metadata block MDB to the journal data block JDB.

[0087] In operation S250, the memory controller 200 may determine whether data of the second predetermined size has been accumulated in the journal data block JDB. When data of the second predetermined size has been accumulated in the journal data block JDB, the data processing method may proceed to operation S260. When data of the second predetermined size has not been accumulated in the journal data block JDB, the data processing method may return to operation S210.

[0088] It should be noted that operations S220, S230, and S240 need not precede operations S250 and S260. For example, when data of the second predetermined size has been accumulated in the journal data block JDB before writing the metadata block MDB to the memory device 300, the data processing method may proceed to operation S260.

[0089] When data of the second predetermined size has been accumulated in the journal data block JDB, the memory controller 200 may control the memory device 300 to write the journal data block JDB to the journal data area 316 in operation S260. For example, the journal data manager 240 may send an address corresponding to the journal data area 316, a write command, and the journal data block JDB to the memory device 300.

[0090] Fig. 9 is a flow chart showing a data processing method of a storage device according to an exemplary embodiment of the inventive concept. Specifically, Fig. 9 is a diagram showing a state in which data is accumulated in a journal data block JDB over time. Figure 1 and Figure 2 Let's describe it together Fig. 9 .

[0091] In operation S310, the memory controller 200 may accumulate the first journal data in the journal data block JDB. The event of writing the first metadata block including the first metadata to the memory device 300 may occur in operation S320. For example, when the amount of metadata in the first metadata block reaches a first predetermined size, the first metadata block may be written to the metadata area 314 of the memory device 300.

[0092] At this time, in operation S330, the memory controller 200 may add metadata storage information MSI1 including information related to storage of the first metadata block to the journal data block JDB. Thereafter, the journal data block JDB may include the first journal data and the first metadata storage information MSI1, such as Fig. 9 shown.

[0093] Thereafter, in operation S340, the memory controller 200 may accumulate the second journal data in the journal data block JDB. When the amount of data in the journal data block JDB reaches a second predetermined size while the memory controller 200 is accumulating the second journal data in the journal data block JDB, in operation S350, the memory controller 200 may write the journal data block JDB to the memory device 300. For example, the memory controller 200 may control the memory device 300 to write the journal data block JDB to the journal data area 316.

[0094] Fig.10 is a diagram showing a metadata block and a journal data block according to an exemplary embodiment of the inventive concept. Specifically, Fig.10 The configuration of the journal data block according to various embodiments is shown. Figure 1 and Figure 2 Let's describe it together Fig.10 .

[0095] The first metadata block MDB1 to the third metadata block MDB3 may include the first metadata to the third metadata, respectively. The first diary data block JDB1 may include the first diary data JD1, the first metadata storage information MSI1 including the information related to the storage of the first metadata block MDB1, and the second diary data JD2. The second diary data block JDB2 may include the third diary data JD3, the second metadata storage information MSI2 including the information related to the storage of the second metadata block MDB2, the fourth diary data JD4, the third metadata storage information MSI3 including the information related to the storage of the third metadata block MDB3, and the fifth diary data JD5. The third diary data block JDB3 may include the sixth diary data JD6.

[0096] For example, the journal data block may include a single metadata storage information or multiple metadata storage information. In addition, when the metadata block is not written to the memory device 300 and the journal data accumulates to the second size in the journal data block, the journal data block may not include the metadata storage information.

[0097] Fig.11 3 is a diagram showing a memory cell array 310 according to an exemplary embodiment of the inventive concept. Figure 1 and Figure 2 Let's describe it together Fig.11 .

[0098] The metadata area 314 may store metadata blocks including first to third metadata blocks. In an exemplary embodiment of the inventive concept, each metadata block may be stored in a single memory page of the metadata area 314. For example, the first metadata block may be stored in the Nth memory page, the second metadata block may be stored in the (N+1)th memory page, and the third metadata block may be stored in the (N+2)th memory page. For example, the first size (i.e., the size of the metadata block) may be the same as the size of a single memory page of the memory cell array 310.

[0099] The journal data area 316 may store journal data blocks including first to third journal data blocks. In an exemplary embodiment of the inventive concept, each journal data block may be stored in a single memory page of the journal data area 316. For example, the first journal data block may be stored in the Mth memory page, the second journal data block may be stored in the (M+1)th memory page, and the third journal data block may be stored in the (M+2)th memory page. For example, the second size (i.e., the size of the journal data block) may be the same as the size of a single memory page of the memory cell array 310.

[0100] Fig.12 is a flow chart showing a data processing method of a storage device according to an exemplary embodiment of the inventive concept. Specifically, Fig.12 is a flowchart showing a data processing method when the memory system is powered on after being powered off. Figure 1 and Figure 2 Let's describe it together Fig.12 .

[0101] When the memory system 400 is powered on after power failure or sudden / accidental power failure, in operation S420, the memory controller 200 may read metadata blocks and journal data blocks from the memory device 300. For example, the journal data manager 240 may read metadata blocks from the metadata area 314 and journal data blocks from the journal data area 316.

[0102] In operation S440, the memory controller 200 may determine the order of the accumulation time of the diary data and the writing time of the metadata based on the pieces of metadata storage information respectively included in the diary data blocks. Figures 6 to 9 As described above, since the memory controller 200 adds the metadata storage information to the journal data block JDB when the metadata block MDB is written to the memory device 300, the memory controller 200 can determine the order of the accumulation time of the journal data and the write time of the metadata based on each piece of metadata storage information. In operation S460, the memory controller 200 can restore or update the metadata based on the determined order.

[0103] Fig.13 1 is a diagram showing a data processing system 10 according to an exemplary embodiment of the inventive concept. Specifically, Fig.13 1 is a diagram showing a data processing system 10 for explaining the operation of the memory system 400 when the host 100 provides a data guarantee request DGR to the memory system 400. Figure 1 A redundant description of data processing system 10 is given.

[0104] Although the L2 cache 274 of the memory controller 200 may store data in a form of writing the data to the memory device 300, the L1 cache 272 may store at least one log entry in an unclassified form before the log entry is written to the memory device 300. When the log entry and various types of data in the L1 cache 272 have high importance or according to the needs of the host 100, the host 100 may send a data guarantee request DGR to the memory controller 200, and the data guarantee request DGR requests to guarantee the data in the L1 cache 272.

[0105] In response to the data guarantee request DGR, the memory controller 200 may generate a data block using all data in the L1 cache 272, and may write the generated data block into the journal data area 316. The generated data block may be referred to as an L1 journal block L1JB. For example, the memory controller 200 groups all data stored in the L1 cache 272 into the L1 journal block L1JB, so that the L1 journal block L1JB may be written into the journal data area 316 as a type of journal data block.

[0106] An unexpected event such as a sudden / accidental power failure may occur in the memory system 400. When an event such as a sudden / accidental power failure occurs, there may be a concern that the log entries stored in the L1 cache 272 are lost. According to an exemplary embodiment, the memory controller 200 writes the L1 journal block L1JB to the memory device 300 in response to the data guarantee request DGR from the host 100, and thus, the memory controller 200 can read the L1 journal block L1JB from the memory device 300 after power-on, and copy the L1 journal block L1JB to the L1 cache 272. Therefore, the concern about the loss of the log entries can be reduced.

[0107] Therefore, according to the exemplary embodiment, even when an unexpected event such as a sudden / accidental power failure occurs, consistency between metadata and journal data can be ensured in the data processing system 10 .

[0108] Fig.142 is a diagram illustrating an L1 cache 272, an L2 cache 274, and a journal data area 316 according to an exemplary embodiment of the inventive concept. Fig.13 Let's describe it together Fig.14 .

[0109] The L1 cache 272 may store a plurality of log entries in an unsorted form, which is different from the form in which the log entries are stored in the memory device 300. The memory controller 200 may generate data in a form in which the data is written to the memory device 300 by sorting at least a portion of the log entries stored in the L1 cache 272 in the L2 cache 274.

[0110] When receiving the data guarantee request DGR from the host 100, the memory controller 200 may form an L1 journal block L1JB using all data stored in the L1 cache 272, and write the L1 journal block L1JB into the journal data area 316 of the memory device 300. When the memory system 400 is powered on after a sudden / accidental power failure, the memory controller 200 may restore the journal entries to the L1 cache 272 based on the L1 journal block L1JB stored in the journal data area 316.

[0111] Fig.15 is a flowchart illustrating a data processing method of a storage device according to an exemplary embodiment of the inventive concept. Fig.13 Let's describe it together Fig.15 .

[0112] In operation S510, the memory controller 200 may read a journal data block from the memory device 300. In an exemplary embodiment of the inventive concept, the memory controller 200 may read a journal data block from the journal data area 316 of the memory device 300. Fig.15 is a flow chart illustrating a method of processing one of the journal data blocks that has been read.

[0113] In operation S520, the memory controller 200 may determine whether the journal data block corresponds to the L1 journal block L1JB. When the journal data block is not the L1 journal block L1JB but a normal journal data block, the method may proceed to operation S530. When the journal data block corresponds to the L1 journal block L1JB, the method may proceed to operation S550.

[0114] When the diary data block is a general diary data block including diary data and metadata storage information, operations S530 and S540 may be performed. Operation S530 may be performed with Fig.12 The operation S440 in the embodiment corresponds to the operation S440, and the operation S540 can be Fig.12When the journal data block corresponds to the L1 journal block L1JB, the memory controller 200 may copy the L1 journal block L1JB, which has been stored as the journal data block, to the L1 cache 272 in operation S550.

[0115] Through the above method, the memory system 400 can completely restore the log entries that need to be protected.

[0116] Fig.16 2 is a diagram illustrating a journal data area 316 and an L1 cache 272 according to an exemplary embodiment of the inventive concept. Fig.13 Let's describe it together Fig.16 . Fig.16 The storage format of log entries shown in is only an example for ease of description.

[0117] The journal data area 316 may store the first to fifth journal data blocks and the L1 cache journal block. The L1 cache journal block may include a first journal entry, a second journal entry, and a third journal entry. The L1 cache journal block may be a data block generated by the memory controller 200 using all data stored in the L1 cache 272 based on a data guarantee request DGR provided from the host 100 to the memory controller 200.

[0118] At the same time, the first log entry and the third log entry may be flushed from L1 cache 272 to L2 cache 274 and thus included in the journal data block. For example, the second journal data block may include the second log entry and the fifth journal data block may include the third log entry.

[0119] Assume that the first log entry and the third log entry are respectively included in the journal data block and stored in the journal data area 316, and a sudden / accidental power failure occurs before the second log entry is flushed to the L2 cache 274. In the case of power-on after the sudden / accidental power failure, the memory controller 200 can read the journal data block and the L1 cache journal block from the journal data area 316. The memory controller 200 can copy the L1 cache journal block to the L1 cache 272. In an exemplary embodiment of the inventive concept, the memory controller 200 can identify the log entry included in the journal data block from the log entries included in the L1 cache log block based on the journal data block, and can invalidate the identified log entry in the L2 cache 274. For example, the memory controller 200 can invalidate the first log entry and the third log entry in the log entries included in the L1 cache journal block based on the second journal data block and the fifth journal data block that have been read. The indication that the log entry is invalid can mean that the log entry is not flushed to the L2 cache 274. In an exemplary embodiment of the inventive concept, after copying the L1 cache journal block to the L1 cache 272 , the memory controller 200 may delete the first log entry and the third log entry from the L1 cache 272 so that the first log entry and the third log entry may be invalid.

[0120] Fig.17 1 is a diagram showing an SSD system 1000 according to an exemplary embodiment of the inventive concept. The SSD system 1000 may include a host 1100 and an SSD 1200. The SSD 1200 may exchange signals with the host 1100 through a signal connector and receive power through a power connector. The SSD 1200 may include an SSD controller 1210, an auxiliary power supply 1220, and a plurality of flash memory devices 1230, 1240, and 1250. At this time, the SSD 1200 may be used to connect to the host 1100. Figures 1 to 4 as well as Figures 6 to 16 The embodiment shown in is used to implement SSD1200.

[0121] In detail, according to Figures 1 to 4 as well as Figures 6 to 16 In the method shown in FIG. 1 , SSD controller 1210 may include journal data manager 1214. Journal data manager 1214 may correspond to journal data manager 240, which has been described in detail in FIG. Figures 1 to 4 as well as Figures 6 to 16 According to the embodiment, SSD 1200 can reduce the amount of metadata written to flash memory devices 1230, 1240, and 1250, and can ensure consistency between metadata and journal data even when an unexpected event such as a sudden / accidental power failure occurs.

[0122] While the inventive concept has been particularly shown and described with reference to embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure.

Claims

1. A storage device, comprising: a memory device comprising a user data area, a metadata area, and a journal data area, wherein each of the user data area, the metadata area, and the journal data area is a separate area in the memory device; as well as a memory controller configured to control the memory device to write a user data block into the user data area, a metadata block into the metadata area, and a diary data block into the diary data area, the user data block including user data, the metadata block including metadata, and the diary data block including both diary data and metadata storage information, The diary data includes log information related to the user data and the metadata. The metadata storage information includes information related to the storage of the metadata block, and Wherein, the memory controller is further configured to add the metadata storage information to the journal data block when the metadata block is written to the memory device.

2. The storage device according to claim 1, wherein: The memory controller is also configured to accumulate the metadata in the metadata block, and wherein, when the amount of metadata accumulated in the metadata block reaches a first predetermined size, the memory controller controls the memory device to write the metadata block to the metadata area and add the metadata storage information to the journal data block.

3. The storage device according to claim 1, wherein: The memory controller is also configured to accumulate the diary data and the metadata storage information in the diary data block, and wherein, when the amount of diary data accumulated in the diary data block reaches a second predetermined size, the memory controller controls the memory device to write the diary data block to the diary data area.

4. The storage device according to claim 1, wherein: The memory controller is further configured to, when power is restored after an unexpected power outage, read the metadata block and the journal data block from the memory device and update the metadata included in the metadata block based on the metadata storage information included in the journal data block.

5. The storage device according to claim 4, wherein: The memory controller is also configured to determine, when power is restored after an unexpected power outage, an order of accumulation time of the diary data in the diary data block and write time of the metadata based on the metadata storage information included in the diary data block, and the memory controller uses the diary data to update the metadata based on the determined order.

6. The storage device according to claim 1, in, The memory controller includes an L1 cache storing a plurality of log entries, and When a data protection request is received from outside the storage device, the memory controller is further configured to generate an L1 cache journal block using all data in the L1 cache and control the memory device to write the L1 cache journal block into the journal data area.

7. The storage device according to claim 6, wherein: The memory controller is further configured to read the L1 cache journal block from the memory device and copy the L1 cache journal block to the L1 cache when power is restored after an unexpected power outage.

8. The storage device according to claim 7, wherein: The memory controller is further configured to, when power is restored after an unexpected power outage, read the journal data block from the memory device and invalidate a log entry included in the journal data block among log entries included in the L1 cache journal block.

9. The storage device according to claim 1, wherein: The memory device stores the metadata blocks in memory pages of the metadata area and stores the journal data blocks in memory pages of the journal data area.

10. A method for processing data of a storage device, comprising: accumulating the user data in a user data block using a memory controller; accumulating metadata in a metadata block using the memory controller; accumulating, using the memory controller, journal data in a journal data block, the journal data comprising log information related to the metadata; adding metadata storage information related to storage of the metadata block to the journal data block using the memory controller when the metadata block is written to the metadata area of ​​the memory device of the storage device; as well as When the amount of data accumulated in the diary data block reaches a first predetermined size, writing the diary data block into a diary data area of ​​the memory device, and The user data block, the metadata block and the journal data block are separate areas in the storage device.

11. The method according to claim 10, further comprising: When the amount of metadata accumulated in the metadata block reaches a second predetermined size, the metadata block is written to the metadata area.

12. The method according to claim 11, wherein: The first predetermined size and the second predetermined size are both equal to a size of a memory page included in the memory device.

13. The method according to claim 10, wherein: The metadata storage information includes an age of the metadata block and a physical page number of a memory page in the memory device storing the metadata block.

14. The method according to claim 10, further comprising: In response to a power-on event following an unexpected power-off event, reading from the memory device a metadata block including the metadata and a diary data block including the diary data and the metadata storage information; determining, using the memory controller, an order of accumulating the journal data and writing the metadata based on the metadata storage information; as well as The journal data is used to restore or update at least a portion of the metadata based on the determined order.

15. The method according to claim 10, further comprising: receiving a data assurance request from an external source external to the storage device; as well as In response to the data guarantee request, the L1 cache journal blocks are written into the journal data area by grouping all data stored in the L1 cache of the memory controller into the L1 cache journal blocks.

16. The method according to claim 15, further comprising: In response to powering on after powering off, reading from the memory device a data block stored in the journal data area; determining whether the data block is the L1 cache journal block; as well as When the data block is the L1 cache journal block, the data block is copied to the L1 cache.

17. The method according to claim 15, further comprising: In response to a power-on event following an unexpected power-off event, reading a journal data block stored in the journal data area from the memory device; as well as A log entry included in the journal data block among log entries included in the L1 cache journal block is invalidated.

18. A method for processing data of a storage device, comprising: accumulating, by the memory controller, the first journal data in the journal data block; Writing a user data block into a user data area of ​​a memory device of the storage device; writing a first metadata block into a metadata area of ​​the memory device of the storage device; accumulating, by the memory controller, metadata storage information related to storage of the first metadata block in the journal data block; accumulating, by the memory controller, second journal data in the journal data block; as well as writing the diary data block into a diary data area of ​​the memory device, wherein when the first metadata block is written to the memory device, the memory controller adds the metadata storage information to the journal data block, and The user data area, the metadata area, and the diary data area are separate areas in the storage device.

19. The method according to claim 18, further comprising: In response to a power-on event following an unexpected power-off event, reading the journal data block from the memory device; determining, by using metadata storage information included in the journal data block, that the second journal data is accumulated after the first metadata block is written; as well as Metadata included in the first metadata block is restored or updated by using the first journal data and / or the second journal data.

Images