Display device and method for driving display panel

By inserting multiple compensation frequency frames in the low-frequency driving mode of the display device, the problem of difficulty in reducing power consumption and flickering in displaying static images or normally open mode is solved, and more efficient energy use and clearer display effects are achieved.

CN111435586BActive Publication Date: 2025-02-14SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202010036618.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-01-14
Filing Date
2020-01-14
Publication Date
2025-02-14
Estimated Expiration
2040-01-14

AI Technical Summary

Technical Problem

When the existing display devices display static images or normally open mode, it is difficult to effectively reduce power consumption. At the same time, due to the hysteresis characteristics of the pixel switching elements, afterimages or flickering are easily generated.

Method used

A display device is employed, which includes a display panel, a gate driver, a data driver, a transmit driver, and a drive controller. In the low frequency driving mode, a low drive frequency corresponding to the input image data is determined and a plurality of compensation frequency frames are inserted before the low drive frequency frame to reduce flicker and afterimage.

Benefits of technology

It realizes reducing the power consumption of the display device in the low-frequency driving mode, while improving the display quality of the display panel, and reducing the occurrence of flicker and afterimage.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display device and a method for driving a display panel are provided. The display device includes: a display panel including pixels, the pixels including a first type of switching element and a second type of switching element different from the first type; a gate driver configured to output a gate signal to the display panel; a data driver configured to output a data voltage to the display panel; an emission driver configured to output an emission signal to the display panel; and a driving controller configured to: determine a low driving frequency corresponding to input image data; determine a plurality of compensation frequencies greater than the low driving frequency; and in a low-frequency driving mode, insert a plurality of compensation frequency frames having the plurality of compensation frequencies before a low driving frequency frame having the low driving frequency.
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Description

Technical Field

[0001] Aspects of some example embodiments of the inventive concepts relate to a display apparatus and a method of driving a display panel using the display apparatus. Background Art

[0002] Typically, a display device includes a display panel and a display panel driver. The display panel includes a plurality of gate lines, a plurality of data lines, a plurality of emission lines and a plurality of pixels. The display panel driver includes a gate driver, a data driver, an emission driver and a drive controller. The gate driver outputs a gate signal to the gate line. The data driver outputs a data voltage to the data line. The emission driver outputs an emission signal to the emission line. The drive controller controls the gate driver, the data driver and the emission driver.

[0003] When the display panel displays a static image or the display panel is operated in an always-on mode, the driving frequency of the display panel may be reduced to reduce power consumption.

[0004] When the display panel displays a static image and an image transition occurs, an afterimage of the previous static image may be generated or a flicker may occur due to the hysteresis characteristics of the pixel switching element.

[0005] The above information disclosed in this Background section is only for enhancement of understanding of the background technology and therefore it may contain information that does not constitute the prior art. Summary of the invention

[0006] Aspects of some exemplary embodiments of the present inventive concept relate to a display device and a method of driving a display panel using the display device. For example, some exemplary embodiments of the present inventive concept relate to a display device that can reduce power consumption and improve display quality and a method of driving a display panel using the display device.

[0007] Some example embodiments of the inventive concepts provide a display device capable of reducing power consumption of the display device and improving display quality of a display panel.

[0008] Some example embodiments of the inventive concepts also provide a method of driving a display panel using the display device.

[0009] According to some example embodiments of the present invention, a display device includes: a display panel, a gate driver, a data driver, an emission driver and a drive controller. The display panel includes pixels, and the pixels include a first type of switching element and a second type of switching element different from the first type. The gate driver is configured to output a gate signal to the display panel. The data driver is configured to output a data voltage to the display panel. The emission driver is configured to output an emission signal to the display panel. The drive controller is configured to determine a low drive frequency corresponding to input image data, determine a plurality of compensation frequencies greater than the low drive frequency, and in a low-frequency drive mode, insert a plurality of compensation frequency frames having the plurality of compensation frequencies before a low drive frequency frame having the low drive frequency.

[0010] According to some example embodiments, in the low frequency driving mode, the second type switching element may be driven at a low driving frequency, and the first type switching element may be driven at a first driving frequency greater than the low driving frequency.

[0011] According to some example embodiments, in the normal driving mode, the first type switching element and the second type switching element may be driven at a normal driving frequency.

[0012] According to some example embodiments, the first driving frequency may be a normal driving frequency.

[0013] According to some example embodiments, the drive controller may be configured to determine a first compensation frequency and a second compensation frequency. The first compensation frequency may be a normal driving frequency of a normal driving mode. The second compensation frequency may be smaller than the normal driving frequency and larger than the low driving frequency.

[0014] According to some example embodiments, the driving controller may be configured to determine a first compensation frequency and a second compensation frequency smaller than the first compensation frequency. A first compensation frequency frame having the first compensation frequency may be inserted before a second compensation frequency frame having the second compensation frequency.

[0015] According to some example embodiments, the drive controller may be configured to determine a first compensation frequency and a second compensation frequency smaller than the first compensation frequency. A plurality of first compensation frequency frames having the first compensation frequency may be inserted. A plurality of second compensation frequency frames having the second compensation frequency may be inserted.

[0016] According to some example embodiments, the plurality of compensation frequency frames having at least two compensation frequencies may be repeatedly inserted until a predetermined count is satisfied.

[0017] According to some example embodiments, the plurality of compensation frequency frames having at least two compensation frequencies may be repeatedly inserted until a predetermined condition is satisfied.

[0018] According to some example embodiments, the driving controller may be configured to insert the plurality of compensation frequency frames when an image transition of the input image data occurs from a first static image to a second static image different from the first static image.

[0019] According to some example embodiments, the driving controller may be configured to generate the plurality of compensation frequencies by repeatedly dividing a normal driving frequency of the normal driving mode by a parameter.

[0020] According to some example embodiments, the drive controller may be configured to determine the normal driving frequency as the first compensation frequency. The drive controller may be configured to determine the second compensation frequency by dividing the normal driving frequency by a parameter, and drive the display panel at the second compensation frequency when the second compensation frequency is greater than the low driving frequency. The drive controller may be configured to determine the third compensation frequency by dividing the second compensation frequency by a parameter, and drive the display panel at the third compensation frequency when the third compensation frequency is greater than the low driving frequency.

[0021] According to some example embodiments, the driving controller may be configured to generate the plurality of compensation frequencies by repeatedly multiplying the low driving frequency by a parameter.

[0022] According to some example embodiments, when the Nth compensation frequency is smaller than the normal driving frequency of the normal driving mode, the driving controller may be configured to determine the Nth compensation frequency by multiplying the low driving frequency by a parameter. The driving controller may be configured to determine the N-1th compensation frequency by multiplying the Nth compensation frequency by a parameter, and drive the display panel at the N-1th compensation frequency when the N-1th compensation frequency is smaller than the normal driving frequency. N is a natural number equal to or greater than 2.

[0023] According to some example embodiments, the first type switching element may be a polysilicon thin film transistor. The second type switching element may be an oxide thin film transistor.

[0024] According to some example embodiments, the first type switching element may be a P-type transistor.The second type switching element may be an N-type transistor.

[0025] According to some example embodiments, a pixel may include: a first pixel switching element including a control electrode connected to a first node, an input electrode connected to a second node, and an output electrode connected to a third node; a second pixel switching element including a control electrode to which a first data write gate signal is applied, an input electrode to which a data voltage is applied, and an output electrode connected to the second node; a third pixel switching element including a control electrode to which a second data write gate signal is applied, an input electrode connected to the first node, and an output electrode connected to the third node; a fourth pixel switching element including a control electrode to which a data initialization gate signal is applied, an input electrode to which an initialization voltage is applied, and an output electrode connected to the first node; a fifth pixel switching element including a control electrode to which a data initialization gate signal is applied, an input electrode to which an initialization voltage is applied, and an output electrode connected to the first node; a control electrode to which an emission signal is applied, an input electrode to which a high power supply voltage is applied, and an output electrode connected to a second node; a sixth pixel switching element, including a control electrode to which an emission signal is applied, an input electrode connected to a third node, and an output electrode connected to an anode electrode of an organic light emitting element; a seventh pixel switching element, including a control electrode to which an organic light emitting element initialization gate signal is applied, an input electrode to which an initialization voltage is applied, and an output electrode connected to the anode electrode of the organic light emitting element; a storage capacitor, including a first electrode to which a high power supply voltage is applied and a second electrode connected to the first node; and an organic light emitting element, including an anode electrode connected to the output electrode of the sixth pixel switching element and a cathode electrode to which a low power supply voltage is applied.

[0026] According to some example embodiments, the first pixel switching element, the second pixel switching element, the fifth pixel switching element, and the sixth pixel switching element may be polysilicon thin film transistors. The third pixel switching element, the fourth pixel switching element, and the seventh pixel switching element may be oxide thin film transistors.

[0027] According to some example embodiments, the first pixel switching element, the second pixel switching element, the fifth pixel switching element, the sixth pixel switching element, and the seventh pixel switching element may be polysilicon thin film transistors. The third pixel switching element and the fourth pixel switching element may be oxide thin film transistors.

[0028] According to some example embodiments of the inventive concept, in a method of driving a display panel, the method includes: determining a low driving frequency corresponding to input image data in a low-frequency driving mode; determining a plurality of compensation frequencies greater than the low driving frequency in the low-frequency driving mode; outputting a gate signal to a display panel including a pixel based on the low driving frequency and the plurality of compensation frequencies, the pixel including a first type of switching element and a second type of switching element different from the first type; outputting a data voltage to the display panel; and outputting a transmission signal to the display panel. In the low-frequency driving mode, a plurality of compensation frequency frames having the plurality of compensation frequencies are inserted before a low driving frequency frame having the low driving frequency.

[0029] According to some example embodiments, in a display device and a method of driving a display panel, in a low-frequency driving mode, a plurality of compensation frequency frames may be inserted before a low-frequency driving frequency frame, so that afterimages or flickers of a previous image caused by hysteresis characteristics of a pixel switching element may be prevented or reduced.

[0030] According to some example embodiments, in the low-frequency driving mode, flickering of the display panel may be prevented or reduced, so that power consumption of the display device may be reduced and display quality of the display panel may be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and other features and characteristics of the inventive concept will become more apparent by describing aspects of some example embodiments of the inventive concept with reference to the accompanying drawings, in which:

[0032] Figure 1 is a block diagram illustrating a display device according to some example embodiments of the inventive concept;

[0033] Figure 2 It is shown Figure 1 A circuit diagram of a pixel of a display panel;

[0034] Figure 3 is shown applied to Figure 2 A timing diagram of an input signal of a pixel;

[0035] Figure 4 is shown in low frequency drive mode applied to Figure 2 A timing diagram of input signals of pixels of a display panel;

[0036] Figure 5 The figure shows that the low driving frequency is 1Hz. Figure 1 A flow chart of a method for displaying a panel;

[0037] Figure 6 The figure shows that the low driving frequency is 2Hz. Figure 1 A flow chart of a method for displaying a panel;

[0038] Figure 7 is shown for driving Figure 1 A table showing the compensation frequency of the display panel;

[0039] Fig. 8A and Figure 8B Is shown driving Figure 1 A flow chart of a method for displaying a panel;

[0040] Fig. 9 It is shown Figure 1 A timing diagram of a compensation frequency frame of a display panel;

[0041] Fig.10 is a table showing compensation frequencies for driving a display panel according to some example embodiments of the inventive concept;

[0042] Fig.11 Is shown driving Fig.10 A flowchart of a method for displaying a panel;

[0043] Fig.12 is a flowchart illustrating a method of driving a display panel according to some example embodiments of the inventive concept when a low driving frequency is 1 Hz;

[0044] Fig.13 is a flowchart illustrating a method of driving a display panel according to some example embodiments of the inventive concept when a low driving frequency is 1 Hz;

[0045] Fig.14 is a circuit diagram illustrating pixels of a display panel according to some example embodiments of the inventive concept; and

[0046] Fig.15 is shown applied to Fig.14 Timing diagram of the pixel input signal. DETAILED DESCRIPTION

[0047] Hereinafter, aspects of some example embodiments of the inventive concept will be explained in more detail with reference to the accompanying drawings.

[0048] Figure 1 is a block diagram illustrating a display device according to some example embodiments of the inventive concept.

[0049] Reference Figure 1 The display device includes a display panel 100 and a display panel driver. The display panel driver includes a driving controller 200, a gate driver 300, a gamma reference voltage generator 400, a data driver 500, and an emission driver 600.

[0050] The display panel 100 has a display area on which an image is displayed and a peripheral area adjacent to the display area.

[0051] The display panel 100 includes a plurality of gate lines GWPL, GWNL, GIL, and GBL, a plurality of data lines DL, a plurality of emission lines EL, and a plurality of pixels electrically connected to the gate lines GWPL, GWNL, GIL, and GBL, the data lines DL, and the emission lines EL. The gate lines GWPL, GWNL, GIL, and GBL may extend in a first direction D1, the data lines DL may extend in a second direction D2 crossing the first direction D1, and the emission lines EL may extend in the first direction D1.

[0052] The driving controller 200 receives input image data IMG and input control signal CONT from an external device. For example, the input image data IMG may include red image data, green image data, and blue image data. The input image data IMG may include white image data. The input image data IMG may include magenta image data, cyan image data, and yellow image data. The input control signal CONT may include a main clock signal and a data enable signal. The input control signal CONT may also include a vertical synchronization signal and a horizontal synchronization signal.

[0053] The driving controller 200 generates a first control signal CONT1 , a second control signal CONT2 , a third control signal CONT3 , a fourth control signal CONT4 , and a data signal DATA based on input image data IMG and an input control signal CONT.

[0054] The driving controller 200 generates a first control signal CONT1 for controlling the operation of the gate driver 300 based on the input control signal CONT, and outputs the first control signal CONT1 to the gate driver 300. The first control signal CONT1 may include a vertical start signal and a gate clock signal.

[0055] The driving controller 200 generates a second control signal CONT2 for controlling the operation of the data driver 500 based on the input control signal CONT, and outputs the second control signal CONT2 to the data driver 500. The second control signal CONT2 may include a horizontal start signal and a load signal.

[0056] The driving controller 200 generates a data signal DATA based on the input image data IMG. The driving controller 200 outputs the data signal DATA to the data driver 500.

[0057] The driving controller 200 generates a third control signal CONT3 for controlling the operation of the gamma reference voltage generator 400 based on the input control signal CONT, and outputs the third control signal CONT3 to the gamma reference voltage generator 400 .

[0058] The driving controller 200 generates a fourth control signal CONT4 for controlling the operation of the emission driver 600 based on the input control signal CONT, and outputs the fourth control signal CONT4 to the emission driver 600 .

[0059] The gate driver 300 generates a gate signal driving the gate lines GWPL, GWNL, GIL, and GBL in response to the first control signal CONT1 received from the driving controller 200. The gate driver 300 may sequentially output the gate signal to the gate lines GWPL, GWNL, GIL, and GBL.

[0060] The gamma reference voltage generator 400 generates a gamma reference voltage VGREF in response to the third control signal CONT3 received from the driving controller 200. The gamma reference voltage generator 400 provides the gamma reference voltage VGREF to the data driver 500. The gamma reference voltage VGREF has a value corresponding to a level of the data signal DATA.

[0061] According to some example embodiments, the gamma reference voltage generator 400 may be located in the driving controller 200 or in the data driver 500 .

[0062] The data driver 500 receives the second control signal CONT2 and the data signal DATA from the driving controller 200, and receives the gamma reference voltage VGREF from the gamma reference voltage generator 400. The data driver 500 converts the data signal DATA into a data voltage of an analog type using the gamma reference voltage VGREF. The data driver 500 outputs the data voltage to the data line DL.

[0063] The emission driver 600 generates an emission signal to drive the emission line EL in response to the fourth control signal CONT4 received from the driving controller 200. The emission driver 600 may output the emission signal to the emission line EL.

[0064] Figure 2 It is shown Figure 1 1 is a circuit diagram of a pixel of the display panel 100. Figure 3 is shown applied to Figure 2 Timing diagram of the pixel input signal.

[0065] Reference Figures 1 to 3 The display panel 100 includes a plurality of pixels. Each pixel includes an organic light emitting element OLED.

[0066] The pixel receives data write gate signals GWP and GWN, data initialization gate signal GI, organic light emitting element initialization gate signal GB, data voltage VDATA and emission signal EM, and the organic light emitting element OLED of the pixel emits light corresponding to the level of data voltage VDATA to display an image.

[0067] According to some example embodiments, a pixel may include a first type of switching element and a second type of switching element different from the first type. For example, the first type of switching element may be a polysilicon thin film transistor. For example, the first type of switching element may be a low temperature polysilicon (LTPS) thin film transistor. For example, the second type of switching element may be an oxide thin film transistor. For example, the first type of switching element may be a P-type transistor, and the second type of switching element may be an N-type transistor.

[0068] For example, the data write gate signal may include a first data write gate signal GWP and a second data write gate signal GWN. The first data write gate signal GWP may be applied to a P-type transistor so that the first data write gate signal GWP has a valid signal at a low level corresponding to the data write timing. The second data write gate signal GWN may be applied to an N-type transistor so that the second data write gate signal GWN has a valid signal at a high level corresponding to the data write timing.

[0069] At least one of the pixels may include first to seventh pixel switching elements T1 to T7 , a storage capacitor CST, and an organic light emitting element OLED.

[0070] The first pixel switching element T1 includes a control electrode connected to the first node N1, an input electrode connected to the second node N2, and an output electrode connected to the third node N3.

[0071] For example, the first pixel switch element T1 may be a polysilicon thin film transistor. For example, the first pixel switch element T1 may be a P-type thin film transistor. The control electrode of the first pixel switch element T1 may be a gate electrode, the input electrode of the first pixel switch element T1 may be a source electrode, and the output electrode of the first pixel switch element T1 may be a drain electrode.

[0072] The second pixel switching element T2 includes a control electrode to which the first data write gate signal GWP is applied, an input electrode to which the data voltage VDATA is applied, and an output electrode connected to the second node N2.

[0073] For example, the second pixel switch element T2 may be a polysilicon thin film transistor. For example, the second pixel switch element T2 may be a P-type thin film transistor. The control electrode of the second pixel switch element T2 may be a gate electrode, the input electrode of the second pixel switch element T2 may be a source electrode, and the output electrode of the second pixel switch element T2 may be a drain electrode.

[0074] The third pixel switching element T3 includes a control electrode to which the second data write gate signal GWN is applied, an input electrode connected to the first node N1, and an output electrode connected to the third node N3.

[0075] For example, the third pixel switch element T3 may be an oxide thin film transistor. For example, the third pixel switch element T3 may be an N-type thin film transistor. The control electrode of the third pixel switch element T3 may be a gate electrode, the input electrode of the third pixel switch element T3 may be a source electrode, and the output electrode of the third pixel switch element T3 may be a drain electrode.

[0076] The fourth pixel switching element T4 includes a control electrode to which the data initialization gate signal GI is applied, an input electrode to which the initialization voltage VI is applied, and an output electrode connected to the first node N1.

[0077] For example, the fourth pixel switch element T4 may be an oxide thin film transistor. For example, the fourth pixel switch element T4 may be an N-type thin film transistor. The control electrode of the fourth pixel switch element T4 may be a gate electrode, the input electrode of the fourth pixel switch element T4 may be a source electrode, and the output electrode of the fourth pixel switch element T4 may be a drain electrode.

[0078] The fifth pixel switching element T5 includes a control electrode to which the emission signal EM is applied, an input electrode to which the high power voltage ELVDD is applied, and an output electrode connected to the second node N2.

[0079] For example, the fifth pixel switch element T5 may be a polysilicon thin film transistor. For example, the fifth pixel switch element T5 may be a P-type thin film transistor. The control electrode of the fifth pixel switch element T5 may be a gate electrode, the input electrode of the fifth pixel switch element T5 may be a source electrode, and the output electrode of the fifth pixel switch element T5 may be a drain electrode.

[0080] The sixth pixel switching element T6 includes a control electrode to which the emission signal EM is applied, an input electrode connected to the third node N3, and an output electrode connected to the anode electrode of the organic light emitting element OLED.

[0081] For example, the sixth pixel switch element T6 may be a polysilicon thin film transistor. For example, the sixth pixel switch element T6 may be a P-type thin film transistor. The control electrode of the sixth pixel switch element T6 may be a gate electrode, the input electrode of the sixth pixel switch element T6 may be a source electrode, and the output electrode of the sixth pixel switch element T6 may be a drain electrode.

[0082] The seventh pixel switching element T7 includes a control electrode to which the organic light emitting element initialization gate signal GB is applied, an input electrode to which the initialization voltage V1 is applied, and an output electrode connected to the anode electrode of the organic light emitting element OLED.

[0083] For example, the seventh pixel switch element T7 may be an oxide thin film transistor. For example, the seventh pixel switch element T7 may be an N-type thin film transistor. The control electrode of the seventh pixel switch element T7 may be a gate electrode, the input electrode of the seventh pixel switch element T7 may be a source electrode, and the output electrode of the seventh pixel switch element T7 may be a drain electrode.

[0084] The storage capacitor CST includes a first electrode to which the high power voltage ELVDD is applied and a second electrode connected to the first node N1.

[0085] The organic light emitting element OLED includes an anode electrode and a cathode electrode to which a low power voltage ELVSS is applied.

[0086] exist Figure 3 During the first duration DU1, in response to the data initialization gate signal GI, the first node N1 and the storage capacitor CST are initialized. During the second duration DU2, in response to the first data write gate signal GWP and the second data write gate signal GWN, the absolute value |VTH| of the threshold voltage VTH of the first pixel switch element T1 is compensated, and the data voltage VDATA to which the absolute value |VTH| of the threshold voltage VTH is compensated is written to the first node N1. During the third duration DU3, in response to the organic light emitting element initialization gate signal GB, the anode electrode of the organic light emitting element OLED is initialized. During the fourth duration DU4, the organic light emitting element OLED emits light in response to the emission signal EM, so that the display panel 100 displays an image.

[0087] Although according to some example embodiments, the emission off duration of the emission signal EM corresponds to the first to third durations DU1 to DU3, embodiments of the inventive concept are not limited thereto. The emission off duration of the emission signal EM may be set to include the data write duration DU2 (i.e., the second duration DU2), and the emission off duration of the emission signal EM may be longer than the sum of the first to third durations DU1 to DU3.

[0088] During the first duration DU1, the data initialization gate signal GI may have an effective level. For example, the effective level of the data initialization gate signal GI may be a high level. When the data initialization gate signal GI has an effective level, the fourth pixel switching element T4 is turned on so that the initialization voltage VI may be applied to the first node N1. The data initialization gate signal GI[N] of the current stage may be generated based on the scan signal SCAN[N-1] of the previous stage.

[0089] During the second duration DU2, the first data write gate signal GWP and the second data write gate signal GWN may have an effective level. For example, the effective level of the first data write gate signal GWP may be a low level, and the effective level of the second data write gate signal GWN may be a high level. When the first data write gate signal GWP and the second data write gate signal GWN have an effective level, the second pixel switch element T2 and the third pixel switch element T3 are turned on. In addition, in response to the initialization voltage VI, the first pixel switch element T1 is turned on. The first data write gate signal GWP[N] of the current level may be generated based on the scan signal SCAN[N] of the current level. The second data write gate signal GWN[N] of the current level may be generated based on the scan signal SCAN[N] of the current level.

[0090] A voltage obtained by subtracting an absolute value |VTH| of a threshold voltage VTH of the first pixel switching element T1 from the data voltage VDATA may be charged at the first node N1 along a path generated by the first, second, and third pixel switching elements T1 , T2 , and T3 .

[0091] During the third duration DU3, the organic light emitting element initialization gate signal GB may have an effective level. For example, the effective level of the organic light emitting element initialization gate signal GB may be a high level. When the organic light emitting element initialization gate signal GB has an effective level, the seventh pixel switch element T7 is turned on, so that the initialization voltage V1 may be applied to the anode electrode of the organic light emitting element OLED. The organic light emitting element initialization gate signal GB[N] of the current stage may be generated based on the scan signal SCAN[N+1] of the next stage.

[0092] During the fourth duration DU4, the emission signal EM (e.g., the emission signal EM[N] of the current stage) may have an effective level. The effective level of the emission signal EM may be a low level. When the emission signal EM has an effective level, the fifth pixel switch element T5 and the sixth pixel switch element T6 are turned on. In addition, the first pixel switch element T1 is turned on by the data voltage VDATA.

[0093] The driving current flows through the fifth pixel switching element T5, the first pixel switching element T1, and the sixth pixel switching element T6 to drive the organic light emitting element OLED. The intensity of the driving current can be determined by the level of the data voltage VDATA. The brightness of the organic light emitting element OLED is determined by the intensity of the driving current. The driving current ISD flowing through the path from the input electrode to the output electrode of the first pixel switching element T1 is determined according to the following equation 1.

[0094] Equation 1

[0095]

[0096] In Equation 1, μ is the mobility of the first pixel switch element T1. Cox is the capacitance per unit area of ​​the first pixel switch element T1. W / L is the width-to-length ratio of the first pixel switch element T1. VSG is the voltage between the input electrode of the first pixel switch element T1 and the control electrode of the first pixel switch element T1. |VTH| is the absolute value of the threshold voltage VTH of the first pixel switch element T1.

[0097] The voltage VG of the first node N1 after compensation of the absolute value |VTH| of the threshold voltage VTH during the second duration DU2 may be expressed according to Equation 2 below.

[0098] Equation 2

[0099] VG=VDATA-|VTH|

[0100] When the organic light emitting element OLED emits light during the fourth duration DU4, the driving voltage VOV and the driving current ISD may be respectively expressed according to the following Equations 3 and 4. In Equation 3, VS is the voltage of the second node N2.

[0101] Equation 3

[0102] VOV=VS-VG-|VTH|=ELVDD-(VDATA-|VTH|)-|VTH|=ELVDD-VDATA

[0103] Equation 4

[0104]

[0105] The absolute value |VTH| of the threshold voltage VTH is compensated during the second duration DU2 so that when the organic light emitting element OLED emits light during the fourth duration DU4, the driving current ISD can be determined regardless of the absolute value |VTH| of the threshold voltage VTH of the first pixel switching element T1.

[0106] According to some example embodiments, when the image displayed on the display panel 100 is a static image or the display panel is operated in a normally-on mode, the driving frequency of the display panel 100 can be reduced to reduce power consumption. When all the switching elements of the pixels of the display panel 100 are polysilicon thin film transistors, flickering may occur due to leakage current of the pixel switching elements in a low-frequency driving mode. Therefore, some of the pixel switching elements may be designed using oxide thin film transistors. According to some example embodiments, the third pixel switching element T3, the fourth pixel switching element T4, and the seventh pixel switching element T7 may be oxide thin film transistors. The first pixel switching element T1, the second pixel switching element T2, the fifth pixel switching element T5, and the sixth pixel switching element T6 may be polysilicon thin film transistors.

[0107] Figure 4 is shown in low frequency drive mode applied to Figure 2 1 is a timing diagram of input signals to pixels of the display panel 100.

[0108] Reference Figures 1 to 4 The display panel 100 may be driven in a normal driving mode and in a low-frequency driving mode. In the normal driving mode, the display panel 100 is driven at a normal driving frequency. In the low-frequency driving mode, the display panel 100 is driven at a frequency lower than the normal driving frequency.

[0109] For example, when the input image data represents a video image, the display panel 100 may be driven in the normal driving mode. For example, when the input image data represents a static image, the display panel 100 may be driven in the low-frequency driving mode. For example, when the display device operates in the normally-on mode, the display panel 100 may be driven in the low-frequency driving mode.

[0110] The display panel 100 may be driven in units of frames. In the normal driving mode, the display panel 100 may be refreshed in each frame. Therefore, the normal driving mode includes only a writing frame in which data is written in pixels.

[0111] In the low frequency driving mode, the display panel 100 may be refreshed at the frequency of the low frequency driving mode. Therefore, the low frequency driving mode includes a writing frame in which data is written in pixels and a holding frame in which the written data is held without writing data in pixels.

[0112] For example, when the frequency of the normal driving mode is 60 Hz and the frequency of the low-frequency driving mode is 1 Hz, the low-frequency driving mode includes one write frame WRITE and fifty-nine hold frames HOLD in one second. For example, when the frequency of the normal driving mode is 60 Hz and the frequency of the low-frequency driving mode is 1 Hz, fifty-nine consecutive hold frames HOLD are located between two adjacent write frames WRITE.

[0113] For example, when the frequency of the normal driving mode is 60 Hz and the frequency of the low-frequency driving mode is 10 Hz, the low-frequency driving mode includes ten write frames WRITE and fifty hold frames HOLD in one second. For example, when the frequency of the normal driving mode is 60 Hz and the frequency of the low-frequency driving mode is 10 Hz, five consecutive hold frames HOLD are located between two adjacent write frames WRITE.

[0114] According to some example embodiments, in the low-frequency driving mode, the second data write gate signal GWN and the data initialization gate signal GI may have a first frequency. The first frequency may be the frequency of the low-frequency driving mode. Conversely, the first data write gate signal GWP, the emission signal EM, and the organic light emitting element initialization gate signal GB may have a second frequency greater than the first frequency. The second frequency may be a normal frequency of the normal driving mode. Figure 4 In the example, the first frequency is 1 Hz and the second frequency is 60 Hz.

[0115] The transmission signal EM in a frame may include a transmission-off duration OD when the transmission signal EM has an inactive level and a transmission-on duration OD when the transmission signal EM has an active level.

[0116] Figure 5 The figure shows that the low driving frequency is 1Hz. Figure 1 Flow chart of a method for displaying a display panel 100. Figure 6 The figure shows that the low driving frequency is 2Hz. Figure 1 Flow chart of a method for displaying a display panel 100.

[0117] Reference Figures 1 to 6 In the low-frequency driving mode, the driving controller 200 may determine a low driving frequency corresponding to the input image data IMG. The low driving frequency may be determined based on the degree of flicker.

[0118] For example, when flickering does not occur at a driving frequency of 1 Hz, the low driving frequency may be determined to be 1 Hz.

[0119] For example, when flickering occurs at a driving frequency of 1 Hz but does not occur at a driving frequency of 2 Hz, the low driving frequency may be determined to be 2 Hz.

[0120] The driving controller 200 may determine a plurality of compensation frequencies greater than the low driving frequency. The driving controller 200 inserts a plurality of compensation frequency frames having the compensation frequencies before a low driving frequency frame having the low driving frequency.

[0121] In the low-frequency driving mode, the second type of switching element can be driven at a low driving frequency. Conversely, the first type of switching element can be driven at a first driving frequency greater than the low driving frequency. The first driving frequency can be a normal driving frequency of the normal driving mode.

[0122] In the normal driving mode, both the first type switching element and the second type switching element may be driven at a normal driving frequency.

[0123] For example, when an image transition of the input image data IMG occurs from a first still image (still image A) to a second still image (still image B) different from the first still image (still image A), the driving controller 200 may insert a compensation frequency frame.

[0124] exist Figure 5 In the embodiment, the low driving frequency corresponding to the first static image (static image A) may be 1 Hz, and the low driving frequency corresponding to the second static image (static image B) may be 1 Hz.

[0125] For example, the first compensation frequency for compensating for flicker may be a normal driving frequency (e.g., 60 Hz). The normal driving frequency may represent the input frequency of the input image data IMG. After an image transition occurs from a first static image to a second static image different from the first static image, the display panel 100 may be driven at the first compensation frequency (e.g., 60 Hz).

[0126] The second compensation frequency (e.g., 30 Hz) for compensating for flicker may be smaller than the first compensation frequency (e.g., 60 Hz) of the second static image and greater than the low driving frequency (e.g., 1 Hz) of the second static image. After an image transition occurs from the first static image to the second static image and the display panel 100 is driven at the first compensation frequency (e.g., 60 Hz), the display panel 100 may be driven at the second compensation frequency (e.g., 30 Hz).

[0127] The compensation frequency after the second compensation frequency may be generated according to a predetermined rule. When the compensation frequency generated according to the predetermined rule is smaller than the low driving frequency (eg, 1 Hz), the compensation frequency may not be generated. Figure 5 In the embodiment of the present invention, the compensation frequency may be generated by dividing the previous compensation frequency by 2. After the display panel 100 is driven at the compensation frequency of 1.875 Hz, the subsequent candidate compensation frequency may be determined to be 0.9375 Hz. 0.9375 Hz is smaller than the low driving frequency (eg, 1 Hz), so 0.9375 Hz is not determined as the compensation frequency.

[0128] exist Figure 6In the embodiment, the low driving frequency corresponding to the first static image (static image A) may be 1 Hz, and the low driving frequency corresponding to the second static image (static image B) may be 2 Hz.

[0129] For example, the first compensation frequency for compensating for flicker may be a normal driving frequency (e.g., 60 Hz). The normal driving frequency may represent the input frequency of the input image data IMG. After an image transition occurs from a first static image to a second static image different from the first static image, the display panel 100 may be driven at the first compensation frequency (e.g., 60 Hz).

[0130] The second compensation frequency (e.g., 30 Hz) for compensating for flicker may be smaller than the first compensation frequency (e.g., 60 Hz) of the second static image and greater than the low driving frequency (e.g., 2 Hz) of the second static image. After an image transition occurs from the first static image to the second static image and the display panel 100 is driven at the first compensation frequency (e.g., 60 Hz), the display panel 100 may be driven at the second compensation frequency (e.g., 30 Hz).

[0131] The compensation frequency after the second compensation frequency may be generated according to a predetermined rule. When the compensation frequency generated according to the predetermined rule is smaller than the low driving frequency (eg, 1 Hz), the compensation frequency may not be generated. Figure 6 In the embodiment of the present invention, the compensation frequency may be generated by dividing the previous compensation frequency by 2. After the display panel 100 is driven at the compensation frequency of 3.75 Hz, the subsequent candidate compensation frequency may be determined to be 1.875 Hz. 1.875 Hz is smaller than the low driving frequency (eg, 2 Hz), so 1.875 Hz is not determined as the compensation frequency.

[0132] Figure 7 is shown for driving Figure 1 FIG. 1 is a table of compensation frequencies of the display panel 100 . Fig. 8A and Figure 8B Is shown driving Figure 1 Flow chart of a method for displaying a display panel 100. Fig. 9 It is shown Figure 1 1 is a timing diagram of a compensation frequency frame of the display panel 100.

[0133] Reference Figures 1 to 9 , the driving controller 200 may generate the compensation frequency by repeatedly dividing the normal driving frequency of the normal driving mode by the parameter.

[0134] exist Figure 7In the embodiment, the normal driving frequency may be 60 Hz, and the parameter may be 2. The first compensation frequency may be the normal driving frequency. The second compensation frequency may be 30 Hz generated by dividing the normal driving frequency by 2. The second compensation frequency (30 Hz) may be generated by inserting a hold frame between two adjacent write frames of the normal driving frequency (60 Hz). The third compensation frequency may be 15 Hz generated by dividing the second compensation frequency by 2. The third compensation frequency (15 Hz) may be generated by inserting three hold frames between two adjacent write frames of the normal driving frequency (60 Hz). The fourth compensation frequency may be 7.5 Hz generated by dividing the third compensation frequency by 2. The fourth compensation frequency (7.5 Hz) may be generated by inserting seven hold frames between two adjacent write frames of the normal driving frequency (60 Hz). The fifth compensation frequency may be 3.75 Hz generated by dividing the fourth compensation frequency by 2. The fifth compensation frequency (3.75 Hz) may be generated by inserting fifteen hold frames between two adjacent write frames of the normal driving frequency (60 Hz). The sixth compensation frequency may be 1.875 Hz generated by dividing the fifth compensation frequency by 2. The sixth compensation frequency (1.875 Hz) can be generated by inserting thirty-one hold frames between two adjacent write frames of the normal drive frequency (60 Hz). When the low drive frequency is 1 Hz, 0.9375 Hz determined by dividing the sixth compensation frequency by 2 is smaller than the low drive frequency of 1 Hz, so 0.9375 Hz is not determined as the compensation frequency.

[0135] Reference Fig. 8A and Figure 8B , the driving controller 200 receives input image data IMG (operation S10). The driving controller 200 determines whether the input image data IMG represents a still image or a video image (operation S20).

[0136] When the input image data IMG represents a video image, the driving controller 200 may drive the display panel 100 at a normal driving frequency (operation S30 ).

[0137] When the input image data IMG represents a static image, the drive controller 200 determines a low drive frequency corresponding to the input image data IMG (operation S40). The low drive frequency may be the minimum frequency at which flickering does not occur when displaying a static image. The low drive frequency may vary according to the input image data IMG. For example, the low drive frequency may be determined based on the difference between the brightness of the previous image data and the brightness of the current image data. For example, the low drive frequency may be determined based on the number of pixels whose grayscale values ​​change from the previous image data to the current image data.

[0138] After the low driving frequency is determined, the driving controller 200 drives the display panel 100 at the first compensation frequency (operation S50). The first compensation frequency may be a normal driving frequency. The normal driving frequency may be an input frequency of the input image data IMG. For example, in operation S50, a plurality of first compensation frequency frames (e.g., Fig. 9 of the three).

[0139] When the display panel 100 is driven at the first compensation frequency and image transition of the input image data IMG occurs (operation S60 ), the driving controller 200 may determine whether the transitioned input image data IMG represents a still image or a video image (operation S20 ).

[0140] When the display panel 100 is driven at the first compensation frequency and image transition of the input image data IMG does not occur, the driving controller 200 may generate the second compensation frequency by dividing the first compensation frequency by a parameter.

[0141] The driving controller 200 determines whether the second compensation frequency is equal to or less than the low driving frequency (operation S70). When the second compensation frequency is equal to or less than the low driving frequency, the display panel 100 is not driven at the second compensation frequency, but is driven at the low driving frequency (operation S80). When the display panel 100 is driven at the low driving frequency and an image transition of the input image data IMG occurs (operation S90), the driving controller 200 may determine whether the input image data IMG after the transition represents a static image or a video image (operation S20). When the display panel 100 is driven at the low driving frequency and an image transition of the input image data IMG does not occur, the display panel 100 may be driven at the low driving frequency.

[0142] When the second compensation frequency is greater than the low driving frequency, the driving controller 200 drives the display panel 100 at the second compensation frequency (operation S100). For example, a plurality of second compensation frequency frames (eg, Fig. 9 of the three).

[0143] When the display panel 100 is driven at the second compensation frequency and an image transition of the input image data IMG occurs (operation S110 ), the driving controller 200 may determine whether the transitioned input image data IMG represents a still image or a video image (operation S20 ).

[0144] When the display panel 100 is driven at the second compensation frequency and image transition of the input image data IMG does not occur, the driving controller 200 may generate a third compensation frequency by dividing the second compensation frequency by a parameter.

[0145] The driving controller 200 determines whether the third compensation frequency is equal to or less than the low driving frequency (operation S120). When the third compensation frequency is equal to or less than the low driving frequency, the display panel 100 is not driven at the third compensation frequency, but is driven at the low driving frequency (operation S80). When the display panel 100 is driven at the low driving frequency and an image transition of the input image data IMG occurs (operation S90), the driving controller 200 may determine whether the input image data IMG after the transition represents a static image or a video image (operation S20). When the display panel 100 is driven at the low driving frequency and an image transition of the input image data IMG does not occur, the display panel 100 may be driven at the low driving frequency.

[0146] When the third compensation frequency is greater than the low driving frequency, the driving controller 200 drives the display panel 100 at the third compensation frequency (operation S130). For example, in operation S130, a plurality of third compensation frequency frames (eg, Fig. 9 of the three).

[0147] When the display panel 100 is driven at the third compensation frequency and image transition of the input image data IMG occurs (operation S140), the driving controller 200 may determine whether the transitioned input image data IMG represents a still image or a video image (operation S20).

[0148] When the display panel 100 is driven at the third compensation frequency and image transition of the input image data IMG does not occur, the driving controller 200 may generate a fourth compensation frequency by dividing the third compensation frequency by a parameter.

[0149] The driving controller 200 operates operations S150 to S170 in the same manner as operations S120 to S140. The display panel 100 is repeatedly driven at the compensation frequency until a compensation frequency generated by dividing a previous compensation frequency by a parameter is equal to or less than the low driving frequency.

[0150] According to some example embodiments, a plurality of compensation frequency frames having each of the compensation frequencies may be inserted. For example, a plurality of first compensation frequency frames having a first compensation frequency may be inserted, and a plurality of second compensation frequency frames having a second compensation frequency may be inserted.

[0151] exist Fig. 9 In the embodiment, three first compensation frequency frames having a first compensation frequency (e.g., 60 Hz) are inserted, three second compensation frequency frames having a second compensation frequency (e.g., 30 Hz) are inserted, and three third compensation frequency frames having a third compensation frequency (e.g., 15 Hz) are inserted. Fig. 9The number of the first compensation frequency frame, the number of the second compensation frequency frame, and the number of the third compensation frequency frame are the same as each other, but the inventive concept is not limited thereto. Optionally, the number of the first compensation frequency frame may be larger than the number of the second compensation frequency frame, and the number of the second compensation frequency frame may be larger than the number of the third compensation frequency frame. The number of compensation frequency frames may be appropriately adjusted to effectively prevent flickering.

[0152] According to some example embodiments, in the low frequency driving mode, a plurality of compensation frequency frames may be inserted before the low driving frequency frame so that afterimage or flicker of a previous image due to hysteresis characteristics of a pixel switching element may be prevented.

[0153] Flickering of the display panel 100 is prevented in the low-frequency driving mode, so that power consumption of the display device can be reduced and display quality of the display panel 100 can be improved.

[0154] Fig.10 is a table showing compensation frequencies for driving the display panel 100 according to some example embodiments of the inventive concept. Fig.11 Is shown driving Fig.10 Flow chart of a method for displaying a display panel 100.

[0155] In addition to the method of determining the compensation frequency, the display device and the method of driving the display panel according to some example embodiments are similar to those of reference Figures 1 to 9 The display device and the method of driving the display panel of the previously explained exemplary embodiments are substantially the same. Therefore, the same reference numerals will be used to represent the same Figures 1 to 9 The same or identical parts as those described in the previous example embodiments may be used, and some repeated explanations about the above elements may be omitted.

[0156] Reference Figures 1 to 4 as well as Figures 9 to 11 The display device includes a display panel 100 and a display panel driver. The display panel driver includes a driving controller 200, a gate driver 300, a gamma reference voltage generator 400, a data driver 500, and an emission driver 600.

[0157] The display panel 100 includes a plurality of pixels, and each pixel includes an organic light emitting element OLED.

[0158] The pixel receives data write gate signals GWP and GWN, data initialization gate signal GI, organic light emitting element initialization gate signal GB, data voltage VDATA and emission signal EM, and the organic light emitting element OLED of the pixel emits light corresponding to the level of data voltage VDATA to display an image.

[0159] The display panel 100 may be driven in a normal driving mode in which the display panel 100 is driven at a normal driving frequency and in a low frequency driving mode in which the display panel 100 is driven at a frequency lower than the normal driving frequency.

[0160] In the low-frequency driving mode, the driving controller 200 may determine a low driving frequency corresponding to the input image data IMG. The driving controller 200 may determine a plurality of compensation frequencies greater than the low driving frequency. The driving controller 200 inserts a plurality of compensation frequency frames having the compensation frequency before the low driving frequency frame having the low driving frequency.

[0161] The driving controller 200 may generate the compensation frequency by repeatedly multiplying the low driving frequency by a parameter.

[0162] exist Fig. 9 In the embodiment of the present invention, the normal drive frequency can be 60 Hz, the low drive frequency can be 1 Hz, and the parameter can be 2. The sixth compensation frequency can be 2 Hz generated by multiplying the low drive frequency by 2. The sixth compensation frequency (2 Hz) can be generated by inserting twenty-nine hold frames between two adjacent write frames of the normal drive frequency (60 Hz). The fifth compensation frequency can be 4 Hz generated by multiplying the sixth compensation frequency by 2. The fifth compensation frequency (4 Hz) can be generated by inserting fourteen hold frames between two adjacent write frames of the normal drive frequency (60 Hz). The fourth compensation frequency can be 7.5 Hz, which is close to 8 Hz generated by multiplying the fifth compensation frequency by 2. 8 Hz cannot be obtained by inserting an integer number of hold frames between two adjacent write frames of the normal drive frequency (60 Hz), so the fourth compensation frequency can be 7.5 Hz, which is close to 8 Hz. The fourth compensation frequency (7.5 Hz) can be generated by inserting seven hold frames between two adjacent write frames of the normal drive frequency (60 Hz). The third compensation frequency can be 15 Hz generated by multiplying the fourth compensation frequency by 2. The third compensation frequency (15 Hz) may be generated by inserting three hold frames between two adjacent write frames of the normal drive frequency (60 Hz). The second compensation frequency may be 30 Hz generated by multiplying the third compensation frequency by 2. The second compensation frequency (30 Hz) may be generated by inserting a hold frame between two adjacent write frames of the normal drive frequency (60 Hz). The first compensation frequency may be 60 Hz generated by multiplying the second compensation frequency by 2. The first compensation frequency (60 Hz) may be the normal drive frequency (60 Hz). The subsequent candidate compensation frequency may be 120 Hz generated by multiplying the first compensation frequency by 2. 120 Hz is greater than the normal drive frequency, so 120 Hz is not determined as the compensation frequency.

[0163] Reference Fig.11, the driving controller 200 receives input image data IMG (operation S10). The driving controller 200 determines whether the input image data IMG represents a still image or a video image (operation S20).

[0164] When the input image data IMG represents a video image, the driving controller 200 may drive the display panel 100 at a normal driving frequency (operation S30 ).

[0165] When the input image data IMG represents a static image, the drive controller 200 determines a low driving frequency corresponding to the input image data IMG and generates a compensation frequency by multiplying the low driving frequency by a parameter (operation S40). The drive controller 200 can repeatedly generate a compensation frequency smaller than a normal driving frequency by multiplying the low driving frequency by a parameter.

[0166] After the low driving frequency and the compensation frequency are determined, the driving controller 200 drives the display panel 100 at the first compensation frequency (operation S50).

[0167] When the display panel 100 is driven at the first compensation frequency and image transition of the input image data IMG occurs (operation S60 ), the driving controller 200 may determine whether the transitioned input image data IMG represents a still image or a video image (operation S20 ).

[0168] When the display panel 100 is driven at the first compensation frequency and image transition of the input image data IMG does not occur, the driving controller 200 drives the display panel 100 at the second compensation frequency (operation S70 ).

[0169] When the display panel 100 is driven at the second compensation frequency and an image transition of the input image data IMG occurs (operation S80), the driving controller 200 may determine whether the transitioned input image data IMG represents a still image or a video image (operation S20).

[0170] When the display panel 100 is driven at the second compensation frequency and image transition of the input image data IMG does not occur, the driving controller 200 drives the display panel 100 at the third compensation frequency.

[0171] When the display panel 100 is driven at the third compensation frequency and an image transition of the input image data IMG occurs, the driving controller 200 may determine whether the transitioned input image data IMG represents a still image or a video image (operation S20 ).

[0172] The driving controller 200 repeats the operation of the compensation frequency driving in the same manner as operations S70 and S80. In the same manner, the driving controller 200 may drive the display panel 100 at the sixth compensation frequency (operation S90).

[0173] When the display panel 100 is driven at the sixth compensation frequency and image transition of the input image data IMG occurs (operation S100 ), the driving controller 200 may determine whether the transitioned input image data IMG represents a still image or a video image (operation S20 ).

[0174] When the display panel 100 is driven at the sixth compensation frequency and the image transition of the input image data IMG does not occur, the driving controller 200 drives the display panel 100 at a low driving frequency (operation S110 ).

[0175] When the display panel 100 is driven at a low driving frequency and an image transition of the input image data IMG occurs (operation S120), the driving controller 200 may determine whether the input image data IMG after the transition represents a static image or a video image (operation S20). When the display panel 100 is driven at a low driving frequency and an image transition of the input image data IMG does not occur, the display panel 100 is driven at a low driving frequency.

[0176] According to some example embodiments, in a low frequency driving mode, a plurality of compensation frequency frames may be inserted before a low driving frequency frame so that afterimage or flicker of a previous image due to hysteresis characteristics of a pixel switching element may be prevented or reduced.

[0177] In the low-frequency driving mode, flickering of the display panel 100 is prevented or reduced, so that power consumption of the display device can be reduced and display quality of the display panel 100 can be improved.

[0178] Fig.12 is a flowchart illustrating a method of driving the display panel 100 according to some example embodiments of the inventive concept when the low driving frequency is 1 Hz.

[0179] In addition to the method of determining the compensation frequency, the display device and the method of driving the display panel according to some example embodiments are similar to those of reference Figures 1 to 9 The display device and the method of driving the display panel of the previously explained exemplary embodiments are substantially the same. Therefore, the same reference numerals will be used to represent the same Figures 1 to 9 The same or identical parts as those described in the previous example embodiments may be used, and some repeated explanations about the above elements may be omitted.

[0180] Reference Figures 1 to 4 as well as Fig.12 The display device includes a display panel 100 and a display panel driver. The display panel driver includes a driving controller 200, a gate driver 300, a gamma reference voltage generator 400, a data driver 500, and an emission driver 600.

[0181] The display panel 100 includes a plurality of pixels, and each pixel includes an organic light emitting element OLED.

[0182] The pixel receives data write gate signals GWP and GWN, data initialization gate signal GI, organic light emitting element initialization gate signal GB, data voltage VDATA and emission signal EM, and the organic light emitting element OLED of the pixel emits light corresponding to the level of data voltage VDATA to display an image.

[0183] The display panel 100 may be driven in a normal driving mode in which the display panel 100 is driven at a normal driving frequency and in a low frequency driving mode in which the display panel 100 is driven at a frequency lower than the normal driving frequency.

[0184] In the low-frequency driving mode, the driving controller 200 may determine a low driving frequency corresponding to the input image data IMG. The driving controller 200 may determine a plurality of compensation frequencies greater than the low driving frequency. The driving controller 200 inserts a plurality of compensation frequency frames having the compensation frequency before the low driving frequency frame having the low driving frequency.

[0185] According to some example embodiments, the compensation frequency frame having at least two compensation frequencies may be repeatedly inserted until a predetermined count is satisfied.

[0186] For example, when the repeated compensation frequency frames are a 60 Hz compensation frequency frame and a 30 Hz compensation frequency frame and the predetermined count is 3, the compensation frequency frames may be inserted in the order of 60 Hz, 30 Hz, 60 Hz, 30 Hz, 60 Hz, 30 Hz, 15 Hz, 7.5 Hz, 3.75 Hz, and 1.875 Hz.

[0187] The repeated compensation frequency frame and the predetermined count may be set to prevent flickering of the display panel 100. The repeated compensation frequency frame and the predetermined count may be adjusted according to the input image data IMG.

[0188] According to some example embodiments, in the low frequency driving mode, a plurality of compensation frequency frames may be inserted before the low driving frequency frame so that afterimage or flicker of a previous image due to hysteresis characteristics of a pixel switching element may be prevented.

[0189] Flickering of the display panel 100 is prevented in the low-frequency driving mode, so that power consumption of the display device can be reduced and display quality of the display panel 100 can be improved.

[0190] Fig.13 is a flowchart illustrating a method of driving the display panel 100 according to some example embodiments of the inventive concept when the low driving frequency is 1 Hz.

[0191] In addition to the method of determining the compensation frequency, the display device and the method of driving the display panel according to the present exemplary embodiment are similar to those of the reference Figures 1 to 9 The display device and the method of driving the display panel of the previously explained exemplary embodiments are substantially the same. Therefore, the same reference numerals will be used to represent the same Figures 1 to 9 The same or identical parts as those described in the previous example embodiments may be used, and some repeated explanations about the above elements may be omitted.

[0192] Reference Figures 1 to 4 as well as Fig.13 The display device includes a display panel 100 and a display panel driver. The display panel driver includes a driving controller 200, a gate driver 300, a gamma reference voltage generator 400, a data driver 500, and an emission driver 600.

[0193] The display panel 100 includes a plurality of pixels, and each pixel includes an organic light emitting element OLED.

[0194] The pixel receives data write gate signals GWP and GWN, data initialization gate signal GI, organic light emitting element initialization gate signal GB, data voltage VDATA and emission signal EM, and the organic light emitting element OLED of the pixel emits light corresponding to the level of data voltage VDATA to display an image.

[0195] The display panel 100 may be driven in a normal driving mode in which the display panel 100 is driven at a normal driving frequency and in a low frequency driving mode in which the display panel 100 is driven at a frequency lower than the normal driving frequency.

[0196] In the low-frequency driving mode, the driving controller 200 may determine a low driving frequency corresponding to the input image data IMG. The driving controller 200 may determine a plurality of compensation frequencies greater than the low driving frequency. The driving controller 200 inserts a plurality of compensation frequency frames having the compensation frequency before the low driving frequency frame having the low driving frequency.

[0197] According to some example embodiments, a compensation frequency frame having at least two compensation frequencies may be repeatedly inserted until a condition (eg, a predetermined condition) is satisfied.

[0198] For example, when the repeated compensation frequency frames are a 60 Hz compensation frequency frame and a 30 Hz compensation frequency frame and a condition (e.g., a predetermined condition) is met in two repetitions, the compensation frequency frames may be inserted in the order of 60 Hz, 30 Hz, 60 Hz, 30 Hz, 15 Hz, 7.5 Hz, 3.75 Hz, and 1.875 Hz.

[0199] The repeated compensation frequency frame and conditions (eg, predetermined conditions) may be set to prevent flickering of the display panel 100. The repeated compensation frequency frame and conditions (eg, predetermined conditions) may be adjusted according to the input image data IMG.

[0200] According to some example embodiments, in the low frequency driving mode, a plurality of compensation frequency frames may be inserted before the low driving frequency frame so that afterimage or flicker of a previous image due to hysteresis characteristics of a pixel switching element may be prevented.

[0201] In the low-frequency driving mode, flickering of the display panel 100 is prevented or reduced, so that power consumption of the display device can be reduced and display quality of the display panel 100 can be improved.

[0202] Fig.14 is a circuit diagram illustrating pixels of the display panel 100 according to some example embodiments of the inventive concept. Fig.15 is shown applied to Fig.14 Timing diagram of the pixel input signal.

[0203] Except for the structure of the pixel, the display device and the method of driving the display panel according to the present exemplary embodiment are similar to those of the reference Figures 1 to 9 The display device and the method of driving the display panel of the previously explained exemplary embodiments are substantially the same. Therefore, the same reference numerals will be used to represent the same Figures 1 to 9 The same or identical parts as those described in the previous example embodiments may be used, and some repeated explanations about the above elements may be omitted.

[0204] Reference Figure 1 , Figures 4 to 9 , Fig.14 and Fig.15 The display device includes a display panel 100 and a display panel driver. The display panel driver includes a driving controller 200, a gate driver 300, a gamma reference voltage generator 400, a data driver 500, and an emission driver 600.

[0205] The display panel 100 includes a plurality of pixels, and each pixel includes an organic light emitting element OLED.

[0206] The pixel receives data write gate signals GWP and GWN, data initialization gate signal GI, organic light emitting element initialization gate signal GB, data voltage VDATA and emission signal EM, and the organic light emitting element OLED of the pixel emits light corresponding to the level of data voltage VDATA to display an image.

[0207] According to some example embodiments, a pixel may include a first type of switching element and a second type of switching element different from the first type. For example, the first type of switching element may be a polysilicon thin film transistor. For example, the first type of switching element may be a low temperature polysilicon (LTPS) thin film transistor. For example, the second type of switching element may be an oxide thin film transistor. For example, the first type of switching element may be a P-type transistor, and the second type of switching element may be an N-type transistor.

[0208] At least one of the pixels may include first to seventh pixel switching elements T1 to T7 , a storage capacitor CST, and an organic light emitting element OLED.

[0209] According to some example embodiments, the seventh pixel switching element T7 includes a control electrode to which the organic light emitting element initialization gate signal GB is applied, an input electrode to which the initialization voltage V1 is applied, and an output electrode connected to the anode electrode of the organic light emitting element OLED.

[0210] For example, the seventh pixel switch element T7 may be a polysilicon thin film transistor. For example, the seventh pixel switch element T7 may be a P-type thin film transistor.

[0211] exist Fig.15 During the first duration DU1, in response to the data initialization gate signal GI, the first node N1 and the storage capacitor CST are initialized. During the second duration DU2, in response to the first data write gate signal GWP and the second data write gate signal GWN, the absolute value |VTH| of the threshold voltage VTH of the first pixel switch element T1 is compensated, and the data voltage VDATA to which the absolute value |VTH| of the threshold voltage VTH is compensated is written to the first node N1. During the third duration DU3, in response to the organic light emitting element initialization gate signal GB, the anode electrode of the organic light emitting element OLED is initialized. During the fourth duration DU4, the organic light emitting element OLED emits light in response to the emission signal EM, so that the display panel 100 displays an image.

[0212] According to some example embodiments, an active level of the organic light emitting element initialization gate signal GB may be a low level.

[0213] According to some example embodiments, some of the pixel switching elements may be designed using oxide thin film transistors. According to some example embodiments, the third pixel switching element T3 and the fourth pixel switching element T4 may be oxide thin film transistors. The first pixel switching element T1, the second pixel switching element T2, the fifth pixel switching element T5, the sixth pixel switching element T6, and the seventh pixel switching element T7 may be polysilicon thin film transistors.

[0214] The display panel 100 may be driven in a normal driving mode in which the display panel 100 is driven at a normal driving frequency and in a low frequency driving mode in which the display panel 100 is driven at a frequency lower than the normal driving frequency.

[0215] In the low-frequency driving mode, the driving controller 200 may determine a low driving frequency corresponding to the input image data IMG. The driving controller 200 may determine a plurality of compensation frequencies greater than the low driving frequency. The driving controller 200 inserts a plurality of compensation frequency frames having the compensation frequency before the low driving frequency frame having the low driving frequency.

[0216] According to some example embodiments, in the low frequency driving mode, a plurality of compensation frequency frames may be inserted before the low driving frequency frame so that afterimage or flicker of a previous image due to hysteresis characteristics of a pixel switching element may be prevented.

[0217] In the low-frequency driving mode, flickering of the display panel 100 is prevented or reduced, so that power consumption of the display device can be reduced and display quality of the display panel 100 can be improved.

[0218] According to some example embodiments of the inventive concept as explained above, power consumption of a display device may be reduced, and display quality of a display panel may be improved.

[0219] The foregoing is an illustration of the inventive concept and should not be construed as limiting it. Although some example embodiments of the inventive concept have been described, it will be readily understood by those skilled in the art that many modifications in the example embodiments are possible without substantially departing from the novel teachings and aspects of the inventive concept. Therefore, all such modifications are intended to be included within the scope of the inventive concept as defined in the claims. In the claims, the method-plus-function statement is intended to cover the structure described herein when performing the function, and not only structural equivalents but also equivalent structures are covered. Therefore, it will be understood that the foregoing is an illustration of the inventive concept and is not to be construed as being limited to the specific example embodiments disclosed, and modifications to the disclosed example embodiments and other example embodiments are intended to be included within the scope of the appended claims. The inventive concept is defined by the claims and the equivalents of the claims included therein.

Claims

1. A display device, comprising: A display panel comprising pixels, the pixels comprising a first type of switching element and a second type of switching element different from the first type; A gate driver configured to output a gate signal to the display panel; a data driver configured to output a data voltage to the display panel; an emission driver configured to output an emission signal to the display panel; as well as A drive controller is configured to: determine a low drive frequency corresponding to input image data, wherein the low drive frequency is a minimum frequency at which flickering does not occur when a static image is displayed on the display panel; determine a plurality of compensation frequencies greater than the low drive frequency; and in a low-frequency drive mode, insert a plurality of compensation frequency frames having the plurality of compensation frequencies before a low drive frequency frame having the low drive frequency.

2. The display device according to claim 1, wherein: In the low-frequency driving mode, the switching elements of the second type are configured to be driven at the low driving frequency, and the switching elements of the first type are configured to be driven at a first driving frequency greater than the low driving frequency.

3. The display device according to claim 2, wherein: In a normal driving mode, the switching elements of the first type and the switching elements of the second type are configured to be driven at a normal driving frequency.

4. The display device according to claim 3, wherein: The first driving frequency is the normal driving frequency.

5. The display device according to claim 1, wherein: The drive controller is configured to determine a first compensation frequency and a second compensation frequency, Wherein, the first compensation frequency is the normal driving frequency of the normal driving mode, and The second compensation frequency is smaller than the normal driving frequency and larger than the low driving frequency.

6. The display device according to claim 1, wherein: The drive controller is configured to determine a first compensation frequency and a second compensation frequency that is smaller than the first compensation frequency, and Wherein, a first compensation frequency frame having the first compensation frequency is inserted before a second compensation frequency frame having the second compensation frequency.

7. The display device according to claim 1, wherein: The drive controller is configured to determine a first compensation frequency and a second compensation frequency that is smaller than the first compensation frequency, wherein a plurality of first compensation frequency frames having the first compensation frequency are inserted, and Wherein, a plurality of second compensation frequency frames having the second compensation frequency are inserted.

8. The display device according to claim 1, wherein: The plurality of compensation frequency frames having at least two compensation frequencies are repeatedly inserted until a predetermined count is satisfied.

9. The display device according to claim 1, wherein: The plurality of compensation frequency frames having at least two compensation frequencies are repeatedly inserted until a predetermined condition is satisfied.

10. The display device according to claim 1, wherein: The driving controller is configured to insert the plurality of compensation frequency frames when an image transition of the input image data occurs from a first static image to a second static image different from the first static image.

11. The display device according to claim 1, wherein: The driving controller is configured to generate the plurality of compensation frequencies by repeatedly dividing a normal driving frequency of a normal driving mode by a parameter.

12. The display device according to claim 11, wherein: The driving controller is configured to determine the normal driving frequency as a first compensation frequency, wherein the driving controller is configured to determine a second compensation frequency by dividing the normal driving frequency by the parameter, and drive the display panel at the second compensation frequency when the second compensation frequency is greater than the low driving frequency, and The driving controller is configured to determine a third compensation frequency by dividing the second compensation frequency by the parameter, and drive the display panel at the third compensation frequency when the third compensation frequency is greater than the low driving frequency.

13. The display device according to claim 1, wherein: The drive controller is configured to generate the plurality of compensation frequencies by repeatedly multiplying the low drive frequency by a parameter.

14. The display device according to claim 13, wherein: When the Nth compensation frequency is lower than the normal driving frequency of the normal driving mode, the driving controller is configured to determine the Nth compensation frequency by multiplying the low driving frequency by the parameter, wherein the driving controller is configured to determine an N-1th compensation frequency by multiplying the N-1th compensation frequency by the parameter, and drive the display panel at the N-1th compensation frequency when the N-1th compensation frequency is smaller than the normal driving frequency, and Here, N is a natural number equal to or greater than 2.

15. The display device according to claim 1, wherein: The switching element of the first type is a polysilicon thin film transistor, and Wherein, the second type of switching element is an oxide thin film transistor.

16. The display device according to claim 15, wherein: The switching element of the first type is a P-type transistor, and Wherein, the second type of switch element is an N-type transistor.

17. The display device according to claim 15, wherein: The pixels include: A first pixel switching element including a control electrode connected to the first node, an input electrode connected to the second node, and an output electrode connected to the third node; a second pixel switching element, comprising a control electrode configured to receive a first data write gate signal, an input electrode configured to receive the data voltage, and an output electrode connected to the second node; a third pixel switching element, comprising a control electrode configured to receive a second data write gate signal, an input electrode connected to the first node, and an output electrode connected to the third node; a fourth pixel switching element, comprising a control electrode configured to receive a data initialization gate signal, an input electrode configured to receive an initialization voltage, and an output electrode connected to the first node; a fifth pixel switching element, comprising a control electrode configured to receive the emission signal, an input electrode configured to receive a high power supply voltage, and an output electrode connected to the second node; a sixth pixel switching element, comprising a control electrode configured to receive the emission signal, an input electrode connected to the third node, and an output electrode connected to the anode electrode of the organic light emitting element; a seventh pixel switching element, comprising a control electrode configured to receive an organic light emitting element initialization gate signal, an input electrode configured to receive the initialization voltage, and an output electrode connected to the anode electrode of the organic light emitting element; a storage capacitor including a first electrode configured to receive the high power supply voltage and a second electrode connected to the first node; and The organic light emitting element includes the anode electrode connected to the output electrode of the sixth pixel switching element and a cathode electrode configured to receive a low power supply voltage.

18. The display device according to claim 17, wherein: The first pixel switching element, the second pixel switching element, the fifth pixel switching element and the sixth pixel switching element are polysilicon thin film transistors, and Wherein, the third pixel switching element, the fourth pixel switching element and the seventh pixel switching element are oxide thin film transistors.

19. The display device according to claim 17, wherein: The first pixel switching element, the second pixel switching element, the fifth pixel switching element, the sixth pixel switching element and the seventh pixel switching element are polysilicon thin film transistors, and Wherein, the third pixel switching element and the fourth pixel switching element are the oxide thin film transistors.

20. A method for driving a display panel, the method comprising: determining a low driving frequency corresponding to input image data in a low-frequency driving mode, wherein the low driving frequency is a minimum frequency at which no flickering occurs when a static image is displayed on the display panel; determining a plurality of compensation frequencies greater than the low driving frequency in the low-frequency driving mode; outputting a gate signal to the display panel including a pixel based on the low driving frequency and the plurality of compensation frequencies, the pixel including a switching element of a first type and a switching element of a second type different from the first type; outputting a data voltage to the display panel; and outputting a transmission signal to the display panel, Wherein, in the low-frequency driving mode, a plurality of compensation frequency frames having the plurality of compensation frequencies are inserted before a low driving frequency frame having the low driving frequency.

Citation Information

Patent Citations

  • Display apparatus and display apparatus control method

    CN104143322A

  • Organic light emitting display

    CN107799068A

  • Pixel, pixel driving method, and display device using the same

    US20150049126A1