Light emitting diode display device

Abstract

A light-emitting diode display device is proposed. The light-emitting diode display device includes a plurality of display pixels and a driving circuit. The display pixels of the Nth level perform data writing according to a corresponding first gate driving signal, and light up the corresponding light-emitting diode according to an Nth level ramp control signal and an Nth level laser signal, wherein the first gate driving signal has a first operating frequency, and the Nth level ramp control signal and the Nth level laser signal have a second operating frequency, wherein the first operating frequency is lower than the second operating frequency, and N is a positive integer; the driving circuit is coupled to the display pixels to provide the first gate driving signal, the Nth level ramp control signal, and the Nth level laser signal.

Description

[0001] This application is a divisional application. The application number of the parent application is 202110126687.3. The applicant is AU Optronics Corporation. The application date is January 29, 2021. The name of the invention is Light-emitting diode display device and laser control method thereof. Technical Field

[0002] The present invention relates to a light emitting diode display device and a laser control method thereof, and in particular to a light emitting diode display device and a laser control method thereof which can be applied to dynamically adjust the image frame frequency. Background Art

[0003] In existing display devices, when some applications (such as game programs) are executed, the number of game screens output by the display card is not synchronized with the scanning frequency of the display device, so broken or torn screens will appear. In order to solve this problem, the display device of the prior art has proposed a vertical synchronization function. However, after the vertical synchronization function is turned on, since the display device still maintains a fixed frequency operation, it is easy to cause the problem of display screen delay. In order to solve this problem, some display card manufacturers have proposed a variety of synchronization technologies to make the game screen look smoother. However, no matter what kind of synchronization technology is used, the display device reduces its image frame frequency to complete the synchronization action. This practice will cause uneven display brightness and / or screen flickering in a pulse-driven light-emitting diode display device under the operation of a dynamic update frequency (variable refresh rate). Summary of the invention

[0004] The invention provides a light emitting diode display device and a laser control method thereof, which can maintain the display quality when the image frame frequency is dynamically adjusted.

[0005] The present invention further provides a light emitting diode display device, which can reduce the image flickering phenomenon while maintaining the light emitting efficiency.

[0006] The light-emitting diode display device of the present invention includes a timing controller, a plurality of display pixels and a scanning circuit. A plurality of display rows are formed. The scanning circuit generates a plurality of scanning signals and a plurality of laser signals to drive the display rows respectively. In the first data writing time interval in the first image frame cycle, the timing controller provides a plurality of write data to be written to the display rows respectively. In the laser time interval after the first data writing time interval and before the end of the second data writing time interval in the second image frame cycle, the scanning circuit causes each laser signal to periodically generate a plurality of pulses according to a set cycle to drive each corresponding display row to emit light according to the corresponding write data.

[0007] The laser control method of the present invention is applicable to a light-emitting diode display device. The laser control method comprises: generating a plurality of scanning signals and a plurality of laser signals to respectively drive a plurality of display rows formed by a plurality of display pixels; providing a plurality of first write data to be respectively written to the display rows in a first data write time interval in a first image frame cycle; and, in a laser time interval after the first data write time interval and before the end of a second data write time interval in a second image frame cycle, causing each laser signal to periodically generate a plurality of pulses according to a set cycle to drive each corresponding display row to emit light according to each corresponding write data.

[0008] Another light-emitting diode display device of the present invention includes a plurality of display pixels and a driving circuit. The display pixels of the Nth level perform data writing according to the corresponding first gate driving signal, and light up the corresponding light-emitting diode according to the Nth level ramp control signal and the Nth level laser signal. The first gate driving signal has a first operating frequency, and the Nth level ramp control signal and the Nth level laser signal have a second operating frequency, wherein the first operating frequency is lower than the second operating frequency, and N is a positive integer.

[0009] Based on the above, the present invention uses a laser time interval between two adjacent image frame cycles to periodically generate multiple pulses according to a set period, and thereby drives the corresponding display rows to emit light according to the corresponding written data. In this way, when the image frame frequency is dynamically adjusted, the display screen will not produce flickering, tearing, etc. due to the change of the image frame frequency, effectively improving the display quality. In addition, the embodiment of the present invention reduces the possibility of flickering of the displayed image by making the operating frequency of the ramp control signal and the laser signal higher than the operating frequency of the first gate drive signal as the basis for the data writing operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 A schematic diagram of a light emitting diode display device according to an embodiment of the present invention is shown.

[0011] Figure 2 A schematic diagram illustrating an implementation of a display pixel according to an embodiment of the present invention is shown.

[0012] Figures 3 to 7 Waveform diagrams of multiple implementations of the light emitting diode display device according to the embodiment of the present invention are shown.

[0013] Figure 8 A flow chart of a laser control method according to an embodiment of the present invention is shown.

[0014] Fig. 9 A schematic diagram of a light emitting diode display device according to another embodiment of the present invention is shown.

[0015] Fig.10 A schematic diagram is shown of another implementation of a pixel circuit of a light emitting diode display device according to an embodiment of the present invention.

[0016] Fig.11 FIG. 4 is a diagram showing an operation waveform of a pixel circuit according to an embodiment of the present invention.

[0017] Fig.12 A schematic diagram illustrating a driving timing sequence of a light emitting diode display device according to an embodiment of the present invention is shown.

[0018] Fig.13 A schematic diagram is shown of another implementation of a pixel circuit of a light emitting diode display device according to an embodiment of the present invention.

[0019] Fig.14A , 14B A waveform diagram illustrating an implementation of a laser operation of a light emitting diode display device according to an embodiment of the present invention is shown.

[0020] Wherein, the reference numerals are:

[0021] 100: Display device

[0022] 110: Timing controller

[0023] 120: Pixel array

[0024] 130: Scanning circuit

[0025] 140: Driver

[0026] ACT: Activity Zone

[0027] BLK: blank area

[0028] C1, C2: capacitors

[0029] D1: Time delay

[0030] DATA: Write data

[0031] DL1, DL2: Delay time interval

[0032] EM1~EMN: Laser signal

[0033] EMTP, EMTP', EMTP': laser time interval

[0034] FRN: First image frame cycle

[0035] FRN+1: Second image frame cycle

[0036] G(1)~G(N), GN: scanning signal

[0037] G-Sync: Synchronization signal

[0038] LED1, LED: light emitting diode

[0039] P11~PNM, 200: display pixels

[0040] PS1~PSA:Pulse

[0041] R1~RN: Display line

[0042] S810~S830: Steps

[0043] T1~T10: Transistor

[0044] TCMD: Timing Control Command

[0045] VDD: power supply voltage

[0046] Vini: initial voltage

[0047] VRR, VRR1: Dynamic cycle

[0048] VSS: Reference ground voltage

[0049] W: Set cycle

[0050] W', W'_A, W'_B: Period

[0051] WP1: First write time interval

[0052] WP2: Second writing time interval

[0053] 900: Light-emitting diode display device

[0054] 910, 1000, 1300: Display pixels

[0055] 920: Driving circuit

[0056] GATE1[n], GATE2[n], GATE3[n]: gate drive signals

[0057] TCS[n]: Nth level ramp control signal

[0058] EM[n]: Nth level laser signal

[0059] DATA[m]: write data

[0060] SW1~SW3:Switch

[0061] PPO_DC, AMP_DC: reference voltage

[0062] DWI: During

[0063] PDH, PDL: Cycle

[0064] V1, V2: voltage

[0065] PS1, PS11~PS12: Low pulse

[0066] G1~GA: Display line

[0067] SP1, SP2, SP3: Time interval

[0068] EMP1~EMP5: Laser time interval

[0069] TCS[1]~TCS[6]: Ramp control signal DETAILED DESCRIPTION

[0070] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments, but is not intended to limit the present invention.

[0071] Please refer to Figure 1 , Figure 1 A schematic diagram of a light emitting diode display device according to an embodiment of the present invention is shown. The display device 100 includes a timing controller 110, a pixel array 120, a scanning circuit 130, and a driver 140. The pixel array 120 is composed of a plurality of display pixels P11-PNM. The display pixels P11-PNM form a plurality of display rows R1-RN. The scanning circuit 130 is coupled to the timing controller 110 and the display rows R1-RN. The scanning circuit 130 can generate a plurality of scanning signals G(1)-G(N) and a plurality of laser signals EM1-EMN according to the timing control command TCMD transmitted by the timing controller 110. The scanning signals G(1)-G(N) and the plurality of laser signals EM1-EMN are respectively provided to the display rows R1-RN, and are used to drive the plurality of display pixels P11-PNM in the display rows R1-RN respectively.

[0072] On the other hand, the timing controller 110 is further coupled to the driver 140. The timing controller 110 can write the write data into the display pixels P11-PNM through the driver 140 in accordance with the enabled sequence of the scan signals G(1)-G(N). In one image frame cycle, the timing controller 110 can perform the write operation of the write data of the corresponding display pixel during the data write time interval.

[0073] In this embodiment, the display pixels P11-PNM are all light emitting diode display pixels. The hardware structure of each pixel can be found in Figure 2 FIG. 1 is a schematic diagram showing an implementation of a display pixel according to an embodiment of the present invention. Figure 2In the display pixel 200, transistors T1 to T5, a light emitting diode LED1 and a capacitor C1 are included. Transistor T2 is a driving transistor for providing a driving current to drive the light emitting diode LED1 to emit light. The first end of transistor T5 receives a power supply voltage VDD; the second end of transistor T5 is coupled to the first end of transistor T2; and the control end of transistor T5 receives a laser signal EMN. The second end of transistor T4 receives a reference ground voltage VSS; the second end of transistor T4 is coupled to the second end of transistor T2; and the control end of transistor T4 also receives the laser signal EMN. In addition, one end of transistor T1 receives write data DATA, and the other end of transistor T1 is coupled to the control end of transistor T2, and transistor T1 is controlled by a scan signal GN. One end of transistor T3 receives an initial voltage Vini, and the other end of transistor T3 is coupled to the first end of transistor T2, and transistor T3 is also controlled by a scan signal GN. Capacitor C1 is coupled between the first end and the control end of transistor T2.

[0074] In this embodiment, in the data writing time interval, transistors T1 and T3 are turned on (transistors T4 and T5 are turned off), and the write data DATA can be written into the capacitor C1. In the laser time interval, transistors T5 and T4 are turned on (transistors T1 and T3 are turned off), and transistor T2 can receive the power supply voltage VDD and generate a driving current according to the write data DATA stored in the capacitor C1, and drive the light emitting diode LED1 to emit light through the driving current.

[0075] The display pixel 200 may be used to implement Figure 1 Each display pixel P11-PNM in. In addition, Figure 1 Each display pixel P11-PNM in the embodiment is not limited to the display pixel 200. Any light emitting diode display pixel known to those skilled in the art can be applied to the present invention without any particular limitation.

[0076] Please refer again Figure 1 .exist Figure 1 In the embodiment of the present invention, the scanning circuit 130 can be constructed by using a gate driver circuit known to those skilled in the art, and the driver 140 can be constructed by using a source driver circuit known to those skilled in the art. The timing controller 110 can be constructed by a digital circuit. It is worth mentioning that the display device 100 of the embodiment of the present invention can be implemented in an application of a dynamic refresh rate, wherein the time lengths of two image frame periods adjacent in time can be the same or different.

[0077] Please refer to this synchronously Figure 1 as well as Figure 3 ,in Figure 3The waveform diagram of the light emitting diode display device of the embodiment of the present invention is shown. The display device 100 starts each image frame cycle according to the synchronization signal G-Sync. Taking the first image frame cycle FRN as an example, the first image frame cycle FRN can be divided into an active interval ACT and a blank interval BLK. In the present embodiment, corresponding to the display row R1, the scanning circuit 130 can provide a scanning signal G(1) and a laser signal EM1 to drive the display row R1. In the first image frame cycle FRN, between the positive pulse of the synchronization signal G-Sync and the enable pulse of the scanning signal G(1), it is the first write time interval WP1 for writing data of the display row R1. In the first write time interval WP1, the timing controller 110 can provide write data through the driver 140 to write to the multiple display pixels P11~P1M of the display row R1. The scanning circuit 130 can generate the first enable pulse of the scanning signal G(1) after the first write time interval WP1.

[0078] In the subsequent second image frame period FRN+1, between the positive pulse of the synchronization signal G-Sync and the positive pulse of the scanning signal G(1), there may be a second writing time interval WP2 for writing data of the display row R1. In the second writing time interval WP2, the timing controller 110 may execute the next writing operation of writing data to the plurality of display pixels P11 to P1M of the display row R1 through the driver 140.

[0079] Please note that the display device 100 of the embodiment of the present invention can define a laser time interval according to the time point after the first writing time interval WP1 in the first image frame period FRN and the time point at which the second writing time interval WP2 of the second image frame period FRN+1 ends. In the laser time interval EMTP, the scanning circuit 130 can generate a plurality of pulses PS1-PSA in the laser signal EM1 corresponding to the display row R1 according to a preset period W. In this embodiment, the time length of the laser time interval EMTP can be an integer multiple of the setting period W.

[0080] It should be noted that in the embodiment of the present invention, corresponding to each image frame period, the number of pulses of all laser signals EM1 to EM3 is the same, and corresponding to each image frame period, the set period W does not change.

[0081] Incidentally, corresponding to each image frame cycle, the multiple scanning signals G(1)-G(N) generated by the scanning circuit 130 have a time delay in sequence. Correspondingly, the multiple laser signals EM1-EMN generated by the scanning circuit 130 also have the same time delay D1 in sequence. In addition, the duty cycle of each laser signal EM1-EMN can be 50-50, or can be defined by the designer as other values ​​according to needs.

[0082] Please note that in this embodiment, the pulses PS1-PSA on the laser signal EM1 are evenly distributed in the first image frame period FRN which can be divided into an active interval ACT and a blank interval BLK. When the first image frame period FRN according to the embodiment of the present invention has a dynamically adjustable dynamic period VRR, the display pixels P11-PNM can be continuously lit and effectively maintain the display performance.

[0083] Please refer to the following synchronously Figure 1 and 4. Figure 4 FIG. 1 is a waveform diagram showing another embodiment of the light emitting diode display device according to the present invention. Figure 3 Different implementation methods, Figure 4 In the first image frame period FRN, the dynamic period VRR1 is Figure 3 The duration of the dynamic period VRR1 is shorter than that of the dynamic period VRR. Figure 4 In the embodiment of the present invention, the time length of the laser time interval EMTP corresponding to the first image frame period FRN cannot be equal to an integer multiple of the set period W based on which the laser signal EM1 generated by the scanning circuit 130 is generated. Therefore, the scanning circuit 130 can make the period of the first pulse SP1 of the laser signal EM1 (equal to the set period W) different from the period W' of the last pulse SPA. The period W' is less than the set period W.

[0084] Please refer to the synchronization Figure 1 and 5. Figure 5 A waveform diagram of another embodiment of the light emitting diode display device of the present invention is shown. Figure 4 In the implementation mode, corresponding to the first image frame period FRN, when the time length of the laser time interval cannot be equal to an integer multiple of the set period W based on which the laser signal EM1 generated by the scanning circuit 130 is based, the timing controller 110 in the embodiment of the present invention can set a delay time interval DL1 before the second data write time interval WP2 in the second image frame period FRN+1, and generate an increased time length of the laser time interval EMTP'.

[0085] In this embodiment, the length of the increased laser time interval EMTP′ may be equal to an integer multiple of the set period W.

[0086] Please refer to the following synchronously Figure 1 and 6. Figure 6 A waveform diagram of another embodiment of the light emitting diode display device of the present invention is shown. Figure 5 The implementation method, in Figure 6 In the embodiment, the timing controller 110 may set another delay time interval DL2 before the second data writing time interval WP2 in the second image frame period FRN+1, wherein the time length of the delay time interval DL2 is longer than the time length of the delay time interval DL1. Moreover, under such conditions, the time length of the laser time interval EMTP" generated in the present embodiment corresponding to the delay time interval DL2 is not necessarily equal to an integer multiple of the set period W.

[0087] Please refer to the synchronization Figure 1 and 7, Figure 7 FIG. 2 is a waveform diagram of another embodiment of the light emitting diode display device of the present invention. Figure 6 In an embodiment, when the time length of the laser time interval EMTP" is not equal to an integer multiple of the set period W, the scanning circuit 130 can distinguish the generated multiple laser signals EM1~EMN into at least one first laser signal and at least two second laser signals. In this embodiment, the laser signal EM1 can be distinguished as a first laser signal, and the laser signals EM2 and EM3 can be distinguished as second laser signals.

[0088] Please note that the last pulse PS1A of the laser signal EM1 classified as the first laser signal is set in the delay time interval DL2 corresponding to the first image frame period FRN, and does not overlap with the second data writing time interval WP2 in the second image frame period FRN+1. The last pulses PS2A and PS3A of the laser signals EM2 and EM3 classified as the second laser signal can be set outside the delay time interval DL2 corresponding to the first image frame period FRN, and at least partially overlap with the second data writing time interval WP2 in the second image frame period FRN+1. In this embodiment, the period W'_A of the last pulse PS1A of the laser signal EM1 corresponding to the first image frame period FRN can be greater than the period W'_B of the last pulse PS2A of the laser signal EM2.

[0089] Incidentally, in this embodiment, in the operation of distinguishing the laser signals EM1 to EMN, the number of first laser signals may be equal to the number of second laser signals, or the number of first laser signals may be different from the number of second laser signals, without any particular limitation.

[0090] Please refer to Figure 8 , Figure 8 A flow chart of a laser control method according to an embodiment of the present invention is shown. The laser control method of this embodiment is applicable to a light-emitting diode display device. In step S810, a plurality of scanning signals and a plurality of laser signals are generated to respectively drive a plurality of display rows formed by a plurality of display pixels. In step S820, in a first data writing time interval in a first image frame cycle, a plurality of first writing data are provided to be written to the display rows respectively. Furthermore, in a laser time interval after the first data writing time interval and before the end of the second data writing time interval in a second image frame cycle, each laser signal is periodically generated with a plurality of pulses according to a set period to drive each corresponding display row.

[0091] The implementation details of the above steps have been described in detail in the aforementioned embodiments and multiple implementations, and will not be elaborated here.

[0092] Please refer to the following Fig. 9 , Fig. 9 A schematic diagram of a light emitting diode display device according to another embodiment of the present invention is shown. The light emitting diode display device 900 includes a plurality of display pixels 910 and a driving circuit 920. In this embodiment, the pixel circuit 910 of the Nth level shown in the figure can receive the write data DATA[m] and perform a write operation according to the corresponding first gate driving signal GATE1[n]. The pixel circuit 910 can also light up the corresponding light emitting diode LED according to the Nth level ramp control signal TCS[n] and the Nth level laser signal EM[n]. In this embodiment, the first gate driving signal GATE1[n] has a first operating frequency, and the Nth level ramp control signal TCS[n] and the Nth level laser signal EM[n] have a second operating frequency, wherein the first operating frequency is lower than the second operating frequency, and the above-mentioned N can be any positive integer.

[0093] In detail, the pixel circuit 910 can receive the write data DATA[m] according to the first gate driving signal GATE1[n] with a relatively low operating frequency (first operating frequency), and the write data DATA[m] can be written to the driving transistor T1. Then, the transistor T1 in the pixel circuit 910 can be gradually turned on according to the Nth level ramp control signal TCS[n] with a relatively high operating frequency (second operating frequency), and the reference voltage PPO_DC can be provided to the control end of the driving transistor T3 through the switch SW1. At the same time, the switches SW1-SW3 in the pixel circuit 910 are turned on according to the Nth level laser signal EM[n] with a relatively high operating frequency. In this way, the driving transistor T3 can receive the power supply voltage VDD and couple to the light emitting diode LED. The driving transistor T3 can also provide a driving current to light up the light emitting diode LED. In this embodiment, the anode of the light emitting diode LED is coupled to the driving transistor T3 through the switch SW2 to receive the driving current, and the cathode of the light emitting diode LED is coupled to the reference ground voltage VSS. In this embodiment, the reference voltage PPO_DC may be a pulse width modulation pinch off voltage.

[0094] It is worth noting that, since the second operating frequency is higher than the first operating frequency, the pixel circuit 910 can perform multiple laser operations after a single data writing operation. In this way, under the premise of maintaining the light emitting efficiency of the light emitting diode LED, the flickering phenomenon of the display screen can be reduced, especially in the case of low brightness display.

[0095] Incidentally, the driving circuit 920 in this embodiment may be any form of gate driving circuit, such as a gate on array (GOA) circuit.

[0096] The following reference Fig.10 , Fig.10 A schematic diagram of another implementation of a pixel circuit of an LED display device according to an embodiment of the present invention is shown. Pixel circuit 1000 may be an N-th level pixel circuit in a LED display device. Pixel circuit 1000 includes transistors T1 to T8 and a capacitor C1. A first end of capacitor C1 receives an N-th level ramp control signal TCS[n], and a second end of capacitor C1 is coupled to a control end of transistor T1. A first end of transistor T2 receives a reference voltage PPO_DC, and a second end of transistor T2 is coupled to a first end of transistor T1, and a control end of transistor T2 receives an N-th level laser signal EM[n]. In addition, a second end of transistor T1 is coupled to a control end of transistor T3.

[0097] On the other hand, transistors T4, T3, and T5 are sequentially coupled in series between the power supply voltage VDD and the reference ground voltage VSS. The control terminals of transistors T4 and T5 both receive the Nth level laser signal EM[n]. Fig. 9 In the embodiment, transistors T2, T4, and T5 are respectively used to implement Fig. 9 Switches SW1, SW3, and SW2 in.

[0098] and Fig. 9 Differently, the pixel circuit 1000 in the present embodiment also receives a reset voltage RES_DC through a transistor T8. The transistor T8 is controlled by a second gate drive signal GATE2[n]. When the transistor T8 is turned on according to the second gate drive signal GATE2[n], the pixel circuit 1000 can perform a reset action according to the reset voltage RES_DC. In addition, the pixel circuit 1000 also receives a reference voltage AMP_DC and a third gate drive signal GATE3[n]. The pixel circuit 1000 can receive a reference voltage AMP_DC according to the third gate drive signal GATE3[n]. The reference voltage AMP_DC is used to adjust the current amplitude of the driving light emitting diode. In the present embodiment, the reference voltage AMP_DC can be equal to the write data DATA[m].

[0099] It is worth mentioning that the second gate drive signal GATE2[n] has a first operating frequency component and a second operating frequency component. That is, the second gate drive signal GATE2[n] can be a mixed frequency switching signal. In addition, the third gate drive signal GATE3[n] has the same second operating frequency as the Nth level laser signal EM[n] and the Nth level ramp control signal TCS[n].

[0100] Please refer to this synchronously Fig.10 as well as Fig.11 , Fig.11The operation waveform diagram of the pixel circuit of an embodiment of the present invention is shown. The first gate driving signal GATE1[n] is enabled (pulled down to a voltage value) during the period DWI when the writing action is performed, and the pixel circuit 1000 can perform the writing action of writing the data DATA[m]. After the period DWI, the third gate driving signal GATE3[n], the N-th level laser signal EM[n] and the N-th level ramp control signal TCS[n] are periodically enabled according to the period PDH, wherein the period PDH corresponds to the second operating frequency. Between two adjacent low pulses of the third gate driving signal GATE3[n], corresponding to the N-th level laser signal EM[n] being pulled down, the N-th level ramp control signal TCS[n] can drop from the first voltage V1 to the second voltage V2 according to the set slope in the time interval RP1. The N-th level ramp control signal TCS[n] can also be maintained equal to the second voltage V2 in the time interval RP2 corresponding to the N-th level laser signal EM[n] being pulled up.

[0101] It is worth mentioning that the second gate driving signal GATE2[n] is pulled low to generate a low pulse PS1 before the period DWI. After the period DWI, the second gate driving signal GATE2[n] generates a plurality of low pulses PS11-PS12 according to the second operating frequency. The low pulse PS1 of the second gate driving signal GATE2[n] has the first operating frequency.

[0102] In this embodiment, the second operating frequency may be an integer multiple of the first operating frequency. That is, during the period of the data writing action DWI and the period of the next data writing action, the Nth level ramp control signal TCS[n] and the Nth level laser signal EM[n] may have multiple complete cycles.

[0103] Please refer to the following Fig.12 , Fig.12 A schematic diagram illustrating the driving timing of the light-emitting diode display device according to an embodiment of the present invention is shown. In a light-emitting diode display device having a plurality of display rows G1 to GA, the corresponding pixel circuits are driven in sequence. Taking the display row G1 as an example, the pixel circuit on the display row G1 performs a data writing action in the time interval SP1, enables the third gate signal and the laser signal in sequence in the time intervals SP2 and SP3, and performs a reset action and a laser action respectively. Among them, the time interval SP1 has a relatively long period PDL. The period PDL corresponds to a relatively low-frequency first operating frequency. The time intervals SP2 and SP3 have a relatively short period PDH. The period PDH corresponds to a relatively high-frequency second operating frequency.

[0104] It is worth noting that when the pixel circuit is to drive the light emitting diode to emit a relatively high brightness, the length of time that the laser signal is enabled in the time interval SP3 can be lengthened. Conversely, when the pixel circuit is to drive the light emitting diode to emit a relatively low brightness, the length of time that the laser signal is enabled in the time interval SP3 can be shortened. In other words, by means of pulse width modulation, the light emitting diode can have a stable driving current value regardless of whether it is presented at low brightness or high brightness. Moreover, under any of the above conditions, the operating frequency of the laser signal does not need to be changed. Therefore, the embodiment of the present invention can improve the display quality through the low-flicker multiple pulse width modulation light-emitting driving mechanism.

[0105] Please refer to the following Fig.13 , Fig.13 A schematic diagram of another embodiment of a pixel circuit of a light-emitting diode display device according to an embodiment of the present invention is shown. The pixel circuit 1300 includes transistors T1 to T10 and capacitors C1 and C2. In the present embodiment, the capacitor C1 has a first end for receiving the Nth level ramp control signal TCS[n]. The transistor T1 has a control end coupled to the second end of the capacitor C1. The transistor T2 has a first end for receiving the reference voltage PPO_DC; the second end of the transistor T2 is coupled to the first end of the transistor T1; the control end of the transistor T2 receives the Nth level laser signal EM[n]. The transistor T3 has a control end coupled to the second end of the transistor T1. The transistor T4 has a first end for receiving the power supply voltage VDD; the second end of the transistor T4 is coupled to the first end of the transistor T3; the control end of the transistor T4 receives the Nth level laser signal EM[n]. The transistor T5 has a first end coupled to the second end of the transistor T3; the second end of the transistor T5 is coupled to the light-emitting diode LED; the control end of the transistor T5 receives the Nth level laser signal EM[n].

[0106] On the other hand, transistor T6 has a first terminal for receiving write data DATA[m]; a second terminal of transistor T6 is coupled to the first terminal of transistor T1; and a control terminal of transistor T6 receives a first gate drive signal GATE1[n]. Transistor T7 has a first terminal coupled to the second terminal of capacitor C1; a control terminal of transistor T7 receives the gate drive signal GATE1[n]; and a second terminal of transistor T7 is coupled to the control terminal of transistor T3. Transistor T8 has a first terminal for receiving a reset voltage RES_DC; a control terminal of transistor T8 receives a second gate drive signal GATE2[n]; and a second terminal of transistor T8 is coupled to the control terminal of transistor T3. Transistor T9 has a first terminal for coupling to the second terminal of transistor T8; a control terminal of transistor T9 receives a third gate drive signal GATE3[n]; and a second terminal of transistor T9 is coupled to the second terminal of transistor T3. The tenth transistor T10 has a first terminal coupled to the first terminal of transistor T3; a second terminal of transistor T10 receives a reference voltage AMP_DC; and a control terminal of transistor T10 receives a third gate drive signal GATE3[n]. The capacitor C2 has a first terminal receiving the power voltage VDD; the second terminal of the capacitor C2 is coupled to the control terminal of the transistor T3.

[0107] Regarding the operation details of the pixel circuit 1300 , before the writing operation, the transistor T8 can be turned on according to the second gate driving signal GATE2[n] being pulled low, and the reset operation is performed by transmitting the reset voltage RES_DC to the control terminal of the transistor T3 .

[0108] After the reset operation, transistors T6 and T7 can be turned on according to the first gate drive signal GATE1[n] during the write operation. Then, the second gate drive signal GATE2[n] and the third gate drive signal GATE3[n] can be pulled low in sequence. Correspondingly, transistor T8 can be turned on according to the second gate drive signal GATE2[n], and transistors T9 and T10 can be turned on according to the third gate drive signal GATE3[n].

[0109] Next, the Nth level laser signal EM[n] is pulled low, and transistors T2, T4, and T6 are all turned on. At the same time, the Nth level ramp control signal TCS[n] generates a falling ramp signal, and transistor T3 generates a driving current to drive the light emitting diode LED to emit light.

[0110] In this embodiment, in a complete frame rate, the first gate driving signal GATE1[n] is enabled only once, while the third gate driving signal GATE3[n], the Nth level laser signal EM[n] being pulled low, and the Nth level ramp control signal TCS[n] can be enabled multiple times to perform multiple laser actions. In addition, the light emitting brightness of the light emitting diode LED can be controlled by pulse width modulation according to the duty cycle of the Nth level laser signal EM[n] being pulled low and the Nth level ramp control signal TCS[n], so that high and low brightness adjustment actions can be performed while maintaining high light emitting efficiency of the light emitting diode LED.

[0111] Please refer to the following Fig.14A , 14B , Fig.14A , 14B A waveform diagram showing the implementation of the laser action of the light emitting diode display device according to the embodiment of the present invention is shown. Fig.14A In the embodiment, the laser signal is enabled in a plurality of consecutive laser time intervals EMP1 to EMP5, and five multiple laser actions are performed. The ramp control signals TCS[1] to TCS[6] provide continuous ramp signals in the laser time intervals EMP1 to EMP5. The ramp control signals TCS[1] to TCS[6] are used to drive pixel circuits of a plurality of levels respectively, wherein the activation time of TCS[1] to TCS[6] has a preset time shift.

[0112] exist Fig. 14B In the embodiment, the laser signal is enabled in a plurality of consecutive laser time intervals EMP1 to EMP3, and multiple laser actions are performed. The ramp control signals TCS[1] to TCS[6] provide continuous ramp signals in the laser time intervals EMP1 to EMP3. The ramp control signals TCS[1] to TCS[6] are used to drive the pixel circuits of a plurality of levels respectively, wherein the activation time of TCS[1] to TCS[6] has a preset time shift. In the present embodiment, Fig.13 The reference voltage AMP_DC received by the middle transistor T10 may be equal to the written data DATA[m]. In this way, the current value of the driving current output by the pixel circuit each time may be corrected to maintain the uniformity of the brightness.

[0113] In summary, the display device of the present invention, in a corresponding image frame cycle, after the data writing time interval, before the end of the data writing time interval in the next image frame cycle, allows the laser signal to generate pulses according to the set period, and allows the light-emitting diode of the display pixel to continuously laser. In this way, when the image frame cycle undergoes dynamic changes, the display pixel will not stop emitting light due to the need to wait for a new synchronization signal. The phenomenon of screen tearing and / or flickering is effectively reduced, and the display quality is improved. In addition, another display device of an embodiment of the present invention drives the light-emitting diode in a multiple pulse width modulation driving method through the combined action of a first gate control signal with a low operating frequency, a laser signal with a high operating frequency, and a ramp control signal, which can also effectively reduce the flickering phenomenon of the screen and improve the display quality.

[0114] Of course, the present invention may have many other embodiments. Without departing from the spirit and essence of the present invention, those skilled in the art may make various corresponding changes and modifications based on the present invention, but these corresponding changes and modifications should all fall within the scope of protection of the claims attached to the present invention.

Claims

1. A light emitting diode display device, characterized in that: include: A plurality of display pixels, wherein the display pixels of the Nth level perform data writing according to a corresponding first gate driving signal, and light up the corresponding light emitting diode according to an Nth level ramp control signal and an Nth level laser signal, the first gate driving signal has a first operating frequency, the Nth level ramp control signal and the Nth level laser signal have a second operating frequency, wherein the first operating frequency is lower than the second operating frequency, and N is a positive integer; and A driving circuit coupled to the display pixels for providing the first gate driving signal, the Nth level ramp control signal and the Nth level laser signal; Wherein, the pixel circuit of the Nth level includes: A first capacitor having a first end for receiving the Nth level ramp control signal; a first transistor having a control terminal coupled to the second terminal of the first capacitor; a second transistor having a first terminal for receiving a first reference voltage, a second terminal of the second transistor coupled to the first terminal of the first transistor, and a control terminal of the second transistor receiving the Nth level laser signal; a third transistor having a control terminal coupled to the second terminal of the first transistor; a fourth transistor having a first terminal receiving a power supply voltage, a second terminal of the fourth transistor coupled to the first terminal of the third transistor, and a control terminal of the fourth transistor receiving the N-th level laser signal; and A fifth transistor has a first end coupled to the second end of the third transistor, a second end of the fifth transistor coupled to the light emitting diode, and a control end of the fifth transistor receiving the Nth level laser signal.

2. The light emitting diode display device according to claim 1, characterized in that: The display pixels of the Nth stage further perform a reset operation according to a corresponding second gate driving signal, wherein the second gate driving signal has a component of the first operating frequency and a component of the second operating frequency.

3. The light emitting diode display device according to claim 2, characterized in that: The display pixels of the Nth stage further perform a compensation action according to a corresponding third gate driving signal, and the operating frequency of the third gate driving signal is equal to the second operating frequency.

4. The light emitting diode display device according to claim 3, characterized in that: The pixel circuit of the Nth stage further comprises: A sixth transistor having a first terminal for receiving write data, a second terminal of the sixth transistor coupled to the first terminal of the first transistor, and a control terminal of the sixth transistor for receiving the first gate drive signal; a seventh transistor, having a first end coupled to the second end of the first capacitor, a control end of the seventh transistor receiving the first gate driving signal, and a second end of the seventh transistor coupled to the control end of the third transistor; an eighth transistor having a first terminal for receiving a reset voltage, a control terminal of the eighth transistor receiving the second gate driving signal, and a second terminal of the eighth transistor coupled to the control terminal of the third transistor; and a ninth transistor having a first terminal coupled to the second terminal of the eighth transistor, a control terminal of the ninth transistor receiving the third gate driving signal, and a second terminal of the ninth transistor coupled to the second terminal of the third transistor; a tenth transistor having a first terminal coupled to the first terminal of the third transistor, a second terminal of the tenth transistor receiving a second reference voltage, and a control terminal of the tenth transistor receiving the third gate driving signal; and A second capacitor has a first terminal for receiving the power supply voltage, and a second terminal of the second capacitor is coupled to the control terminal of the third transistor.

5. The light emitting diode display device according to claim 1, characterized in that: When the N-th level laser signal is enabled, the N-th level ramp control signal decreases from a first voltage to a second voltage according to a set slope in a first time interval.

6. The light emitting diode display device according to claim 5, characterized in that: The Nth-order laser signal remains enabled in a second time interval, and the first time interval is equal to or shorter than the second time interval.

7. The light emitting diode display device according to claim 1, characterized in that: The second operating frequency is an integer multiple of the first operating frequency.

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