Display device including auxiliary pixels

Abstract

A display device is provided. The display device includes a substrate including a sensor area, a first non-display area at least partially surrounding the sensor area, and a display area at least partially surrounding the first non-display area. A plurality of auxiliary pixels are disposed in the sensor area. The plurality of auxiliary pixels are configured for passive matrix driving. A plurality of primary pixels are disposed in the display area and configured for active matrix driving.

Description

[0001] This application claims the benefit of and priority to Korean Patent Application No. 10-2019-0014441 filed on February 7, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] The present disclosure relates to a display device, and more particularly, to a display device including an auxiliary pixel. Background Art

[0003] Display devices are widely used in various electronic devices as a means of providing information and images to users. While traditionally available in rectangular form, modern display devices can have a variety of different shapes and sizes. Furthermore, while traditionally used solely for displaying images, modern display devices may include other input / output devices such as sensors. These sensors are typically located within the display device's border area, where images are not displayed.

[0004] As the size of the bezel area of modern display devices becomes smaller and smaller, sensors have been moved to the display area of the display device, where the sensor may appear within a cutout or notch in the display area where no image is displayed. The cutout or notch may be partially or completely surrounded by the display area of the display device. Summary of the Invention

[0005] One or more embodiments of the present inventive concept may include a display device having a display area and a sensor area. An image may be displayed in the display area. One or more sensors may be disposed in the sensor area. These sensors may be configured to provide additional functionality to the display device.

[0006] According to one or more embodiments of the present invention, a display device includes a substrate including a sensor area. A first non-display area surrounds the sensor area. A display area at least partially surrounds the first non-display area. A plurality of auxiliary pixels are disposed in the sensor area. The auxiliary pixels are configured to be driven by a passive matrix driver. A plurality of primary pixels are disposed in the display area. The primary pixels are configured to be driven by an active matrix driver. A plurality of auxiliary thin-film transistors are disposed in the first non-display area. The auxiliary thin-film transistors are configured to drive the plurality of auxiliary pixels.

[0007] The display device may further include a component arranged on a lower surface of the substrate such that the component corresponds to the sensor area.

[0008] The plurality of auxiliary pixels may be located in a region where a plurality of horizontal electrodes extending substantially in a first direction and a plurality of vertical electrodes extending substantially in a second direction crossing the first direction intersect each other.

[0009] Each of the plurality of main pixels may include at least one thin film transistor.

[0010] Each of the plurality of auxiliary pixels may include a horizontal electrode, a vertical electrode, and an intermediate layer disposed between the horizontal electrode and the vertical electrode. Each of the plurality of auxiliary thin film transistors may include a first auxiliary thin film transistor connected to the horizontal electrode and a second auxiliary thin film transistor connected to the vertical electrode.

[0011] Each of the plurality of main pixels may include a pixel electrode, an intermediate layer, and an opposing electrode. A source electrode or a drain electrode of the first auxiliary thin film transistor may be connected to the opposing electrode.

[0012] A gate electrode of the second auxiliary thin film transistor may be connected to a data line for transmitting a data signal to the plurality of main pixels.

[0013] A source electrode or a drain electrode of the second auxiliary thin film transistor may be connected to a driving voltage line located in the first non-display area.

[0014] The display device may further include a lower protective film disposed on a lower surface of the substrate, wherein the lower protective film may include an opening corresponding to the sensor area.

[0015] The display device may further include a plurality of lines extending from the display area, arranged in the first non-display area, and detouring along an edge of the sensor area.

[0016] Each of the plurality of lines may include a bent portion in the first non-display area.

[0017] A size of a light emitting area of each of the plurality of auxiliary pixels may be larger than a size of a light emitting area of each of the plurality of main pixels.

[0018] The resolution achieved in the sensor area may be in the range of about 50 ppi to about 400 ppi.

[0019] According to one or more embodiments of the present invention, a display device includes a substrate including a sensor area, a first non-display area at least partially surrounding the sensor area, and a display area at least partially surrounding the first non-display area. A plurality of auxiliary pixels are provided in the sensor area. The auxiliary pixels are configured to be driven by passive matrix driving. A plurality of primary pixels are provided in the display area. The primary pixels are configured to be driven by active matrix driving. Components are provided below the substrate to correspond to the sensor area.

[0020] The component may be a sensor configured to output and / or sense infrared light.

[0021] The sensor area may have an infrared transmittance of about 15% or more.

[0022] The plurality of auxiliary pixels may be located in a region where a plurality of horizontal electrodes extending substantially in a first direction and a plurality of vertical electrodes extending substantially in a second direction crossing the first direction intersect each other.

[0023] The display device may further include a plurality of auxiliary thin film transistors for driving the plurality of auxiliary pixels. The plurality of auxiliary thin film transistors may be arranged in the first non-display area.

[0024] The display device may further include a plurality of lines extending from the display area, arranged in the first non-display area, and detouring along an edge of the sensor area.

[0025] The display device may further include a lower protective film disposed on a lower surface of the substrate, wherein the lower protective film includes an opening corresponding to the sensor area. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] A more complete understanding of the present disclosure and many additional aspects of the present disclosure will become apparent and more readily understood through the following description of embodiments in conjunction with the accompanying drawings, in which:

[0027] Figure 1 is a schematic perspective view illustrating a display device according to an exemplary embodiment of the present inventive concept;

[0028] Figure 2 is a schematic cross-sectional view illustrating a display device according to an exemplary embodiment of the present inventive concept;

[0029] Figure 3 is a schematic plan view illustrating a display device according to an exemplary embodiment of the present inventive concept;

[0030] Figure 4A is an equivalent circuit diagram illustrating a pixel configured to be driven by an active matrix drive that may be provided in a display area of a display device according to an exemplary embodiment of the inventive concept;

[0031] Figure 4B is an equivalent circuit diagram illustrating a pixel configured to be driven by an active matrix drive that may be provided in a display area of a display device according to an exemplary embodiment of the inventive concept;

[0032] Figure 5 is an equivalent circuit diagram illustrating a pixel configured to be driven by a passive matrix drive that may be provided in a sensor region of a display device according to an exemplary embodiment of the present inventive concept;

[0033] Figure 6 is a schematic plan view illustrating a sensor area and a peripheral area of a display device according to an exemplary embodiment of the present inventive concept;

[0034] Figure 7 It is along Figure 6 A schematic cross-sectional view taken along line II';

[0035] Figure 8 It is along Figure 6 A schematic cross-sectional view taken along line II-II'; and

[0036] Figure 9 is a schematic plan view illustrating a display device according to an exemplary embodiment of the inventive concept. DETAILED DESCRIPTION

[0037] In describing the exemplary embodiments of the present disclosure shown in the accompanying drawings, specific terminology is employed for clarity. However, the present disclosure is not intended to be limited to the specific terminology so selected, and it will be understood that each specific element includes all technical equivalents that operate in a similar manner.

[0038] In the specification and drawings, like reference numerals may refer to like elements. To the extent that a detailed description of some elements has been omitted, it can be assumed that these elements are at least similar to corresponding elements already described elsewhere in the patent application.

[0039] It will be understood that although the terms "first," "second," etc. may be used herein to describe various components, these components should not be limited by these terms. These terms are only used to distinguish one component from another.

[0040] It will also be understood that the term "comprises" and / or its variations are used herein to describe the presence of the features or components, but do not exclude the presence or addition of one or more other features or components. However, the phrase "consisting of" is intended to exclude the presence of additional features or components.

[0041] It will be understood that when a layer, region or component is referred to as being “formed on” another layer, region or component, the layer, region or component can be directly or indirectly formed on the other layer, region or component, and intervening layers, regions or components may be present therebetween.

[0042] For ease of explanation, the dimensions of components in the drawings may be exaggerated. Although the present invention is not limited to the specific dimensions and thicknesses of the components shown, it will be understood that the relative dimensions and angles of various structures and components can be considered to describe at least certain embodiments of the inventive concept.

[0043] It will be understood that the specific order of process steps described herein may be changed from what is described. For example, two consecutively described processes may be performed substantially simultaneously, or in an order opposite to that described.

[0044] Figure 1 is a schematic perspective view illustrating a display device 1 according to an exemplary embodiment of the present inventive concept.

[0045] Reference Figure 1 The display device 1 may include a display area DA that emits light and a non-display area NDA that does not emit light. The non-display area NDA may at least partially surround the display area DA, and the non-display area NDA may substantially correspond to a frame area of the display device 1. A plurality of primary pixels Pm driven by an active matrix (AM) method may be provided in the display area DA. The display device 1 may display a primary image using light emitted from the plurality of primary pixels Pm arranged in the display area DA.

[0046] The display device 1 may include a sensor area SA. The sensor area SA may be completely disposed within the display area DA to form a cutout or hole, or may be disposed on a side edge of the display area DA to form a notch. Various electronic components (such as sensors for sensing visible light and / or infrared light or microphones for detecting sound) may be disposed within the sensor area SA.

[0047] For example, various electronic components may be disposed within the sensor area SA, and the sensor area SA itself may be configured to allow light and / or sound to be transmitted therethrough. In this manner, light and / or sound from the outside can penetrate the sensor area SA and be detected by the various electronic components therein. According to exemplary embodiments of the present inventive concept, when infrared light is transmitted through the sensor area SA, the transmittance relative to a wavelength of 940 nm may be approximately 15% or higher, or 30% or higher, and more preferably, 50% or higher, 70% or higher, 80% or higher, 85% or higher, or 90% or higher.

[0048] According to an exemplary embodiment of the present inventive concept, the sensor area SA may be configured to provide an image by using light emitted from auxiliary pixels Pa disposed within the sensor area SA. The auxiliary pixels Pa may be driven by a passive matrix (PM) method. The image provided from the sensor area SA is an auxiliary image having a lower resolution than the image provided from the display area DA. However, it will be noted that both the display area DA and the sensor area SA may be configured to display an image, and therefore, the sensor area SA may be less noticeable than a corresponding sensor area that does not include the auxiliary pixels Pa. In this manner, the sensor area SA does not appear as a cutout or notch, but rather may be difficult to observe.

[0049] The sensor area SA may be at least partially surrounded by the display area DA, and, as an embodiment, Figure 1The sensor area SA is shown as being completely surrounded by the display area DA. The non-display area NDA may include a first non-display area NDA1 that at least partially surrounds the sensor area SA and a second non-display area NDA2 that at least partially surrounds the outside of the display area DA. For example, the first non-display area NDA1 may completely surround the sensor area SA, the display area DA may completely surround the first non-display area NDA1, and the second non-display area NDA2 may completely surround the display area DA. Although none of these elements need completely surround and / or be completely surrounded, in the case where the sensor area SA is provided on the outer edge of the display area DA, the first non-display area NDA1 may partially surround the sensor area SA, the display area DA may partially surround the first non-display area NDA1, and the second non-display area NDA2 may partially surround the display area DA.

[0050] In the following description, as Figure 1 The example of the display device 1 shown in FIG1 describes an organic light emitting display device, but the display device of the present disclosure is not limited thereto. According to exemplary embodiments of the present inventive concept, various types of display devices such as an inorganic light emitting (EL) display device or a quantum dot light emitting display device may be used.

[0051] although Figure 1 The sensor area SA is shown as being located on one side (upper right side) of the display area DA, and the display area DA is shown as being rectangular, but the present disclosure is not limited thereto. The shape of the display area DA may be circular, elliptical, or polygonal such as a triangle or pentagon, and the position of the sensor area SA may be varied in various ways.

[0052] Figure 2 is a schematic cross-sectional view of a display device 1 according to an exemplary embodiment of the present inventive concept, which may correspond to a cross-sectional view taken along Figure 1 The cross section is taken along the line AA'.

[0053] Reference Figure 2 The display device 1 may include a display panel 10 including various display elements and a component 20 corresponding to the sensor area SA.

[0054] The display panel 10 may include a substrate 100, a display element layer 200 disposed on the substrate 100, and a thin film encapsulation layer 300 as a sealing member for sealing the display element layer 200. In addition, the display panel 10 may further include a lower protective film 175 disposed under the substrate 100.

[0055] The substrate 100 may include glass or a polymer resin. The polymer resin may include polyethersulfone (PES), polyacrylate, polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC) and / or cellulose acetate propionate (CAP). The substrate 100 including the polymer resin may have flexible, rollable and / or bendable properties. The substrate 100 may have a multilayer structure including a layer including the above-mentioned polymer resin and an inorganic layer.

[0056] As used herein, the term "flexible" means capable of being flexed to a non-trivial degree and returning to its original configuration without cracking or breaking. Similarly, "rollable" means capable of being rolled to a non-trivial degree and returning to its original configuration without cracking or breaking. Similarly, "bendable" means capable of being bent to a non-trivial degree and returning to its original configuration without cracking or breaking. "Non-trivial degree" is understood to mean a significant degree of deformation.

[0057] The display element layer 200 may include a circuit layer, the circuit layer including a main thin film transistor TFT and an auxiliary thin film transistor TFT', a main organic light emitting diode OLED and an auxiliary organic light emitting diode OLED' as display elements, and an insulating layer IL arranged between the main thin film transistor TFT and the auxiliary thin film transistor TFT' and the main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED'.

[0058] The main thin film transistor TFT and the main organic light emitting diode OLED connected thereto may be provided in the display area DA. The auxiliary thin film transistor TFT' and some word lines WL of the display element layer 200 may be provided in the first non-display area NDA1. The auxiliary organic light emitting diode OLED' may be provided in the sensor area SA. The auxiliary thin film transistor TFT' may be a thin film transistor for passive matrix (PM) driving of the auxiliary organic light emitting diode OLED' provided in the sensor area SA. The auxiliary thin film transistor TFT' is provided in the first non-display area NDA1 but does not overlap with the component 20.

[0059] The component 20 may be provided in the sensor area SA. The component 20 may be an electronic component for detecting and / or projecting light and / or sound. For example, the component 20 may be a sensor for receiving and using light (such as an infrared sensor), a sensor for measuring distance or identifying fingerprints by outputting and detecting light or sound, a compact lamp for outputting light, or a speaker for outputting sound. For electronic components using light, light of various wavelength bands such as visible light, infrared light, or ultraviolet light may be used. A plurality of components may be provided as the component 20 provided in the sensor area SA. For example, a light emitting device and a light receiving device may be provided together as the component 20 in the sensor area SA.

[0060] The thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. Figure 2 A first inorganic encapsulating layer 310 and a second inorganic encapsulating layer 330 are shown with an organic encapsulating layer 320 disposed therebetween.

[0061] The first inorganic encapsulating layer 310 and the second inorganic encapsulating layer 330 may include at least one inorganic insulating material such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride. The organic encapsulating layer 320 may include a polymer material. The polymer material may include acrylic resin, epoxy resin, polyimide, and / or polyethylene.

[0062] The lower protective film 175 may be attached to the lower surface of the substrate 100 to support and protect the substrate 100. The lower protective film 175 may include an opening 175OP corresponding to the sensor area SA. Since the opening 175OP is provided in the lower protective film 175, the light transmittance of the sensor area SA may be increased. The lower protective film 175 may include PET or PI.

[0063] When the substrate 100 includes glass, the lower protective film 175 may be omitted.

[0064] Constituent elements such as an input detection member for detecting a touch input, an anti-reflection member including a polarizer, a retarder or a color filter and a black matrix, and a transparent window may be further disposed on the display panel 10 .

[0065] According to an exemplary embodiment of the present inventive concept, although the thin film encapsulation layer 300 is shown as an encapsulation member for sealing the display element layer 200, the present disclosure is not limited thereto. For example, a sealing substrate connected to the substrate 100 by a sealant or glass frit may be used as a member for sealing the display element layer 200.

[0066] Figure 3 is a schematic plan view illustrating a display device 1 according to an exemplary embodiment of the present inventive concept.

[0067] Reference Figure 3 , the display panel 10 may include a plurality of primary pixels Pm configured to be driven by active matrix (AM) driving. The primary pixels Pm are arranged in the display area DA. Each of the primary pixels Pm may include a display element such as an organic light emitting diode. Each primary pixel Pm may emit, for example, red, green, blue or white light through the display element. In this specification, as described above, each of the primary pixels Pm may be understood as a pixel that emits light of one color among red, green, blue and white. The display area DA may be Figure 2 The described encapsulation member is covered and can thus be protected from external air or moisture.

[0068] The sensor area SA may be disposed within the display area DA, and a plurality of auxiliary pixels Pa configured for PM driving may be disposed within the sensor area SA. Each of the auxiliary pixels Pa may include a display element, such as an organic light-emitting diode. Each of the auxiliary pixels Pa may emit, for example, red, green, blue, or white light via the display element. In this specification, as described above, the auxiliary pixel Pa may be understood as a pixel that emits light of one of red, green, blue, and white.

[0069] The diameter of the sensor area SA may be in a range of about 2 mm to about 5 mm, and the resolution of the sensor area SA may be in a range of about 50 pixels per inch (ppi) to about 400 ppi. The number of auxiliary pixels (i.e., pixels including RGB sub-pixels) Pa included in the sensor area SA may be about 100, which is 10 pixels in a row by 10 pixels in a column.

[0070] The sensor area SA may have a transmittance of about 15% to 50% or more with respect to light such as infrared light, and a component such as a sensor using infrared light may be disposed therein.

[0071] The first non-display area NDA1 in which the pixels Pm and Pa are not disposed is located between the sensor area SA and the display area DA. An auxiliary thin film transistor TFT' for driving the auxiliary pixel Pa disposed in the sensor area SA may be disposed in the first non-display area NDA1. In addition, a line for applying a signal or power to the main pixel Pm separated from the sensor area SA may be disposed in the first non-display area NDA1. Figure 6 Present its structure.

[0072] Each of the pixels Pm and Pa can be electrically connected to an external circuit provided in the non-display area NDA (e.g., the second non-display area NDA2). The first scan driving circuit 110, the second scan driving circuit 120, the terminal 140, the data driving circuit 150, the first power line 160, and the second power line 170 can be provided in the second non-display area NDA2.

[0073] The first scan driving circuit 110 may provide a scan signal Sn to each of the primary pixels Pm via the scan line SL (see FIG. Figure 4A ). The first scan driving circuit 110 may provide an emission control signal to each of the primary pixels Pm via the emission control line EL. The second scan driving circuit 120 may be disposed in parallel with the first scan driving circuit 110, and the display area DA is located between the second scan driving circuit 120 and the first scan driving circuit 110. Although some primary pixels Pm disposed in the display area DA may be electrically connected to the first scan driving circuit 110, other primary pixels Pm may be electrically connected to the second scan driving circuit 120. According to an exemplary embodiment of the present inventive concept, the second scan driving circuit 120 may be omitted.

[0074] The terminal 140 may be provided at one side of the substrate 100. The terminal 140 may be electrically connected to the printed circuit board PCB without being covered by the insulating layer IL. The terminal PCB-P of the PCB may be electrically connected to the terminal 140 of the display panel 10. The PCB is configured to transmit a signal or power from the controller to the display panel 10. The control signal generated by the controller may be transmitted to each of the first scan driving circuit 110 and the second scan driving circuit 120 via the PCB. The controller may provide a first power voltage ELVDD (see FIG. 1 ) to the first power line 160 and the second power line 170 via the first connection line 161 and the second connection line 171. Figure 4A and Figure 4B ) and the second power voltage ELVSS (or common voltage ELVSS) (see Figure 4A and Figure 4B A first power voltage ELVDD may be supplied to each of the primary pixels Pm via a driving voltage line PL connected to the first power line 160 , and a second power voltage ELVSS may be supplied to a counter electrode of each of the primary pixels Pm connected to the second power line 170 .

[0075] The data driving circuit 150 may be electrically connected to the data line DL. The data signal of the data driving circuit 150 may be provided to each of the primary pixels Pm via the connection line 151 connected to the terminal 140 and the data line DL connected to the connection line 151. Figure 3It is shown that the data driving circuit 150 is provided on the PCB, but the data driving circuit 150 may be provided on the substrate 100. For example, the data driving circuit 150 may be provided between the terminal 140 and the first power line 160.

[0076] The first power line 160 may include a first sub-line 162 and a second sub-line 163 extending substantially in parallel along the x-direction, with the display area DA disposed therebetween. The second power line 170 may have a ring shape with one side open and may partially surround the display area DA.

[0077] The first scan driving circuit 110 and the second scan driving circuit 120 and the data driving circuit 150 may provide signals or voltages to drive the auxiliary pixel Pa. In addition, the first power voltage ELVDD and the second power voltage ELVSS may be transmitted to the auxiliary pixel Pa. In some exemplary embodiments of the present invention, a line for transmitting signals of the first scan driving circuit 110 and the second scan driving circuit 120 and the data driving circuit 150 may be connected to the auxiliary thin film transistor TFT' to drive the auxiliary pixel Pa. In some exemplary embodiments of the present invention, the first scan driving circuit 110 and the second scan driving circuit 120 and the data driving circuit 150 may directly provide voltages to drive the auxiliary pixel Pa.

[0078] According to an exemplary embodiment of the present inventive concept, the main pixel Pm disposed in the display area DA is configured to be driven by AM driving, and the auxiliary pixel Pa disposed in the sensor area SA is configured to be driven by PM driving. Figure 4A and Figure 4B The driving of the main pixel Pm and the driving of the auxiliary pixel Pa are described.

[0079] Figure 4A and Figure 4B is an equivalent circuit diagram of an exemplary main pixel Pm of the display panel 10 according to an exemplary embodiment of the inventive concept.

[0080] Reference Figure 4A , each of the main pixels Pm may include a pixel circuit PC connected to the scan line SL and the data line DL and a main organic light emitting diode OLED connected to the pixel circuit PC.

[0081] The pixel circuit PC may include a driving thin film transistor T1, a switching thin film transistor T2, and a storage capacitor Cst. The switching thin film transistor T2 is connected to the scan line SL and the data line DL, and transmits the data signal Dm input through the data line DL to the driving thin film transistor T1 in response to the scan signal Sn input through the scan line SL.

[0082] The storage capacitor Cst is connected to the switching thin film transistor T2 and the driving voltage line PL and stores a voltage corresponding to a difference between a voltage received from the switching thin film transistor T2 and a first power voltage (or driving voltage) ELVDD supplied to the driving voltage line PL.

[0083] The driving thin film transistor T1 is connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing in the main organic light emitting diode OLED from the driving voltage line PL in response to the voltage value stored in the storage capacitor Cst. The main organic light emitting diode OLED can emit light with a desired brightness as controlled by the driving current.

[0084] although Figure 4A The pixel circuit PC is shown to include two thin film transistors and one storage capacitor, but the present disclosure is not limited thereto. Figure 4B As shown in , the pixel circuit PC may include seven thin film transistors and one storage capacitor.

[0085] Reference Figure 4B Each of the primary pixels Pm may include a pixel circuit PC and a primary organic light-emitting diode OLED connected to the pixel circuit PC. The pixel circuit PC may include a plurality of thin film transistors and a storage capacitor. The thin film transistors and the storage capacitor may be connected to the signal lines SL, SL-1, EL, and DL, the initialization voltage line VL, and the driving voltage line PL.

[0086] although Figure 4B In the figure, each of the primary pixels Pm is connected to the signal lines SL, SL-1, EL, and DL, the initialization voltage line VL, and the driving voltage line PL, but the present disclosure is not limited thereto. According to an exemplary embodiment of the inventive concept, at least one of the signal lines SL, SL-1, EL, and DL, the initialization voltage line VL, and the driving voltage line PL may be shared by adjacent pixels.

[0087] The plurality of thin film transistors may include a driving thin film transistor T1 , a switching thin film transistor T2 , a compensation thin film transistor T3 , a first initialization thin film transistor T4 , an operation control thin film transistor T5 , an emission control thin film transistor T6 , and a second initialization thin film transistor T7 .

[0088] The signal lines may include a scan line SL for transmitting a scan signal Sn, a previous scan line SL-1 for transmitting a previous scan signal Sn-1 to the first initialization thin film transistor T4 and the second initialization thin film transistor T7, an emission control line EL for transmitting an emission control signal En to the operation control thin film transistor T5 and the emission control thin film transistor T6, and a data line DL for transmitting a data signal Dm and intersecting the scan line SL. The driving voltage line PL transmits a driving voltage ELVDD to the driving thin film transistor T1, and the initialization voltage line VL transmits an initialization voltage Vint for initializing the driving thin film transistor T1 and the pixel electrode.

[0089] The driving gate electrode G1 of the driving thin film transistor T1 is connected to the first storage capacitor plate Cst1 of the storage capacitor Cst. The driving source electrode S1 of the driving thin film transistor T1 is connected to the driving voltage line PL below it via the operation control thin film transistor T5. The driving drain electrode D1 of the driving thin film transistor T1 is electrically connected to the pixel electrode of the main organic light emitting diode OLED via the emission control thin film transistor T6. The driving thin film transistor T1 receives the data signal Dm according to the switching operation of the switching thin film transistor T2 and provides a driving current I to the main organic light emitting diode OLED. OLED .

[0090] A switching gate electrode G2 of the switching thin film transistor T2 is connected to a scan line SL. A switching source electrode S2 of the switching thin film transistor T2 is connected to a data line DL. A switching drain electrode D2 of the switching thin film transistor T2 is connected to a driving source electrode S1 of the driving thin film transistor T1 and is connected to a driving voltage line PL via an operation control thin film transistor T5. The switching thin film transistor T2 is turned on in response to a scan signal Sn received via the scan line SL and performs a switching operation to transmit a data signal Dm received via the data line DL to the driving source electrode S1 of the driving thin film transistor T1.

[0091] The compensation gate electrode G3 of the compensation thin-film transistor T3 is connected to the scan line SL. The compensation source electrode S3 of the compensation thin-film transistor T3 is connected to the drive drain electrode D1 of the drive thin-film transistor T1 and is connected to the pixel electrode of the main organic light-emitting diode OLED via the emission control thin-film transistor T6. The compensation drain electrode D3 of the compensation thin-film transistor T3 is connected to the first storage capacitor plate Cst1 of the storage capacitor Cst, and is also connected to the first initialization drain electrode D4 of the first initialization thin-film transistor T4 and the drive gate electrode G1 of the drive thin-film transistor T1. The compensation thin-film transistor T3 is turned on in response to the scan signal Sn received via the scan line SL and electrically connects the drive gate electrode G1 and the drive drain electrode D1 of the drive thin-film transistor T1, thereby diode-connecting the drive thin-film transistor T1.

[0092] A first initialization gate electrode G4 of the first initialization thin-film transistor T4 is connected to the previous scan line SL-1. A first initialization source electrode S4 of the first initialization thin-film transistor T4 is connected to the second initialization drain electrode D7 of the second initialization thin-film transistor T7 and to the initialization voltage line VL. A first initialization drain electrode D4 of the first initialization thin-film transistor T4 is connected to the first storage capacitor plate Cst1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation thin-film transistor T3, and the drive gate electrode G1 of the drive thin-film transistor T1. The first initialization thin-film transistor T4 is turned on in response to the previous scan signal Sn-1 received via the previous scan line SL-1 and transmits the initialization voltage Vint to the drive gate electrode G1 of the drive thin-film transistor T1, thereby performing an initialization operation to initialize the voltage of the drive gate electrode G1 of the drive thin-film transistor T1.

[0093] The operation control gate electrode G5 of the operation control thin film transistor T5 is connected to the emission control line EL. The operation control source electrode S5 of the operation control thin film transistor T5 is connected to the driving voltage line PL below it. The operation control drain electrode D5 of the operation control thin film transistor T5 is connected to the driving source electrode S1 of the driving thin film transistor T1 and the switching drain electrode D2 of the switching thin film transistor T2.

[0094] The emission control gate electrode G6 of the emission control thin film transistor T6 is connected to the emission control line EL. The emission control source electrode S6 of the emission control thin film transistor T6 is connected to the driving drain electrode D1 of the driving thin film transistor T1 and the compensation source electrode S3 of the compensation thin film transistor T3. The emission control drain electrode D6 of the emission control thin film transistor T6 is electrically connected to the second initialization source electrode S7 of the second initialization thin film transistor T7 and is electrically connected to the pixel electrode of the main organic light emitting diode OLED.

[0095] When the operation control thin film transistor T5 and the emission control thin film transistor T6 are simultaneously turned on in response to the emission control signal En received through the emission control line EL, the operation control thin film transistor T5 and the emission control thin film transistor T6 transmit the driving voltage ELVDD to the main organic light emitting diode OLED, thereby allowing the driving current I OLED Flows in the main organic light-emitting diode OLED.

[0096] A second initialization gate electrode G7 of the second initialization thin-film transistor T7 is connected to the previous scan line SL-1. A second initialization source electrode S7 of the second initialization thin-film transistor T7 is connected to the emission control drain electrode D6 of the emission control thin-film transistor T6 and is connected to the pixel electrode of the main organic light-emitting diode OLED. A second initialization drain electrode D7 of the second initialization thin-film transistor T7 is connected to the first initialization source electrode S4 of the first initialization thin-film transistor T4 and the initialization voltage line VL. The second initialization thin-film transistor T7 is turned on in response to the previous scan signal Sn-1 received via the previous scan line SL-1, and initializes the pixel electrode of the main organic light-emitting diode OLED.

[0097] although Figure 4B The first initialization thin film transistor T4 and the second initialization thin film transistor T7 are shown to be connected to the previous scan line SL-1, but the present disclosure is not limited thereto. According to an exemplary embodiment of the present inventive concept, the first initialization thin film transistor T4 is connected to the previous scan line SL-1 and driven by the previous scan signal Sn-1, and the second initialization thin film transistor T7 is connected to a separate signal line (e.g., the next scan line) and driven by a signal transmitted through the signal line.

[0098] The second storage capacitor plate Cst2 of the storage capacitor Cst is connected to the driving voltage line PL. The counter electrode of the main organic light emitting diode OLED is connected to the voltage line transmitting the common voltage ELVSS. Therefore, the main organic light emitting diode OLED can receive the driving current I from the driving thin film transistor T1. OLED And emit light accordingly to display images.

[0099] although Figure 4B It is shown that the compensation thin film transistor T3 and the first initialization thin film transistor T4 have double gate electrodes, but the compensation thin film transistor T3 and the first initialization thin film transistor T4 may have one gate electrode.

[0100] In this way, each of the main pixels Pm configured for AM driving includes at least one thin film transistor, so that each of the main pixels Pm can be controlled by at least one thin film transistor. The main pixels Pm driven by the AM driving method can achieve high resolution with low power consumption.

[0101] Figure 5 An arrangement of auxiliary pixels Pa according to an exemplary embodiment of the inventive concept is shown.

[0102] Reference Figure 5, the auxiliary pixels Pa configured to be driven by PM driving do not include a thin film transistor that drives each of the auxiliary pixels Pa. The auxiliary pixels Pa configured for PM driving can be formed by intersecting a plurality of vertical electrodes V1, ..., Vn extending substantially along the y-direction and a plurality of horizontal electrodes H1, ..., Hn extending substantially along the x-direction. The vertical electrodes V1, ..., Vn can constitute a portion of the pixel electrode of each of the auxiliary organic light emitting diodes OLED'. The horizontal electrodes H1, ..., Hn can constitute a portion of the counter electrode of each of the auxiliary organic light emitting diodes OLED'. An intermediate layer including an organic light emitting layer is provided between the vertical electrodes V1, ..., Vn and the horizontal electrodes H1, ..., Hn. The auxiliary pixels Pa can emit light based on the voltage difference between the vertical electrodes V1, ..., Vn and the horizontal electrodes H1, ..., Hn.

[0103] The horizontal electrodes H1, ..., Hn and the vertical electrodes V1, ..., Vn may be connected to an auxiliary thin film transistor TFT' or a driving circuit unit to drive the auxiliary pixel Pa. Therefore, after sequentially selecting the horizontal electrodes H1, ..., Hn, an image may be realized by supplying voltages to the vertical electrodes V1, ..., Vn included in the auxiliary pixel Pa emitting light.

[0104] According to an exemplary embodiment of the present inventive concept, a component such as a sensor may be disposed under the substrate 100 to correspond to the sensor area SA. The component may include an emission unit that emits light (e.g., infrared light having a wavelength of 940 nm). When a thin film transistor is disposed in the sensor area SA, the performance of the thin film transistor may become unstable, for example, due to the flow of photocurrent or a change in the driving range caused by light emitted from the component.

[0105] According to an exemplary embodiment of the present inventive concept, the auxiliary pixel Pa for the PM driving configuration is disposed in the sensor area SA where the thin film transistor is not disposed. The sensor area SA where the sensor may be disposed may simultaneously provide an image.

[0106] Figure 6 is a schematic plan view illustrating a sensor area SA and a peripheral area thereof according to an exemplary embodiment of the inventive concept. Figure 7 It is along Figure 6 Schematic cross-sectional view taken along line II'. Figure 8 It is along Figure 6 Schematic cross-sectional view taken along line II-II'.

[0107] Reference Figure 6Horizontal electrodes H1, ..., Hn extending substantially in the x-direction and vertical electrodes V1, ..., Vn extending substantially in the y-direction are disposed in the sensor area SA and intersect with each other. Multiple intersections where the horizontal electrodes H1, ..., Hn and the vertical electrodes V1, ..., Vn intersect with each other may be implemented as auxiliary pixels Pa.

[0108] although Figure 6 While the area of one of the auxiliary pixels Pa is shown to be larger than the area of one of the primary pixels Pm, the present disclosure is not limited thereto. When the horizontal electrodes H1, ..., Hn and the vertical electrodes V1, ..., Vn are relatively small, the area of one of the auxiliary pixels Pa can be smaller than the area of one of the primary pixels Pm. When the widths of the horizontal electrodes H1, ..., Hn and / or the widths of the vertical electrodes V1, ..., Vn are reduced, such reduction can increase the light transmittance of the sensor area SA.

[0109] An auxiliary thin film transistor TFT' for assisting the driving of the pixel Pa may be provided in the first non-display area NDA1 surrounding the sensor area SA. The auxiliary thin film transistor TFT' may include a plurality of first auxiliary thin film transistors TFTa connected to the horizontal electrodes H1, ..., Hn and a plurality of second auxiliary thin film transistors TFTb connected to the vertical electrodes V1, ..., Vn. Figure 6 The first auxiliary thin film transistor TFTa is shown as being located on the left side of the sensor area SA and the second auxiliary thin film transistor TFTb is located on the lower side of the sensor area SA, but the present disclosure is not limited thereto. For example, various changes are possible, such that the first auxiliary thin film transistor TFTa may be located on the right side of the sensor area SA and the second auxiliary thin film transistor TFTb may be located on the upper side of the sensor area SA.

[0110] The first auxiliary thin film transistor TFTa can be connected to the scan line SL extending from the display area DA to receive the scan signal. In response to the scan signal, the second power voltage ELVSS can be supplied to the horizontal electrodes H1, ..., Hn. In some exemplary embodiments of the present invention, the scan line SL can be connected to the main pixel Pm provided in the display area DA. In some exemplary embodiments of the present invention, the scan line SL can correspond to any one of the scan line SL connected to the main pixel Pm, the previous scan line SL-1, and the emission control line EL. However, the present disclosure is not limited thereto. The scan line SL connected to the first auxiliary thin film transistor TFTa may be not connected to the main pixel Pm and directly connected to the first scan drive circuit 110 (see Figure 3 ) and the second scanning driving circuit 120 (see Figure 3 ) line.

[0111] The gate electrode of the first auxiliary thin-film transistor TFTa is connected to a scan line SL for transmitting a scan signal. The source electrode or the drain electrode of the first auxiliary thin-film transistor TFTa may be connected to the counter electrode included in the primary pixel Pm, and the other electrode may be connected to the horizontal electrodes H1, ..., Hn. In response to the scan signal, the first auxiliary thin-film transistor TFTa is turned on, and thus the second power voltage ELVSS applied to the counter electrode included in the primary pixel Pm may be transmitted to the horizontal electrodes H1, ..., Hn.

[0112] The second auxiliary thin film transistor TFTb may be connected to a data line DL extending from the display area DA to receive a data signal. In response to the data signal, a first power voltage ELVDD may be provided to the vertical electrodes V1, ..., Vn. In some exemplary embodiments of the present invention, the data line DL may be connected to a primary pixel Pm disposed in the display area DA. However, the present disclosure is not limited thereto. The data line DL connected to the second auxiliary thin film transistor TFTb may be not connected to the primary pixel Pm and directly connected to the data driving circuit 150 (see FIG. 1 ). Figure 3 ) line.

[0113] The gate electrode of the second auxiliary thin-film transistor TFTb can be connected to a data line DL for transmitting a data signal. The source electrode or the drain electrode of the second auxiliary thin-film transistor TFTb can be connected to the driving voltage line PL, and the other electrode can be connected to the vertical electrodes V1, ..., Vn. In response to the data signal, the second auxiliary thin-film transistor TFTb is turned on, and thus the first power voltage ELVDD provided by the driving voltage line PL can be transmitted to the vertical electrodes V1, ..., Vn.

[0114] A plurality of lines may be provided in the first non-display area NDA1. The data lines DL may extend substantially in the y-direction, and the driving voltage lines PL may also extend substantially in the y-direction. The driving voltage lines PL around the sensor area SA may be short-circuited relative to the sensor area SA. The short-circuited driving voltage lines PL at the upper side of the sensor area SA may be connected to the upper reference line. Figure 3 The second sub-line 163 is described, and the short-circuited driving voltage lines PL at the lower side of the sensor area SA may be connected to the first sub-line 162. Some of the driving voltage lines PL may be connected to the second auxiliary thin film transistor TFTb.

[0115] Some of the data lines DL may bypass the sensor area SA. For example, each of the data lines DL may include a portion extending substantially in the y-direction and a portion bypassing the sensor area SA along the edge of the sensor area SA. The bypassed portion of each of the data lines DL may be located in the first non-display area NDA1. Some of the data lines DL located on the lower side of the sensor area SA may be connected to the second auxiliary thin-film transistor TFTb. Some of the data lines DL may be located between the data lines DL connected to the second auxiliary thin-film transistor TFTb, without being connected to the second auxiliary thin-film transistor TFTb. This may be because the resolution of the display area DA and the resolution of the sensor area SA are implemented to be different from each other. For example, the resolution of the display area DA may be implemented to be higher than the resolution of the sensor area SA.

[0116] The primary pixels Pm disposed at the upper and lower sides of the sensor area SA may be electrically connected to the data lines DL that bypass the sensor area SA and may receive signals from the corresponding data lines DL. Some of the data lines DL may be bent along the left edge of the sensor area SA, and other data lines DL may be bent along the right edge of the sensor area SA.

[0117] The scan lines SL may extend along the x-direction intersecting the data lines DL. Some of the scan lines SL may bypass the sensor area SA. For example, some of the scan lines SL may bend along the upper edge of the sensor area SA, while other scan lines SL may bend along the lower edge of the sensor area SA. Each of the scan lines SL may include a portion extending substantially along the x-direction from the display area DA and a portion or curved portion that detours along the edge of the sensor area SA by bypassing the sensor area SA in the first non-display area NDA1. Primary pixels Pm located on the left and right sides of the sensor area SA may be electrically connected to the scan lines SL that bypass the sensor area SA.

[0118] Some of the scan lines SL located to the left of the sensor area SA may be connected to the first auxiliary thin-film transistor TFTa. Some of the scan lines SL may be located between the scan lines SL connected to the first auxiliary thin-film transistor TFTa, and not connected to the first auxiliary thin-film transistor TFTa. This may be because the resolutions of the display area DA and the sensor area SA are implemented to be different from each other. For example, the resolution of the display area DA may be implemented to be higher than the resolution of the sensor area SA.

[0119] Reference Figure 7 and Figure 8 A stack structure of the display device 1 according to an exemplary embodiment of the inventive concept is described.

[0120] The substrate 100 may include a glass material, a ceramic material, a metal material, and / or a material having flexible or bendable properties. When the substrate 100 has flexible or bendable properties, the substrate 100 may include a polymer resin such as PES, PAR, PEI, PEN, PET, PPS, polyarylate, PI, PC, and / or CAP. The substrate 100 may have a single-layer structure or a multi-layer structure of the aforementioned materials. For a multi-layer structure, the substrate 100 may further include an inorganic layer. In some exemplary embodiments of the present inventive concept, the substrate 100 may have a structure of organic material / inorganic material / organic material.

[0121] The buffer layer 111 may be provided on the substrate 100 and may reduce or prevent intrusion of foreign matter, moisture, or external air from a lower portion of the substrate 100, and provide a planarized surface on the substrate 100. The buffer layer 111 may include an inorganic material such as an oxide or a nitride, an organic material, or an organic / inorganic composite, and may have a single-layer structure or a multi-layer structure of an inorganic material and an organic material.

[0122] A barrier layer may be further provided between the substrate 100 and the buffer layer 111. The barrier layer may prevent or reduce the intrusion of impurities from the substrate 100 into the semiconductor layers A1, AA2, and AA3. The barrier layer may include an inorganic material such as an oxide or a nitride, an organic material, or an organic / inorganic composite, and may have a single-layer structure or a multi-layer structure of an inorganic material and an organic material.

[0123] The substrate 100 may be divided into a display area DA, a first non-display area NDA1, and a sensor area SA. A main thin film transistor TFT for driving the main pixel Pm may be disposed in the display area DA. An auxiliary thin film transistor TFT' for driving the auxiliary pixel Pa may be disposed in the first non-display area NDA1.

[0124] The semiconductor layers A1, AA2, and AA3 may be disposed on the buffer layer 111. The semiconductor layers A1, AA2, and AA3 may include amorphous silicon or polycrystalline silicon. According to exemplary embodiments of the present inventive concept, the semiconductor layers A1, AA2, and AA3 may include oxides of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), aluminum (Al), cesium (Cs), cerium (Ce), and / or zinc (Zn). In some exemplary embodiments of the present inventive concept, the semiconductor layers A1, AA2, and AA3 may include a Zn oxide-based material (e.g., Zn oxide, In-Zn oxide, or Ga-In-Zn oxide). According to an exemplary embodiment of the present inventive concept, semiconductor layers A1, AA2, and AA3 may each include IGZO (In-Ga-Zn-O), ITZO (In-Sn-Zn-O), and / or IGTZO (In-Ga-Sn-Zn-O) semiconductors in which metals such as In, Ga, and / or Sn are included in ZnO. Semiconductor layers A1, AA2, and AA3 may include a channel region, a source region, and a drain region. The source region and the drain region are disposed on opposite sides of the channel region. Semiconductor layers A1, AA2, and AA3 may be constructed as a single layer or multiple layers.

[0125] The gate electrodes G1, GG2, and GG3 are disposed on the semiconductor layers A1, AA2, and AA3, at least partially overlapping the semiconductor layers A1, AA2, and AA3, with a first gate insulating layer 112 disposed between the gate electrodes G1, GG2, and GG3 and the semiconductor layers A1, AA2, and AA3. The gate electrodes G1, GG2, and GG3 may each include molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti), and may be formed as a single layer or multiple layers. As an example, the gate electrodes G1, GG2, and GG3 may each be formed with a single layer of Mo. The scan line SL may include the same material as that of the gate electrodes G1, GG2, and GG3 and may be located on the same layer as the gate electrodes G1, GG2, and GG3.

[0126] The first gate insulating layer 112 may include silicon oxide (SiO2), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO2).

[0127] The second gate insulating layer 113 may cover the gate electrodes G1, GG2, and GG3 and the scan line SL. The second gate insulating layer 113 may include SiO2, SiN x , SiON, Al2O3, TiO2, Ta2O5, HfO2 or ZnO2.

[0128] The first storage capacitor plate Cst1 of the storage capacitor Cst disposed in the display area DA may at least partially overlap the TFT. For example, the gate electrode G1 of the TFT may function as the first storage capacitor plate Cst1 of the storage capacitor Cst.

[0129] The second storage capacitor plate Cst2 of the storage capacitor Cst at least partially overlaps the first storage capacitor plate Cst1, and the second gate insulating layer 113 is located between the second storage capacitor plate Cst2 and the first storage capacitor plate Cst1. In this case, the second gate insulating layer 113 can serve as a dielectric layer for the storage capacitor Cst. The second storage capacitor plate Cst2 can include a conductive material including Mo, Al, Cu, and / or Ti, and can be formed as a multilayer or single layer including the above materials. As an example, the second storage capacitor plate Cst2 can be a single layer of Mo or a multilayer of Mo / Al / Mo.

[0130] although Figure 7 The storage capacitor Cst is shown to overlap with the TFT, but the present disclosure is not limited thereto. In this regard, various modifications may be available, for example, the storage capacitor Cst may be provided so as not to overlap with the TFT.

[0131] The interlayer insulating layer 115 may cover the second storage capacitor plate Cst2 of the storage capacitor Cst. The interlayer insulating layer 115 may include SiO2, SiN x , SiON, Al2O3, TiO2, Ta2O5, HfO2 and / or ZnO2.

[0132] The source electrodes S1, SS2, and SS3, the drain electrodes D1, DD2, and DD3, the data lines DL, and the driving voltage lines PL may be disposed on the interlayer insulating layer 115. The source electrodes S1, SS2, and SS3, the drain electrodes D1, DD2, and DD3, the data lines DL, and the driving voltage lines PL may include a conductive material including Mo, Al, Cu, and / or Ti, and may be a multilayer or single layer including the above materials. As an example, the source electrodes S1, SS2, and SS3 and the drain electrodes D1, DD2, and DD3 may have a multilayer structure of Ti / Al / Ti.

[0133] A via layer 117 may be disposed on the source electrodes S1 , SS2 , and SS3 , the drain electrodes D1 , DD2 , and DD3 , the data line DL, and the driving voltage line PL. A main organic light emitting diode OLED and an auxiliary organic light emitting diode OLED′ may be disposed on the via layer 117 .

[0134] The via layer 117 may have a flat upper surface so that the pixel electrode 210 is flat. The via layer 117 may be a film formed of an organic material as a single layer or a multilayer. The via layer 117 may include a general polymer for general purposes (such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA) or polystyrene (PS)), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluoropolymer, a p-xylene polymer, a vinyl alcohol polymer or a blend thereof. The via layer 117 may include an inorganic material. The via layer 117 may include SiO2, SiN x , SiON, Al 2 O 3 , TiO 2 , Ta 2 O 5 , HfO 2 , or ZnO 2 . When the via layer 117 includes an inorganic material, in some cases, chemical planarization polishing may be performed. The via layer 117 may include both organic and inorganic materials.

[0135] In the display area DA of the substrate 100, the main organic light emitting diode OLED is disposed on the via layer 117. The main organic light emitting diode OLED may include a pixel electrode 210, an intermediate layer 220 including an organic light emitting layer, and an opposing electrode 230.

[0136] In the sensor area SA of the substrate 100, the auxiliary organic light emitting diode OLED' is disposed on the via layer 117. The auxiliary organic light emitting diode OLED' may include a vertical electrode V1, an intermediate layer 220 including an organic light emitting layer, and a horizontal electrode H1.

[0137] The pixel electrode 210 and the vertical electrodes V1 and V2 may be arranged on the same layer and may include the same material. The pixel electrode 210 and the vertical electrodes V1 and V2 may be (semi) transmissive electrodes or reflective electrodes. In some embodiments, the pixel electrode 210 and the vertical electrodes V1 and V2 may include a reflective film containing Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr and / or a mixture thereof and a transparent or semi-transparent electrode layer formed on the reflective film. The transparent or semi-transparent electrode layer may include an oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO) and / or aluminum zinc oxide (AZO). In some embodiments, the pixel electrode 210 and the vertical electrodes V1 and V2 may have a stacked structure of ITO / Ag / ITO. However, the present disclosure is not limited thereto.

[0138] In another exemplary embodiment, the vertical electrodes V1 and V2 may be provided on a different layer from the pixel electrode 210 and may include different materials. In this regard, various modifications may be available, for example, the vertical electrodes V1 and V2 may include only a transparent electrode layer to improve translucency compared to the pixel electrode 210.

[0139] The pixel defining film 119 may be provided on the via layer 117. The pixel defining film 119 may have main opening portions (e.g., main opening portion 119OPm that at least exposes the central portion of the pixel electrode 210) corresponding to each of the pixel electrodes 210 in the display area DA, thereby defining the light emitting region of the main pixel Pm. The pixel defining film 119 may have auxiliary opening portions 119OPa that expose a part corresponding to each of the auxiliary pixels Pa in the sensor area SA and that expose the vertical electrode V1, thereby defining the light emitting region of the auxiliary pixel Pa.

[0140] The width Wm of the main opening portion 119OPm may be smaller than the width Wa of the auxiliary opening portion 119OPa (Wm < Wa). This is because the resolution of the main pixel Pm provided in the display area DA is greater than the resolution of the auxiliary pixel Pa provided in the sensor area SA.

[0141] In addition, the pixel defining film 119 may prevent the formation of an arc at the edge of the pixel electrode 210 by increasing the distance between the edge of the pixel electrode 210 and the counter electrode 230 above the pixel electrode 210. The pixel defining film 119 may include an organic insulating material such as polyimide, polyamide, acrylic resin, BCB, HMDSO, and / or phenolic resin by a method such as spin coating.

[0142] The intermediate layer 220 of the main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED' may include an organic light emitting layer. The organic light emitting layer may include an organic material containing a fluorescent material or a phosphorescent material that emits red, green, blue, or white light. The organic light emitting layer may include a low molecular organic material or a polymer organic material. Functional layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), and an electron injection layer (EIL) may also be selectively disposed below and above the organic light emitting layer. The intermediate layer 220 may be provided corresponding to each of the main opening portion 119OPm and the auxiliary opening portion 119OPa of the pixel defining film 119. However, the present disclosure is not limited thereto. In this regard, various modifications may be available, for example, the intermediate layer 220 may include an integral layer across the substrate 100.

[0143] The counter electrode 230 and the horizontal electrodes H1, Hn-1, and Hn may include the same material as each other and may be arranged on the same layer. The counter electrode 230 and the horizontal electrodes H1, Hn-1, and Hn may be transmissive electrodes or reflective electrodes. In some exemplary embodiments of the present invention, the counter electrode 230 and the horizontal electrodes H1, Hn-1, and Hn may all be transparent or translucent electrodes and may be formed as a metal film having a low work function and including Li, Ca, LiF / Ca, LiF / Al, Al, Ag, Mg, and / or a mixture thereof. In addition, a transparent conductive oxide (TCO) film such as ITO, IZO, ZnO, and / or In2O3 may also be provided on the metal film.

[0144] The counter electrode 230 may be disposed across the display area DA and on the intermediate layer 220 and the pixel defining film 119. The counter electrode 230 may be integrally formed with respect to the main organic light emitting diode OLED to correspond to the pixel electrode 210. The horizontal electrodes H1, Hn-1, and Hn may be spaced apart from each other in the sensor area SA and may also be spaced apart from the counter electrode 230.

[0145] When the pixel electrode 210 is configured as a reflective electrode and the counter electrode 230 is configured as a transmissive electrode, light emitted from the intermediate layer 220 is emitted toward the counter electrode 230, and thus the display device 1 can be implemented as a top emission type. When the pixel electrode 210 is configured as a transparent or semi-transparent electrode and the counter electrode 230 is configured as a reflective electrode, light emitted from the intermediate layer 220 is emitted toward the substrate 100, and thus the display device 1 can be implemented as a bottom emission type. However, the present disclosure is not limited thereto, and the display device 1 according to this embodiment can be implemented as a dual emission type that emits light in both directions of the top and bottom surfaces.

[0146] The first auxiliary thin film transistor TFTa may include a semiconductor layer AA2, a gate electrode GG2, a source electrode SS2, and a drain electrode DD2. The gate electrode GG2 of the first auxiliary thin film transistor TFTa may be electrically connected to the scan line SL and may receive application of a scan signal.

[0147] The source electrode SS2 of the first auxiliary thin film transistor TFTa can be electrically connected to the counter electrode 230. For example, the source electrode SS2 of the first auxiliary thin film transistor TFTa can be connected to the counter electrode 230 via a through hole that penetrates the pixel defining film 119 and the via layer 117. In this state, the first connection electrode CM1 can be provided as an intermediate element. For example, the counter electrode 230 can be connected to the first connection electrode CM1 via a through hole defined in the pixel defining film 119, and the first connection electrode CM1 can be connected to the source electrode SS2 via a through hole defined in the via layer 117.

[0148] The drain electrode DD2 of the first auxiliary thin-film transistor TFTa can be electrically connected to the horizontal electrode H1. For example, the drain electrode DD2 of the first auxiliary thin-film transistor TFTa can be connected to the horizontal electrode H1 via a through-hole penetrating the pixel-defining film 119 and the via layer 117. In this state, the second connection electrode CM2 can be provided as an intermediate element. For example, the counter electrode 230 can be connected to the second connection electrode CM2 via a through-hole defined in the pixel-defining film 119, and the second connection electrode CM2 can be connected to the drain electrode DD2 via a through-hole defined in the via layer 117.

[0149] The first auxiliary thin film transistor TFTa may transmit the second power voltage ELVSS applied to the opposing electrode 230 to the horizontal electrode H1 in response to the scan signal applied to the gate electrode GG2 .

[0150] The second auxiliary thin film transistor TFTb may include a semiconductor layer AA3, a gate electrode GG3, a source electrode SS3, and a drain electrode DD3. The gate electrode GG3 of the second auxiliary thin film transistor TFTb may be electrically connected to the data line DL and may receive application of a data signal.

[0151] The source electrode SS3 of the second auxiliary thin film transistor TFTb may be connected to the driving voltage line PL. The source electrode SS3 may be provided as a portion of the driving voltage line PL.

[0152] The drain electrode DD3 of the second auxiliary thin film transistor TFTb may be electrically connected to the vertical electrode V1 . For example, the drain electrode DD3 of the second auxiliary thin film transistor TFTb may be connected to the vertical electrode V1 via a through hole penetrating the via layer 117 .

[0153] The second auxiliary thin film transistor TFTb may transmit the first power voltage ELVDD transmitted through the driving voltage line PL to the vertical electrode V1 in response to the data signal applied to the gate electrode GG3 .

[0154] The lower protective film 175 may be disposed on the lower surface of the substrate 100. The lower protective film 175 may include a protective film base 173 and an adhesive layer 180. The protective film base 173 may be attached to the lower surface of the substrate 100 through the adhesive layer 180.

[0155] The protective film base 173 may include PET and / or PI. The adhesive layer 180 may include a pressure sensitive adhesive (PSA).

[0156] The lower protective film 175 may include an opening 175OP corresponding to the sensor area SA, and components arranged to correspond to the sensor area SA may be at least partially disposed in the opening 175OP.

[0157] A sealing member for sealing the main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED' may also be provided above the main organic light emitting diode OLED and the auxiliary organic light emitting diode OLED', and components such as a touch sensor layer, a polarizing layer, a color filter layer or a window may also be provided on the sealing member.

[0158] Despite Figures 6 to 8 The auxiliary thin film transistor TFT′ for driving the auxiliary pixel Pa provided in the sensor area SA is provided in the first non-display area NDA1, but the present disclosure is not limited thereto. The auxiliary thin film transistor TFT′ may not be provided in the first non-display area NDA1.

[0159] For example, as in Figure 9 In another embodiment shown in , the auxiliary scan driving circuit 120 ′ and the auxiliary data driving circuit 150 ′ are disposed in the second non-display area NDA2 outside the display area DA, and driving voltages and signals may be transmitted to the sensor area SA.

[0160] According to an exemplary embodiment of the inventive concept, the auxiliary pixel Pa for the PM driving configuration is provided in the sensor area SA, and the auxiliary pixel Pa is located in a region where a plurality of horizontal electrodes extending substantially in a first direction and a plurality of vertical electrodes extending substantially in a second direction crossing the first direction intersect each other.

[0161] The auxiliary scan lines SL' of the auxiliary scan driving circuit 120' may be directly connected to the horizontal electrodes disposed in the sensor area SA. The auxiliary data lines DL' of the auxiliary data driving circuit 150' may be directly connected to the vertical electrodes disposed in the sensor area SA.

[0162] According to an exemplary embodiment of the inventive concept, lines for transmitting voltages and / or signals to main pixels disposed in the display area DA may be disposed in the first non-display area NDA1 by detouring along the sensor area SA.

[0163] As described above, according to the above embodiment, since auxiliary pixels for PM driving configuration are provided in the sensor region corresponding to a component such as a sensor, an environment for operation of the sensor can be established and an image can be realized in a region overlapping the sensor at the same time.

[0164] Therefore, a display device capable of realizing various functions and providing enhanced quality can be provided.

[0165] Descriptions of features or aspects within each embodiment may be considered available for other similar features or aspects in other embodiments, and thus the inventive concept contemplates any possible combination of elements and features throughout the several exemplary embodiments described herein.

[0166] Although one or more embodiments have been described with reference to the drawings, people skilled in the art will understand that various changes in form and details may be made therein without departing from the spirit and scope of the inventive concept.

Claims

1. A display device, comprising: a substrate comprising a sensor area, a first non-display area at least partially surrounding the sensor area, and a display area at least partially surrounding the first non-display area; a plurality of auxiliary pixels disposed in the sensor region and configured for passive matrix driving; a plurality of primary pixels arranged in the display area and configured for active matrix driving; as well as a plurality of auxiliary thin film transistors disposed in the first non-display area and configured to drive the plurality of auxiliary pixels; The entire sensor area is configured to allow light and / or sound to be transmitted therethrough, and an auxiliary image is displayed using the plurality of auxiliary pixels driven by the passive matrix. 2 . The display device according to claim 1 , further comprising a component arranged on a lower surface of the substrate such that the component corresponds to the sensor area.

3. The display device according to claim 1, wherein Each of the plurality of auxiliary pixels is located in a region where a plurality of horizontal electrodes extending substantially in a first direction and a plurality of vertical electrodes extending substantially in a second direction crossing the first direction intersect each other.

4. The display device according to claim 1, wherein Each of the plurality of main pixels includes at least one thin film transistor.

5. A display device, comprising: a substrate comprising a sensor area, a first non-display area at least partially surrounding the sensor area, and a display area at least partially surrounding the first non-display area; a plurality of auxiliary pixels disposed in the sensor region and configured for passive matrix driving; A plurality of primary pixels are arranged in the display area and configured to be driven by an active matrix; as well as a plurality of auxiliary thin film transistors disposed in the first non-display area and configured to drive the plurality of auxiliary pixels; Each of the plurality of auxiliary pixels includes a horizontal electrode, a vertical electrode, and an intermediate layer arranged between the horizontal electrode and the vertical electrode, and Each of the plurality of auxiliary thin film transistors includes a first auxiliary thin film transistor connected to the horizontal electrode and a second auxiliary thin film transistor connected to the vertical electrode. The display device according to claim 5 , wherein: Each of the plurality of primary pixels includes a pixel electrode, an intermediate layer, and a counter electrode, and Wherein, the source electrode or the drain electrode of the first auxiliary thin film transistor is connected to the counter electrode.

7. The display device according to claim 6, wherein: A gate electrode of the second auxiliary thin film transistor is connected to a data line configured to transmit a data signal to the plurality of main pixels.

8. The display device according to claim 5, wherein A source electrode or a drain electrode of the second auxiliary thin film transistor is connected to a driving voltage line located in the first non-display area.

9. The display device according to claim 1 or 5, further comprising a lower protective film provided on a lower surface of the substrate, in, The lower protective film includes an opening corresponding to the sensor area. 10 . The display device according to claim 1 , further comprising a plurality of lines extending from the display area, arranged in the first non-display area, and detouring along an edge of the sensor area. The display device according to claim 10 , wherein: Each of the plurality of lines includes a bent portion in the first non-display area.

12. The display device according to claim 1 or 5, wherein: A size of a light emitting area of each of the plurality of auxiliary pixels is larger than a size of a light emitting area of each of the plurality of main pixels.

13. The display device according to claim 1 or 5, wherein: The resolution achieved in the sensor area is in the range of 50 ppi to 400 ppi.

14. A display device, comprising: a substrate comprising a sensor area, a first non-display area at least partially surrounding the sensor area, and a display area at least partially surrounding the first non-display area; a plurality of auxiliary pixels disposed in the sensor region and configured for passive matrix driving; A plurality of primary pixels are arranged in the display area and configured to be driven by an active matrix; as well as a component under the substrate to correspond to the sensor area, Each of the plurality of auxiliary pixels is located in a region where a plurality of horizontal electrodes extending substantially in a first direction and a plurality of vertical electrodes extending substantially in a second direction crossing the first direction intersect each other.

15. The display device according to claim 14, wherein The component is an infrared sensor.

16. The display device according to claim 14, wherein: The sensor region has an infrared transmittance of 15% or higher.

17. The display device according to claim 14, wherein: A plurality of auxiliary thin film transistors configured to drive the plurality of auxiliary pixels are arranged in the first non-display area. 18 . The display device of claim 14 , further comprising a plurality of lines extending from the display area, arranged in the first non-display area, and detouring along an edge of the sensor area.

19. The display device according to claim 14, further comprising a lower protective film provided on a lower surface of the substrate, in, The lower protective film includes an opening corresponding to the sensor area.

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