Display device

Abstract

A display device is provided. The display device may include a plurality of first pixels, a substrate, a first signal line, and a load matching device. The substrate may include a first opening, a first non-display area, and a main display area. The first non-display area may at least partially surround the first opening. The main display area may support the plurality of first pixels. The first signal line may be electrically connected to the plurality of first pixels, may overlap with the main display area, and may overlap with the first non-display area. The load matching device may overlap with the first non-display area and may provide a first electrical load to the first signal line.

Description

Technical Field

[0001] The technical field may relate to a display device. Background Art

[0002] Modern display devices such as plasma display devices, liquid crystal display devices, and organic light-emitting display devices can be included in various electronic devices such as mobile phones to display images. In electronic devices, the display device may be functionally and / or structurally combined with one or more other components (such as a camera). These components may affect the performance of the display device. Summary of the Invention

[0003] One or more embodiments may be directed to a display device capable of displaying an image with satisfactory quality in a maximized display area.

[0004] According to an embodiment, a display device includes: a substrate including a first opening area through which light passes, a first opening peripheral area serving as a non-display area and surrounding the first opening area, and a main display area in which a plurality of pixels configured to display an image are arranged; a first signal line electrically connected to the pixel and passing through the first opening peripheral area; and a load matching portion provided in the first opening peripheral area and configured to provide an electrical load to the first signal line.

[0005] In an embodiment, the main display area may have a quadrilateral shape disposed on a plane formed along a first direction and a second direction perpendicular to the first direction. The substrate may further include first to fourth edge display areas that contact each side of the main display area and are bent at a predetermined angle relative to the main display area.

[0006] In an embodiment, the first signal line may be a scan line for providing a scan signal to the pixel. The load matching section may include a load matching electrode arranged to overlap the first signal line, and provide an electric load to the first signal line through a parasitic capacitance formed by the first signal line and the load matching electrode.

[0007] In an embodiment, the display device may further include: a lower conductive layer, disposed on the substrate and including a load matching electrode and a lower shielding electrode; a lower insulating layer, disposed on the lower conductive layer; an active pattern of a thin film transistor, disposed on the lower insulating layer and overlapping with the lower shielding electrode; a gate insulating layer, disposed on the active pattern; and a gate conductive layer, including a gate electrode and a scan line of the thin film transistor, disposed on the gate insulating layer.

[0008] In an embodiment, the display device may further include: an active pattern of a thin film transistor, disposed on a substrate; a gate insulating layer, disposed on the active pattern; a gate conductive layer, including a gate electrode and a scan line of the thin film transistor, disposed on the gate insulating layer; an interlayer insulating layer, disposed on the gate conductive layer; and a data conductive layer, disposed on the interlayer insulating layer and including a source electrode and a drain electrode electrically connected to the active pattern and a load matching electrode.

[0009] In an embodiment, the load matching section may be a dummy pixel electrically connected to the first signal line.

[0010] In an embodiment, the load matching section may be a portion in which a portion of the first signal line is formed in a zigzag arrangement to increase wiring resistance.

[0011] In an embodiment, the first signal line may have a first thickness and a second thickness thinner than the first thickness according to a position. The load matching section may be a portion having the second thickness of the first signal line.

[0012] In an embodiment, the display device may further include a second signal line that does not pass through a peripheral area of the first opening. The second signal line and the load matching portion may be separated from each other.

[0013] In an embodiment, the display device may further include a second signal line that does not pass through the peripheral area of the first opening, and a first gate circuit and a second gate circuit, the first gate circuit including a first output buffer electrically connected to the first signal line, and the second gate circuit including a second output buffer electrically connected to the second signal line.

[0014] In an embodiment, the size of the second output buffer may be larger than the size of the first output buffer.

[0015] In an embodiment, the second output buffer may include a dual-gate transistor.The first output buffer may include a single-gate transistor.

[0016] In an embodiment, a first hole may be formed through the substrate in the first opening region.

[0017] In an embodiment, the substrate may further include: a second opening region separated from the first opening region; and a second opening peripheral region, which is a non-display region and surrounds the second opening region. The first signal line may pass through the second opening peripheral region. The display device may further include a second load matching section, disposed in the second opening peripheral region to provide a load to the first signal line.

[0018] In an embodiment, the substrate may further include a second opening region separated from the first opening region.The first opening peripheral region may surround the first opening region and the second opening region.

[0019] In an embodiment, the main display area may have a length in the first direction that is longer than a length in the second direction.The first opening area may be adjacent to a long side of the main display area extending in the first direction.

[0020] In an embodiment, the first opening region may be formed in the first edge display region. The substrate in the first opening region and the first opening peripheral region may be flat.

[0021] In an embodiment, the first opening area may be formed at an edge of the main display area, and the first opening peripheral area may surround only a portion of the first opening area.

[0022] In an embodiment, the display device may further include: a lower conductive layer disposed above the substrate and including a lower light shielding pattern and a lower shielding electrode; a lower insulating layer disposed on the lower conductive layer; an active pattern of a thin film transistor disposed on the lower insulating layer and overlapping the lower shielding electrode; a light emitting structure disposed on the substrate and electrically connected to the thin film transistor; a cover window disposed on the substrate; a light shielding member disposed between the substrate and the cover window and overlapping the first opening peripheral area; and an optical module overlapping the first opening area. The lower light shielding pattern may overlap the first opening peripheral area.

[0023] According to an embodiment, a display device includes: a substrate including a first opening area for transmitting light, a first opening peripheral area serving as a non-display area surrounding the first opening area, and a main display area surrounding the first opening peripheral area and having a plurality of pixels disposed therein; and a first signal line electrically connected to the pixels and passing through the first opening peripheral area. The main display area may have a quadrilateral shape disposed on a plane formed along a first direction and a second direction perpendicular to the first direction. The substrate may further include first to fourth edge display areas that contact each side of the main display area and are bent at a predetermined angle relative to the main display area.

[0024] According to an embodiment, a display device includes: a substrate including a first opening region that transmits light; a first opening peripheral region serving as a non-display region surrounding the first opening region; and a main display region surrounding the first opening peripheral region, in which a plurality of pixels are arranged and an image is displayed; a first signal line electrically connected to the pixels and passing through the first opening peripheral region; and a load matching section disposed in the first opening peripheral region and providing a load to the first signal line. The display device includes the opening region for positioning an optical module and an edge display region disposed at an edge portion of the main display region, and the load matching section disposed in the opening peripheral region surrounding the opening region, thereby improving display quality while expanding the display area.

[0025] Embodiments may relate to a display device. The display device may include a plurality of first pixels, a substrate, a first signal line, and a load matching device. The substrate may include a first opening, a first non-display area, and a main display area. The first non-display area may at least partially surround the first opening. The main display area may support the plurality of first pixels. The first signal line may be electrically connected to the plurality of first pixels, may overlap with the main display area, and may overlap with the first non-display area. The load matching device may overlap with the first non-display area and may provide a first electrical load to the first signal line.

[0026] The substrate may further include four edge display areas that are directly connected to four sides of the main display area, respectively, and are each bent at a predetermined angle with respect to the main display area.

[0027] The first signal line may be a scan line for providing a scan signal to the plurality of first pixels. The load matching device may include a load matching electrode. The load matching electrode may overlap the first signal line and may provide a first electrical load to the first signal line via a parasitic capacitance formed by the first signal line and the load matching electrode.

[0028] The display device may further include the following elements: a shielding electrode; a first insulating layer directly disposed on each of the load matching electrode and the shielding electrode; an active component of a thin film transistor disposed on the first insulating layer and overlapping the shielding electrode; a gate insulating layer disposed on the active component of the thin film transistor; and a gate electrode of the thin film transistor disposed on the gate insulating layer.

[0029] The display device may further include the following elements: an active component of a thin film transistor disposed on a substrate; a gate insulating layer disposed on the active component of the thin film transistor; a gate electrode of the thin film transistor disposed on the gate insulating layer; an interlayer insulating layer disposed on each of the gate electrode and the scan line; and a source electrode and a drain electrode, both disposed directly on the interlayer insulating layer and electrically connected to the active component of the thin film transistor. A load matching electrode may be disposed directly on the interlayer insulating layer. The material of the load matching electrode may be the same as that of each of the source electrode and the drain electrode.

[0030] The load matching device may be a dummy pixel electrically connected to the first signal line.

[0031] The load matching device may include a zigzag structure electrically connected to the first signal line.

[0032] The first signal line may have a first width perpendicular to a length direction of the first signal line. The load matching device may be electrically connected to the first signal line and may have a second width perpendicular to the length direction of the first signal line. The first width may not be equal to the second width.

[0033] The display device may further include a second signal line separated from each of the first non-display area and the load matching device in a plan view of the display device.

[0034] The display device may further include the following elements: a second signal line separated from the first non-display area in a plan view of the display device; a first gate circuit including a first output buffer electrically connected to the first signal line; and a second gate circuit including a second output buffer electrically connected to the second signal line.

[0035] The second output buffer may be larger than the first output buffer.

[0036] The second output buffer may include a dual-gate transistor. The first output buffer may include a single-gate transistor.

[0037] The first opening may include a first through-hole extending through the substrate.

[0038] The substrate may further include a second opening spaced apart from the first opening and may include a second non-display area surrounding the second opening. The first signal line may overlap the second non-display area. The display device may further include a second load matching device overlapping the second non-display area and configured to provide a second electrical load to the first signal line.

[0039] The substrate may further include a second opening spaced apart from the first opening.The first non-display area may surround each of the first opening and the second opening.

[0040] The first opening may be positioned closer to the first side of the main display area than the second side of the main display area.The first side of the main display area may be opposite to the second side of the main display area and may be shorter than the third side of the main display area.

[0041] The display device may further include a plurality of second pixels. The substrate may further include a first edge display region. The first edge display region may support the plurality of second pixels and may be curved relative to the main display region. The first opening may be formed in the first edge display region.

[0042] The first opening may be formed at an edge of the main display area. The first non-display area may partially surround the first opening.

[0043] The display device may further include the following elements: a first light shielding member overlapping the first non-display area; a shielding electrode; an insulating layer disposed on each of the first light shielding member and the shielding electrode; an active member of a thin film transistor disposed on the insulating layer and overlapping the shielding electrode; a light emitting structure disposed on the substrate and electrically connected to the thin film transistor; a cover window disposed on the substrate; a second light shielding member disposed between the substrate and the cover window and overlapping the first non-display area; and an optical module overlapping the position of the first opening.

[0044] Embodiments may relate to a display device. The display device may include a plurality of first pixels, a substrate, and a first signal line. The substrate may include a first opening, a first non-display area, a main display area, and four edge display areas. The first non-display area may at least partially surround the first opening. The main display area may surround the first non-display area and may support the plurality of first pixels. The four edge display areas may be directly connected to four sides of the main display area, respectively, and may each be bent at a predetermined angle relative to the main display area. The first signal line may be electrically connected to the plurality of first pixels and may overlap with the first non-display area. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 is a plan view showing a display device according to an embodiment.

[0046] Figure 2 is a diagram showing a method according to an embodiment of the present invention. Figure 1 A plan view of an opening of a display device and its vicinity.

[0047] Figure 3 is a diagram showing a method according to an embodiment of the present invention. Figure 1 A cross-sectional view of an opening of a display device and its vicinity.

[0048] Figure 4 is a cross-sectional view illustrating an opening and its vicinity of a display device according to an embodiment.

[0049] Figure 5 is a cross-sectional view illustrating an opening and its vicinity of a display device according to an embodiment.

[0050] Figure 6 is a cross-sectional view illustrating an opening and its vicinity of a display device according to an embodiment.

[0051] Figure 7 is a cross-sectional view illustrating an opening and its vicinity of a display device according to an embodiment.

[0052] Figure 8 is a plan view showing a display device according to an embodiment.

[0053] Figure 9 is a diagram showing a method according to an embodiment of the present invention. Figure 8 A plan view of an opening of a display device and its vicinity.

[0054] Figure 10 is a plan view showing a display device according to an embodiment.

[0055] Figure 11 is a diagram showing a method according to an embodiment of the present invention. Figure 10 A plan view of an opening of a display device and its vicinity.

[0056] Figure 12A is a plan view illustrating an opening and its vicinity of a display device according to an embodiment.

[0057] Figure 12B is a plan view illustrating an opening and its vicinity of a display device according to an embodiment.

[0058] Figure 12C is a plan view illustrating an opening and its vicinity of a display device according to an embodiment.

[0059] Figure 13 is a plan view showing a display device according to an embodiment.

[0060] Figure 14 is a diagram showing a method according to an embodiment of the present invention. Figure 13 A plan view of a first opening and a second opening of a display device and their vicinities.

[0061] Figure 15 is a plan view showing a display device according to an embodiment.

[0062] Figure 16 is a diagram showing a method according to an embodiment of the present invention. Figure 15 A plan view of an opening of a display device and its vicinity.

[0063] Figure 17 is a plan view showing a display device according to an embodiment.

[0064] Figure 18 is a plan view showing a display device according to an embodiment.

[0065] Figure 19 is a plan view showing a display device according to an embodiment.

[0066] Figure 20 is a plan view showing a display device according to an embodiment.

[0067] Figure 21A According to the embodiment of the invention Figure 20 A cross-sectional view taken along line II'.

[0068] Figure 21B According to the embodiment of the invention Figure 20A sectional view taken along line II-II'.

[0069] Figure 22 is a plan view showing a display device according to an embodiment.

[0070] Figure 23 According to the embodiment of the invention Figure 22 A cross-sectional view taken along line II'.

[0071] Figure 24 is a plan view showing a display device according to an embodiment.

[0072] Figure 25 is a diagram illustrating how gate line loading may be adjusted according to row position in a display device to help minimize display brightness variations according to an embodiment.

[0073] Figure 26 is a block diagram illustrating an electronic device according to an embodiment.

[0074] Figure 27A It shows that Figure 26 The electronic device is an example diagram of a television.

[0075] Figure 27B It shows that Figure 26 The electronic device is an example of a smart phone. DETAILED DESCRIPTION

[0076] Example embodiments are described with reference to the accompanying drawings. The term "pattern" may refer to a "component." The term "portion" may refer to a "component" or a "device." The term "connection" may refer to an "electrical connection." The term "insulation" may refer to "electrical insulation" or "electrical isolation." The term "opening region" may refer to an "opening." A listed item may refer to at least one (one or kind) of the listed items.

[0077] Although the terms "first", "second" etc. can be used to describe various elements, these elements should not be limited by these terms. These terms can be used to distinguish an element from another element. Without departing from the teaching of one or more embodiments, the first element can be named as the second element. Describing an element as a "first" element may not require or imply the existence of a second element or other elements. The terms "first", "second" etc. can be used to distinguish elements of different categories or different groups. For simplicity, the terms "first", "second" etc. can represent "first type (or first group)", "second type (or second group)" etc. respectively.

[0078] Figure 1 is a plan view showing a display device according to an embodiment. Figure 2 is a diagram showing a method according to an embodiment of the present invention. Figure 1A plan view of an opening area H and its vicinity of a display device.

[0079] Reference Figure 1 and Figure 2 The display device may include a substrate including a main display area MDA, a first edge display area EDA1, a second edge display area EDA2, a third edge display area EDA3, and a fourth edge display area EDA4. Although not shown in the drawings, a peripheral non-display area in which no image is displayed may be located along one or more edges of the display device.

[0080] A plurality of pixels PX for displaying an image may be arranged in the main display area MDA and the edge display areas EDA1 to EDA4. The main display area MDA may have a substantially rectangular shape in a plane defined by a first direction D1 and a second direction D2 perpendicular to the first direction D1. The length direction of the rectangular shape may be the second direction D2. The corners of the main display area MDA may have a rounded structure.

[0081] The first edge display area EDA1 may be curved at a boundary between the main display area MDA and the first edge display area EDA1 so that an image display surface of the first edge display area EDA1 is tilted at a predetermined angle relative to an image display surface of the main display area MDA. Similar to the first edge display area EDA1, each of the edge display areas EDA2 to EDA4 may be tilted at a predetermined angle relative to the main display area MDA.

[0082] The main display area MDA may include an opening area H for mounting the optical module, and may include an opening peripheral area HPA, which is a non-display area surrounding the opening area H. The opening area H of the substrate may transmit light. For example, a circular through-hole may be formed in the opening area H and may extend through the substrate, and / or a transparent window (e.g., a colorless transparent window) may be formed in the opening area H.

[0083] An optical module (not shown) may overlap with the opening area H, be exposed by the opening area H, or be disposed in the opening area H. For example, the optical module may include at least one of the following: a camera module for capturing (or recognizing) an image of an object; a facial recognition sensor module for sensing a user's face; a pupil recognition sensor module for sensing a user's pupils; one or more acceleration and geomagnetic sensor modules for determining movement of the display device; one or more proximity and / or infrared sensor modules for detecting proximity to the display device; and a light intensity sensor module for measuring brightness (when placed in a pocket or bag), etc.

[0084] The display device may include signal lines electrically connected to some of the pixels PX, and may include a load matching portion LMP disposed in the opening peripheral area HPA.

[0085] A plurality of scan lines may be electrically connected to the pixels PX to transmit scan signals to the pixels PX. For example, the scan lines may include a first scan line SLa, a second scan line SLb, and a third scan line SLc. The scan lines SLa to SLc may extend substantially in the first direction D1 and may be arranged in the second direction D2.

[0086] The first scan line SLa and the third scan line SLc do not pass through the opening peripheral area HPA. The second scan line SLb may pass through the opening peripheral area HPA. A portion of the second scan line SLb may be disposed in the opening peripheral area HPA.

[0087] Most of the pixels PX are arranged at uniform intervals. The second scan line SLb passes through the open peripheral area HPA, which is a non-display area, so that the number of pixels PX connected to the second scan line SLb is smaller than the number of pixels PX connected to each of the scan lines SLa and SLc. Therefore, the gate load on the second scan line SLb is less than that on each of the scan lines SLa and SLc, and an additional load needs to be provided to the second scan line SLb.

[0088] The load matching portion LMP may be / include at least one of a load matching electrode forming a load capacitor with the second scan line SLb, a narrow portion of the wiring of the second scan line SLb, a portion of the second scan line SLb where the second scan line SLb is bent in a zigzag manner and thus the wiring length is increased, and a dummy pixel. In an embodiment, the load matching portion LMP includes / is a load matching electrode LMP as a lower conductive layer overlapping the second scan line SLb (see Figure 2 and Figure 3 ).

[0089] Therefore, the gate load characteristics associated with the second scan line SLb are similar to the gate load characteristics associated with each of the scan lines SLa and SLc. Advantageously, the display quality degradation potentially caused by the presence of the opening area H can be minimized or prevented.

[0090] Figure 3 is a diagram showing a method according to an embodiment of the present invention. Figure 1 A cross-sectional view of an opening area H and its vicinity of a display device.

[0091] Reference Figures 1 to 3The display device includes a substrate 100, a buffer layer 110, a lower conductive layer, a lower insulating layer 120, an active pattern ACT, a first gate insulating layer 130, a first gate conductive layer, a second gate insulating layer 140, a second gate conductive layer, an interlayer insulating layer 150, a data conductive layer, a via insulating layer 160, a pixel defining layer PDL, a light emitting structure 180, a thin film encapsulation layer 190 and a cover layer OC.

[0092] The substrate 100 may include one or more transparent and / or opaque insulating materials. For example, the substrate 100 may include a quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluoride-doped quartz substrate, a soda-lime glass substrate, an alkali-free glass substrate, etc. The substrate 100 may include a flexible transparent material, such as a flexible transparent resin substrate (e.g., a polyimide substrate). The polyimide substrate may include a first polyimide layer, a barrier film layer, a second polyimide layer, etc. The substrate 100 may include a first polyimide layer, a first barrier layer disposed on the first polyimide layer, a second polyimide layer disposed on the first barrier layer, and a second barrier layer disposed on the second polyimide layer.

[0093] The buffer layer 110 may be disposed over the entire substrate 100. The buffer layer 110 may prevent metal atoms and / or impurities from diffusing from the substrate 100 into the active pattern ACT. The buffer layer 110 may control the heat transfer rate during the crystallization process for forming the active pattern ACT, thereby obtaining a substantially uniform active pattern ACT. The buffer layer 110 may provide a substantially flat surface over the substrate 100.

[0094] A lower conductive layer may be disposed on the buffer layer 110. The lower conductive layer may include a lower shielding electrode SHE and a load matching electrode LMP.

[0095] The lower shielding electrode SHE may overlap the active pattern ACT and may prevent significant degradation of the electrical characteristics of the active pattern ACT. For example, during the manufacturing process of the display device, the thin film transistor TFT may be protected from the effects of laser light or moisture flowing from the bottom of the substrate 100. The lower shielding electrode SHE may minimize a change in the threshold voltage of the thin film transistor TFT that may be potentially caused by laser light irradiating the active pattern ACT from the bottom of the substrate 100. The lower conductive layer may be made of a metal with low light transmittance. For example, the lower conductive layer may include molybdenum (Mo).

[0096] The load matching electrode LMP may overlap the second scan line SLb in the opening peripheral area HPA. Thus, a load capacitor may be formed between the load matching electrode LMP and the second scan line SLb. The load matching electrode LMP may be a floating electrode, or a constant voltage may be applied to the load matching electrode LMP. For example, a power supply voltage (ELVDD, ELVSS, etc.) may be applied to the load matching electrode LMP.

[0097] The load matching electrode LMP may be formed along the periphery of the opening peripheral area HPA and / or the periphery of the opening area H in a plan view of the display device.

[0098] The lower insulating layer 120 may be disposed on the buffer layer 110 and the lower conductive layer. The lower insulating layer 120 may prevent metal atoms and / or impurities from diffusing from the substrate 100 into the active pattern ACT. The lower insulating layer 120 may control the heat transfer rate during the crystallization process for forming the active pattern ACT to obtain a substantially uniform active pattern ACT.

[0099] An active pattern ACT of the thin film transistor TFT may be disposed on the lower insulating layer 120. The active pattern ACT may include amorphous silicon or polycrystalline silicon. The active pattern ACT may include an oxide of at least one material selected from the group consisting of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The active pattern ACT may include a drain region and a source region doped with impurities, and may include a channel region located between the drain region and the source region.

[0100] The first gate insulating layer 130 may be disposed on the lower insulating layer 120. The first gate insulating layer 130 may cover the active pattern ACT. The first gate insulating layer 130 may include a silicon compound, a metal oxide, etc. The first gate insulating layer 130 may include a plurality of layers.

[0101] In the drawings, the first gate insulating layer 130 sufficiently covers the active pattern ACT and has a substantially flat upper surface without steps surrounding the active pattern ACT. The first gate insulating layer 130 may cover the active pattern ACT and may have a substantially uniform thickness along a contour of the active pattern ACT.

[0102] A first gate conductive layer may be disposed on the first gate insulating layer 130. The first gate conductive layer may include a gate electrode GE and a scan line of the thin film transistor TFT. For example, the first gate conductive layer may include a second scan line SLb. The gate electrode GE may overlap the active pattern ACT. The first gate conductive layer may be formed of a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like.

[0103] The second gate insulating layer 140 may be disposed on the first gate insulating layer 130 and the first gate conductive layer. The second gate insulating layer 140 may include a silicon compound, a metal oxide, etc. The second gate insulating layer 140 may include a plurality of layers.

[0104] In the drawings, the second gate insulating layer 140 fully covers the gate electrode GE and has a substantially flat upper surface without a step around the gate electrode GE. The second gate insulating layer 140 may cover the first gate conductive layer and may have a substantially uniform thickness along the contour of the first gate conductive layer (e.g., the gate electrode GE).

[0105] A second gate conductive layer may be disposed on the second gate insulating layer 140. The second gate conductive layer may include an electrode GAT2 overlapping the gate electrode GE to form a storage capacitor, and may include a scan line SL. For example, the scan line SL may be adjacent to the second scan line SLb. The second gate conductive layer may be formed of a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like.

[0106] An interlayer insulating layer 150 may be disposed on the second gate insulating layer 140 and the second gate conductive layer. The interlayer insulating layer 150 may fully cover the second gate conductive layer and may have a substantially flat upper surface without steps surrounding the second gate conductive layer. The interlayer insulating layer 150 may cover the second gate conductive layer and may have a substantially uniform thickness along the contour of the second gate conductive layer. The interlayer insulating layer 150 may include a plurality of layers.

[0107] A data conductive layer may be disposed on the interlayer insulating layer 150. The data conductive layer may include a source electrode SE and a drain electrode DE of the thin film transistor TFT. The source electrode SE and the drain electrode DE are electrically connected to the active pattern ACT via contact holes formed through the first gate insulating layer 130, the second gate insulating layer 140, and the interlayer insulating layer 150. The data conductive layer may include a data line. The data conductive layer may be formed of a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like.

[0108] The via insulating layer 160 may be disposed on the interlayer insulating layer 150 and the data conductive layer. The via insulating layer 160 may have a single-layer structure or a multi-layer structure including at least two insulating films. The via insulating layer 160 may be formed of an organic material. For example, the via insulating layer 160 may include a photoresist, an acrylic resin, a polyimide resin, a polyamide resin, a siloxane resin, or the like. The via insulating layer 160 may also include an inorganic material such as a silicon compound or a metal oxide.

[0109] The light emitting structure 180 may include a first electrode 181 , a light emitting layer 182 , and a second electrode 183 .

[0110] The first electrode 181 may be disposed on the via insulating layer 160. The first electrode 181 may include a reflective material or a transmissive material depending on the emission type of the display device. For example, the first electrode 181 may include at least one of aluminum, an aluminum-containing alloy, aluminum nitride, silver, an silver-containing alloy, tungsten, tungsten nitride, copper, an alloy containing copper, nickel, chromium, chromium nitride, molybdenum, an alloy containing titanium, titanium nitride, platinum, tantalum, tantalum nitride, neodymium, scandium, ruthenium strontium oxide, zinc oxide, indium tin oxide, tin oxide, indium oxide, gallium oxide, indium zinc oxide, etc. The first electrode 181 may have a single-layer structure or a multi-layer structure that may include a metal film, an alloy film, a metal nitride film, a conductive metal oxide film, and / or a transparent conductive film.

[0111] The pixel defining layer PDL may be disposed on the via insulating layer 160 and may partially overlap with the first electrode 181. The pixel defining layer PDL may be formed of an organic material. For example, the pixel defining layer PDL may include a photoresist, an acrylic resin, a polyimide resin, a polyamide resin, a siloxane resin, or the like. An opening exposing the first electrode 181 may be formed by etching the pixel defining layer PDL. The emission area and the non-emission area of the display device may be defined by the opening of the pixel defining layer PDL. For example, the opening of the pixel defining layer PDL may correspond to the emission area of the display device, and the non-emission area of the display device may be adjacent to the opening of the pixel defining layer PDL.

[0112] The light-emitting layer 182 may be provided on a portion of the first electrode 181 exposed by the opening of the pixel defining layer PDL. The light-emitting layer 182 may extend on the sidewalls of the opening of the pixel defining layer PDL. The light-emitting layer 182 may include an organic light-emitting layer (EL), a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), an electron injection layer (EIL), and the like. In some example embodiments, the hole injection layer, the hole transport layer, the electron transport layer, and the electron injection layer may correspond to a plurality of pixels. The plurality of organic light-emitting layers may be formed of light-emitting materials to generate light of different colors, such as red, green, and blue, according to the color pixels of the display device. The organic light-emitting layer of the light-emitting layer 182 may include a plurality of stacked light-emitting materials for generating red, green, and blue light to emit white light. The elements of the light-emitting layer 182 may correspond to a plurality of pixels, and different pixels may include different color filter layers to display different colors.

[0113] The second electrode 183 may be disposed on the pixel defining layer PDL and the light emitting layer 182. The second electrode 183 may include a transmissive material or a reflective material depending on the emission type of the display device. For example, the second electrode 183 may include at least one of aluminum, an aluminum-containing alloy, aluminum nitride, silver, an alloy containing silver, tungsten, tungsten nitride, copper, an alloy containing copper, nickel, chromium, chromium nitride, molybdenum, an alloy containing titanium, titanium nitride, platinum, tantalum, tantalum nitride, neodymium, scandium, ruthenium strontium oxide, zinc oxide, indium tin oxide, tin oxide, indium oxide, gallium oxide, indium zinc oxide, etc. The second electrode 183 may also have a single-layer structure or a multi-layer structure that may include a metal film, an alloy film, a metal nitride film, a conductive metal oxide film, and / or a transparent conductive film.

[0114] The pixel circuit including the thin film transistor TFT and the light emitting structure 180 in the main display area MDA may correspond to one pixel PX for displaying a portion of an image.

[0115] The dam DAM may surround the opening area H and may be positioned in the opening peripheral area HPA. The dam DAM may control the formation position of the organic layer 192 of the thin film encapsulation layer 190 to prevent the formation of an organic edge tail. The dam DAM may be formed using the same material layer as the via insulating layer 160 and the pixel defining layer PDL.

[0116] The thin film encapsulation layer 190 may be provided on the second electrode 183. The thin film encapsulation layer 190 may prevent moisture and oxygen from penetrating from the periphery of the display device. The thin film encapsulation layer 190 may include at least one organic layer and at least one inorganic layer. The at least one organic layer and the at least one inorganic layer may be alternately stacked. For example, the thin film encapsulation layer 190 may include a first inorganic layer 191, a second inorganic layer 193, and an organic layer 192 located between the first inorganic layer 191 and the second inorganic layer 193. In some example embodiments, a sealing substrate (instead of the thin film encapsulation layer 190) may be provided to shield external air and moisture from penetrating into the display device.

[0117] An overcoat layer OC may be formed in the opening peripheral area HPA on the second inorganic layer 193 to compensate for the overall height of the display device.

[0118] In the opening peripheral area HPA, a groove TC surrounding the opening area H (in a plan view) may be formed on the substrate 100. The inorganic layers 191 and 193 of the thin film encapsulation layer 190 may extend along the side surfaces of the groove TC. In this case, the paths of moisture inflow, oxygen inflow, and / or cracks through the inorganic layers 191 and 193 can be sufficiently extended. Therefore, in the area adjacent to the opening area H, moisture, oxygen, and cracks do not reach the internal elements along the inorganic layers 191 and 193. Therefore, the display device can have satisfactory reliability and stability.

[0119] According to an embodiment, since the display device includes a load matching portion in the opening peripheral area HPA, it is possible to compensate for gate load deviation caused by the opening area H. The load matching portion may be / include a load matching electrode LMP located in the opening peripheral area HPA of a lower conductive layer to minimize the size of the non-display opening peripheral area HPA.

[0120] Figure 4 is a cross-sectional view illustrating an opening region H and its vicinity of a display device according to an embodiment.

[0121] Reference Figure 4 , except that the partition wall BH replaces the groove and the dam, the display device is similar to Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The display devices are basically similar.

[0122] The organic layer 192 of the thin film encapsulation layer 190 may be patterned so that the organic layer 192 may not overlap the partition wall BH.

[0123] The inorganic layers 191 and 193 of the thin film encapsulation layer 190 overlap with the partition wall BH. The inorganic layers 191 and 193 may be formed along the tapered surface of the partition wall BH. In this case, the display device (e.g., an organic light-emitting diode display device) may have a long path for moisture, oxygen, and / or cracks passing through the inorganic layers 191 and 193. Therefore, in the area adjacent to the opening area H, moisture, oxygen, and cracks do not reach the internal elements along the inorganic layers 191 and 193. Therefore, the display device may have satisfactory reliability and stability.

[0124] Figure 5 is a cross-sectional view illustrating an opening region H and its vicinity of a display device according to an embodiment.

[0125] The display device is similar to the display device except that the partition wall BH replaces the dam and the groove. Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The display devices are basically similar.

[0126] The lower insulating layer 120, the first gate insulating layer 130, the second gate insulating layer 140, the interlayer insulating layer 150, the via insulating layer 160, and the pixel defining layer PDL may extend to the opening peripheral area HPA. The partition wall BH may protrude above the above layers to separate portions of the layers above the above layers in the opening peripheral area HPA.

[0127] For example, the partition wall BH can separate the inorganic layers 191 and 193 of the thin film encapsulation layer 190 in the opening peripheral area HPA. Therefore, water, oxygen, and / or cracks are not transmitted / propagated along the inorganic layers 191 and 193 in the opening peripheral area HPA. Advantageously, the display device can have satisfactory reliability and stability. The partition wall BH can be used as a spacer to prevent the mask from directly contacting the elements of the display device during the manufacture of the display device.

[0128] Figure 6 is a cross-sectional view illustrating an opening region H and its vicinity of a display device according to an embodiment.

[0129] Reference Figure 6 , except for the structure between the dam DAM and the opening area H, the display device and Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The substrate 100 may not include a groove between the dam DAM and the opening region H.

[0130] Figure 7 is a cross-sectional view illustrating an opening region H and its vicinity of a display device according to an embodiment.

[0131] Reference Figure 7 , except that the load matching electrode LMP is included in the data conductive layer instead of the lower conductive layer, the display device is similar to Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The display devices are basically similar.

[0132] The load matching electrode LMP may be formed in the first gate conductive layer or in the second gate conductive layer.

[0133] Figure 8 is a plan view showing a display device according to an embodiment. Figure 9 is a diagram showing a method according to an embodiment of the present invention. Figure 8 A plan view of an opening area H and its vicinity of a display device.

[0134] Reference Figure 8 and Figure 9 , the display device may include a display area DA, and may include a non-display peripheral area PA surrounding the display area DA.

[0135] A plurality of pixels PX may be disposed in the display area DA to display an image. The display area DA may have a substantially rectangular shape having long sides extending in the second direction D2 and short sides extending in the first direction D1.

[0136] The display device may include an opening area H for mounting the optical module, and may include a non-display opening peripheral area HPA surrounding the opening area H. The opening area H of the substrate may transmit light. For example, a circular hole may be formed in the opening area H and may extend through the substrate, and / or a transparent window may be formed in the opening area H.

[0137] The display device may further include signal lines (eg, scan lines) electrically connected to some of the pixels PX, and may include a load matching portion LMP disposed in the opening peripheral area HPA.

[0138] The scan lines may be electrically connected to the subsets of pixels PX, respectively. For example, the scan lines may include a first scan line SLa, a second scan line SLb, and a third scan line SLc.

[0139] The load matching portion LMP may be / include at least one of a load matching electrode forming a load capacitor with the second scan line SLb, a narrow portion of the wiring of the second scan line SLb, a portion of the second scan line SLb where the second scan line SLb is bent in a zigzag manner and the wiring length is increased, and a dummy pixel, etc.

[0140] Figure 10 is a plan view showing a display device according to an embodiment. Figure 11 is a diagram showing a method according to an embodiment of the present invention. Figure 10 A plan view of an opening area H and its vicinity of a display device.

[0141] Reference Figure 10 and Figure 11 The display device may include a main display area MDA, a first edge display area EDA1, a second edge display area EDA2, a third edge display area EDA3, and a fourth edge display area EDA4. The non-display peripheral area may be formed along the edge of the display device.

[0142] The main display area MDA may include an opening area H for mounting the optical module, and may include a non-display opening peripheral area HPA surrounding the opening area H. The opening area H may transmit light. For example, a circular hole and / or a transparent window penetrating the substrate may be formed in the opening area H.

[0143] The display device may include signal lines (eg, scan lines) electrically connected to some pixels PX in the main display area MDA, and may include a load matching portion LMP disposed in the opening peripheral area HPA.

[0144] The scan lines may be electrically connected to subsets of the pixels PX of the display device, respectively. For example, the scan lines may include a first scan line SLa, a second scan line SLb, and a third scan line SLc. The scan lines SLa to SLc may extend substantially in the first direction D1 and may be arranged in the second direction D2.

[0145] The first scan line SLa and the third scan line SLc do not pass through the opening peripheral area HPA. The second scan line SLb may pass through the opening peripheral area HPA. A portion of the second scan line SLb may be disposed in the opening peripheral area HPA and may function as and / or be electrically connected to the load matching portion LMP.

[0146] The second scan line SLb and / or the load matching portion LMP can substantially surround the opening peripheral area HPA multiple times. Therefore, the second scan line SLb (including and / or connected to the load matching portion LMP) can be longer than each of the first scan line SLa and the third scan line SLc. Advantageously, the loads associated with the scan lines can be substantially matched, and satisfactory image display quality can be achieved. The display device may further include a load matching electrode overlapping the portion of the second scan line SLb in the opening peripheral area HPA.

[0147] Figure 12A is a plan view showing an opening region H and its vicinity of a display device according to an embodiment. Figure 12B is a plan view showing an opening region H and its vicinity of a display device according to an embodiment. Figure 12C is a plan view showing an opening region H and its vicinity of a display device according to an embodiment.

[0148] Reference Figure 12A and Figure 12B , except for the shape of the portion of the second scan line SLb in the opening peripheral area HPA, the display device is similar to Figure 11 The display device is basically the same as or Figure 11 The display devices are basically similar. Figures 11 to 12B , the second scan line SLb is bent in various shapes in the opening peripheral area HPA, thereby being longer than each of the scan lines SLa and SLc.

[0149] Reference Figure 12C , except that the second width W2 of the second scan line SLb in the opening peripheral area HPA is smaller than the first width W1 of the second scan line SLb in the display area and / or smaller than the third width W3 of the third scan line SLc, the display device is the same as Figure 11 The display device is basically the same as or Figure 11 Therefore, the loads associated with the scan lines can be substantially matched, and satisfactory image display quality can be obtained.

[0150] Figure 13 is a plan view showing a display device according to an embodiment. Figure 14 is a diagram showing a method according to an embodiment of the present invention. Figure 13 A plan view of a first opening area H1 and a second opening area H2 of a display device and their vicinities.

[0151] Reference Figure 13 and Figure 14 , except for the first opening area H1, the second opening area H2 and the opening peripheral area HPA, the display device and Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The display devices are basically similar.

[0152] The display device includes a first opening area H1 for mounting an optical / functional module, a second opening area H2 separated from the first opening area H1 for accommodating the optical / functional module, and a non-display opening peripheral area HPA surrounding the first opening area H1 and the second opening area H2. The opening areas H1 and H2 can transmit light. For example, at least one circular hole and / or at least one transparent window penetrating the substrate can be formed in the opening areas H1 and H2.

[0153] An optical / functional module (not shown) may overlap with at least one of the opening areas H1 and H2 or may be disposed within at least one of the opening areas H1 and H2. For example, the optical / functional module may include at least one of a camera module for capturing (or recognizing) an image of an object, a facial recognition sensor module for sensing a user's face, a pupil recognition sensor module for sensing a user's pupils, an acceleration and geomagnetic sensor module for determining the movement of the display device, a proximity and infrared sensor module for detecting proximity to the display device, and a light intensity sensor module for measuring the degree of brightness (when placed in a pocket or bag). Different optical / functional modules may correspond to the first opening area H1 and the second opening area H2 and / or may be disposed in the first opening area H1 and the second opening area H2.

[0154] The display device may include signal lines (eg, scan lines) electrically connected to some pixels PX in the main display area MDA, and may include a load matching portion LMP disposed in the opening peripheral area HPA.

[0155] The display device may include a first scan line SLa, a second scan line SLb, and a third scan line SLc.

[0156] The first scan line SLa and the third scan line SLc do not pass through the opening peripheral area HPA. The second scan line SLb may pass through the opening peripheral area HPA. A portion of the second scan line SLb may be disposed in the opening peripheral area HPA.

[0157] The load matching portion LMP may be a load matching electrode forming a load capacitor with the second scan line SLb, a narrow portion of the wiring of the second scan line SLb, a portion of the second scan line SLb where the second scan line SLb is bent in a zigzag manner and thus the wiring length is increased, and a dummy pixel. The load matching portion LMP may include a zigzag structure overlapped with the second scan line SLb (located at the same position as the zigzag structure). Figure 3 The load matching portion LMP may include the load matching electrode and may include a zigzag structure electrically connected to the second scan line SLb and overlapping the load matching electrode.

[0158] Figure 15 is a plan view showing a display device according to an embodiment. Figure 16 is a diagram showing a method according to an embodiment of the present invention. Figure 15 A plan view of an opening area H and its vicinity of a display device.

[0159] Reference Figure 15 and Figure 16 , except that one or more dummy pixels DPX serve as at least a portion of the load matching portion, the display device and Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The display devices are basically similar.

[0160] At least one dummy pixel DPX can be electrically connected to the second scan line SLb and can be arranged in the opening peripheral area HPA. The dummy pixel DPX can have a structure and / or load equivalent to that of the pixel PX that displays the image. The pixel circuit of the dummy pixel DPX can be substantially the same as the pixel circuit of the pixel PX. The sum of the number of dummy pixels DPX connected to the second scan line SLb and the number of pixels PX can be equal to the number of pixels PX connected to each of the scan lines SLa and SLc. The sum of the load of the dummy pixel DPX provided to the second scan line SLb and the load of the pixel PX can be equal to the load of the pixel PX provided to each of the scan lines SLa and SLc.

[0161] Figure 17 is a plan view showing a display device according to an embodiment.

[0162] Reference Figure 17 , in addition to using the output buffer of the gate circuit to compensate for the load deviation, the display device and Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The display devices are basically similar.

[0163] The first gate circuits GDa1 and GDa2, including output buffers, can be electrically connected to the first scan line SLa (which is separated from the non-displayed opening peripheral area HPA). The second gate circuits GDb1 and GDb2, including output buffers, can be electrically connected to the second scan line SLb (which extends through and / or overlaps the non-displayed opening peripheral area HPA). The third gate circuits GDc1 and GDc2, including output buffers, can be electrically connected to the third scan line SLc (which is separated from the non-displayed opening peripheral area HPA). In the first to third gate circuits, the first to third scan signals can be output through the output buffers, respectively.

[0164] The output buffers (e.g., sizes) of the second gate circuits GDb1 and GDb2 connected to the second scan line SLb may be smaller than the output buffers (e.g., sizes) of the first gate circuits GDa1 and GDa2 connected to the first scan line SLa or the third gate circuits GDc1 and GDc2 connected to the third scan line SLc. For example, when the width of the output buffers of the first gate circuits GDa1 and GDa2 connected to the first scan line SLa or the third gate circuits GDc1 and GDc2 connected to the third scan line SLc is approximately 120 micrometers, the width of the output buffers of the second gate circuits GDb1 and GDb2 connected to the second scan line SLb may be approximately 104 micrometers.

[0165] The size difference may provide an output difference between the gate circuits to compensate for load variation.The output buffer may be a light emission control buffer that outputs a light emission control signal of the organic light emitting diode.

[0166] For the signal wiring corresponding to the opening area H, the size of the buffer is reduced to generate an output difference sufficient to compensate for the load difference. Advantageously, degradation of display quality can be minimized or prevented.

[0167] As an alternative or supplement to the output buffer size difference, the output buffers of the first gate circuit GDa1 and GDa2 connected to the first scan line SLa or the third gate circuit GDc1 and GDc2 connected to the third scan line SLc may include dual-gate transistors, and the output buffers of the second gate circuit GDb1 and GDb2 connected to the second scan line SLb may include single-gate transistors to compensate for load variations / differences.

[0168] Figure 18 is a plan view showing a display device according to an embodiment.

[0169] Reference Figure 18, except for the positions of the opening area H and the opening peripheral area HPA, the display device can be Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The display devices are basically similar.

[0170] The opening area H and the opening peripheral area HPA may be formed adjacent to the long side of the main display area MDA. The main display area MDA has a length in the first direction D1 that is longer than a length in the second direction D2, and the opening area H and the opening peripheral area HPA are formed adjacent to the long side of the main display area MDA. The plurality of opening areas H may be substantially aligned in the first direction D1. The plurality of opening peripheral areas HPA may be substantially aligned in the first direction D1.

[0171] Figure 19 is a plan view showing a display device according to an embodiment.

[0172] Reference Figure 19 , except for the opening area and the opening peripheral area, the display device and Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The display devices are basically similar.

[0173] The opening area may include a first opening area H1, a second opening area H2, a third opening area H3, and a fourth opening area H4 that are separated from each other. The opening peripheral area HPA may surround the opening areas H1 to H4 and may have a generally rectangular shape / structure. The opening areas H1 to H4 may have different shapes, such as rectangular and circular.

[0174] Figure 20 is a plan view showing a display device according to an embodiment. Figure 21A According to the embodiment of the invention Figure 20 A cross-sectional view taken along line II'. Figure 21B According to the embodiment of the invention Figure 20 A sectional view taken along line II-II'.

[0175] Reference Figures 20 to 21B The opening area H and the opening peripheral area HPA are formed in the first edge display area EDA1. The portion of the substrate at the opening area H and the opening peripheral area HPA can be flat and not curved. This is because the optical module can be disposed in the opening area H, and if the substrate is curved at the opening area H or the opening peripheral area HPA, the performance of the optical module may be degraded due to reflected light.

[0176] The degree of curvature of the first edge display area EDA1 relative to the main display area MDA may not be equal to the degree of curvature of each of the edge display areas EDA2, EDA3, and EDA4 relative to the main display area MDA. For example, a first non-obtuse angle θ1 between a surface orthogonal to the first edge display area EDA1 and a surface orthogonal to the main display area MDA may be smaller than a second non-obtuse angle θ2 between a surface orthogonal to one of the edge display areas EDA2 to EDA4 and a surface orthogonal to the main display area MDA.

[0177] Figure 22 is a plan view showing a display device according to an embodiment. Figure 23 According to the embodiment of the invention Figure 22 A cross-sectional view taken along line II'.

[0178] Reference Figure 22 and Figure 23 The display device includes: a display panel 10; a cover window WD provided on the display panel 10; a light shielding member BM provided between the display panel 10 and the cover window WD and overlapping with the non-display opening peripheral area HPA of the substrate of the display panel 10 (i.e., positioned in the opening peripheral area HPA of the display device); and an optical module 30 overlapping with the position of the opening area H. The display panel 10 can be Figures 1 to 3 The display panel of the display device is substantially the same as or Figures 1 to 3 The display panel of the display device is substantially similar. The display device may further include a protection sheet 20 disposed under the display panel 10.

[0179] The lower conductive layer of the display panel 10 (see Figure 3 ) may further include a lower light shielding pattern BML.

[0180] The lower light-shielding pattern BML can overlap the opening peripheral area HPA to block light leakage between the optical module 30, the display panel 10, and the light-shielding member BM. Because the lower light-shielding pattern BML can prevent light leakage, a portion of the protective sheet 20 corresponding to the opening peripheral area HPA is removed. Consequently, the space between the optical module 30 and the display panel 10 can be minimized, thereby minimizing the overall thickness of the display device and / or optimizing the performance of the optical module 30.

[0181] Figure 24 is a plan view showing a display device according to an embodiment.

[0182] Reference Figure 24, except that an opening area (which corresponds to the optical module CM) is formed at an edge / corner of the display area, the opening area has an L-cut shape L-CUT or a C-cut shape and the load matching portion LMP may partially surround the opening area, the display device and Figures 1 to 3 The display device is basically the same as or Figures 1 to 3 The display devices are basically similar.

[0183] Figure 25 is a diagram illustrating how gate line loading may be adjusted according to row position in a display device to help minimize display brightness variations according to an embodiment.

[0184] Figure 25 The effect of reducing brightness fluctuations in a display device is shown. The display device has an opening area and an opening peripheral area, so that different pixel rows may have unequal numbers of pixels. Line 90 on the graph corresponds to a display device that does not include a supplementary load structure. In the area corresponding to the opening peripheral area (connected to Figure 1 The amount of load of the pixel row of the scanning line SLb in the opening and the ... Figure 1 There is a significant discontinuity (or load difference DLM) between the loads of adjacent pixel rows (of a scan line SLa or SLc in the image). This discontinuity can lead to significant variations in pixel brightness.

[0185] According to embodiments, such brightness fluctuations can be minimized or prevented by implementing load difference compensation. According to embodiments, as shown by line 96, the amount of load LM of the pixel row corresponding to the opening peripheral area can be substantially consistent and substantially equal to the amount of load LM of the adjacent pixel row separated from the opening peripheral area. Advantageously, satisfactory image display quality can be achieved.

[0186] Figure 26 is a block diagram illustrating an electronic device according to example embodiments. Figure 27A It shows that Figure 26 The electronic device is an example diagram of a television. Figure 27B It shows that Figure 26 The electronic device is an example of a smart phone.

[0187] Reference Figures 26 to 27B , the electronic device 500 may include a processor 510, a memory device 520, a storage device 530, an input / output (I / O) device 540, a power supply 550, and a display device 560. The display device 560 may correspond to Figure 1 The electronic device 500 may also include a plurality of ports for communicating with a video card, a sound card, a memory card, a universal serial bus (USB) device, other electronic devices, etc. In an example embodiment, as Figure 27AAs shown in , the electronic device 500 may be a television set having an optical / functional module CM. In another exemplary embodiment, as Figure 27B As shown in , the electronic device 500 may be a smart phone having an optical / functional module CM. The electronic device 500 may be one of a cellular phone, a video phone, a smart pad, a smart watch, a tablet PC, a car navigation system, a computer monitor, a laptop computer, a head mounted display (HMD), etc.

[0188] The processor 510 can perform various computing functions. The processor 510 can be a microprocessor, a central processing unit (CPU), an application processor (AP), etc. The processor 510 can be connected to other components via an address bus, a control bus, a data bus, etc. In addition, the processor 510 can be connected to an expansion bus such as a peripheral component interconnect (PCI) bus. The memory device 520 can store data used to operate the electronic device 500. For example, the memory device 520 can include at least one non-volatile memory device (such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase change random access memory (PRAM) device, a resistive random access memory (RRAM) device, a nano-floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, a ferroelectric random access memory (FRAM) device, etc.) and / or at least one volatile memory device (such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, a mobile DRAM device, etc.). The storage device 530 may include a solid-state drive (SSD) device, a hard disk drive (HDD) device, a CD-ROM device, etc. The I / O device 540 may include an input device such as a keyboard, a keypad, a mouse device, a touch pad, a touch screen, etc., and an output device such as a printer, a speaker, etc. The power supply 550 may provide power for the operation of the electronic device 500.

[0189] The display device 560 can be connected to other components via a bus or other communication link. The display device 560 can be included in the I / O device 540. The display device 560 can include an opening area for implementing the optical module and can include an edge display area arranged at the edge of the main display area. The load matching portion is arranged in the opening peripheral area surrounding the opening area. Therefore, satisfactory image display quality can be achieved.

[0190] The embodiments can be applied to various display devices and various electronic devices including various display devices. For example, the embodiments can be applied to mobile phones, smart phones, video phones, smart boards, smart watches, tablet PCs, car navigation systems, televisions, computer monitors, notebooks, etc.

[0191] Although example embodiments have been described, those skilled in the art will readily appreciate that numerous modifications are possible. All such modifications are intended to be included within the scope of the claims. In the claims, means-function clauses are intended to cover structures as described herein that perform the recited function and are intended to cover not only structural equivalents but also equivalent structures.

Claims

1. A display device, comprising: a plurality of first pixels; a substrate comprising a first opening, a first non-display area, and a main display area, wherein the first non-display area at least partially surrounds the first opening, and wherein the main display area supports the plurality of first pixels; a first signal line electrically connected to the plurality of first pixels, overlapping the main display area and overlapping the first non-display area; and a load matching device overlapping the first non-display area and configured to provide a first electric load to the first signal line, wherein the load matching device includes a load matching electrode overlapping the first signal line and serving as a floating electrode, the load matching electrode and the first signal line forming a parasitic capacitance, and providing the first electric load to the first signal line through the parasitic capacitance, or The load matching device includes a portion electrically connected to the first signal line to increase a wiring resistance of the first signal line, and provides the first electric load to the first signal line through the wiring resistance.

2. The display device according to claim 1, wherein The substrate further includes four edge display areas, which are directly connected to four side edges of the main display area and are bent at a predetermined angle relative to the main display area.

3. The display device according to claim 1, wherein The first signal line is a scan line for supplying a scan signal to the plurality of first pixels.

4. The display device according to claim 3, further comprising: Shielding electrode; a first insulating layer disposed directly on each of the load matching electrode and the shielding electrode; an active component of a thin film transistor, disposed on the first insulating layer and overlapping the shielding electrode; a gate insulating layer disposed on the active component of the thin film transistor; and The gate electrode of the thin film transistor is arranged on the gate insulating layer.

5. The display device according to claim 3, further comprising: An active component of a thin film transistor is disposed on the substrate; a gate insulating layer disposed on the active component of the thin film transistor; The gate electrode of the thin film transistor is arranged on the gate insulating layer; an interlayer insulating layer provided on each of the gate electrode and the scan line; and a source electrode and a drain electrode, both disposed directly on the interlayer insulating layer and both electrically connected to the active member of the thin film transistor, wherein the load matching electrode is directly disposed on the interlayer insulating layer, and The material of the load matching electrode is the same as that of each of the source electrode and the drain electrode. The display device according to claim 1 , wherein: The load matching device is a dummy pixel electrically connected to the first signal line.

7. The display device according to claim 1, wherein The load matching device includes a zigzag structure electrically connected to the first signal line.

8. The display device according to claim 1, wherein The first signal line has a first width perpendicular to a length direction of the first signal line, wherein the load matching device is electrically connected to the first signal line and has a second width perpendicular to the length direction of the first signal line, and wherein the first width is not equal to the second width.

9. The display device according to claim 1, further comprising: A second signal line is separated from each of the first non-display area and the load matching device in a plan view of the display apparatus.

10. The display device according to claim 1, wherein The substrate further includes a second opening spaced apart from the first opening, and the substrate further includes a second non-display area surrounding the second opening, Wherein, the first signal line overlaps with the second non-display area, and The display device further includes a second load matching device, which overlaps the second non-display area and is configured to provide a second electric load to the first signal line.

11. The display device according to claim 1, wherein The substrate further includes a second opening spaced apart from the first opening, and wherein the first non-display area surrounds each of the first opening and the second opening.

12. The display device according to claim 1, wherein The first opening is positioned closer to the first side of the main display area than to the second side of the main display area, and wherein the first side of the main display area is opposite to the second side of the main display area and is shorter than the third side of the main display area.

13. The display device according to claim 1, further comprising a plurality of second pixels, wherein: The substrate further includes a first edge display region, wherein the first edge display region supports the plurality of second pixels and is bent relative to the main display region, and wherein the first opening is formed in the first edge display region.

14. The display device according to claim 1, wherein The first opening is formed at an edge of the main display area, and wherein the first non-display area partially surrounds the first opening.

15. The display device according to claim 1, further comprising: a first light shielding member overlapping the first non-display area; Shielding electrode; an insulating layer provided on each of the first light shielding member and the shielding electrode; an active component of a thin film transistor, disposed on the insulating layer and overlapping the shielding electrode; a light emitting structure, disposed on the substrate and electrically connected to the thin film transistor; a cover window, disposed on the base; a second light shielding member disposed between the substrate and the cover window and overlapping the first non-display area; as well as The optical module overlaps with the first opening.

16. A display device, comprising: a plurality of first pixels; a substrate comprising a first opening, a first non-display area, a main display area, and four edge display areas, wherein the first non-display area at least partially surrounds the first opening, wherein the main display area surrounds the first non-display area and supports the plurality of first pixels, wherein the four edge display areas are directly connected to four sides of the main display area, respectively, and are bent at a predetermined angle relative to the main display area; a first signal line electrically connected to the plurality of first pixels and overlapping the first non-display area; and a load matching device overlapping the first non-display area and configured to provide a first electric load to the first signal line, wherein the load matching device includes a load matching electrode overlapping the first signal line and serving as a floating electrode, the load matching electrode and the first signal line forming a parasitic capacitance, and providing the first electric load to the first signal line through the parasitic capacitance, or The load matching device includes a portion electrically connected to the first signal line to increase a wiring resistance of the first signal line, and provides the first electric load to the first signal line through the wiring resistance.

Images