Seam bridging using high pressure annealing

Abstract

Aspects of the present disclosure include methods of processing a substrate. The methods include depositing a conformal layer on a substrate comprising a seam. The substrate is processed using a high pressure anneal in the presence of an oxidant.

Description

Technical Field

[0001] Embodiments of the present disclosure relate generally to integrated circuit manufacturing methods, and more particularly, to correcting seam defects in semiconductor devices. Background Art

[0002] The miniaturization of semiconductor devices continues to require increasing complexity in the geometry and arrangement of the material layers forming the devices. Among other things, properly filling features formed on semiconductor devices, such as trenches and vias, with material has become increasingly difficult as the size of the features shrinks.

[0003] Features are typically filled by a deposition process, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), or electroplating processes, which can result in less than optimal feature filling. The problem arises from the accumulation of material at the upper surface of the feature. This accumulation of material at the edge of the feature can block or otherwise impede the feature before it is completely and evenly filled, resulting in the formation of voids, seams, and non-uniform structures within the feature. Smaller features used in smaller geometry devices (such as trenches in the tens of nanometers range) necessarily have a larger aspect ratio (i.e., the relationship between feature height and width) than larger geometry devices, thereby exacerbating the difficulties of trench and via filling described above.

[0004] Conventional methods utilize multiple cycles of deposition and annealing to attempt to repair seams and cavities in features. However, these conventional methods result in extremely slow processing times. In addition, these methods can damage the materials of semiconductor devices and cause reliability issues in the operation of semiconductor devices.

[0005] Thus, there is a need for improved methods of correcting seam defects. Summary of the invention

[0006] In one embodiment, a method of processing a substrate is provided, comprising: positioning a substrate having a plurality of substrate features in a processing chamber, depositing a conformal layer on the substrate features, and processing the substrate with a high pressure anneal. When the conformal layer is deposited, seams are formed between adjacent substrate features. The high pressure anneal is performed in the presence of an oxidant. The volume of the seams within the conformal layer is reduced by the high pressure anneal.

[0007] In another embodiment, a method of processing a substrate is provided, comprising: positioning a substrate having a plurality of substrate features in a processing chamber, depositing a conformal layer on the substrate features, and processing the substrate with a high pressure anneal. The structure of the conformal layer is crystalline. When the conformal layer is deposited, seams are formed between adjacent substrate features. The high pressure anneal is performed in the presence of an oxidant. The volume of the seams within the conformal layer is reduced by the high pressure anneal.

[0008] In another embodiment, a method of processing a substrate is provided, comprising: positioning a substrate having a plurality of substrate features in a processing chamber, depositing a conformal layer on the substrate features, and processing the substrate with a high pressure anneal. The structure of the conformal layer is crystalline. When the conformal layer is deposited, a seam is formed between adjacent substrate features. The high pressure anneal is performed in the presence of an oxidant. The volume of the seam within the conformal layer is reduced by the high pressure anneal. The volume of the conformal layer expands during the high pressure anneal.

[0009] High pressure annealing helps reduce the size of seams between conformal films that are disposed over adjacent features of the semiconductor. The reduction in seam size increases the electrical insulating properties of the conformal film. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to understand the above-mentioned features of the present disclosure in detail, a more specific description of the present disclosure briefly summarized above can be obtained by reference to embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the drawings only show exemplary embodiments and are not to be considered as limiting the scope, as the present disclosure may allow other equally effective embodiments.

[0011] Figure 1 is a flow chart of a method of processing a substrate according to one embodiment of the present disclosure.

[0012] Figure 2A is Figure 1 A cross-sectional view of a substrate during one operation of the method.

[0013] Figure 2B is Figure 1 A cross-sectional view of a substrate during one operation of the method.

[0014] Figure 2C is Figure 1 A cross-sectional view of a substrate during one operation of the method.

[0015] Figure 2D is Figure 1 A cross-sectional view of a substrate during one operation of the method.

[0016] Figure 3 is a cross-sectional view of an exemplary annealing chamber.

[0017] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. DETAILED DESCRIPTION

[0018] Embodiments of the present disclosure provided herein include methods of processing a substrate to remove defects (such as seams) in an interconnect formed on the substrate. In some embodiments, the method includes heating the substrate in a pressurized environment in the presence of an oxidant. The conformal layer deposited on the substrate expands in volume, causing the conformal layers on opposite sides of the seam to chemically cross-link with each other, thereby reducing or eliminating the seam. Embodiments of the present disclosure may prove useful, but are not limited to, reducing the size of seams on substrate features.

[0019] Figure 1 is a flow chart of a method 100 for processing a substrate 210 according to one embodiment of the present disclosure. Figure 2A-2D 1 is a schematic cross-sectional view of a substrate at various stages of method 100. To facilitate explanation of various aspects of the present disclosure, Figure 1 right Figure 2A-2D Provide explanation.

[0020] Method 100 begins at operation 102. In operation 102, a substrate 210 is positioned in a processing chamber. For example, the processing chamber is a deposition chamber. The substrate 210 includes one or more substrate features 212 formed thereon. Here, the substrate features 212 are four grooves. The substrate 210 may be a photomask, a semiconductor wafer, or other workpiece. According to some embodiments, the substrate 210 includes any material used to manufacture any of integrated circuits, passive microelectronic devices (e.g., capacitors, inductors), and active microelectronic devices (e.g., transistors, photodetectors, lasers, diodes). The substrate 210 includes insulating or dielectric materials that separate such active and passive microelectronic devices (or features thereof) from conductive layers or layers formed on the substrate. In one embodiment, the substrate 210 is a semiconductor substrate including one or more dielectric layers (e.g., silicon dioxide, silicon nitride, aluminum oxide, and other dielectric materials). In one embodiment, the substrate 210 includes one or more film layers. One or more layers of the substrate 210 may include conductive layers, semiconductor layers, insulating layers, or any combination thereof.

[0021] At operation 104, a conformal layer 214 is deposited in the substrate feature 212. According to one embodiment, the conformal layer 214 is a silicon-containing layer, such as a silicon dioxide layer. According to one embodiment, the conformal layer 214 is a metal oxide layer, such as aluminum oxide or vanadium oxide. The conformal layer 214 is formed by a deposition process. According to some embodiments, the deposition process is chemical vapor deposition (CVD) or atomic layer deposition (ALD). To deposit the conformal layer 214, a first precursor is flowed into the processing chamber. The precursor may include silicon (Si) and hydrogen (H). According to some embodiments, the precursor includes a silane precursor, a disilane precursor, a trisilane precursor, or a tetrasilane precursor. The first precursor reacts with a second precursor gas (such as an oxidant, for example, ozone or oxygen radicals) to form silicon dioxide in the substrate feature 212. The deposition process occurs at a process temperature in the range of, for example, between about 150 degrees Celsius and about 700 degrees Celsius, between about 250 degrees Celsius and about 600 degrees Celsius, between about 300 degrees Celsius and about 550 degrees Celsius, such as between about 350 degrees Celsius and about 500 degrees Celsius. In addition, during deposition, the chamber is maintained under reduced pressure. For example, the pressure in the chamber may be between about 5 Torr and about 700 Torr, between about 10 Torr and about 600 Torr, such as between about 15 Torr and about 500 Torr.

[0022] like Figure 2B As shown, the deposited conformal layer 214 is deposited on the substrate 210 in the substrate feature 212. The conformal layer 214 conforms to the shape of the substrate feature 212, thereby forming a seam 216 in the substrate feature 212. It should be noted that the size of the seam 216 is exaggerated for clarity. In some aspects, the conformal layer 214 formed on the adjacent structures defining the substrate feature 212 can be deposited to a thickness sufficient to contact the conformal layer 214 on the opposite surface of the corresponding substrate feature 212. In other words, the seam 216 does not necessarily need to include a physical gap, but rather, the seam 216 can be formed in the substrate feature 212 due to the portions 240, 250 of the conformal layer 214 contacting each other. The presence of the seam 216 negatively affects the performance of the gap fill in the substrate feature 212 by reducing the electrical insulation properties of the substrate feature 212.

[0023] At operation 106, the substrate 210 is transferred to an annealing chamber, the substrate 210 having the conformal layer 214 thereon. At operation 108, the substrate 210 is treated with a high pressure anneal. The high pressure anneal is performed on the substrate 210 in the presence of an oxidant 220, such as steam or a steam / oxygen mixture. The substrate 210 is annealed at an annealing temperature. The annealing temperature is about 100 degrees Celsius to about 600 degrees Celsius, such as about 150 degrees Celsius to about 550 degrees Celsius, or about 200 degrees Celsius to about 500 degrees Celsius.

[0024] The pressure in the annealing chamber is raised to a predetermined pressure in order to perform high pressure annealing. The predetermined pressure is between about 1 bar and about 90 bar, such as about 1 bar to about 80 bar, or about 1 bar to about 70 bar. The increased pressure forces the oxidant 220 in the environment of the annealing chamber to drop into the seam of the conformal layer 214. The substrate 210 is treated with high pressure annealing for a desired immersion time. The immersion time is generally about 3 minutes to about 150 minutes, such as about 5 minutes to about 120 minutes.

[0025] During the high pressure annealing, the oxidant 220 is transported into the joint 216 by the high pressure. Figure 2C , a conformal layer 214 deposited within a substrate feature 212 is exposed to an oxidant 220. Arrows show the flow of the oxidant 220 into the seam 216. During the annealing process, the conformal layer 214 oxidizes due to exposure to the oxidant 220. Due to the oxidation, the conformal layer 214 undergoes volume expansion. That is, the volume of the conformal layer 214 increases, such as to an expanded volume 218 shown in dashed lines. Figure 2C The expanded volume 218 shown represents the conformal layer 214 undergoing volume expansion during the high pressure anneal.

[0026] like Figure 2D As shown, due to the oxidation process of the high pressure annealing, the conformal layer 214 is converted into a dense oxide substantially free of the seam 216. As the conformal layer 214 expands during the high pressure annealing, portions of the conformal layer 214 that are not in contact (such as portions 240, 250 of the conformal layer 214 that are opposite across the seam 216) expand until the portions interact with each other. Oxidation at the seam boundary promotes a reaction between the portions 240, 250, so that atoms of the oxidant 220 react and / or crosslink with each portion 240, 250. The reaction and / or crosslinking of the portions 240, 250 across the seam 216 results in the formation of an integral structure and the removal of the seam. In an example where the structure of the conformal layer 214 is crystalline, the oxidant 220 results in the joining of the crystal structures of the portions 240, 250, thereby eliminating the seam 216.

[0027] In addition to bridging the seams in the conformal layer 214 , the high pressure anneal of operation 208 densifies the conformal layer 214 via the inclusion of additional oxide, thereby further improving the electrical insulation properties of the conformal layer 214 .

[0028] Figure 1 One embodiment of processing substrate 210 is shown. However, additional embodiments are also contemplated. In another aspect, operations 104 and 108 can occur in the same chamber without operation 106. In another aspect, operation 104 can include multiple deposition steps or cycles to form conformal layer 214.

[0029] In addition, it is contemplated that conformal layer 214 is a layer other than silicon dioxide, such as silicon, germanium, a metal layer, a metal oxide layer, or a combination thereof. In such embodiments, metals used to form conformal layer 214 include aluminum, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, copper, yttrium, zirconium, hafnium, molybdenum, and alloys thereof, among others. The metals may also be used in combination with one another.

[0030] In other embodiments, it is contemplated that deposition processes other than CVD may be used to deposit materials in the substrate features 212. For example, depending on the various materials to be deposited in the substrate features 212, atomic layer deposition (ALD), plasma enhanced, ALD, plasma enhanced CVD, physical vapor deposition (PVD), electroplating, or other deposition methods may be utilized.

[0031] In addition, although Figure 2A-2D The illustrated substrate 210 has trenches thereon, but it is contemplated that substrate features 212 other than trenches may benefit from aspects of the present disclosure.

[0032] Figure 3 3 is a schematic cross-sectional view of an exemplary processing chamber that can be practiced with the methods described herein. The batch processing chamber 300 has a box 330 for processing a plurality of substrates 335 disposed in an internal volume 350. The batch processing chamber 300 has a chamber body 310 that encloses the internal volume 350, and a cover 311 disposed on the chamber body 310. One or more cartridge heaters 312 are disposed in the chamber body 310. The heater 312 (such as a resistive heater) is configured to heat the chamber body 310. Power to the heater 312 is controlled by a controller 380. A housing 320 is disposed in the internal volume 350. An insulating liner 316 is disposed in the internal volume 150 surrounding the housing 320. The insulating liner 316 prevents heat transfer between the chamber body 310 and the housing 320.

[0033] The cassette 330 is coupled to a shaft 374 that extends through an opening 354 in the chamber body 110. The cassette 330 is movably disposed within the interior volume 350 by an actuator 370 coupled to the shaft 374. The cassette 130 facilitates transferring substrates 335 between a loading position and a processing position. The substrates 335 are transferred into and out of the interior volume 350 through a loading port 395 formed in the chamber body 310. When the cassette 330 is in the processing position, the housing 320 is coupled to the lid 340 of the cassette 330, and the housing 320 defines a processing region in which the substrates 335 are annealed at elevated pressures and elevated temperatures.

[0034] During processing, a processing fluid, such as an oxidant 220, flows into the processing region through an inlet port 352. The inlet port 352 is in fluid communication with the substrate 335 through a plurality of holes 333 in the cartridge 330. An auxiliary heater 327 disposed within the processing region is configured to heat the processing volume and the substrate 335 within the processing volume. The pressure and temperature within the processing region are increased to anneal the substrate 335 therein. The processing fluid is discharged from the processing region through an outlet port 356.

[0035] The controller 380 is coupled to a plurality of sensors 314, such as temperature sensors or pressure sensors. The sensors 314 provide signals to the controller 380 to indicate conditions within the interior volume 350. The controller 380 controls the flow of the process fluid and the power supplied to the heater 312 and the auxiliary heater 327 to process the substrate 335 in a desired manner. In this manner, the controller 380 is configured to control various aspects of the process chamber 300 to perform operations as disclosed herein.

[0036] In one example of the operations disclosed herein, a substrate 210 including one or more substrate features 212 is positioned in a processing chamber. A conformal layer 214 is deposited on the substrate features 212 of the substrate 210. The substrate 210 is transferred to an annealing chamber. A high pressure anneal is performed on the substrate 210, and the volume of the conformal layer 214 expands, causing adjacent conformal layers to contact each other and / or chemically react with each other.

[0037] The methods described herein produce a high quality oxide layer that is substantially free of seams or voids. The layer is oxidized in a substantially uniform manner across the entire layer, thereby increasing the uniformity of the distribution of oxygen across the entire layer. In addition, the uniformity of the densification of the oxide layer is increased by the methods described herein. Uniform densification also results in improved etch selectivity.

[0038] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, and the scope of the disclosure is determined by the claims that follow.

Claims

1. A method for processing a substrate, comprising: positioning the substrate in a processing chamber, the substrate having a plurality of substrate features; depositing a conformal layer on the substrate features such that seams are formed between adjacent substrate features; as well as treating the substrate with a high pressure anneal performed at a pressure of 1 bar to 70 bar in the presence of an oxidizing agent such that the volume of the seam within the conformal layer is reduced, wherein said processing said substrate causes said conformal layer disposed on said substrate feature to chemically react with said conformal layer disposed on said adjacent substrate feature, The conformal layer comprises a metal layer, a metal oxide layer, or a combination thereof.

2. The method according to claim 1, characterized in that The oxidant includes steam.

3. The method according to claim 1, characterized in that The plurality of substrate features include trenches.

4. The method according to claim 1, characterized in that Depositing a conformal layer on the plurality of substrate features comprises chemical vapor deposition.

5. The method according to claim 4, characterized in that Depositing the conformal layer includes flowing a precursor into the processing chamber, wherein the precursor includes silicon and hydrogen.

6. The method according to claim 1, characterized in that The conformal layer expands in volume during the high pressure annealing.

7. The method according to claim 1, characterized in that The high pressure annealing is performed for a time period of 5 minutes to 120 minutes.

8. The method according to claim 1, characterized in that The high pressure annealing is performed at a temperature of 200 degrees Celsius to 500 degrees Celsius.

9. A method for processing a substrate, comprising: positioning the substrate in a processing chamber, the substrate having a plurality of substrate features; depositing a conformal layer on the substrate features such that seams are formed between adjacent substrate features, wherein the conformal layer has a crystalline structure; as well as treating the substrate with a high pressure anneal in the presence of an oxidizing agent such that the volume of the seam within the conformal layer is reduced, wherein said processing said substrate causes said conformal layer disposed on said substrate feature to chemically react with said conformal layer disposed on said adjacent substrate feature, The conformal layer comprises a metal layer, a metal oxide layer, or a combination thereof.

10. The method according to claim 9, characterized in that The high pressure annealing is performed for a time of 5 minutes to 120 minutes, and wherein the high pressure annealing is performed at a pressure of 1 bar to 70 bar.

11. The method according to claim 9, characterized in that The plurality of substrate features include trenches.

12. The method according to claim 9, characterized in that Depositing a conformal layer on the plurality of substrate features comprises chemical vapor deposition.

13. The method according to claim 12, characterized in that Depositing the conformal layer includes flowing a precursor into the processing chamber, wherein the precursor includes silicon and hydrogen.

14. The method according to claim 9, characterized in that The high pressure annealing is performed at a temperature of 200 degrees Celsius to 500 degrees Celsius.

15. A method for processing a substrate, comprising: positioning the substrate in a processing chamber, the substrate having a plurality of substrate features; depositing a conformal layer on the substrate features such that seams are formed between adjacent substrate features; as well as treating the substrate with a high pressure anneal performed at a pressure of 1 bar to 70 bar in the presence of an oxidant including steam such that the volume of the seam within the conformal layer is reduced, wherein said processing said substrate causes said conformal layer disposed on said substrate feature to chemically react with said conformal layer disposed on said adjacent substrate feature, The conformal layer comprises a metal layer, a metal oxide layer, or a combination thereof.

16. The method according to claim 15, characterized in that The structure of the conformal layer is crystalline.

17. The method according to claim 15, characterized in that The conformal layer expands in volume during the high pressure annealing.

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