Display device

Abstract

A display device is disclosed, comprising: a substrate including a display area including pixels and a non-display area around the display area; a first wiring arranged on the non-display area of ​​the substrate; a first insulating layer arranged on the first wiring; a second wiring arranged in the non-display area on the first insulating layer; a second insulating layer arranged on the second wiring; a third wiring arranged in the non-display area on the second insulating layer to overlap with a part of the first wiring and the second wiring; a third insulating layer arranged on the third wiring in a manner of exposing a first area of ​​the third wiring; and a fourth wiring arranged on the third insulating layer to overlap with the third wiring and to be in direct contact with the third wiring in the first area. The first area overlaps with the first wiring and the second wiring.

Description

Technical Field

[0001] The present invention relates to a display device, and more particularly, to a display device including a touch sensor. Background Art

[0002] Generally, a display device has pixels provided in a display region and a drive section provided in a non-display region, and the pixels and the drive section are connected through wiring.

[0003] Such a display device is provided with a touch sensor covering a display area, thereby functioning as a touch display device, and a user can input information by touching an image displayed in the display area of ​​the touch display device.

[0004] However, as resolution increases and touch sensors are installed, wiring arranged in a small non-display area increases. Recently, research is being conducted to prevent wiring failures (eg, short circuits or disconnections between wirings) caused by the increase in wiring. Summary of the invention

[0005] An object of the present invention is to provide a display device in which a signal wiring and a touch sensing wiring are arranged in a region where a step difference formed by the intersection of a first wiring and a second wiring is removed.

[0006] However, the objects of the present invention can be expanded in various ways without departing from the spirit and scope of the present invention, and are not limited to the above objects.

[0007] In order to achieve the purpose of the present invention, a display device according to an embodiment of the present invention may include: a substrate including a display area including pixels and a non-display area around the display area; a first wiring arranged on the non-display area of ​​the substrate; a first insulating layer arranged on the first wiring; a second wiring arranged in the non-display area on the first insulating layer; a second insulating layer arranged on the second wiring; a third wiring arranged in the non-display area on the second insulating layer to overlap with a part of the first wiring and the second wiring; a third insulating layer arranged on the third wiring in a manner that a first area of ​​the third wiring is exposed; and a fourth wiring arranged on the third insulating layer to overlap with the third wiring and arranged to be in direct contact with the third wiring in the first area. The first area overlaps with the first wiring and the second wiring.

[0008] According to an embodiment, the display device may further include: a fourth insulating layer arranged on the fourth wiring; and a touch sensing wiring arranged on the fourth insulating layer in the non-display area so as to overlap with a portion of the third wiring and the fourth wiring.

[0009] According to an embodiment, a portion of the touch sensing wiring may overlap a portion of the first wiring and the second wiring.

[0010] According to an embodiment, the first wiring and the second wiring may not overlap each other.

[0011] According to an embodiment, the first wirings and the second wirings may be arranged alternately with each other on a plane.

[0012] According to an embodiment, the third insulating layer may include an opening corresponding to the first region.

[0013] According to an embodiment, an upper surface of the fourth insulating layer may be flat.

[0014] According to an embodiment, the non-display area may include: a first peripheral area adjacent to the display area; a second peripheral area separated from the first peripheral area; and a bending area located between the first peripheral area and the second peripheral area.

[0015] According to an embodiment, the first to fourth wirings may be located in the second peripheral area.

[0016] According to an embodiment, the display device may further include: a fourth insulating layer arranged on the fourth wiring; and a touch sensing wiring arranged on the fourth insulating layer in the second peripheral area so as to overlap with a portion of the third wiring and the fourth wiring.

[0017] According to an embodiment, a portion of the touch sensing wiring may overlap a portion of the first wiring and the second wiring.

[0018] According to an embodiment, the first wiring and the second wiring may supply a data signal to a data wiring connected to a pixel.

[0019] According to an embodiment, the third wiring and the fourth wiring may supply driving power for driving the pixel.

[0020] According to one embodiment, the width of the third wiring and the fourth wiring perpendicular to the direction of current flowing through the third wiring and the fourth wiring may be greater than the width of the first wiring and the second wiring perpendicular to the direction of current flowing through the first wiring and the second wiring.

[0021] According to an embodiment, widths of the third wiring and the fourth wiring may be greater than a width of the touch sensing wiring perpendicular to a direction of current flowing through the touch sensing wiring.

[0022] According to an embodiment, the first to fourth wirings and the touch sensing wiring may extend from the second peripheral area and be located between the display area and the bending area within the first peripheral area.

[0023] According to an embodiment, the first to fourth wirings may be located in the first peripheral area.

[0024] According to an embodiment, the display device may further include: a fourth insulating layer arranged on the fourth wiring; and a touch sensing wiring arranged on the fourth insulating layer in the first peripheral area so as to overlap with a portion of the third wiring and the fourth wiring.

[0025] According to an embodiment, a portion of the touch sensing wiring overlaps a portion of the first wiring and a portion of the second wiring.

[0026] According to an embodiment, the first wiring and the second wiring are scan wirings connected to pixels or fan-out type wirings connected to data wirings, and the third wiring and the fourth wiring may supply driving power for driving the pixels.

[0027] The display device according to an embodiment of the present invention includes an opening of the fourth insulating layer overlapping the first region where the first wiring and the second wiring are alternately arranged at a predetermined interval, so that the step difference (and unevenness) of the upper surface of the first region can be minimized. Therefore, since the third wiring and the fourth wiring that supply power to the display panel are prevented from being cracked and broken, the wiring resistance and heat generation of the corresponding wiring can be reduced.

[0028] Furthermore, by minimizing the step difference and unevenness of the first region, cracks, breaks, and other defects of the touch sensing wiring arranged on the first region can be prevented. Therefore, the accuracy and sensitivity of touch sensing can be improved.

[0029] However, the effects of the present invention are not limited to the above-mentioned effects, and various extensions can be made within the scope not departing from the idea and field of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1a is a plan view showing a display device according to an embodiment of the present invention.

[0031] Figure 1b It is shown Figure 1a A three-dimensional diagram of a display device.

[0032] Figure 2 It is shown Figure 1a A cross-sectional view of an example of a display area of ​​a display device and a portion of a non-display area adjacent to the display area.

[0033] Figure 3 It is shown Figure 1a A plan view of an example of the AA portion of a display device.

[0034] Figure 4a and Figure 4b It shows that according to Figure 3 An example of a cross-sectional view taken along line II'.

[0035] Figure 5 It shows that according to Figure 3 A cross-sectional view of an example of line II-II'.

[0036] Explanation of symbols

[0037] DD: Display Device DA: Display Area

[0038] TA: Touch Active Area NDA: Non-Display Area

[0039] PA1: First peripheral area PA2: Second peripheral area

[0040] BA: bending area TFE: encapsulation layer

[0041] SUB: Substrate CL1: First wiring

[0042] CL2: Second wiring CL3: Third wiring

[0043] CL4: fourth wiring PL1: first power supply wiring

[0044] PL2: Second power supply wiring TSL: Touch sensing wiring

[0045] INS1: First insulation layer INS2: Second insulation layer

[0046] INS3: The third insulation layer INS4: The fourth insulation layer

[0047] A1: First Area DETAILED DESCRIPTION

[0048] Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings. The same reference numerals are used for the same components in the drawings, and repeated descriptions of the same components are omitted.

[0049] Figure 1a is a plan view showing a display device according to an embodiment of the present invention, Figure 1b It is shown Figure 1a A three-dimensional diagram of a display device.

[0050] Reference Figure 1a and Figure 1bThe display device DD may include: a display panel, a substrate SUB, pixels PX provided on the substrate SUB (refer to Figure 2 ) and an encapsulation layer TFE covering the pixel PX; a touch sensor arranged on the display panel. The touch sensor can define a touch active area TA.

[0051] The substrate SUB may include a display area DA and a non-display area NDA provided at least one side of the display area DA.

[0052] The substrate SUB may generally have a rectangular shape. However, the shape of the substrate SUB is not limited thereto and may have a variety of shapes. For example, the substrate SUB may be provided in a variety of shapes such as a polygon having a closed form with straight lines as its sides, a circle or an ellipse having a side formed by a curve, a semicircle or a semiellipse having a side formed by a straight line and a curve. In one embodiment, in the case where the substrate SUB has a side formed by a straight line, at least a portion of the corners of the above-mentioned shapes may be formed as a curve.

[0053] The display area DA is an area where a plurality of pixels are provided to display an image. The display area DA may be provided in a shape corresponding to the shape of the substrate SUB. The pixels are provided on the display area DA of the substrate SUB. Each pixel, as the minimum unit for displaying an image, may be provided in plurality.

[0054] The pixel PX may be an organic light emitting element including an organic layer, but is not limited thereto, and may be implemented in various forms such as an inorganic light emitting element, a liquid crystal element, an electrophoretic element, an electrowetting element, etc.

[0055] In the non-display area NDA, a conductive wiring CL connected to the pixel and a driving part connected to the conductive wiring CL and for driving the pixel may be provided.

[0056] The conductive wiring CL provides signals to each pixel PX and may include scan wiring, data wiring, drive voltage wiring, initialization wiring, etc. Also, the conductive wiring CL may include fan-out wiring connected to the scan wiring, data wiring, drive voltage wiring, initialization wiring, etc. The conductive wiring CL may also include other wirings as needed.

[0057] The conductive wiring CL may extend from the display area DA to the second peripheral area PA2 through the first peripheral area PA1 and the bending area BA. At least a portion of the conductive wiring CL may overlap at least one of the first peripheral area PA1, the bending area BA, and the second peripheral area PA2.

[0058] The driving unit may include: a scan driving unit that provides a scan signal to each pixel along the scan wiring; a data driving unit that provides a data signal to each pixel along the data wiring; a timing control unit that controls the scan driving unit and the data driving unit, etc.

[0059] In one embodiment, the scan driver may be directly mounted on the substrate SUB. In one embodiment, the scan driver may be formed on an independent chip, and thus provided on the substrate SUB in the form of a chip on glass, or may be mounted on a printed circuit board and connected to the substrate SUB via a connecting component.

[0060] In one embodiment, the data driving unit may be directly mounted on the substrate SUB. In one embodiment, the data driving unit may be formed on an independent chip and connected to the substrate SUB. In the case where the data driving unit is formed on an independent chip and connected to the substrate SUB, it may be provided in the form of a glass substrate chip, a plastic substrate chip (Chip On Plastic), a chip on film (COF), etc. Alternatively, the data driving unit may be mounted on a printed circuit board and connected to the substrate SUB through a connecting component.

[0061] In an embodiment, the display panel may include an encapsulation layer TFE covering the display area DA and an encapsulation area corresponding to the encapsulation layer TFE.

[0062] In one embodiment, the display area DA may be overlapped with a touch active area TA. The touch active area TA may include a touch sensor equipped with a plurality of touch sensing electrodes. The touch sensor may be attached to the display panel or included inside the display panel.

[0063] In one embodiment, the touch sensor may include touch sensing electrodes and touch sensing wirings TSL connecting the touch sensing electrodes and the touch driving part.

[0064] The first touch sensing wiring TSL1 may extend from the lower end of the touch active area TA through the bending area BA to the second surrounding area PA2. For example, the first touch sensing wiring TSL1 may include a portion extending from the touch active area TA (or, from the encapsulation layer TFE) to the second direction DR2 and a portion extending along the first direction DR1 perpendicularly intersecting the second direction DR2. Alternatively, the first touch sensing wiring TSL1 may also include a portion extending along an oblique line relative to the first direction DR1 and the second direction DR2.

[0065] The second touch sensing wiring TSL2 may extend from one side of the touch active area TA through the bending area BA to the second surrounding area PA2. The second touch sensing wiring TSL2 may include a portion extending from the touch active area TA (or the encapsulation layer TFE) along the first direction DR1. The second touch sensing wiring TSL2 may include at least three bending portions.

[0066] The touch sensing wirings TSL1 and TSL2 and the conductive wirings CL may extend on the substrate SUB in a manner not to be connected / contacted with each other.

[0067] The non-display area NDA may further include an additional area protruding from a portion thereof. The additional area may protrude from an edge constituting the non-display area NDA. Although in one embodiment, a data driving unit and / or a touch driving unit may be provided or connected to the additional area, it is not limited thereto, and a variety of components may be arranged. Furthermore, the data driving unit and the touch driving unit may also be integrated into one driving unit.

[0068] In one embodiment, at least a portion of the display device DD may have flexibility and may be folded at the portion having the flexibility. That is, the display device DD may include a bending area BA that has flexibility and is foldable in one direction.

[0069] In one embodiment, the non-display area NDA may include a bending area BA, a first peripheral area PA1, and a second peripheral area PA2. The first peripheral area PA1 is a portion adjacent to the display area DA and may surround at least one side of the display area DA. The second peripheral area PA2 may be arranged to be spaced apart from the first peripheral area PA1 by placing the bending area BA between the second peripheral area PA2 and the first peripheral area PA1. The bending area BA may be spaced apart from the display area DA.

[0070] In the bending area BA, when the line where the display device DD is folded is called a folding line, the folding line is provided in the bending area BA. Here, the term "folding" means that the form can be deformed from the original form to another form, rather than the form is fixed, including the case where it is folded, bent, or rolled in the form of a scroll along one or more specific wirings, that is, the folding line.

[0071] In one embodiment, a data driving unit and / or a touch driving unit may be arranged in a chip-on-film form on the second peripheral area PA2. Also, a pad portion PD including a pad connecting the conductive wiring CL and the driving unit and a pad connecting the touch sensing wiring TSL and the driving unit may be arranged in the second peripheral area PA2.

[0072] like Figure 1bAs shown, in one embodiment, at least one of the widths of the first to third wirings CL1, CL2, CL3, which are perpendicular to the direction of current flowing through each of the first to third wirings CL1, CL2, CL3, respectively, may be different. For example, the first wiring CL1 and the second wiring CL2 are fan-out wirings connected to the data wiring, and the third wiring CL3 may be a power wiring for supplying driving power to the pixel. In this case, the width of the third wiring CL3 may be greater than the widths of the first wiring CL1 and the second wiring CL2.

[0073] In an embodiment, some of the conductive wirings CL may be arranged to overlap each other at different layers.

[0074] Figure 2 It is shown Figure 1a A cross-sectional view of an example of a display area of ​​a display device and a portion of a non-display area adjacent to the display area.

[0075] Reference Figure 1a to Figure 2 The display area DA includes a touch sensing electrode disposed on the encapsulation layer TFE, and may include a touch sensing wiring TSL2 disposed on a predetermined insulating layer (eg, the same layer as the pixel definition film PDL) on one side of the first peripheral area PA1.

[0076] For example, Figure 2 A portion of the display area DA and a portion of the first peripheral area PA1 located in the Figure 2 A portion of the right side of the display area DA is shown in FIG.

[0077] A plurality of pixels PX may be provided in the display area DA. Each pixel PX includes a transistor connected to at least a portion of the first to fourth wirings CL1 to CL4, a light emitting element connected to the transistor, and a capacitor Cst. The transistor may include a driving transistor for controlling the light emitting element and a switching transistor for switching the driving transistor.

[0078] Although in Figure 2 For the sake of convenience of explanation, one transistor and one capacitor Cst are shown for one pixel PX, but the present invention is not limited thereto. One pixel PX may be equipped with more than two transistors and at least one capacitor Cst.

[0079] The pixels PX are provided on the substrate SUB.

[0080] The substrate SUB may be made of insulating materials such as glass and resin, etc. Also, the substrate SUB may be made of a flexible material so as to be bendable or foldable, and may have a single-layer structure or a multi-layer structure.

[0081] A buffer layer BF may be formed on the substrate SUB. The buffer layer BF may prevent impurities from diffusing into the switching transistor and the driving transistor. The buffer layer BF may be an inorganic insulating layer formed of an inorganic material. For example, the buffer layer BF may be formed of silicon nitride, silicon oxide, silicon oxynitride, etc., and may also be omitted depending on the material and process conditions of the substrate SUB.

[0082] An active pattern ACT is provided on the buffer layer BF. The active pattern ACT is formed of a semiconductor material. The active pattern ACT may include a source region, a drain region, and a channel region provided between the source region and the drain region, respectively. The active pattern ACT may be a semiconductor pattern composed of polysilicon, amorphous silicon, an oxide semiconductor, etc.

[0083] A gate insulating layer GI is provided on the active pattern ACT and may be an inorganic insulating layer formed using an inorganic material.

[0084] A gate electrode GE and a capacitor lower electrode LE are provided on the gate insulating layer GI. The gate electrode GE is formed to cover a region corresponding to a channel region of the active pattern ACT.

[0085] The gate electrode GE and the capacitor lower electrode LE may be formed of metal. For example, the gate electrode GE may be formed of at least one of metals such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), etc., or may be formed of a metal alloy. Furthermore, the gate electrode GE may be formed as a single layer or as a multi-layer in which two or more materials of metals and alloys are stacked.

[0086] The first wirings CL11 and CL12 arranged on the side of the first peripheral area PA1 may be provided at the same layer as the gate electrode GE and the capacitor lower electrode LE and with the same material as the gate electrode GE and the capacitor lower electrode LE. In one embodiment, the first wirings CL11 and CL12 may include wiring for supplying power to the scan driving part, wiring for supplying initialization signals to the pixels PX, and the like.

[0087] A first insulating layer INS1 (eg, an interlayer insulating layer) is provided on the gate electrode GE, the capacitor lower electrode LE, and the first wirings CL11 and CL12. The first insulating layer INS1 may be an inorganic insulating layer made of an inorganic material. As the inorganic material, polysiloxane, silicon nitride, silicon oxide, silicon oxynitride, etc. may be used.

[0088] A capacitor upper electrode UE is provided on the first insulating layer INS1. The capacitor upper electrode UE may be formed of a metal. For example, the capacitor upper electrode UE may be formed of at least one of metals such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), etc., or may be formed of a metal alloy. In addition, although the capacitor upper electrode UE may be formed as a single layer, it is not limited thereto, and may be formed as a multi-layer stack of two or more materials of metals and alloys.

[0089] The capacitor lower electrode LE and the capacitor upper electrode UE constitute a capacitor Cst with the first insulating layer INS1 interposed therebetween.

[0090] The second wirings CL21 and CL22 of the first peripheral area PA1 may be provided at the same layer as the capacitor upper electrode UE and with the same material as the capacitor upper electrode UE. In one embodiment, the second wirings CL21 and CL22 may include wiring for supplying power to the scan driving unit, wiring for supplying initialization signals to the pixels PX, etc. Alternatively, the second wirings CL21 and CL22 may be power wiring for supplying driving power to the pixels PX.

[0091] In another embodiment, the first and second wirings CL11 and CL12 and CL21 and CL22 may be fan-out type wirings connected to the data wiring or the scan wiring, respectively.

[0092] A second insulating layer INS2 is provided on the capacitor upper electrode UE and the second wirings CL21 and CL22. The second insulating layer INS2 may be an inorganic insulating layer made of an inorganic material, such as polysiloxane, silicon nitride, silicon oxide, silicon oxynitride, etc.

[0093] An active electrode SE and a drain electrode DE are provided on the second insulating layer INS2 and respectively contact the source region and the drain region of the active pattern ACT through contact holes formed in the second insulating layer INS2, the first insulating layer INS1 and the gate insulating layer GI.

[0094] The source electrode SE and the drain electrode DE may be formed of metal. For example, the capacitor upper electrode UE may be formed of at least one of metals such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), etc., or may be formed of a metal alloy.

[0095] In one embodiment, third wirings CL31 and CL32 may be disposed on the second insulating layer INS2 of the first peripheral area PA1. The third wirings CL31 and CL32 may include at least one of data wirings, initialization wirings or partial scan wirings, and power wirings.

[0096] A passivation layer PSV may be provided on the source electrode SE and the drain electrode DE. The passivation layer PSV may be an inorganic insulating layer formed of an inorganic material. Examples of the inorganic material include polysiloxane, silicon nitride, silicon oxide, silicon oxynitride, and the like.

[0097] A third insulating layer INS3 may be provided on the passivation layer PSV. The third insulating layer INS3 may be an organic insulating layer made of an organic material. Organic insulating substances such as polyacrylic compounds, polyimide compounds, fluorine-based carbon compounds such as polytetrafluoroethylene, and benzocyclobutene compounds may be used as organic materials.

[0098] A connection pattern CNP may be provided on the third insulating layer INS3. The connection pattern CNP is connected to the drain electrode DE of the transistor through a contact hole penetrating the third insulating layer INS3 and the passivation layer PSV. The connection pattern CNP may be formed of at least one of metals such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), etc., or may be formed of a metal alloy.

[0099] In one embodiment, the fourth wiring CL4 of the first peripheral area PA1 may be provided at the same layer and with the same material as the connection pattern CNP. For example, the fourth wiring CL4 may be a dummy power wiring or a wiring supplying a portion of power supplied to the scan driving part or the pixel PX.

[0100] A fourth insulating layer INS4 may be provided on the connection pattern CNP. The fourth insulating layer INS4 may be an organic insulating layer made of an organic material. Organic insulating materials such as polyacrylic compounds, polyimide compounds, fluorine-based carbon compounds such as polytetrafluoroethylene, and benzocyclobutene compounds may be used as the organic material.

[0101] A first electrode EL1 may be provided on the fourth insulating layer INS4. The first electrode EL1 may be connected to the connection pattern CNP through a contact hole penetrating the fourth insulating layer INS4. Here, according to an embodiment, the first electrode EL1 may be used as one of an anode or a cathode.

[0102] The first electrode EL1 can be formed using a metal layer of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, an alloy thereof, and / or indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), etc.

[0103] A pixel definition film PDL is provided on the substrate SUB on which the first electrode EL1 and the like are formed so as to divide the pixel area in a manner corresponding to each pixel PX. The pixel definition film PDL may be an organic insulating layer formed of an organic material. Organic insulating substances such as polyacrylic compounds, polyimide compounds, fluorine-based carbon compounds such as polytetrafluoroethylene, and benzocyclobutene compounds may be used as the organic material.

[0104] The pixel definition film PDL exposes the upper surface of the first electrode EL1 and protrudes from the substrate SUB along the periphery of the pixel PX.

[0105] A light-emitting layer OL may be provided in a pixel region surrounded by a pixel definition film PDL. The light-emitting layer OL may be provided as a single layer, but may also be provided as a multi-layer including a plurality of functional layers. In the case where the light-emitting layer OL is provided as a multi-layer, it may have a hole injection layer (HIL: Hole Injection Layer), a hole transport layer (HTL: Hole Transport Layer), an organic light-emitting layer (EML: organic Emission Layer), an electron transport layer (ETL: Electron Transport Layer), an electron injection layer (EIL: Electron Injection Layer) and the like in a single structure or a composite structure stacked structure.

[0106] A second electrode EL2 is provided on the light emitting layer OL. The second electrode EL2 may be provided in each pixel PX, but may also be provided to cover most of the display area DA, and may be shared by a plurality of pixels PX.

[0107] The second electrode EL2 may be used as one of an anode or a cathode according to an embodiment, and may be used as a cathode when the first electrode EL1 is an anode, or may be used as an anode when the first electrode EL1 is a cathode.

[0108] The second electrode EL2 may be formed using a metal layer of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, etc. and / or a transparent conductive layer of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), etc. In one embodiment, the second electrode EL2 may be formed as a multi-layer including a double layer or more of a metal thin layer, for example, a triple layer of ITO / Ag / ITO.

[0109] In one embodiment, the second touch sensing wiring TSL2 may be provided at the same layer as the second electrode EL2 and with the same material as the second electrode EL2. For example, the second touch sensing wiring TSL2 may be arranged on an organic insulating layer formed by a pixel definition film PDL process. A plurality of second touch sensing wirings TSL21, TSL22, and TSL23 are arranged along the first direction DR1 and may extend toward the bending area BA.

[0110] However, this is merely exemplary, and the second touch sensing wiring TSL2 may also be disposed on the fourth insulating layer INS4. That is, the second touch sensing wiring TSL2 may be provided at the same layer and with the same material as the connection pattern CNP.

[0111] An encapsulation layer TFE is provided on the second electrode EL2. The encapsulation layer TFE can be formed as a single layer, but can also be formed as multiple layers. In one embodiment, the encapsulation layer TFE can be formed using the first encapsulation layer EC1 to the third encapsulation layer EC3. The first encapsulation layer EC1 to the third encapsulation layer EC3 can be formed using organic materials and / or inorganic materials. The third encapsulation layer EC3 located at the outermost contour can be formed using inorganic materials. In one embodiment of the present invention, the first encapsulation layer EC1 can be formed using inorganic materials, the second encapsulation layer EC2 can be formed using organic materials, and the third encapsulation layer EC3 can be formed using inorganic materials. Although inorganic materials have less permeability of moisture or oxygen than organic materials, cracks are prone to occur due to poor elasticity or flexibility. By forming the first encapsulation layer EC1 and the third encapsulation layer EC3 using inorganic materials, and forming the second encapsulation layer EC2 using organic materials, crack expansion can be prevented. Here, the layer formed by the organic material, that is, the second encapsulation layer EC2 can be completely covered by the third encapsulation layer EC3 so that its end is not exposed to the outside. Organic insulating materials such as polyacrylic compounds, polyimide compounds, fluorine-based carbon compounds such as polytetrafluoroethylene, and benzocyclobutene compounds can be used as organic materials, and inorganic materials such as polysiloxane, silicon nitride, silicon oxide, and silicon nitride oxide can be used.

[0112] In one embodiment, the encapsulation layer TFE covers the display area DA and may extend to the outside of the display area DA.

[0113] In one embodiment, the third insulating layer INS3, the fourth insulating layer INS4 and / or the pixel definition film PDL formed of an organic material do not continuously extend to the bending area BA, and a portion thereof may be removed along the periphery of the display area DA. Accordingly, since the upper surface of the pixel definition film PDL, the side surface of the pixel definition film PDL, and the exposed third insulating layer INS3 and / or fourth insulating layer INS4 may be encapsulated by the encapsulation layer TFE, they may be prevented from being exposed to the outside.

[0114] The first touch sensing electrode IE1 and the second touch sensing electrode IE2 may be arranged on the encapsulation layer TFE. In one embodiment, the touch sensing wiring TSL respectively connected to the first touch sensing electrode IE1 and the second touch sensing electrode IE2 may be arranged on the encapsulation layer TFE. For example, the second touch sensing wiring TSL2 may extend to the insulating layer of the first peripheral area PA1 through the upper surface and the side surface of the encapsulation layer TFE.

[0115] The first touch sensing electrode IE1, the second touch sensing electrode IE2, the first touch sensing wiring TSL1, and the second touch sensing wiring TSL2 may have a single-layer structure or a multi-layer structure, respectively. The conductive pattern of the single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, and alloys thereof. The transparent conductive layer may include transparent conductive oxides such as indium tin oxide (ITO: indium tin oxide), indium zinc oxide (IZO: indium zinc oxide), zinc oxide (ZnO: zinc oxide), indium tin zinc oxide (ITZO: indium tin zinc oxide), etc. In addition, the transparent conductive layer may include conductive polymers such as poly (3,4-ethylenedioxythiophene) (PEDOT), metal nanowires, graphene, etc. The multi-layer metal layer may have, for example, a three-layer structure of titanium / aluminum / titanium.

[0116] In one embodiment, the first touch sensing electrodes IE1 , the second touch sensing electrodes IE2 , the first touch sensing wires TSL1 , and the second touch sensing wires TSL2 may also have a mesh pattern including a plurality of meshes.

[0117] The first touch sensing wiring TSL1 and the second touch sensing wiring TSL2 may extend toward the second peripheral area PA2 through the bending area BA.

[0118] Figure 3 It is shown Figure 1a A plan view of an example of the AA portion of a display device.

[0119] Reference Figures 1a to 3 In the second peripheral area PA2 of the display device DD, the first wiring CL1, the second wiring CL2, the first power wiring PL1, the second power wiring PL2, and the touch sensing wiring TSL may be arranged.

[0120] However, in Figure 3 Only wirings for explaining the main features of the present application are shown, and the second peripheral area PA2 of the display device DD may also include other wirings and components.

[0121] The first wiring CL1 and the second wiring CL2 may be arranged on different insulating layers from each other. The first wiring CL1 and the second wiring CL2 may be arranged alternately with each other. For example, the distance between the first wiring CL1 and the second wiring CL2 may be about 1 μm or less. The first wiring CL1 and the second wiring CL2 may be fan-out wirings connecting the data wiring of the display area DA and the data driving part. However, this is only exemplary, and the first wiring CL1 and the second wiring CL2 may also be power wirings for driving the scan driving part, clock signal wirings, power wirings for supplying initialization signals to pixels, or scan wirings for supplying scan signals to pixels.

[0122] In an embodiment, the first and second wirings CL1 and CL2 may include a portion extending in the second direction DR2 which is a direction from the bending area BA toward the pad portion PD and a portion extending in an oblique direction of the second direction DR2 .

[0123] Since the first wiring CL1 and the second wiring CL2 are arranged in different layers from each other, a step difference may be generated in the insulating layer covering the first wiring CL1 and the second wiring CL2 respectively. In particular, the groove of the insulating layer corresponding to the area between the first wiring CL1 and the second wiring CL2 is larger than other parts, so the possibility of cracks in the wiring (conductive pattern) arranged on the groove is very high. Such cracks increase the resistance of the wiring and become a major cause of heat generation when driving the display device DD.

[0124] In an embodiment, the first and second power wirings PL1 and PL2 may be arranged on the upper layer of the first and second wirings CL1 and CL2. The first and second power wirings PL1 and PL2 may extend along the second direction DR2. The first and second power wirings PL1 and PL2 may be arranged to be spaced apart from each other.

[0125] The first power wiring PL1 and the second power wiring PL2 are arranged in different layers from each other, and may include a third wiring and a fourth wiring that are at least partially in contact. A portion of the third wiring and the fourth wiring included in the first power wiring PL1 is in direct contact, and another portion may overlap each other with an insulating layer in between. Similarly, a portion of the third wiring and the fourth wiring included in the second power wiring PL2 is in direct contact, and another portion may overlap each other with an insulating layer in between.

[0126] A portion of the first power wiring PL1 may overlap with the first wiring CL1 and the second wiring CL2. For example, the first power wiring PL1 may overlap with the first wiring CL1 and the second wiring CL2 in the first area A1. Similarly, the second power wiring PL2 may overlap with the first wiring CL1 and the second wiring CL2 in the second area A2 and the third area A3.

[0127] In the first to third areas A1 to A3, there may be a groove with a relatively narrow width formed by the arrangement of the first wiring CL1 and the second wiring CL2. Accordingly, cracks caused by the groove may occur in the first power wiring PL1 and the second power wiring PL2. The display device DD according to the embodiment of the present invention includes a structure for preventing cracks caused by the groove, and for this, refer to Figures 4a to 5 Provide explanation.

[0128] In one embodiment, the width of the first power wiring PL1 and the second power wiring PL2 may be greater than the width of the first wiring CL1 and the second wiring CL2. Since the first power wiring PL1 and the second power wiring PL2 need to stably supply the DC power supply voltage to the entire pixel, it is necessary to minimize the influence of wiring resistance, RC delay, etc. Therefore, the first power wiring PL1 and the second power wiring PL2 may be formed to be as wide as possible according to the design of the display device DD. Here, the width of each wiring may be the length in the direction perpendicular to the direction of the current flowing through each wiring on the same plane.

[0129] Furthermore, the first power wiring PL1 and the second power wiring PL2 may have a structure in which a plurality of conductive layers (wiring layers) are overlapped and connected in order to minimize the influence of wiring resistance, RC delay, etc. For example, the first power wiring PL1 may have a structure in which a conductive layer arranged on the second insulating layer INS2 and a conductive layer arranged on the third insulating layer INS3 overlap. Similarly, the second power wiring PL2 may have a structure in which a conductive layer arranged on the second insulating layer INS2 and a conductive layer arranged on the third insulating layer INS3 overlap.

[0130] In the second peripheral area PA2, a touch sensing wiring TSL may be arranged on the first power wiring PL1. The touch sensing wiring TSL may be arranged on the first power wiring PL1 with an insulating layer interposed between the touch sensing wiring TSL and the first power wiring PL1. In the first area A1, the first wiring CL1, the second wiring CL2, the first power wiring PL1, and the touch sensing wiring TSL may be arranged to overlap each other.

[0131] However, this is only exemplary, and the position of the touch sensing wire TSL is not limited thereto. At least a portion of the touch sensing wire TSL may overlap with the second power wire PL2 or may be formed in a portion where the first power wire PL1 and the second power wire PL2 are not arranged.

[0132] The touch sensing wiring TSL extends on the encapsulation layer TFE, and may extend to the second peripheral area PA2 through the first peripheral area PA1 and the bending area BA.

[0133] Figure 4a and Figure 4b It shows that according to Figure 3 An example of a cross-sectional view taken along line II'.

[0134] exist Figure 4a and Figure 4b For referenced Figure 2 and Figure 3 The same reference numerals are used for the components described, and repeated descriptions of these components are omitted.

[0135] Reference Figures 2 to 4b , the second peripheral area PA2 may be arranged with first to fourth wirings CL1 to CL4 electrically connected to the display panel and touch sensing wirings TSL connected to the touch sensor.

[0136] A first wiring CL1 may be disposed on the gate insulating layer GI, and a first insulating layer INS1 may be disposed on the first wiring CL1. A second wiring CL2 may be disposed on the first insulating layer INS1, and a second insulating layer INS2 may be disposed on the second wiring CL2.

[0137] The first wirings CL1 and the second wirings CL2 do not overlap each other. In one embodiment, when viewed from a plane, the first wirings CL1 and the second wirings CL2 may be arranged alternately with each other.

[0138] In one embodiment, the first wiring CL1 and the second wiring CL2 may supply a data signal to the data wiring. For example, the first wiring CL1 and the second wiring CL2 may be fan-out type wirings connected to the data wiring.

[0139] Due to the lamination of the first insulating layer INS1 and the second insulating layer INS2 according to the alternating arrangement of the first wirings CL1 and the second wirings CL2 , a step difference (groove) may be generated on the upper surface of the second insulating layer INS2 .

[0140] The third wiring CL3 may be arranged on the second insulating layer INS2 by overlapping the first wiring CL1 and the second wiring CL2. The third wiring CL3 may form a first power wiring PL1 for supplying a first driving power (e.g., an ELVDD power) to the pixel. The width of the third wiring CL3 may be greater than the widths of the first wiring CL1 and the second wiring CL2. In the first area A1 where the first wiring CL1 and the second wiring CL2 are alternately arranged, the upper surface of the third wiring CL3 may be unevenly formed due to the step difference (groove) of the second insulating layer INS2.

[0141] The third insulating layer INS3 may be disposed on the third wiring CL3. In an embodiment, the third insulating layer INS3 may be disposed to expose the first area A1 of the third wiring CL3. That is, the third insulating layer INS3 may include an opening corresponding to the first area A1.

[0142] The third insulating layer INS3 is formed to be thicker than other conductive layers or insulating layers. The fourth wiring CL3 may be formed on the third wiring CL3 and the third insulating layer INS3 by a variety of thin film deposition methods (e.g., physical vapor deposition (PVD) such as evaporation and sputtering). However, such a thin film deposition method has difficulties in filling narrow areas. In particular, if the third insulating layer INS3 formed to be relatively thick includes an opening only in a very narrow portion corresponding to a step difference portion, the width of the step difference may be very narrow compared to the depth to which the metal film corresponding to the fourth wiring CL4 will be deposited (step coverage characteristics). Therefore, a portion of the step difference may not be covered by the metal deposited to form the fourth wiring CL4. Therefore, a portion of the fourth wiring CL4 arranged on the third insulating layer INS3 may be broken or cracks may be generated.

[0143] In order to solve this problem, the first power wiring PL1 may be designed as follows: the third insulating layer INS3 of the first area A1 is removed so that the third wiring CL3 and the fourth wiring CL4 are in direct contact in a larger area.

[0144] The fourth wiring CL4 may be disposed on the third wiring CL3 and the third insulating layer INS3. The fourth wiring CL4 may overlap the third wiring CL3 on the third insulating layer INS3, and may be in direct contact with the third wiring CL3 in the first area A1.

[0145] The third wiring CL3 and the fourth wiring CL4 may constitute the first power wiring PL1 , thereby reducing wiring resistance of the first power wiring PL1 in the second peripheral area PA2 and preventing cracks and heat generation of the fourth wiring CL4 in the first area A1 .

[0146] A fourth insulating layer INS4 may be disposed on the fourth wiring CL4. In one embodiment, the fourth insulating layer INS4 may be the same as the fourth insulating layer INS4 of the display area DA or the pixel definition film PDL. However, this is only exemplary, and the fourth insulating layer INS4 may be formed by a process different from that of the fourth insulating layer INS4 of the display area DA and the pixel definition film PDL.

[0147] In one embodiment, if Figure 4a As shown, the upper surface of the fourth insulating layer INS4 may be formed along the upper surface step of the fourth wiring CL4. Accordingly, the step difference (and unevenness) of the fourth insulating layer INS4 in the first area A1 where the first wirings CL1 and the second wirings CL2 are alternately arranged may be minimized.

[0148] In one embodiment, if Figure 4b As shown, the upper surface of the fourth insulating layer INS4 may be substantially flat. Accordingly, the step difference of the fourth insulating layer INS4 caused by the step difference of the fourth wiring CL4 may be removed or minimized.

[0149] The touch sensing wiring TSL extending from the touch active area TA may be disposed on the fourth insulating layer INS4 .

[0150] The touch sensing wiring TSL may overlap the first power wiring PL1. Also, a portion of the touch sensing wiring TSL may overlap a portion of the first wiring CL1 and the second wiring CL2. The width of the touch sensing wiring TSL may be smaller than the widths of the third wiring CL3 and the fourth wiring CL4.

[0151] Since the touch sensing wire TSL is disposed on the fourth insulating layer INS4 having high flatness, cracks, breaks, etc. may be prevented from occurring in the touch sensing wire TSL in the first area A1. Therefore, the accuracy and sensitivity of touch sensing may be improved.

[0152] Figure 5 It shows that according to Figure 3 A cross-sectional view of an example of line II-II'.

[0153] Figure 5 For reference Figure 4aThe same reference numerals are used for the components described, and repeated descriptions of these components are omitted.

[0154] Reference Figure 5 , first to fourth wirings CL1 to CL4 electrically connected to the display panel may be arranged in the second peripheral area PA2.

[0155] The first wirings CL1 and the second wirings CL2 do not overlap each other. In one embodiment, when viewed from a plane, the first wirings CL1 and the second wirings CL2 may be arranged alternately with each other.

[0156] In an embodiment, the first wiring CL1 and the second wiring CL2 may supply a data signal to the data wiring. For example, the first wiring CL1 and the second wiring CL2 may be fan-out type wirings connected to the data wiring.

[0157] The third wiring CL3 may be arranged on the second insulating layer INS2 overlapping the first wiring CL1 and the second wiring CL2. The third wiring CL3 may form a second power wiring PL2 for supplying a second driving power (eg, ELVSS power) to the pixel. The width of the third wiring CL3 may be greater than that of the first wiring CL1 and the second wiring CL2.

[0158] The third wiring CL3 may include a second area A2 and a third area A3 overlapping the first and second wirings CL1 and CL2. Here, the second area A2 and the third area A3 are portions where the distance between the adjacent first and second wirings CL1 and CL2 is 1 μm or less, respectively, and may be an area overlapping the third wiring CL3.

[0159] The third insulating layer INS3 may be arranged to expose the second area A2 and the third area A3 of the third wiring CL3. That is, the third insulating layer INS3 may include openings corresponding to the second area A2 and the third area A3.

[0160] The fourth wiring CL4 may be disposed on the third wiring CL3 and the third insulating layer INS3. The fourth wiring CL4 may overlap the third wiring CL3 on the third insulating layer INS3, and may directly contact the third wiring CL3 in the second area A2 and the third area A3.

[0161] Accordingly, the wiring resistance of the second power wiring PL2 in the second peripheral area PA2 is reduced, and cracks in the fourth wiring CL4 in the second area A2 and the third area A3 and heat generation caused thereby can be prevented.

[0162] However, this is only exemplary, and in the case where the conductive layer or wiring is arranged on the area where the first wiring CL1 and the second wiring CL2 are alternately arranged at a pitch of less than 1 μm, the third insulating layer INS3 may have an opening for the corresponding area. For example, the first peripheral area PA1 between the bending area BA and the display area DA may also be applied with the same Figures 4a to 5 The structure is the same or a similar stacked structure.

[0163] As described above, according to the display device DD of the embodiment of the present invention, the opening is formed in the third insulating layer INS3 by overlapping the first area A1, the second area A2 and the third area A3 alternately arranged at a predetermined interval with the first wiring CL1 and the second wiring CL2, so that the step difference (and unevenness) of the upper surface from the first area to the third area A1, A2, A3 can be minimized. Therefore, since cracks and breaks of the third wiring CL3 and the fourth wiring CL4 are prevented, the wiring resistance and heat generation of the corresponding wiring can be reduced.

[0164] Furthermore, by minimizing the step difference and unevenness of the first area A1, the touch sensing wires TSL disposed on the first area A1 may be prevented from being cracked, broken, or otherwise damaged. Therefore, the accuracy and sensitivity of touch sensing may be improved.

[0165] Although the present invention has been described above with reference to the embodiments, those skilled in the art will appreciate that the present invention may be modified and altered in many ways without departing from the spirit and scope of the invention as described in the claims.

Claims

1. A display device, characterized in that: include: A substrate including a display area including pixels and a non-display area around the display area; A first wiring is arranged on the non-display area of ​​the substrate; a first insulating layer disposed on the first wiring; a second wiring, arranged in the non-display area on the first insulating layer so as not to overlap with the first wiring; a second insulating layer disposed on the second wiring; a third wiring arranged on the second insulating layer in the non-display area so as to overlap with a portion of the first wiring and the second wiring; a third insulating layer including an opening exposing a first region of the third wiring and arranged on the third wiring; as well as a fourth wiring arranged on the third insulating layer so as to overlap with the third wiring and arranged to be in direct contact with the third wiring at the opening, The opening overlaps with the first wiring and the second wiring.

2. The display device according to claim 1, wherein: Also includes: a fourth insulating layer, arranged on the fourth wiring; as well as The touch sensing wiring is arranged on the fourth insulating layer in the non-display area so as to overlap with a portion of the third wiring and the fourth wiring.

3. The display device according to claim 2, wherein: A portion of the touch sensing wiring overlaps a portion of the first wiring and a portion of the second wiring.

4. The display device according to claim 2, wherein: The first wirings and the second wirings are arranged alternately with each other on a plane.

5. The display device according to claim 2, wherein: The upper surface of the fourth insulating layer is flat.

6. The display device according to claim 1, wherein: The opening of the third insulating layer has a width corresponding to the size of the first region, and the third insulating layer overlaps the first wiring and the second wiring passing through the second region outside the first region.

7. The display device according to claim 1, wherein: The non-display area includes: a first peripheral area adjacent to the display area; a second peripheral area separated from the first peripheral area; and a bending area located between the first peripheral area and the second peripheral area. The first to fourth wirings are located in the second peripheral area.

8. The display device according to claim 7, characterized in that: Also includes: a fourth insulating layer, arranged on the fourth wiring; as well as a touch sensing wiring, in the second peripheral area, overlapping with a portion of the third wiring and the fourth wiring and arranged on the fourth insulating layer, A portion of the touch sensing wiring overlaps a portion of the first wiring and a portion of the second wiring.

9. The display device according to claim 8, wherein: The first wiring and the second wiring supply data signals to data wirings connected to pixels.

10. The display device according to claim 8, wherein: The third wiring and the fourth wiring supply driving power for driving the pixel, The width of the third wiring and the fourth wiring perpendicular to the direction of current flowing through the third wiring and the fourth wiring is greater than the width of the first wiring and the second wiring perpendicular to the direction of current flowing through the first wiring and the second wiring, The widths of the third wiring and the fourth wiring are greater than the width of the touch sensing wiring perpendicular to a direction of current flowing through the touch sensing wiring.

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