Display device

Abstract

A display device includes a substrate including a component area, a display area, and an intermediate area provided between the component area and the display area; a thin film transistor arranged in the display area; a display element including a pixel electrode, an intermediate layer, and an opposite electrode, wherein the pixel electrode is electrically connected to the thin film transistor; a first organic insulating layer, a second organic insulating layer, and a passivation layer which are sequentially stacked with each other between the thin film transistor and the pixel electrode; and a groove arranged in the intermediate area, wherein the groove divides an organic material layer included in the intermediate layer, wherein the groove is provided in a multilayer including an organic layer and an inorganic layer, wherein the organic layer is arranged on the substrate, and the inorganic layer is stacked on the organic layer.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2019-0037311, filed on March 29, 2019, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more exemplary embodiments of the present invention relate to display devices, and more specifically, to display devices including component areas in a display area. Background Technology

[0004] Recently, the applications of display devices have diversified. In addition, as display devices have become thinner and lighter, they have been used more widely.

[0005] As the size of the display area of ​​a display device increases, various functions that are combined with or related to the display device can be added. Based on the increase in the size of the display area, consideration is being given to incorporating various functions and features into the display device, and the arrangement of various components within the display area of ​​the display device is being studied. Summary of the Invention

[0006] According to an exemplary embodiment of the present invention, a display device includes: a substrate including a component region, a display region, and a central region provided between the component region and the display region; a thin-film transistor disposed in the display region; a display element including a pixel electrode, an intermediate layer, and a counter electrode, wherein the pixel electrode is electrically connected to the thin-film transistor, wherein the intermediate layer is disposed on the pixel electrode, and wherein the counter electrode is disposed on the intermediate layer; a first organic insulating layer, a second organic insulating layer, and a passivation layer sequentially stacked between the thin-film transistor and the pixel electrode; and a trench disposed in the central region, wherein the trench divides an organic material layer included in the intermediate layer, wherein the trench is provided in a multilayer including organic and inorganic layers, wherein the organic layer is disposed on the substrate, and the inorganic layer is stacked on the organic layer.

[0007] In an exemplary embodiment of the present invention, the inorganic layer includes a portion that protrudes toward the center of the groove.

[0008] In an exemplary embodiment of the present invention, the organic layer includes a first sub-sub-layer and a second sub-sub-layer, wherein the first sub-sub-layer is the same layer as the second organic insulating layer, and the second sub-sub-layer is the same layer as the first organic insulating layer.

[0009] In an exemplary embodiment of the present invention, the end of the second sub-lower layer adjacent to the slot is covered by the first sub-lower layer.

[0010] In an exemplary embodiment of the inventive concept, the inorganic layer is the same layer as the passivation layer.

[0011] In an exemplary embodiment of the inventive concept, the display device further comprises a thin film encapsulation layer covering the display area and the intermediate area on the substrate.

[0012] In an exemplary embodiment of the inventive concept, the thin film encapsulation layer comprises a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer arranged between the first inorganic encapsulation layer and the second inorganic encapsulation layer.

[0013] In an exemplary embodiment of the inventive concept, the first inorganic encapsulation layer covers inner walls of the trenches separating the organic layer and the inorganic layer, wherein the organic encapsulation layer fills the inner space of the trenches, and wherein the second inorganic encapsulation layer covers an upper surface of the organic encapsulation layer.

[0014] In an exemplary embodiment of the inventive concept, the intermediate layer comprises a light emitting layer, a hole transport layer, and an electron transport layer, wherein the light emitting layer is arranged between the hole transport layer and the electron transport layer, and wherein the hole transport layer and the electron transport layer extend and stack on the inorganic layer.

[0015] In an exemplary embodiment of the inventive concept, at least one of the hole transport layer and the electron transport layer is divided by the trenches. BRIEF DESCRIPTION OF DRAWINGS

[0016] The above and other features of the inventive concept will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which:

[0017] Figure 1 is a perspective view of a display device according to an exemplary embodiment of the inventive concept;

[0018] Figure 2 and Figure 3 is a cross-sectional view of the display device taken along the line II-II’ of Figure 1

[0019] Figure 4A , Figure 4B , Figure 4C and Figure 4D are schematic cross-sectional views of a display panel of Figure 1

[0020] Figure 5 is a plan view of the display panel of Figure 1

[0021] Figure 6 is a circuit diagram of a pixel in the display panel of Figure 1

[0022] Figure 7 is​​​​Figure 5 an enlarged plan view of an assembly area of the display panel of

[0023] Figure 8 is a schematic cross-sectional view of an organic light emitting diode in a pixel in the display panel of Figure 1

[0024] Figure 9 is a cross-sectional view of a slot in the display panel of Figure 1

[0025] Figure 10 is a cross-sectional view of the assembly area taken along line X-X’ of Figure 7

[0026] Figure 11 is an enlarged cross-sectional view of a slot adjacent to the display area of Figure 10

[0027] Figure 12A Figure 12B Figure 12C Figure 12D Figure 12E Figure 12F Figure 12G Figure 12H Figure 12I are cross-sectional views of a process of sequentially fabricating a slot of Figure 11 DETAILED DESCRIPTION

[0028] Exemplary embodiments of the inventive concept will now be described more fully hereinafter with reference to the accompanying drawings. The inventive concept may, however, be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. It will be understood that, throughout the specification, like reference numerals are used for like elements and redundant description can be omitted. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of,” when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list.

[0029] It should be understood that although the terms “first,” “second,” etc. can be used herein to describe various components, these components should not be limited by these terms. These terms are only used to distinguish one component from another. Thus, a first component discussed below could be termed a second component without departing from the spirit and scope of the inventive concept.

[0030] As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0031] ​​​​​​​​​​​​​The size of elements in the drawings can be exaggerated for the purpose of clarity. In other words, since the size and thickness of components in the drawings can be exaggerated for the purpose of clarity, the following exemplary embodiments of inventive concepts are not limited thereto.

[0032] While exemplary embodiments of inventive concepts can be implemented differently, a specific process sequence can be different from the described sequence. For example, two processes described in succession can be performed at substantially the same time or in an order opposite to the described sequence.

[0033] In this specification, "A and / or B" means A or B, or A and B. Also, "at least one of A and B" means A or B, or A and B.

[0034] It is understood that when a layer, region, or component is referred to as being "connected to" or "coupled to" another layer, region, or component, the layer, region, or component can be directly connected or coupled to the other layer, region, or component, or intervening layers, regions, or components can be present. For example, when a layer, region, or component is referred to as being electrically "connected to" or "coupled to" another layer, region, or component, the layer, region, or component can be electrically "directly connected or coupled to" the other layer, region, or component, and / or electrically "indirectly connected or coupled to" the other layer, region, or component, with intervening elements present between the layer, region, or component and the other layer, region, or component.

[0035] Figure 1 is a schematic perspective view of a display apparatus 1 according to an exemplary embodiment of inventive concepts.

[0036] Referring to Figure 1 , the display apparatus 1 includes an assembly area OA and a display area DA. The assembly area OA is a first area and the display area DA is a second area at least partially surrounding the assembly area OA. The display apparatus 1 can provide a predetermined image by using light emitted from a plurality of pixels arranged in the display area DA. For example, the assembly area OA can be completely surrounded by the display area DA. The assembly area OA can be an area in which an assembly is arranged. The assembly will be described later with reference to Figure 2 .

[0037] A middle area MA, which is a third area, is arranged between the assembly area OA and the display area DA. The display area DA can be surrounded by a peripheral area PA, which is a fourth area. The middle area MA and the peripheral area PA can be a type of non-display area in which a pixel is not arranged. The middle area MA can be at least partially surrounded by the display area DA. For example, the display area DA can be completely surrounded by the peripheral area PA.

[0038] Hereinafter, an organic light emitting display apparatus is explained as an embodiment of the display apparatus 1 according to the exemplary embodiments of the present inventive concept. However, the display apparatus 1 in the present disclosure is not limited thereto. According to the exemplary embodiments of the present inventive concept, the display apparatus 1 in the present disclosure can be a display apparatus such as a quantum dot light emitting display apparatus.

[0039] Figure 1 It is shown that one assembly area OA is included, and the assembly area OA has a circular shape. However, the present inventive concept is not limited thereto. Two or more assembly areas OA can be included, and their respective shapes can be variously modified to have a circular shape, an elliptical shape, a polygonal shape, a star shape, a lozenge shape, etc.

[0040] Figure 2 and Figure 3 Each is a cross-sectional view of the display apparatus 1 according to the exemplary embodiments of the present inventive concept, which can correspond to a cross-section of the display apparatus 1 taken along the line II-II'.

[0041] Referring to Figure 2 The display apparatus 1 can include a display panel 10, an input detection layer 40 on the display panel 10, and an optical functional layer 50. The display panel 10, the input detection layer 40, and the optical functional layer 50 can be covered by a window 60. The display apparatus 1 can be included in various types of electronic devices such as a mobile phone, a notebook computer, or a smart watch.

[0042] The display panel 10 can display an image. The display panel 10 includes pixels in a display area DA. The pixels can include display elements and pixel circuits connected to the display elements. The display elements can include organic light emitting diodes, quantum dot organic light emitting diodes, etc.

[0043] The input detection layer 40 obtains coordinate information according to an external input, for example, a touch event. The input detection layer 40 can include a sensing electrode (or, for example, a touch electrode) and a trace line connected to the sensing electrode. The input detection layer 40 can be disposed on the display panel 10. The input detection layer 40 can detect the external input by using a mutual capacitance method and / or a self-capacitance method.

[0044] For example, the input detection layer 40 can be directly disposed on the display panel 10, or formed separately, and then combined with the display panel 10 by using an adhesive layer such as an optically transparent adhesive. For example, the input detection layer 40 can be formed after a process of forming the display panel 10 is performed. In this case, the input detection layer 40 can be understood as a part of the display panel 10, and the adhesive layer can not be disposed between the input detection layer 40 and the display panel 10. Figure 2The display input detection layer 40 is disposed between the display panel 10 and the optical function layer 50. However, according to an exemplary embodiment of the present inventive concept, the input detection layer 40 can be disposed on the optical function layer 50.

[0045] The optical function layer 50 can include an anti-reflection layer. The anti-reflection layer can reduce reflectivity of light (e.g., external light) incident from the outside toward the display panel 10 through the window 60. The anti-reflection layer can include a retarder and / or a polarizer. The retarder can be a film type retarder or a liquid crystal coating type retarder. The retarder can include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer can be a film type polarizer or a liquid crystal coating type polarizer. The film type polarizer can include a stretched synthetic resin film. The liquid crystal coating type polarizer can include liquid crystals arranged in a specific arrangement. The retarder and the polarizer can further include a protective film. The retarder, the polarizer, or the protective film can be a base layer of the anti-reflection layer.

[0046] According to an exemplary embodiment of the present inventive concept, the anti-reflection layer can include a black matrix and a color filter. The color filter can be arranged according to a color of light emitted from each of the pixels of the display panel 10. According to an exemplary embodiment of the present inventive concept, the anti-reflection layer can include a destructive interference structure. The destructive interference structure can include a first reflection layer and a second reflection layer arranged on different layers from each other. First reflected light and second reflected light respectively reflected from the first reflection layer and the second reflection layer can be destructively interfered, and thus, the reflectivity of the external light can be reduced.

[0047] The optical function layer 50 can include a lens layer. The lens layer can increase light emission efficiency of light emitted from the display panel 10, or reduce color deviation. The lens layer can include a layer having a concave lens shape or a convex lens shape and / or include a plurality of layers having different refractive indexes. The optical function layer 50 can include both the anti-reflection layer and the lens layer, or one of the anti-reflection layer or the lens layer.

[0048] In an exemplary embodiment of the present inventive concept, the optical function layer 50 can be formed after a process of forming the display panel 10 and / or the input detection layer 40 is performed. In this case, an adhesive layer can not be disposed between the optical function layer 50, the display panel 10, and / or the input detection layer 40.

[0049] The display panel 10, the input detection layer 40, and / or the optical function layer 50 can include an opening. In this regard, Figure 2The display panel 10, the input detection layer 40, and the optical function layer 50 each include first to third openings 10H, 40H, and 50H, and the first to third openings 10H, 40H, and 50H overlap each other. For example, the first to third openings 10H, 40H, and 50H can be aligned with each other. The first to third openings 10H, 40H, and 50H are disposed to correspond to the component area OA. For example, the first to third openings 10H, 40H, and 50H can be aligned with the component area OA. According to an exemplary embodiment of the present inventive concept, the display panel 10, the input detection layer 40, and / or the optical function layer 50 can not include an opening. For example, one or two of the display panel 10, the input detection layer 40, and the optical function layer 50 can not include an opening. In addition, as shown in Figure 3 the display panel 10, the input detection layer 40, and the optical function layer 50 can not include an opening.

[0050] As described above, the component area OA can be an area in which the component 20 is disposed (for example, the area can be a sensor area, a camera area, a speaker area, etc.). The component 20 is configured to add various functions to the display device 1. As shown in Figure 2 the component 20 can be disposed in the first to third openings 10H, 40H, and 50H. In addition, as shown in Figure 3 the component 20 can be disposed under the display panel 10.

[0051] The component 20 can include an electronic element. For example, the component 20 can be an electronic element that uses light or sound. For example, the electronic element can include a sensor configured to output and / or receive light (such as an infrared sensor), a camera configured to receive light and capture an image, a sensor configured to measure a distance or recognize a fingerprint, a small light configured to output light, a speaker configured to output sound, etc. In the case of an electronic element that uses light, various wavelength bands of light can be used, such as visible light, infrared light, ultraviolet light, etc. In addition, the electronic element can be a temperature sensor, a barometric pressure sensor, or a heart rate sensor. In an exemplary embodiment of the present inventive concept, the component area OA can be understood as a transmission area through which light and / or sound can pass. Light and / or sound are output from the component 20 to the outside or advance from the outside toward the component 20 (for example, the electronic element).

[0052] According to an exemplary embodiment of the present inventive concept, when the display device 1 is used as a smart watch or a vehicle instrument panel, the component 20 can be a member such as a clock hand or a needle indicating predetermined information (for example, a vehicle speed, etc.). When the display device 1 includes a clock or a vehicle instrument panel, the component 20 can pass through the window 60 and can be exposed to the outside, and the window 60 can include an opening corresponding to the component area OA.

[0053] As described above, the assembly 20 can include components (or a plurality of components) related to the function of the display panel 10, components that increase the aesthetic of the display panel 10, such as a bezel or the like. Although Figure 2 and Figure 3 not shown in FIGS. 1A and 1B, a layer including an optically transparent adhesive can be disposed between the window 60 and the optically functional layer 50.

[0054] Figures 4A-4D is a schematic cross-sectional view of a display panel 10 according to an exemplary embodiment of the inventive concept.

[0055] Referring to Figure 4A , the display panel 10 includes a display layer 200 on a substrate 100. For example, the substrate 100 can include a glass material or a polymer resin. The substrate 100 can include multiple layers or can be a single layer. For example, as shown in the enlarged view of Figure 4A , the substrate 100 can include a first base layer 101, a first barrier layer 102, a second base layer 103, and a second barrier layer 104.

[0056] The first base layer 101 and the second base layer 103 can each include a polymer resin. For example, the first base layer 101 and the second base layer 103 can include polyether sulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC), cellulose acetate propionate (CAP), or the like. For example, the above-described polymer resins can be transparent.

[0057] The first barrier layer 102 and the second barrier layer 104 are barrier layers configured to prevent penetration of external foreign substances. The first barrier layer 102 and the second barrier layer 104 can include a single layer or multiple layers including an inorganic material such as silicon nitride (SiN x ) or silicon oxide (SiO x ).

[0058] The display layer 200 includes a plurality of pixels. The display layer 200 can include a display element layer 200A including a display element disposed in each of the pixels, and a pixel circuit layer 200B including a pixel circuit and an insulating layer, both of which are disposed in each of the pixels. The display element layer 200A can have a stacked structure in which a pixel electrode, an opposing electrode, and an intermediate layer disposed between the pixel electrode and the opposing electrode are stacked. Each of the display elements can be an organic light emitting diode (OLED). Each of the pixel circuits can include a thin film transistor and a storage capacitor.

[0059] The display elements of the display layer 200 may be covered by encapsulation components, such as a thin-film encapsulation layer 300. The thin-film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. When the display panel 10 includes a substrate 100 and a thin-film encapsulation layer 300, wherein the substrate 100 comprises a polymer resin and the thin-film encapsulation layer 300 comprises an inorganic encapsulation layer and an organic encapsulation layer, the flexibility of the display panel 10 may be increased.

[0060] The display panel 10 may include a first opening 10H passing through the display panel 10. The first opening 10H may be arranged in the component area 0A. In this case, the component area 0A corresponds to the first opening 10H. Figure 4A As shown, the substrate 100 and the thin-film encapsulation layer 300 each include through-holes 100H and 300H corresponding to the first opening 10H of the display panel 10. The display layer 200 may also include through-hole 200H corresponding to the component area 0A and the first opening 10H.

[0061] According to exemplary embodiments of the present invention, such as Figure 4B As shown, substrate 100 may not include vias corresponding to component region OA. Display layer 200 may include vias 200H corresponding to component region OA. Thin-film encapsulation layer 300 may not include vias corresponding to component region OA. In exemplary embodiments of the present invention, such as... Figure 4C As shown, the display layer 200 may not include through holes corresponding to the component area OA.

[0062] Figures 4A-4C The display shows that component layer 200A is not arranged in component area OA. However, the inventive concept is not limited thereto. Exemplary embodiments of the inventive concept, such as... Figure 4D As shown, the auxiliary display element layer 200C can be placed in the component area OA. The auxiliary display element layer 200C may include display elements having a structure different from that of the display elements in the display element layer 200A and / or operating using a method different from that of the display elements in the display element layer 200A.

[0063] In an exemplary embodiment of the present invention, each pixel in the display element layer 200A includes an active matrix organic light-emitting diode (OLED). The auxiliary display element layer 200C may include pixels, each including a passive matrix organic light-emitting diode (OLED). When the auxiliary display element layer 200C includes a display element that is a passive matrix organic light-emitting diode, the components of the pixel circuitry may not be present beneath the passive matrix organic light-emitting diode. For example, a portion of the pixel circuitry layer 200B beneath the auxiliary display element layer 200C may not include thin-film transistors and storage capacitors.

[0064] According to an example embodiment of the present inventive concept, the auxiliary display element layer 200C can include a display element of the same type as the type of the display element layer 200A (e.g., an active matrix organic light emitting diode). However, the structure of the pixel circuit under the auxiliary display element layer 200C can be different from the structure of the pixel circuit under the display element layer 200A. For example, the pixel circuit under the auxiliary display element layer 200C (e.g., a pixel circuit having a light shielding layer between a substrate and a thin film transistor, etc.) can include a structure different from the structure of the pixel circuit under the display element layer 200A. In addition, the display element of the auxiliary display element layer 200C can operate according to a control signal different from the control signal of the display element of the display element layer 200A. In the component area OA in which the auxiliary display element layer 200C is arranged, a component (e.g., an infrared sensor, etc.) that does not require a high transmittance can be arranged. In this case, the component area OA can be understood as a component area as well as an auxiliary display area.

[0065] Figure 5 is a schematic plan view of a display panel 10 according to an example embodiment of the present inventive concept. Figure 6 is a circuit diagram of a pixel in the display panel 10 according to an example embodiment of the present inventive concept.

[0066] Referring to Figure 5 , the display panel 10 can include a component area OA that is a first area, a display area DA that is a second area, a middle area MA that is a third area, and a peripheral area PA that is a fourth area. It should be understood that Figure 5 The shape of the substrate 100 in the display panel 10 is shown. For example, it can be understood that the substrate 100 includes the component area OA, the display area DA, the middle area MA, and the peripheral area PA. For example, the substrate 100 can have a quadrangular shape having an opening corresponding to the component area OA.

[0067] The display panel 10 includes a plurality of pixels P in the display area DA. As Figure 6 shown in the middle, each of the pixels P can include a pixel circuit PC, and an organic light emitting diode OLED as a display element connected to the pixel circuit PC. The pixel circuit PC can include a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst. Each of the pixels P can emit, for example, red light, green light, blue light, or white light through the organic light emitting diode OLED.

[0068] The second thin film transistor T2 is a switching thin film transistor. The second thin film transistor T2 is connected to the scan line SL and the data line DL. Based on a switching voltage input from the scan line SL, when a data voltage is input from the data line DL, the second thin film transistor T2 can transfer the data voltage to the first thin film transistor T1. The storage capacitor Cst is connected to the second thin film transistor T2 and the driving voltage line PL. The storage capacitor Cst can store a voltage corresponding to a difference between a voltage transferred from the second thin film transistor T2 and a first power voltage ELVDD supplied to the supply voltage line PL.

[0069] The first thin film transistor T1 is a driving thin film transistor. The first thin film transistor T1 is connected to the driving voltage line PL and the storage capacitor Cst. The first thin film transistor T1 can control a driving current flowing from the driving voltage line PL to the organic light emitting diode OLED, corresponding to a voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED can emit light having a predetermined brightness according to the driving current. An opposite electrode (e.g., a cathode) of the organic light emitting diode OLED can receive a second power voltage ELVSS.

[0070] Reference Figure 6 Two thin film transistors and one storage capacitor are described. However, the inventive concept is not limited thereto. The number of thin film transistors and the number of storage capacitors can vary differently according to the design of the pixel circuit PC. For example, the pixel circuit PC can further include 4, 5, or more thin film transistors, instead of the two thin film transistors described above.

[0071] Reference Figure 5 In a plan view, the middle area MA can surround the assembly area OA. The middle area MA is an area in which a display element configured to emit light, such as an organic light emitting diode, is not disposed. The signal line can pass through and / or around the middle area MA, and the signal line provides a signal to the pixels P in the outer periphery of the assembly area OA. In the outer periphery area PA, the scan driver 1100, the data driver 1200, the main power line, etc. can be disposed. The scan driver 1100 provides a scan signal to each of the pixels P, the data driver 1200 provides a data signal to each of the pixels P, and the main power line provides a first power voltage and a second power voltage to each of the pixels P. Figure 5 The display data driver 1200 is disposed adjacent to the side surface of the substrate 100. However, according to an exemplary embodiment of the inventive concept, the data driver 1200 can be disposed on a flexible printed circuit board (FPCB) that is electrically connected to a pad disposed at the side surface of the display panel 10.

[0072] Figure 7is a plan view of a portion of an assembly area OA of a display panel 10 according to an exemplary embodiment of the inventive concept. Figure 8 is a schematic cross-sectional view of an organic light emitting diode OLED included in a pixel P in a display panel 10 according to an exemplary embodiment of the inventive concept. For the purpose of clarity, Figure 8 a thin film encapsulation layer not shown as an encapsulation member.

[0073] Referring to Figure 7 The pixels P are arranged in a display area DA around the assembly area OA. The assembly area OA can be provided between the pixels P. For example, in a plan view, the pixels P can each be arranged under or above the assembly area OA, and the pixels P can each be arranged around the assembly area OA. For example, the pixels P can be arranged in a first direction (e.g., to the left of the assembly area OA) and a second direction (e.g., to the right of the assembly area OA).

[0074] As shown in Figure 8 Each of the pixels P can include an organic light emitting diode OLED. The organic light emitting diode OLED can include a pixel electrode 221, an opposite electrode 223 facing the pixel electrode 221, and an intermediate layer 222 between the pixel electrode 221 and the opposite electrode 223.

[0075] The pixel electrode 221 is disposed on the planarization layer PNL. The pixel electrode 221 can include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and / or aluminum zinc oxide (AZO). According to an exemplary embodiment of the inventive concept, the pixel electrode 221 can include a reflective layer including, for example, silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof. According to an exemplary embodiment of the inventive concept, the pixel electrode 221 can further include a layer including ITO, IZO, ZnO, or In2O3 above and / or below the reflective layer.

[0076] A pixel defining layer PDL can be arranged on the pixel electrode 221. The pixel defining layer PDL can include an opening exposing an upper surface of the pixel electrode 221, and can cover edges of the pixel electrode 221. The pixel defining layer PDL can include an organic insulating layer. In addition, the pixel defining layer PDL can include an organic insulating layer or an inorganic insulating layer.

[0077] The intermediate layer 222 includes a light emitting layer 222b. The intermediate layer 222 can include a first functional layer 222a under the light emitting layer 222b and / or a second functional layer 222c on the light emitting layer 222b. The light emitting layer 222b can include a polymer organic material or a low molecular weight organic material that emits light of a predetermined color.

[0078] The first functional layer 222a can include a single layer or multiple layers. For example, when the first functional layer 222a is formed of a polymer organic material, the first functional layer 222a can have a single layer structure including a hole transport layer (HTL), and include poly(3,4-ethylenedioxythiophene) (PEDOT) or polyaniline (PANI). When the first functional layer 222a is formed of a low molecular weight organic material, the first functional layer 222a can include a hole injection layer (HIL) and a hole transport layer (HTL).

[0079] The second functional layer 222c can not be included. For example, when the first functional layer 222a and the light emitting layer 222b include a polymer organic material, the second functional layer 222c can not be included. However, when the second functional layer 222c is included, the second functional layer 222c can include a single layer or multiple layers. The second functional layer 222c can include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0080] The light emitting layer 222b in the intermediate layer 222 can be disposed in each of the pixels P. For example, the light emitting layer 222b can be patterned to correspond to the pixel electrode 221. For example, the light emitting layer 222b can overlap the pixel electrode 221. Unlike the light emitting layer 222b, the first functional layer 222a and / or the second functional layer 222c in the intermediate layer 222 can be formed as a single body, and can each correspond to a plurality of pixels P.

[0081] The counter electrode 223 can include a conductive material having a low work function. For example, the counter electrode 223 can include a (semi-)transparent layer including Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, lithium (Li), calcium (Ca), an alloy thereof, or the like. In addition, the counter electrode 223 can further include a layer on the (semi-)transparent layer including the above-described material, the layer including ITO, IZO, ZnO, or In2O3. The counter electrode 223 can be disposed in the middle area MA as well as in the display area DA. For example, the first functional layer 222a, the second functional layer 222c, and the counter electrode 223 can be formed by using a thermal deposition method.

[0082] The capping layer 230 can be disposed on the counter electrode 223. For example, the capping layer 230 can include lithium fluoride (LiF), and can be formed by using a thermal deposition method. In an exemplary embodiment of the inventive concept, the capping layer 230 can not be included.

[0083] Among the layers in the display panel 10, a layer including an organic material can provide a moisture penetration path through which moisture can advance. Because the first functional layer 222a and / or the second functional layer 222c in the stack structure of the organic light emitting diode OLED includes an organic material, the first functional layer 222a and / or the second functional layer 222c can provide an advancing path for moisture. However, because the grooves G in the middle area MA partition the first functional layer 222a and / or the second functional layer 222c, the above-described moisture penetration and damage to the organic light emitting diode OLED caused thereby can be prevented.

[0084] As Figure 7 is shown in the middle area MA. In Figure 7 the plan view shown in the middle area MA, the grooves G can each have an annular shape surrounding the component area OA, and can be arranged to be spaced apart from each other.

[0085] The grooves G can be formed in a multi-layer including a plurality of layers. The grooves G having a concave shape in the depth direction of the multi-layer can have an undercut structure. Hereinafter, the structure of the multi-layer and the grooves G are described with reference to Figure 9 .

[0086] Figure 9 is a cross-sectional view of a groove G in a display panel 10 according to an exemplary embodiment of the present inventive concept. For the purpose of clarity, Figure 9 a thin film encapsulation layer, which is a packaging member, is not shown.

[0087] Referring to Figure 9 , the multi-layer ML includes a lower layer LL and an upper layer UL. The lower layer LL can include a first sub-lower layer LL1 and a second sub-lower layer LL2 thereunder. The upper layer UL can be a single layer. However, the present inventive concept is not limited thereto. For example, the upper layer UL can include a plurality of layers.

[0088] The lower layer LL and the upper layer UL can include different materials from each other. For example, the first sub-lower layer LL1 and the second sub-lower layer LL2 can include an organic material, for example, an organic insulating material, and the upper layer UL can include an inorganic material.

[0089] The organic insulating material of the lower layer LL can be, for example, a general-purpose polymer such as polymethyl methacrylate (PMMA) or polystyrene (PS), a polymer derivative including a phenol group, an acrylic polymer, a diimide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a p-xylene polymer, a vinyl alcohol polymer, or a blend thereof.

[0090] The inorganic materials in the upper UL layer may include conductive oxides such as IZO, ITO, ZnO, In2O3, IGO, and / or AZO. Additionally, inorganic materials may include metals such as molybdenum (Mo), Al, copper (Cu), and / or titanium (Ti). Furthermore, inorganic materials may include insulating materials such as SiN. x SiO x and / or silicon oxynitrides (SiO2) x N y ).

[0091] The groove G can be arranged in the direction of the depth of the multilayer ML. For example, the groove G can extend toward the upper surface of the substrate 100. The groove G may include the upper hole UL-h of the upper layer UL, the first lower hole LL1-h of the first sub-lower layer LL1, and the second lower hole LL2-h of the second sub-lower layer LL2.

[0092] The depth d of the groove G can be substantially the same as the thickness t of the lower layer LL. The bottom surface of the groove G can be disposed on the same surface as the bottom surface of the second sub-lower layer LL2. However, the inventive concept is not limited thereto; for example, the bottom surface of the groove G can be disposed on a surface different from the bottom surface of the second sub-lower layer LL2.

[0093] The groove G has an undercut structure. The first width W1 of the upper hole UL-h can be formed to be smaller than the width of the lower layer LL, for example, the second width W2 of the first lower hole LL1-h of the first sub-lower layer LL1. The end of the upper layer UL protruding toward the groove G (e.g., toward the center of the groove G) can form a pair of tips PT. For example, the pair of tips PT can be the edge of the upper layer UL. For example, the tips PT can extend beyond the inner surface of the first sub-lower layer LL1 toward the center of the groove G. The protrusion length d1 of each of the pair of tips PT can be less than the depth d of the groove G. The protrusion length d1 of each of the pair of tips PT can be less than about 2 μm. For example, the protrusion length d1 of each of the pair of tips PT can be about 1 μm to 1.5 μm. The depth d of the groove G can be about 2 μm or more, about 2.5 μm or more, about 3 μm or more, or about 3.5 μm or more.

[0094] The above reference Figure 7 and Figure 8 The organic light-emitting diode (OLED) described Figure 8 In the stacked structure shown in the image, the organic material layers (or multiple organic material layers) can be divided by slots G. For example, as shown in the image... Figure 9 As shown, the first functional layer 222a and the second functional layer 222c can be separated by the groove G. Similarly, the opposing electrode 223 and the capping layer 230 can be separated by the groove G. As described above, the second functional layer 222c and / or the capping layer 230 may not be provided. In this case, the unprovided second functional layer 222c and / or capping layer 230 are not present in the outer periphery of the groove G.

[0095] Referring back Figure 7 , the middle area MA is arranged between the assembly area OA and the display area DA, and a plurality of grooves G is arranged in the middle area MA. Figure 7 Three grooves G are shown. However, there can be one groove G. In addition, there can be four or more, six or more, nine or more, ten or more, or eleven or more grooves G.

[0096] The line can be routed (or routed around) the edge of the assembly area OA in the middle area MA. The signal line connected to the pixels P spaced apart from each other around the assembly area OA can extend along the edge of the assembly area OA in the middle area MA.

[0097] In Figure 7 , at least one data line DL passing through the display area DA can extend in the y direction to provide a data signal to the pixels P arranged above and below the assembly area OA, respectively, and along the edge of the assembly area OA in the middle area MA. Similarly, at least one of the scan lines SL passing through the display area DA can extend in the x direction to provide a scan signal to the pixels P arranged at the left and right sides of the assembly area OA, respectively, and along the edge of the assembly area OA in the middle area MA.

[0098] The detour portion (or, for example, the portion extending around the assembly area OA or the bypass portion) SL-D of the scan line SL can be arranged on the same layer as the extension portion SL-L crossing the display area DA and formed as a single body with the extension portion SL-L. The detour portion DL-D1 of at least one of the data lines DL (hereinafter referred to as a first data line DL1) can be arranged on a different layer from the layer of the extension portion DL-L1. The detour portion of the data line DL can be connected to the extension portion DL-L1 through a contact hole CNT. The detour portion DL-D2 of at least one of the data lines DL2 (hereinafter referred to as a second data line) can be arranged on the same layer as the layer of the extension portion DL-L2 and formed as a single body with the extension portion DL-L2.

[0099] Figure 10 is a cross-sectional view of the assembly area OA taken along the line X-X' of Figure 7 . Figure 11 is an enlarged cross-sectional view of the groove area adjacent to the display area DA of Figure 10 .

[0100] Referring back Figure 10 , the middle area MA is arranged between the assembly area OA and the display area DA. Both the pixel circuit PC and the organic light emitting diode OLED corresponding to each of the pixels P are placed in the display area DA. Figure 10 ​

[0101] First, referring to FIG. 1, a display area DA of a substrate 100 can include a glass material or a polymer resin. According to an exemplary embodiment of the present inventive concept, as shown in an enlarged view of FIG. 2, the substrate 100 can include a plurality of sub-layers. Figure 10 Figure 4A As shown in an enlarged view of FIG. 3, the substrate 100 can include a plurality of sub-layers.

[0102] On the substrate 100, a buffer layer 201 can be disposed, and the buffer layer 201 can prevent impurities from penetrating into a semiconductor layer Act of a thin film transistor TFT. The buffer layer 201 can include an inorganic insulating layer, such as SiN x , SiO x N y , or SiO x . The buffer layer 201 can include a single layer or a plurality of layers including the above-described inorganic insulating material.

[0103] A pixel circuit PC can be disposed on the buffer layer 201. The pixel circuit PC includes a thin film transistor TFT and a storage capacitor Cst. The thin film transistor TFT can include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. A data line DL of the pixel circuit PC can be electrically connected to a switching thin film transistor included in the pixel circuit PC. In the present embodiment, as shown in FIG. 4 as an example, the gate electrode GE is a top gate type electrode disposed above the semiconductor layer Act to have a gate insulating layer 203 between the gate electrode GE and the semiconductor layer Act. However, according to an exemplary embodiment of the present inventive concept, the thin film transistor TFT can be a bottom gate type transistor. Figure 10

[0104] The semiconductor layer Act can include polysilicon. In addition, the semiconductor layer Act can include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The gate electrode GE can include a low-resistance metal material. The gate electrode GE can include a conductive material including Mo, Al, Cu, Ti, etc. The gate electrode GE can include a single layer or a plurality of layers including the above-described material.

[0105] The gate insulating layer 203 is disposed between the semiconductor layer Act and the gate electrode GE, and can include an inorganic insulating material, such as SiO x , SiN x , SiO x N y , aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, etc. The gate insulating layer 203 can include a single layer or a plurality of layers including the above-described material.

[0106] ​​The source electrode SE and the drain electrode DE can be placed on the same layer as the data line DL and include the same material as the data line DL. The source electrode SE, the drain electrode DE, and the data line DL can include a material having electrical conductivity. The source electrode SE and the drain electrode DE can include an electrically conductive material such as Mo, Al, Cu, Ti, etc. The source electrode SE and the drain electrode DE can include a single layer or multiple layers including the above-mentioned materials. According to an exemplary embodiment of the present inventive concept, the source electrode SE, the drain electrode DE, and the data line DL can include multiple layers including Ti / Al / Ti.

[0107] The storage capacitor Cst can include a lower electrode CE1 and an upper electrode CE2 overlapping each other to have a first interlayer insulating layer 205 between the lower electrode CE1 and the upper electrode CE2. The storage capacitor Cst can overlap the thin film transistor TFT. In this regard, Figure 10 The gate electrode GE of the display thin film transistor TFT is the lower electrode CE1 of the storage capacitor Cst. According to an exemplary embodiment of the present inventive concept, the storage capacitor Cst can not overlap the thin film transistor TFT. The storage capacitor Cst can be covered by a second interlayer insulating layer 207. The upper electrode CE2 of the storage capacitor Cst can include an electrically conductive material such as Mo, Al, Cu, Ti, etc. The upper electrode CE2 can include a single layer or multiple layers including the above-mentioned materials.

[0108] The first interlayer insulating layer 205 and the second interlayer insulating layer 207 can include an inorganic insulating material such as SiO x , SiN x , SiO x N y , aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, etc. The first interlayer insulating layer 205 and the second interlayer insulating layer 207 can include a single layer or multiple layers including the above-mentioned materials.

[0109] The pixel circuit PC includes the thin film transistor TFT and the storage capacitor Cst and can be covered by a first organic insulating layer 209. The first organic insulating layer 209 can include a substantially flat upper surface.

[0110] The pixel circuit PC can be electrically connected to the pixel electrode 221. For example, as Figure 10The contact metal layer CM can be arranged between the thin film transistor TFT and the pixel electrode 221. The contact metal layer CM can be connected to the thin film transistor TFT through a contact hole in the first organic insulating layer 209. The pixel electrode 221 can be connected to the contact metal layer CM through a contact hole in the second organic insulating layer 211 arranged on the contact metal layer CM. The contact metal layer CM can include a conductive material such as Mo, Al, Cu, Ti, etc. The contact metal layer CM can include a single layer or multiple layers including the above-mentioned materials. According to an exemplary embodiment of the present inventive concept, the contact metal layer CM can include three layers including Ti / Al / Ti.

[0111] The first and second organic insulating layers 209 and 211 can include an organic insulating material such as a general-purpose polymer such as PMMA or PS, a polymer derivative including a phenol group, an acrylic polymer, a diimide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a p-xylene polymer, a vinyl alcohol polymer, or a blend thereof. According to an exemplary embodiment of the present inventive concept, the first and second organic insulating layers 209 and 211 can include PI.

[0112] The pixel electrode 221 can be arranged on the second organic insulating layer 211. The second organic insulating layer 211 can be understood as a planarization layer described above with reference to Figure 8 The edge of the pixel electrode 221 can be covered by the pixel defining layer 215. The pixel defining layer 215 can include an opening overlapping with a central portion of the pixel electrode 221. The spacer 217 can be arranged on the pixel defining layer 215. The spacer 217 can include a material different from or the same as that of the pixel defining layer 215. According to an exemplary embodiment of the present inventive concept, the pixel defining layer 215 and the spacer 217 can include the same material and can be formed together in a mask process using a half-tone mask. According to an exemplary embodiment of the present inventive concept, the pixel defining layer 215 and the spacer 217 can include PI.

[0113] Referring to Figure 8 and Figure 10 The intermediate layer 222 includes an emission layer 222b. The intermediate layer 222 can include a first functional layer 222a below the emission layer 222b and / or a second functional layer 222c on the emission layer 222b. The emission layer 222b can include a polymer organic material or a low molecular weight organic material emitting light of a predetermined color. The counter electrode 223 can be arranged on the intermediate layer 222. The capping layer 230 can be arranged on the counter electrode 223. In an exemplary embodiment of the present inventive concept, the capping layer 230 can not be provided.

[0114] Referring to Figure 8Materials, structures, and characteristics of the pixel electrode 221, the intermediate layer 222, and the counter electrode 223 are described.

[0115] The organic light emitting diode OLED is covered by a thin film encapsulation layer 300. The thin film encapsulation layer 300 can include at least one organic encapsulation layer and at least one inorganic encapsulation layer. Figure 11 The display thin film encapsulation layer 300 includes a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 disposed between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330. In the exemplary embodiment of the present inventive concept, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and the order of stacking the organic encapsulation layers and the inorganic encapsulation layers can be varied.

[0116] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can include at least one inorganic material such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, SiO x , SiN x , and / or SiO x N y . The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can include a single layer or multiple layers including the above-described materials. The organic encapsulation layer 320 can include a polymer-based material. The polymer-based material can include an acrylic resin, an epoxy resin, PI, polyethylene, etc. According to the exemplary embodiment of the present inventive concept, the organic encapsulation layer 320 can include an acrylate.

[0117] The thickness of the first inorganic encapsulation layer 310 can be different from the thickness of the second inorganic encapsulation layer 330. The thickness of the first inorganic encapsulation layer 310 can be greater than the thickness of the second inorganic encapsulation layer 330. Alternatively, the thickness of the second inorganic encapsulation layer 330 can be greater than the thickness of the first inorganic encapsulation layer 310, or the thickness of the first inorganic encapsulation layer 310 can be the same as the thickness of the second inorganic encapsulation layer 330.

[0118] Referring to the middle area MA of FIG. 1, Figure 10 the middle area MA can include a first sub-middle area SMA1 distanced from the assembly area OA, and a second sub-middle area SMA2 closer to the assembly area OA than the first sub-middle area SMA1. For example, the second sub-middle area SMA2 is provided between the assembly area OA and the first sub-middle area SMA1.

[0119] A line, for example, a signal line can be placed in the first sub-middle area SMA1. The detour portions (e.g., the detour portions DL-D1 and DL-D2) of the first data line DL1 and the second data line DL2 described above with reference to Figure 7 may be placed in the second sub-middle area SMA2. Figure 10the first sub-middle area SMA1. The first sub-middle area SMA1 can be understood as a line area or a meandering area along which the data lines DL extend. Referring to Figure 7 The data lines DL in the middle area MA described above can include first data lines DL1 and second data lines DL2 arranged alternately on and under the first organic insulating layer 209 to have the first organic insulating layer 209 between the first data lines DL1 and the second data lines DL2. In this regard, Figure 10 The meandering portions DL-D1 of the first data lines DL1 and the meandering portions DL-D2 of the second data lines DL2 are arranged to be separated from each other by the first organic insulating layer 209 and on and under the first organic insulating layer 209, respectively. In this case, the interval Δd (or pitch) between the first data lines DL1 and the second data lines DL2 adjacent to each other, for example, between the meandering portions DL-D1 of the first data lines DL1 and the meandering portions DL-D2 of the second data lines DL2 can be reduced.

[0120] The groove G is arranged in the second sub-middle area SMA2. The groove G is arranged on the multi-layer ML. According to an exemplary embodiment of the inventive concept, as Figure 10 It is shown in the middle that the multi-layer ML can include the first organic insulating layer 209, the second organic insulating layer 211, and the inorganic layer 213. The first organic insulating layer 209 and the second organic insulating layer 211 can correspond to the first organic insulating layer 209 and the second organic insulating layer 211 described above with reference to Figure 9 the second sub-lower layer LL2 and the first sub-lower layer LL1 of the multi-layer ML described above. The inorganic layer 213 can correspond to the upper layer UL.

[0121] The inorganic layer 213 can include a material different from that of the pixel electrode 221. The inorganic layer 213 can include a conductive oxide such as indium zinc oxide (IZO), indium tin oxide (ITO), zinc oxide (ZnO), In2O3, indium gallium oxide (IGO), and / or aluminum zinc oxide (AZO); a metal such as Mo, Cu, and / or Ti; or an insulating material such as SiN x , SiO x , and / or SiO x N y The inorganic layer 213 is arranged in the middle area MA. The inorganic layer 213 can be formed by using the same process as that of the passivation layer 212 including an inorganic insulating material.

[0122] Referring to Figure 11The trench G may include holes 213h in the inorganic layer 213, holes 211h in the second organic insulating layer 211, and holes 209h in the first organic insulating layer 209. In this case, the bottom surface of the trench G may be disposed on the same bottom surface as the bottom surface of the first organic insulating layer 209. Furthermore, because the second organic insulating layer 211 covers the first organic insulating layer 209 to its ends, the ends of the second organic insulating layer 211 are exposed towards the trench G. The ends of the second organic insulating layer 211 are also covered by the thin-film encapsulation layer 300.

[0123] The inorganic layer 213 includes the pair of tips PT extending toward the groove G. As described above, the protruding length d1 of the pair of tips PT may be less than about 2 μm. The depth d of the groove G may be about 2 μm or greater, about 2.5 μm or greater, about 3 μm or greater, or about 3.5 μm or greater. The process for forming the groove G will be described later.

[0124] like Figure 10 As shown, the partition wall PW can be placed in the central region MA. The partition wall PW can be arranged between adjacent slots G (e.g., the closest pair of slots). The partition wall PW can be formed by sequentially stacking portions 211P of the layer constituting the second organic insulating layer 211, portions 215P of the layer constituting the pixel defining layer 215, and portions 217P of the layer constituting the separator 217. The height from the upper surface of the substrate 100 to the upper surface of the partition wall PW can be less than the height from the upper surface of the substrate 100 to the upper surface of the separator 217.

[0125] The intermediate zone MA may include inorganic contact regions (ICR). Inorganic contact regions (ICR) may be arranged between adjacent slots G. Inorganic contact regions (ICR) are areas in which layers containing inorganic material are in direct contact with each other. Figure 10 The inorganic layer 213 is in direct contact with the second interlayer insulation layer 207. The inorganic layer 213 can contact the second interlayer insulation layer 207 through openings 209OP and 211OP respectively arranged in the first organic insulation layer 209 and the second organic insulation layer 211.

[0126] As described above, the first functional layer 222a, the second functional layer 222c, the relative electrode 223, and the capping layer 230 can be divided by the groove G.

[0127] In an exemplary embodiment of the present invention, the capping layer 230 may extend into the groove to cover the inner side surface of the groove G and may not be segmented. For example, the capping layer 230 may be a single unit.

[0128] The first inorganic encapsulation layer 310, the organic encapsulation layer 320, and the second inorganic encapsulation layer 330 can be sequentially formed. For example, the first inorganic encapsulation layer 310 can be formed by using a chemical vapor deposition method or the like. Unlike the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the capping layer 230, the first inorganic encapsulation layer 310 has excellent step coverage. Thus, as shown in FIG. 2B, the first inorganic encapsulation layer 310 can sequentially cover the inner wall of the trench G. For example, the first inorganic encapsulation layer 310 can sequentially extend to cover the side surface and the bottom surface of the inorganic layer 213, and to cover the side surface of the second organic insulating layer 211 and the bottom surface of the trench G. Figure 11 As shown in FIG. 2B, the first inorganic encapsulation layer 310 can sequentially cover the inner wall of the trench G. For example, the first inorganic encapsulation layer 310 can sequentially extend to cover the side surface and the bottom surface of the inorganic layer 213, and to cover the side surface of the second organic insulating layer 211 and the bottom surface of the trench G.

[0129] As shown in FIG. 2B, the first inorganic encapsulation layer 310 can sequentially cover the inner wall of the trench G. For example, the first inorganic encapsulation layer 310 can sequentially extend to cover the side surface and the bottom surface of the inorganic layer 213, and to cover the side surface of the second organic insulating layer 211 and the bottom surface of the trench G. Figure 11 As shown in FIG. 2B, a first thickness t1 of a first portion of the first inorganic encapsulation layer 310 can be greater than a second thickness t2 of a second portion of the first inorganic encapsulation layer 310, where the first portion of the first inorganic encapsulation layer 310 is disposed above the upper surface of the inorganic layer 213, and the second portion of the first inorganic encapsulation layer 310 is disposed below the lower surface of the inorganic layer 213. In addition, the first thickness t1 of the first portion of the first inorganic encapsulation layer 310 can be greater than a third thickness t3 of a third portion of the first inorganic encapsulation layer 310 disposed on the side surface of the second organic insulating layer 211.

[0130] The first inorganic encapsulation layer 310 can include a single layer or a plurality of sub-layers. For example, the first inorganic encapsulation layer 310 can include two layers including SiO x N y and have different layer qualities. In this case, the capping layer 230 can not be provided. In addition, the first inorganic encapsulation layer 310 can include SiO x N y and SiO x , SiO x N y and SiN x , or SiN x and SiO x N y .

[0131] As shown in FIG. 2B, the organic encapsulation layer 320 can cover the display area DA and a portion of the middle area MA. An end portion of the organic encapsulation layer 320 adjacent to the component area OA can be disposed adjacent to the side surface of the partition wall PW. Figure 10

[0132] The second inorganic encapsulation layer 330 is disposed on the organic encapsulation layer 320, and can be in direct contact with the first inorganic encapsulation layer 310 in the middle area MA. For example, in an area between the component area OA and the partition wall PW, the first inorganic encapsulation layer 310 can be in contact with the second inorganic encapsulation layer 330.

[0133] ​Because the second inorganic encapsulation layer 330 has similar excellent step coverage as the first inorganic encapsulation layer 310, the second inorganic encapsulation layer 330 can sequentially cover the inner side surface of the trench G placed between the assembly area OA and the partition wall PW. Similar to the first inorganic encapsulation layer 310, the thickness of the fourth portion of the second inorganic encapsulation layer 330 can be greater than the thickness of the fifth portion of the second inorganic encapsulation layer 330. The fourth portion of the second inorganic encapsulation layer 330 is placed above the upper surface of the inorganic layer 213, and the fifth portion of the second inorganic encapsulation layer 330 is placed on the lower surface of the inorganic layer 213.

[0134] Figure 10 The structure shown in FIG. 10A can be understood as a structure surrounding the assembly area OA in a plan view. For example, when the trench G is viewed from a direction perpendicular to the upper surface of the substrate 100 as shown in FIG. 10A, the trench G can have a ring shape surrounding the assembly area OA. Similarly, when the partition wall PW is viewed from a direction perpendicular to the upper surface of the substrate 100 as shown in FIG. 10A, the partition wall PW can have a ring shape surrounding the assembly area OA. Figure 7 Figure 10 The trench G can have a ring shape surrounding the assembly area OA when the trench G is viewed from a direction perpendicular to the upper surface of the substrate 100 as shown in FIG. 10A. Similarly, the partition wall PW can have a ring shape surrounding the assembly area OA when the partition wall PW is viewed from a direction perpendicular to the upper surface of the substrate 100 as shown in FIG. 10A.

[0135] Now, the process of forming the trench G will be described with reference to FIGS. 11A to 11D. Figures 12A-12I

[0136] As shown in FIG. 11A, on the substrate 100, the buffer layer 201, the gate insulating layer 203, and the first and second interlayer insulating layers 205 and 207 are formed. Then, on the first and second interlayer insulating layers 205 and 207, the first organic insulating layer 209 is formed. The first organic insulating layer 209 is the same layer as the first organic insulating layer 209 that covers the thin film transistor TFT and the capacitor Cst in the display area DA. Figure 12A Next, as shown in FIG. 11B, a pattern of the trench G is formed on the first organic insulating layer 209 by using a photolithography process.

[0137] Figure 12B Then, as shown in FIG. 11C, the second organic insulating layer 211 is formed on the first organic insulating layer 209. The second organic insulating layer 211 is the same layer as the second organic insulating layer 211 that is placed on the first organic insulating layer 209 in the display area DA.

[0138] By patterning the second organic insulating layer 211, a pattern of the trench G is formed as shown in FIG. 11D. The end portion of the first organic insulating layer 209 adjacent to the trench G is covered with the second organic insulating layer 211. Figure 12C

[0139] By patterning the second organic insulating layer 211, a pattern of the trench G is formed as shown in FIG. 11D. The end portion of the first organic insulating layer 209 adjacent to the trench G is covered with the second organic insulating layer 211. Figure 12D

[0140] Then, as shown in FIG. 11D, the second organic insulating layer 211 is formed on the first organic insulating layer 209. The second organic insulating layer 211 is the same layer as the second organic insulating layer 211 that is placed on the first organic insulating layer 209 in the display area DA. Figure 12E ​​​​​In the display, the inorganic layer 213 is deposited on the second organic insulating layer 211 in the trench G. The inorganic layer 213 is the same layer as the passivation layer 212 in the display area DA. By patterning the inorganic layer 213, as Figure 12F In the display, the trench G is formed.

[0141] Next, dry etching using oxygen plasma is performed in the vacuum chamber. Then, as Figure 12G In the display, the second organic insulating layer 211 as an organic layer, not the inorganic layer 213, reacts with the oxygen plasma. Then, the surface of the second organic layer 211 in the trench G is partially removed, and thus, the pair of tips PT is formed. For example, the opening of the second organic layer 211 corresponding to the trench G can be widened. For example, as the inner wall of the second organic insulating layer 211 forming the trench G is partially removed by performing the dry etching, a form in which the inorganic layer 213 protrudes toward the center of the trench G is obtained.

[0142] Then, as Figure 12H In the display, the first functional layer 222a and the second functional layer 222c, the counter electrode 223, and the capping layer 230 are sequentially formed, and each of the first functional layer 222a and the second functional layer 222c, the counter electrode 223, and the capping layer 230 has a discontinuous structure due to the trench G. Thus, a path through which moisture can penetrate from the outside along the first functional layer 222a and the second functional layer 222c as organic layers into the display area DA can be broken in advance.

[0143] Thereafter, as Figure 12I In the display, the first inorganic encapsulating layer 310, the organic encapsulating layer 320, and the second inorganic encapsulating layer 330 are sequentially formed, thereby covering and protecting, for example, the organic layers from contact with external air.

[0144] Thus, because the trench G is formed together when the first organic insulating layer 209 and the second organic insulating layer 211 and the passivation layer 212 are formed on the substrate 100, an additional process of forming the trench G can not be performed. Thus, the process can be simplified.

[0145] Thus, according to the display apparatus described above, a display apparatus including a component area in a display area can be implemented, and various types of components can be disposed in the component area. In addition, because the trench can break a moisture penetration path in the middle area, which is a boundary between the component area and the display area in the outer periphery of the component area, by performing a simple process, and the performance and yield of products can be increased.

[0146] While the present inventive concept has been described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details can be made therein without departing from the spirit and scope of the present inventive concept.

Claims

1.A display device comprising: a substrate including a component area, a display area, and an intermediate area provided between the component area and the display area; a thin film transistor arranged in the display area; a display element including a pixel electrode, an intermediate layer, and an opposite electrode, wherein the pixel electrode is electrically connected to the thin film transistor, wherein the intermediate layer is provided on the pixel electrode, and wherein the opposite electrode is provided on the intermediate layer; a first organic insulating layer, a second organic insulating layer, and a passivation layer, which are sequentially stacked with each other between the thin film transistor and the pixel electrode; and a groove arranged in the intermediate area, wherein the groove divides an organic material layer included in the intermediate layer, wherein the groove is provided in a multilayer including an organic layer and an inorganic layer, wherein the organic layer is arranged on the substrate, and the inorganic layer is stacked on the organic layer, wherein the organic layer is the same layer as the first organic insulating layer and the second organic insulating layer, and wherein the inorganic layer is the same layer as the passivation layer, and includes a portion protruding toward a center of the groove. 2.The display device according to claim 1, wherein the organic layer includes a first sub-underlayer and a second sub-underlayer, wherein the first sub-underlayer is the same layer as the second organic insulating layer, and the second sub-underlayer is the same layer as the first organic insulating layer. 3.The display device according to claim 2, wherein an end portion of the second sub-underlayer adjacent to the groove is covered by the first sub-underlayer. 4.The display device according to claim 1, further comprising a thin film encapsulation layer covering the display area and the intermediate area on the substrate. 5.The display device according to claim 4, wherein the thin film encapsulation layer includes a first inorganic encapsulation layer, a second inorganic encapsulation layer, and an organic encapsulation layer arranged between the first inorganic encapsulation layer and the second inorganic encapsulation layer. 6.The display device according to claim 5, wherein the first inorganic encapsulation layer covers an inner wall of the groove dividing the organic layer and the inorganic layer, wherein the organic encapsulation layer fills an inner space of the groove, and wherein the second inorganic encapsulation layer covers an upper surface of the organic encapsulation layer. 7.The display device according to claim 1, wherein the intermediate layer includes a light emitting layer, a hole transport layer, and an electron transport layer, wherein the light emitting layer is provided between the hole transport layer and the electron transport layer, and wherein the hole transport layer and the electron transport layer extend and are stacked on the inorganic layer. 8.The display device according to claim 7, wherein at least one of the hole transport layer and the electron transport layer is divided by the groove. ​

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