Cache allocation control method, device, terminal equipment and storage medium

Abstract

The embodiments of the present application are applicable to the field of integrated circuit technology and provide a cache allocation control method, apparatus, terminal device, and storage medium. The method comprises: upon detecting an external storage device, identifying the storage type of the external storage device; determining the amount of cache to be allocated to the external storage device based on the storage type of the external storage device; and allocating a corresponding amount of cache to the external storage device based on the amount of cache to be allocated to the external storage device. This embodiment configures the cache in a divisible form, allocating cache to each external storage device based on the type of the external storage device, thereby helping to improve CPU performance.

Description

[0001] This application claims priority to a Chinese invention patent application filed on December 31, 2019, with application number 201911423537.8 and titled “A Cache Allocation Control Method, Apparatus, Terminal Device and Storage Medium”. Technical Field

[0002] The present application belongs to the field of integrated circuit technology, and in particular relates to a cache allocation control method, apparatus, terminal device, and storage medium. Background Art

[0003] Typically, a system-on-a-chip (SoC) includes a central processing unit (CPU) and several storage devices. Depending on the information stored, storage devices can be roughly divided into instruction memory and data memory. Common instruction memories include on-chip ROM and off-chip FLASH, while common data memories include on-chip ROM, on-chip RAM, off-chip SDRAM, and off-chip FLASH. On-chip ROM and on-chip RAM have faster access speeds, while off-chip SDRAM and off-chip FLASH have slower access speeds.

[0004] When a CPU is operating, the execution of any instruction involves both the type of operation being performed and the data being calculated. Therefore, it often needs to access both instructions and data simultaneously. However, the CPU's computing performance is limited by the slower of both instruction and data access speeds. Balancing these two speeds to maximize CPU performance is a pressing issue for those skilled in the art. Summary of the Invention

[0005] In view of this, embodiments of the present application provide a cache allocation control method, apparatus, terminal device, and storage medium, which can balance instruction access speed and data access speed and improve CPU performance.

[0006] A first aspect of an embodiment of the present application provides a cache allocation control method, including:

[0007] When an external storage device is detected, identifying a storage type of the external storage device;

[0008] Determining, according to a storage type of the external storage device, a cache quantity to be allocated to the external storage device;

[0009] According to the amount of buffer to be allocated to the external storage device, a corresponding amount of buffer is allocated to the external storage device.

[0010] Optionally, when an external storage device is detected, identifying a storage type of the external storage device includes:

[0011] When an external storage device is detected, identifying a storage object in the external storage device, the storage object including at least one of a program object or a data object;

[0012] The storage type of the external storage device is determined according to the storage objects in the external storage device.

[0013] Optionally, when an external storage device is detected, identifying a storage type of the external storage device includes:

[0014] When an external storage device is detected, identifying an access bandwidth of the external storage device;

[0015] A storage type of the external storage device is determined according to an access bandwidth of the external storage device.

[0016] Optionally, when an external storage device is detected, identifying a storage type of the external storage device includes:

[0017] When an external storage device is detected, the predefined product type in the non-volatile memory accessible to the chip CPU is identified;

[0018] The storage type of the external storage device is determined according to the product type.

[0019] Optionally, determining the amount of cache to be allocated to the external storage device according to the storage type of the external storage device includes:

[0020] Reading configuration information of the external storage device;

[0021] Acquire cache allocation information matching the configuration information, the cache allocation information being generated based on test results obtained by pre-testing external storage devices of different storage types;

[0022] The amount of cache to be allocated to the external storage device is determined according to the cache allocation information.

[0023] Optionally, the cache includes a plurality of cache memories, and determining the amount of cache to be allocated to the external storage device according to the cache allocation information includes:

[0024] The number of cache memories to be allocated to the storage objects in the external storage device is determined according to the number of cache memories required by different storage objects recorded in the cache allocation information.

[0025] Optionally, allocating a corresponding amount of cache to the external storage device according to the amount of cache to be allocated to the external storage device includes:

[0026] According to the number of cache memories to be allocated to the storage object, a corresponding number of cache memories are allocated to the storage object in the external storage device.

[0027] Optionally, allocating a corresponding number of cache memories to the storage objects in the external storage device according to the number of cache memories to be allocated to the storage objects includes:

[0028] Determine the access interface corresponding to the storage object;

[0029] The cache memory allocated to the storage object is associated with the access interface and configured.

[0030] A second aspect of an embodiment of the present application provides a cache allocation control device, including:

[0031] an identification module, configured to identify a storage type of an external storage device when the external storage device is detected;

[0032] a determination module, configured to determine the amount of cache to be allocated to the external storage device according to the storage type of the external storage device;

[0033] The allocation module is configured to allocate a corresponding amount of cache to the external storage device according to the amount of cache to be allocated to the external storage device.

[0034] A third aspect of an embodiment of the present application provides a terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the cache allocation control method as described in any one of the first aspects above is implemented.

[0035] A fourth aspect of an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the cache allocation control method as described in any one of the above-mentioned first aspects is implemented.

[0036] A fifth aspect of the embodiments of the present application provides a computer program product. When the computer program product is run on a terminal device, the terminal device executes the cache allocation control method described in any one of the first aspects above.

[0037] Compared with the prior art, the embodiments of the present application have the following advantages:

[0038] In an embodiment of the present application, when an external storage device is detected, the storage type of the external storage device can be first identified, and based on the storage type, the amount of cache to be allocated to the external storage device can be determined. Thus, a corresponding amount of cache can be allocated to the external storage device according to the aforementioned amount of cache. By configuring the cache in a divisible form, this embodiment can allocate different proportions or specific amounts of cache to each external storage device based on the type of the external storage device, thereby helping to improve CPU performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] To more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0040] Figure 1 This is a schematic flow chart of the steps of a cache allocation control method according to an embodiment of the present application;

[0041] Figure 2 This is a flowchart of another cache allocation control method according to an embodiment of the present application;

[0042] Figure 3 This is a flowchart of another cache allocation control method according to an embodiment of the present application;

[0043] Figure 4 This is a schematic diagram of a cache allocation control device according to an embodiment of the present application;

[0044] Figure 5 This is a schematic diagram of a terminal device according to an embodiment of the present application. DETAILED DESCRIPTION

[0045] In the following description, specific details such as specific system structures and technologies are provided for the purpose of illustration rather than limitation to facilitate a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid obstructing the description of the present application with unnecessary details.

[0046] Typically, during chip design, a chip's core functions can be designed into the form of on-chip memory. That is, common functions for a chip applicable to a variety of products are designed into the chip, while customized development for different products can be handled in the form of off-chip memory. Generally, on-chip memory has a smaller capacity but faster access speed, while off-chip memory has a larger capacity and can be modified, but has a relatively slower access speed. In actual testing, on-chip memory access speeds can reach over 30 times that of off-chip memory.

[0047] Therefore, in order to balance the access speeds of different memories, this embodiment configures the cache in a divisible form and tests the number of caches required to obtain optimal performance when different memories exist. When the presence of off-chip memory is detected, cache can be allocated according to the corresponding number of caches.

[0048] The technical solution of this application is described below through specific embodiments.

[0049] Reference Figure 1 , shows a schematic flow chart of a cache allocation control method according to an embodiment of the present application, which may specifically include the following steps:

[0050] S101, when an external storage device is detected, identifying the storage type of the external storage device;

[0051] It should be noted that this method can be applied to a terminal device, that is, the execution subject of this embodiment is a terminal device. The terminal device can be a product produced based on a certain SoC chip, such as an electronic device or other device. By allocating cache, the terminal device can improve CPU operating efficiency.

[0052] Typically, products based on a particular SoC chip can be a variety of different types of products or devices. For example, for a particular SoC chip, the chip manufacturer can write the core, general-purpose programs or algorithms into the chip, while other algorithms or programs required by different customers can be written into other storage devices and associated with the SoC chip, allowing for flexible configuration of the SoC chip for different customers.

[0053] In this embodiment, the external storage device may be a device written with a corresponding program or algorithm according to actual needs of the device manufacturer.

[0054] After the SoC chip is powered on, if the presence of an external storage device is detected, the storage type of the external storage device may be identified first.

[0055] Generally, depending on the objects stored, a storage device can be roughly divided into an instruction storage device, a data storage device, or a device capable of storing both instructions and data.

[0056] It should be noted that the external storage devices involved in the embodiments of the present application may include all memories other than CPU cache memory, including common data memory types, such as common instruction memory (on-chip ROM and off-chip FLASH, etc.), common data memory (on-chip ROM, on-chip RAM, off-chip SDRAM and off-chip FLASH, etc.). All memories that the CPU needs to access through cache memory, including all on-chip and off-chip memories.

[0057] In an embodiment of the present application, the storage type of an external storage device can be identified by identifying the storage object of the external storage device, or identifying the access bandwidth of the external storage device, or identifying a pre-defined product type in a non-volatile memory accessible to the chip CPU when the external storage device is detected, and then determining the storage type of the external storage device based on the storage object, access bandwidth, or product type. This embodiment does not limit how to identify the storage type of the external storage device.

[0058] S102: Determine the amount of cache to be allocated to the external storage device according to the storage type of the external storage device;

[0059] In this embodiment, the cache may be configured in a divisible form. Depending on the storage type of the external storage device, the amount of cache to be allocated to the device may be determined based on the storage type of the device.

[0060] For example, for an instruction storage device storing codes to be executed and a data storage device storing only video data, a general cache may be allocated to each of the two storage devices to ensure a balance in access speed between instructions and data.

[0061] S103: Allocate a corresponding amount of cache to the external storage device according to the amount of cache to be allocated to the external storage device.

[0062] In this embodiment, after determining how much buffer needs to be allocated to the external storage device, the corresponding buffer can be allocated to the external storage device.

[0063] In an embodiment of the present application, when an external storage device is detected, the storage type of the external storage device can be first identified, and based on the storage type, the amount of cache to be allocated to the external storage device can be determined. Thus, a corresponding amount of cache can be allocated to the external storage device according to the aforementioned amount of cache. This embodiment helps improve CPU performance by configuring the cache in a divisible form, allocating different proportions or specific amounts of cache to each external storage device based on the type of the external storage device.

[0064] Reference Figure 2 , shows a schematic flow chart of another cache allocation control method according to an embodiment of the present application, which may specifically include the following steps:

[0065] S201: When an external storage device is detected, identifying a storage object in the external storage device;

[0066] In this embodiment, the external storage device may refer to an off-chip device. The terms "on-chip" and "off-chip" are used in the integrated circuit field. On-chip refers to the interior of the integrated circuit (IC) chip, often referred to as "on-chip"; off-chip is short for "external device," meaning a device external to the IC chip. Connections between IC chips and external devices are typically implemented through specialized interface circuits and buses.

[0067] By connecting other storage devices to the chip, a variety of different terminal products can be produced based on the same chip. For example, a chip can be configured on a circuit board, and then different resources can be connected to its periphery to form a variety of different products. The common code required for these different products can be written into the chip, and depending on the type of product, the code corresponding to the additional functions required can be written into the external device. In this case, the product type can be defined by writing a specific code into the non-volatile memory accessible to the chip CPU during the production stage. After the CPU is powered on, it reads and accesses the specific code to obtain the corresponding product type. The CPU can then adjust the cache allocation method for different external storage devices based on the requirements of different product types for different memories, combined with information such as the storage objects and access bandwidth of the detected external memory.

[0068] When the chip is powered on, if the presence of an external storage device is detected, the storage objects in the external storage device may be identified first. In this embodiment, the storage objects may include program objects, data objects, or both.

[0069] S202: Determine the storage type of the external storage device according to the storage objects in the external storage device;

[0070] In this embodiment, according to the different objects stored in the external storage device, the external storage device can be divided into a device that only stores program objects, such as a device that stores executable programs or codes; or a device that only stores data objects, such as a device that only stores some image data and video data but does not include other executable programs or codes; or a device that can store program objects and data objects at the same time, such as a device that not only stores video data but also stores other executable programs.

[0071] S203, reading configuration information of the external storage device;

[0072] In this embodiment, the configuration information of the external storage device can be the factory information written into the chip when the chip leaves the factory. Through this configuration information, it can be understood what product the current chip is used in and what kind of cache configuration is required on the product to help improve the performance of the CPU.

[0073] S204: Obtain cache allocation information that matches the configuration information, where the cache allocation information is generated based on test results obtained by pre-testing external storage devices of different storage types;

[0074] In this embodiment, according to the different products to which the chip is applied, the external storage devices can be tested respectively to understand which cache configuration mode is the configuration mode that can achieve the best performance for the product.

[0075] In a specific implementation, for a particular product, the program or code that implements certain specific functions of the product can be written into an external storage device and then connected to the external storage device. Then, by testing the CPU operating performance under different cache configuration modes, it can be determined which cache configuration mode the product chip should use when connected to the aforementioned storage device to achieve the best performance.

[0076] For example, if the chip cache capacity is 32kb cache, you can first allocate 1kb cache as instruction cache and 31kb cache as data cache, and then test the chip performance to obtain a performance result; then, allocate 2kb cache as instruction cache and 30kb cache as data cache, and then test the chip performance to obtain another performance result; in this way, at least 32 performance results can be tested, and among these 32 performance results, the cache allocation method with the best performance can be identified and written into the configuration information. After the chip is mass-produced, there is no need to perform similar performance tests again. The cache allocation method can be directly configured according to the instructions of the configuration information to achieve the optimal performance effect.

[0077] S205: Determine the amount of cache to be allocated to the external storage device according to the cache allocation information;

[0078] In this embodiment, after the type of the external storage device is identified, the amount of cache to be allocated to the external storage device may be determined according to the cache allocation information in the configuration information.

[0079] For example, you can allocate 1kb of cache as instruction cache and 31kb of cache as data cache.

[0080] S206: Allocate a corresponding amount of cache to the external storage device according to the amount of cache to be allocated to the external storage device.

[0081] In an embodiment of the present application, based on the storage type of the external storage device, the cache allocation method that optimizes CPU performance when the corresponding type of device is connected can be obtained through testing and written into the configuration information. Therefore, after detecting a certain type of external storage device, the aforementioned allocation method can be directly read from the configuration information and cache allocation can be performed accordingly. This embodiment obtains the cache allocation method corresponding to different external storage devices through testing, thereby flexibly allocating cache, which can cope with usage in different scenarios and improve CPU performance.

[0082] Reference Figure 3 , shows a schematic flow chart of another cache allocation control method according to an embodiment of the present application, which may specifically include the following steps:

[0083] S301: When an external storage device is detected, identifying a storage object in the external storage device;

[0084] S302: Determine the storage type of the external storage device according to the storage objects in the external storage device;

[0085] S303, reading the configuration information of the external storage device;

[0086] S304: Obtain cache allocation information that matches the configuration information, where the cache allocation information is generated based on test results obtained by pre-testing external storage devices of different storage types;

[0087] It should be noted that steps S301 to S304 in this embodiment are similar to steps S201 to S204 in the aforementioned embodiment and can refer to each other, and this embodiment does not limit this.

[0088] S305: Determine the number of cache memories to be allocated to the storage objects in the external storage device according to the number of cache memories required by different storage objects recorded in the cache allocation information;

[0089] In this embodiment, the cache may include multiple cache memories, that is, the cache is configured in the form of a memory cluster and dynamically allocated according to different application objects and scenarios.

[0090] In a specific implementation, the allocation mode configured in the cache allocation information may refer to the number of cache memories required for different storage objects in the external storage device.

[0091] For example, for an external storage device that stores both program objects and data objects, half of the cache memory may be allocated to the program objects, and the other half of the cache memory may be allocated to other data objects.

[0092] S306: Determine the access interface corresponding to the storage object;

[0093] In this embodiment, after determining how many cache memories need to be allocated to storage objects in the external storage device, corresponding numbers of cache memories can be allocated to different storage objects in the external storage device according to the number of cache memories to be allocated to different storage objects.

[0094] In a specific implementation, the access interfaces corresponding to different storage objects can be determined, for example, which are the instruction interfaces corresponding to program objects and which are the data interfaces corresponding to data objects.

[0095] It should be noted that, in typical implementations, the instruction interface and data interface may be the same physical interface. However, the physical location of the memory can be differentiated based on the storage address segment or the instruction that the CPU uses to initiate the access. This process can be compared to the meaning of "ports" on the internet: the physical network port may be the same, but during data distribution, it can be differentiated based on the target "port."

[0096] S307: Associate the cache memory allocated to the storage object with the access interface.

[0097] In this embodiment, when allocating cache to different storage objects, the cache memory to be allocated to the storage object may be associated with its corresponding access interface and configured.

[0098] As an example of this embodiment, if a product produced based on a certain chip needs to support both an on-chip ROM+on-chip RAM working mode and an off-chip FLASH+on-chip RAM working mode.

[0099] When supporting on-chip ROM + on-chip RAM, caching is unnecessary because the on-chip ROM is the CPU's private memory and the access bandwidth of the on-chip ROM interface meets the CPU's real-time read requirements. In this case, the optimal cache allocation scheme is to allocate all cache memory to the on-chip RAM access interface to ensure a balanced access speed for instructions and data.

[0100] When supporting the off-chip FLASH + on-chip RAM mode, the access bandwidth of the off-chip FLASH is usually significantly smaller than that of the on-chip RAM, that is, the access efficiency of the off-chip FLASH is lower and the access speed is slower. In addition, the off-chip FLASH often contains both program objects (instructions) and data objects (data). Therefore, the optimal solution in this case is to allocate half of the total cache memory to the off-chip FLASH instruction interface and the other half to the off-chip FLASH data interface.

[0101] In an embodiment of the present application, the cache may be configured in the form of a cache memory cluster, thereby flexibly allocating cache memory to storage objects stored in an external storage device according to the storage objects, thereby improving CPU performance.

[0102] It should be noted that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0103] Reference Figure 4 , shows a schematic diagram of a cache allocation control device according to an embodiment of the present application, which may specifically include the following modules:

[0104] Identification module 401, for identifying the storage type of the external storage device when an external storage device is detected;

[0105] A determination module 402 is configured to determine the amount of cache to be allocated to the external storage device according to the storage type of the external storage device;

[0106] The allocating module 403 is configured to allocate a corresponding amount of cache to the external storage device according to the amount of cache to be allocated to the external storage device.

[0107] In the embodiment of the present application, the identification module 401 may specifically include the following submodules:

[0108] a storage object identification submodule, configured to identify a storage object in an external storage device when an external storage device is detected, wherein the storage object includes at least one of a program object and a data object;

[0109] The first storage type determination submodule is configured to determine the storage type of the external storage device according to the storage objects in the external storage device.

[0110] In the embodiment of the present application, the identification module 401 may further include the following submodules:

[0111] an access bandwidth identification submodule, configured to identify the access bandwidth of an external storage device when an external storage device is detected;

[0112] The second storage type determination submodule is configured to determine the storage type of the external storage device according to the access bandwidth of the external storage device.

[0113] In the embodiment of the present application, the identification module 401 may further include the following submodules:

[0114] The product type identification submodule is used to identify the predefined product type in the non-volatile memory accessible to the chip CPU when an external storage device is detected;

[0115] The third storage type determination submodule is configured to determine the storage type of the external storage device according to the product type.

[0116] In the embodiment of the present application, the determining module 402 may specifically include the following submodules:

[0117] A configuration information reading submodule, configured to read the configuration information of the external storage device;

[0118] a cache allocation information acquisition submodule, configured to acquire cache allocation information matching the configuration information, the cache allocation information being generated based on test results obtained by pre-testing external storage devices of different storage types;

[0119] The cache quantity determination submodule is configured to determine the cache quantity to be allocated to the external storage device according to the cache allocation information.

[0120] In the embodiment of the present application, the cache includes multiple cache memories, and the cache quantity determination submodule may specifically include the following units:

[0121] The cache memory number determining unit is configured to determine the number of cache memories to be allocated to the storage objects in the external storage device according to the number of cache memories required by different storage objects recorded in the cache allocation information.

[0122] In the embodiment of the present application, the allocation module 403 may specifically include the following submodules:

[0123] The cache memory allocation submodule is used to allocate a corresponding number of cache memories to the storage objects in the external storage device according to the number of cache memories to be allocated to the storage objects.

[0124] In the embodiment of the present application, the cache memory allocation submodule may specifically include the following units:

[0125] An access interface determining unit, configured to determine an access interface corresponding to the storage object;

[0126] An association configuration unit is used to associate and configure the cache memory allocated to the storage object with the access interface.

[0127] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the description of the method embodiment part.

[0128] Reference Figure 5 , shows a schematic diagram of a terminal device according to an embodiment of the present application. Figure 5 As shown, the terminal device 500 of this embodiment includes: a processor 510, a memory 520, and a computer program 521 stored in the memory 520 and executable on the processor 510. When the processor 510 executes the computer program 521, the steps in each embodiment of the above-mentioned cache allocation control method are implemented, such as Figure 1 Alternatively, when the processor 510 executes the computer program 521, the functions of the modules / units in the above-mentioned device embodiments are realized, for example, Figure 4 Functions of modules 401 to 403 are shown.

[0129] Exemplarily, the computer program 521 may be divided into one or more modules / units, which are stored in the memory 520 and executed by the processor 510 to complete the present application. The one or more modules / units may be a series of computer program instruction segments capable of performing specific functions, which may be used to describe the execution process of the computer program 521 in the terminal device 500. For example, the computer program 521 may be divided into an identification module, a determination module, and an allocation module, with the specific functions of each module being as follows:

[0130] an identification module, configured to identify a storage type of an external storage device when the external storage device is detected;

[0131] a determination module, configured to determine the amount of cache to be allocated to the external storage device according to the storage type of the external storage device;

[0132] The allocation module is configured to allocate a corresponding amount of cache to the external storage device according to the amount of cache to be allocated to the external storage device.

[0133] The terminal device 500 may include, but is not limited to, a processor 510 and a memory 520. Those skilled in the art will understand that Figure 5 It is only an example of the terminal device 500 and does not constitute a limitation of the terminal device 500. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the terminal device 500 may also include input and output devices, network access devices, buses, etc.

[0134] The processor 510 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0135] The memory 520 may be an internal storage unit of the terminal device 500, such as a hard disk or memory of the terminal device 500. The memory 520 may also be an external storage device of the terminal device 500, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the terminal device 500. Furthermore, the memory 520 may include both an internal storage unit of the terminal device 500 and an external storage device. The memory 520 is used to store the computer program 521 and other programs and data required by the terminal device 500. The memory 520 may also be used to temporarily store data that has been output or is to be output.

[0136] The above embodiments are intended only to illustrate the technical solutions of the present application and are not intended to limit them. Although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that they may still modify the technical solutions described in the above embodiments or replace some of the technical features therein with equivalents; and such modifications or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present application and should be included within the scope of protection of the present application.

Claims

1. A cache allocation control method, characterized in that: include: When an external storage device is detected, identifying a storage type of the external storage device; The storage type is one of an instruction storage device, a data storage device, and a device that stores both instructions and data; Determining, according to a storage type of the external storage device, a cache quantity to be allocated to the external storage device; Allocating a corresponding amount of cache to the external storage device according to the amount of cache to be allocated to the external storage device; The step of determining the amount of cache to be allocated to the external storage device according to the storage type of the external storage device includes: Reading configuration information of the external storage device; Obtaining cache allocation information that matches the configuration information, the cache allocation information being generated based on test results obtained by pre-testing external storage devices of different storage types; the cache allocation information recording the number of cache memories required for different storage objects; Determining the amount of cache to be allocated to the external storage device according to the cache allocation information; When an external storage device is detected, identifying the storage type of the external storage device includes: When an external storage device is detected, the predefined product type in the non-volatile memory accessible to the chip CPU is identified; Determining a storage type of the external storage device according to the product type; Among them, the CPU is used to connect to different resources to form different types of terminal products, the product type is used to distinguish the type of the terminal product, and the product type is set in the non-volatile memory during the production stage of the terminal product; the CPU is used to detect the external storage device; the configuration information is pre-set in the CPU; the cache allocation information is obtained by testing the external storage device of the terminal product for different terminal products used by the CPU, and when the terminal product achieves optimal performance.

2. The method according to claim 1, characterized in that The cache includes a plurality of cache memories, and determining the amount of cache to be allocated to the external storage device according to the cache allocation information includes: The number of cache memories to be allocated to the storage objects in the external storage device is determined according to the number of cache memories required by different storage objects recorded in the cache allocation information.

3. The method according to claim 2, characterized in that Allocating a corresponding amount of cache to the external storage device according to the amount of cache to be allocated to the external storage device includes: According to the number of cache memories to be allocated to the storage object, a corresponding number of cache memories are allocated to the storage object in the external storage device.

4. The method according to claim 3, characterized in that The allocating a corresponding number of cache memories to the storage objects in the external storage device according to the number of cache memories to be allocated to the storage objects comprises: Determine the access interface corresponding to the storage object; The cache memory allocated to the storage object is associated with the access interface and configured.

5. A terminal device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the cache allocation control method according to any one of claims 1 to 4 is implemented.

6. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the cache allocation control method according to any one of claims 1 to 4 is implemented.

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