Display devices

Abstract

This disclosure relates to a display device, comprising: a display element configured to emit light; a first refractive layer located on the display element and having an opening corresponding to the display element; a light extraction pattern located inside the opening of the first refractive layer; and a second refractive layer located on the first refractive layer, the second refractive layer covering the first refractive layer and the light extraction pattern.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2019-0050722, filed on April 30, 2019, with the Korean Intellectual Property Office (KIPO), the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] One or more embodiments relate to display devices, and more specifically, to display devices having excellent luminous efficiency. Background Technology

[0004] As the demand for display devices increases, so does the demand for display devices that can be used for a variety of purposes. Display devices tend to become larger or thinner, and there is also an increasing demand for larger or thinner display devices with accurate and clear colors. Summary of the Invention

[0005] The embodiments of this disclosure pertain to a display device for improving the efficiency of light extraction in a display device. However, the above aspects are exemplary and do not limit the scope of this disclosure.

[0006] Additional aspects will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned from practice of the proposed embodiments.

[0007] According to one or more embodiments, a display device includes: a display element configured to emit light; a first refractive layer located on the display element and having an opening corresponding to the display element; a light extraction pattern located inside the opening of the first refractive layer; and a second refractive layer located on the first refractive layer, the second refractive layer covering the first refractive layer and the light extraction pattern.

[0008] The display element may include: a pixel electrode; an intermediate layer located on the pixel electrode and including an emitting layer; and a counter electrode located on the intermediate layer; wherein the first refractive layer is located on an insulating layer covering the edge of the pixel electrode.

[0009] The display device may further include: an encapsulation component located between the display element and the first refractive layer.

[0010] The display device may further include: an input sensing layer located between the encapsulation member and the first refractive layer, and including sensing electrodes.

[0011] The refractive index of the second refractive layer can be greater than that of the first refractive layer.

[0012] The refractive index of the light extraction pattern can be equal to the refractive index of the first refractive layer.

[0013] The light extraction pattern may be located at the center of the opening and have the same outline as the first refractive layer surrounding the opening.

[0014] The light extraction pattern may have a continuous closed loop shape along the edge of the opening.

[0015] Multiple light extraction patterns may be spaced apart from each other in the opening.

[0016] The height of the light extraction pattern can be equal to the height of the first refractive layer.

[0017] The height of the light extraction pattern can be less than the height of the first refractive layer.

[0018] The display element includes: a first display element configured to emit light of a first color; and a second display element configured to emit light of a second color, wherein the light extraction pattern in the opening corresponding to the first display element in the first refractive layer and the light extraction pattern in the opening corresponding to the second display element in the first refractive layer are different from each other in at least one aspect of shape, size, and number.

[0019] According to one or more embodiments, a display device includes: a display element configured to emit light; a first refractive layer located on the display element, the top surface of the first refractive layer having a recessed surface corresponding to the display element; a light extraction pattern located on the recessed surface of the first refractive layer; and a second refractive layer located on the first refractive layer, the second refractive layer covering the first refractive layer and the light extraction pattern.

[0020] The display device may further include: an encapsulation component located between the display element and the first refractive layer.

[0021] The display device may further include: an input sensing layer located between the encapsulation member and the first refractive layer, and including sensing electrodes.

[0022] The refractive index of the second refractive layer can be greater than that of the first refractive layer.

[0023] The refractive index of the light extraction pattern can be equal to the refractive index of the first refractive layer.

[0024] The height of the top surface of the light extraction pattern and the height of the top surface of the non-recessed surface of the first refractive layer can be the same.

[0025] The height of the top surface of the light extraction pattern can be less than the height of the top surface of the non-recessed surface of the first refractive layer.

[0026] The display element may include: a first display element configured to emit light of a first color; and a second display element configured to emit light of a second color, wherein the light extraction pattern on the recessed surface of the first refractive layer corresponding to the first display element and the light extraction pattern on the recessed surface of the first refractive layer corresponding to the second display element are different from each other in at least one aspect of shape, size and number. Attached Figure Description

[0027] These and / or other aspects will become apparent and more readily understood from the following description of embodiments taken in conjunction with the accompanying drawings, wherein:

[0028] Figure 1 This is a perspective view showing a portion of a display device according to an embodiment of the present disclosure;

[0029] Figure 2 It is along Figure 1 A cross-sectional view taken from line I-I';

[0030] Figure 3 This is a view showing a portion of a display panel according to an embodiment of the present disclosure;

[0031] Figure 4A and Figure 4B This is a view showing pixels according to an embodiment of the present disclosure;

[0032] Figure 5 This is a partial plan view showing the arrangement of pixels according to an embodiment of the present disclosure;

[0033] Figure 6 It is along Figure 5 A cross-sectional view taken from line II-II';

[0034] Figure 7 This is a partial plan view showing a refractive layer according to an embodiment of the present disclosure;

[0035] Figure 8 It is along Figure 7 A cross-sectional view taken from line III-III';

[0036] Figure 9 This is a view used to describe light extraction from a refractive layer according to embodiments of the present disclosure;

[0037] Figure 10 It is according to the embodiments of this disclosure along Figure 1 A cross-sectional view taken from line I-I';

[0038] Figure 11 It shows Figure 10 A plan view of the input sensing layer;

[0039] Figure 12 It is along Figure 11 A cross-sectional view taken from line IV-IV';

[0040] Figure 13A It shows Figure 12 A plan view of the first conductive layer;

[0041] Figure 13B It shows Figure 12 A plan view of the second conductive layer;

[0042] Figure 14 This is a partial cross-sectional view of a display panel according to an embodiment of the present disclosure;

[0043] Figure 15 This is a partial plan view showing a refractive layer according to an embodiment of the present disclosure;

[0044] Figure 16 It is along Figure 15 A cross-sectional view taken from line V-V';

[0045] Figure 17 This is a partial plan view showing a refractive layer according to an embodiment of the present disclosure;

[0046] Figure 18 It is along Figure 17 A cross-sectional view taken from line V-V';

[0047] Figure 19 This is a partial plan view showing a refractive layer according to an embodiment of the present disclosure;

[0048] Figure 20 It is along Figure 19 A cross-sectional view taken from line V-V'; and

[0049] Figure 21 This is a partial cross-sectional view of a display panel according to an embodiment of the present disclosure. Detailed Implementation

[0050] Reference will now be made in more detail to the embodiments, examples of which are illustrated in the accompanying drawings, wherein the same reference numerals always denote the same elements. In this respect, the embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, the embodiments are described below only with reference to the accompanying drawings to explain various aspects of this specification. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one”, when following a list of elements, modify the entire list of elements and not the individual elements of the list.

[0051] While various modifications and embodiments of this disclosure are possible, specific embodiments are illustrated in the accompanying drawings and will be described in more detail herein. The features and effects of this disclosure, as well as methods for achieving these features and effects, will be described more fully with reference to the accompanying drawings, in which embodiments of this disclosure are illustrated. However, this disclosure is not limited to the embodiments described below and can be embodied in various modes.

[0052] The present disclosure will now be described more fully with reference to the accompanying drawings, in which embodiments of the disclosure are illustrated. To ensure clarity of the disclosure, portions of the drawings not related to the detailed description may be omitted, and the same reference numerals denote the same elements, thus their description need not be repeated.

[0053] It will be understood that when a layer, region, or element is referred to as being "formed" "on" another layer, region, or element, that layer, region, or element may be formed directly on the other layer, region, or element, or may be formed indirectly on the other layer, region, or element with intermediate layers, regions, or elements between them. For ease of illustration, the dimensions of elements may be exaggerated. In other words, this disclosure is not limited thereto because the dimensions and thicknesses of elements in the accompanying drawings are arbitrarily shown for ease of illustration.

[0054] It will be understood that when a layer, region, or element is referred to as a “connection,” the layer, region, or element may be directly connected, or may be indirectly connected with intermediate layers, regions, or elements between them. For example, when a layer, region, or element is electrically connected, the layer, region, or element may be directly electrically connected, or may be indirectly electrically connected with intermediate layers, regions, or elements between them.

[0055] When a particular embodiment can be implemented differently, the specific process sequence may differ from the described sequence. For example, two consecutively described processes may be performed substantially simultaneously, or they may be performed in the reverse order of the described sequence.

[0056] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe different elements, these elements should not be limited by these terms, and these terms are only used to distinguish one element from another. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are also intended to include the plural forms. It will be further understood that the terms “comprising” and / or “including” as used herein indicate the presence of the stated components, but do not exclude the presence or addition of one or more other components.

[0057] As used herein, the terms “substantially,” “approximately,” and similar terms are used as terms of approximation rather than terms of degree, and are intended to explain the inherent biases in measurements or calculations that will be recognized by one of ordinary skill in the art.

[0058] Furthermore, any numerical ranges listed herein are intended to include all subranges with the same numerical precision contained within the listed range. For example, the range “1.0 to 10.0” is intended to include all subranges between the listed minimum value of 1.0 and the listed maximum value of 10.0 (and including endpoint values), i.e., subranges having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, for example, 2.4 to 7.6. Any maximum numerical limit listed herein is intended to include all smaller numerical limits contained therein, and any minimum numerical limit listed in this specification is intended to include all larger numerical limits contained therein. Therefore, the applicant reserves the right to modify this specification (including the claims) to expressly list any subranges contained within the ranges expressly listed herein.

[0059] In the following embodiments, when the wiring “extends in a first direction or a second direction”, it may mean that the wiring can extend in a linear shape, or in a zigzag or curved shape in the first direction or the second direction.

[0060] In the following embodiments, "plan view of the object" refers to "a view of the object seen from above," and "section view of the object" refers to "a view of the object seen by a vertical cut from the side." In the following embodiments, when elements "overlap," it can mean that the elements overlap in both the "plan view" and the "section view."

[0061] In the following embodiments, unless otherwise explicitly stated, "signal" refers to either voltage or current. In the following embodiments, reference numeral C denotes a capacitor, and also indicates capacitance as a measure of capacitor size. Furthermore, both directly generated capacitors and naturally generated capacitors are referred to as capacitors without distinction.

[0062] Figure 1 This is a perspective view showing a portion of a display device 1 according to an embodiment of the present disclosure. Figure 2 It is along Figure 1 The cross-sectional view taken from line I-I'.

[0063] Reference Figure 1 According to embodiments of the present disclosure, a display device 1 may include a display area DA and a peripheral area PA. The peripheral area PA is located outside the display area DA to surround the display area DA. Various wiring and driving circuits for transmitting electrical signals to be applied to the display area DA may be located in the peripheral area PA. The display device 1 may provide pixels (e.g., predetermined pixels) by using light emitted from a plurality of pixels located in the display area DA. The peripheral area PA may include a curved region, and the display device 1 may be curved at the curved region.

[0064] Display device 1 can be an organic light-emitting display, an inorganic light-emitting display (or an inorganic electroluminescent (EL) display), or a quantum dot light-emitting display. The following description will assume that display device 1 is an organic light-emitting display. Display device 1 can be any one or more of a variety of suitable types of electronic devices, such as mobile phones, laptops, or smartwatches.

[0065] like Figure 2 As shown, the display device 1 includes a display panel 10, which includes a substrate 100 and an encapsulation member 300 for sealing the substrate 100. The substrate 100 and the encapsulation member 300 are stacked sequentially in a third direction (e.g., the z-direction).

[0066] The substrate 100 may comprise a glass material or a polymer resin. For example, the substrate 100 may comprise a glass material containing SiO2 as a major component, or any one or more of a variety of suitable flexible or bendable materials such as resins (e.g., reinforced plastics). The peripheral region PA may comprise a bending region where the substrate 100 may be bent.

[0067] The pixel layer PXL can be located on the substrate 100. The pixel layer PXL may include a display element layer DPL and a pixel circuit layer PCL. The display element layer DPL includes display elements positioned for each pixel, and the pixel circuit layer PCL includes pixel circuitry positioned for each pixel and an insulating layer. The display element layer DPL may be located on the pixel circuit layer PCL, and multiple insulating layers may be located between the pixel circuitry and the display elements. Some wiring and insulating layers of the pixel circuit layer PCL may extend to the peripheral area PA.

[0068] The encapsulation member 300 may be a thin-film encapsulation layer. The thin-film encapsulation layer may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. When the display device 1 includes a substrate 100 comprising a polymer resin and an encapsulation member 300 as a thin-film encapsulation layer comprising an inorganic encapsulation layer and an organic encapsulation layer, the flexibility of the display device 1 can be improved.

[0069] The display panel 10 may include a refractive layer 400 located on the encapsulation member 300. The refractive layer 400 can adjust the path of light emitted by the display elements of the display element layer DPL and can be used as a lens. The refractive layer 400 can improve the light extraction efficiency at the front surface of the display device 1 by changing the path of light emitted by the display elements, and can improve the color shift of light emitted to the front surface and light emitted to the side surfaces.

[0070] The display device 1 may also include a polarizer, a window, etc., located on the encapsulation member 300 or on the refractive layer 400. For example, the refractive layer 400 may be disposed between the encapsulation member 300 and the polarizer, or between the encapsulation member 300 and the window.

[0071] Figure 3 This is a view showing a portion of the display panel 10 according to an embodiment of the present disclosure. Figure 4A and Figure 4B This is a view showing pixels PX according to an embodiment of the present disclosure.

[0072] Reference Figure 3 The substrate 100 may include a display area DA and a peripheral area PA. The peripheral area PA may be located outside the display area DA, or may surround the display area DA.

[0073] Multiple pixels PX arranged in a pattern (e.g., a predetermined pattern) in a first direction (e.g., the x-direction or the row direction) and a second direction (e.g., the y-direction or the column direction) can be disposed on a substrate 100 in the display area DA.

[0074] A scan driver 1100 for applying scan signals to each pixel PX, a data driver 1200 for applying data signals to each pixel PX, and a driver for applying a first power supply voltage (ELVDD, see below) Figure 4A and Figure 4B ) and second supply voltage (ELVSS, see Figure 4A and Figure 4B The main power supply wiring can be located on the substrate 100 in the peripheral area PA. The pad unit 140 can be located on the substrate 100 in the peripheral area PA. The pad unit 140 includes a plurality of signal pads SP, where each signal pad SP is connected to a data line DL (e.g., a corresponding data line DL).

[0075] The scan driver 1100 may include an oxide semiconductor thin-film transistor (TFT) gate driver circuit (OSG) or an amorphous silicon TFT gate driver circuit (ASG). Although in Figure 3 The scan driver 1100 is located on one side adjacent to the substrate 100, but according to an embodiment, the scan driver 1100 may be located on both sides adjacent to the substrate 100 (e.g., two opposite sides).

[0076] exist Figure 3 In this embodiment, the data driver 1200 is located on the film 1300 using a chip-on-film (COF) method, and the film 1300 is electrically connected to the signal pads SP located on the substrate 100. According to an embodiment, the data driver 1200 can be directly located on the substrate 100 using a chip-on-glass (COG) method or a chip-on-plastic (COP) method. The data driver 1200 can be electrically connected to a flexible printed circuit board (FPCB).

[0077] Reference Figure 4A A pixel PX includes a pixel circuit PC connected to a scan line SL and a data line DL, and a display element connected to the pixel circuit PC. The pixel circuit PC may include transistors and capacitors, and the display element may include an organic light-emitting diode (OLED).

[0078] The pixel circuit PC may include a first transistor T1, a second transistor T2, and a capacitor Cst. Each pixel PX can emit light, such as red, green, blue, or white light, through an OLED. Both the first transistor T1 and the second transistor T2 can be thin-film transistors.

[0079] The second transistor T2, acting as a switching transistor, can be connected to the scan line SL and the data line DL. The second transistor T2 can transmit the data signal input from the data line DL to the first transistor T1 based on the scan signal input from the scan line SL. A capacitor Cst can be connected to the second transistor T2 and the power supply voltage line PL, and can store a voltage corresponding to the difference between the voltage corresponding to the data signal received from the second transistor T2 and the first power supply voltage ELVDD supplied to the power supply voltage line PL.

[0080] The first transistor T1, acting as the driving transistor, can be connected to the power supply voltage line PL and the capacitor Cst. The first transistor T1 can control the driving current Ioled flowing from the power supply voltage line PL through the OLED based on the value of the voltage stored in the capacitor Cst.

[0081] Because of the driving current Ioled, an OLED can emit light with a predetermined (or set) brightness. An OLED may include pixel electrodes, a counter electrode, and an emitting layer located between the pixel electrodes and the counter electrode. The counter electrode of the OLED may receive a second power supply voltage ELVSS.

[0082] Despite Figure 4A The pixel circuit PC includes two transistors and one capacitor, but this disclosure is not limited thereto. Depending on the design of the pixel circuit PC, the number of transistors and the number of capacitors can be modified in various suitable ways.

[0083] Reference Figure 4B For each pixel PX, multiple signal lines (e.g., a first scan line SL1, a second scan line SL2, an emission control line EL, and a data line DL), an initialization voltage line VIL, and a power supply voltage line PL are provided. In an embodiment, at least one of the first scan line SL1, the second scan line SL2, the emission control line EL, the data line DL, the initialization voltage line VIL, and / or the power supply voltage line PL can be shared by adjacent pixels.

[0084] The signal lines include a first scan line SL1 for transmitting the first scan signal GW, a second scan line SL2 for transmitting the second scan signal GI, a transmit control line EL for transmitting the transmit control signal EM, and a data line DL that crosses the first scan line SL1 and transmits the data signal DATA. The second scan line SL2 can be connected to the first scan line SL1 in the next or previous row, and the second scan signal GI can be the first scan signal GW in the next or previous row.

[0085] The power supply voltage line PL applies the first power supply voltage ELVDD to the first transistor T1, and the initialization voltage line VIL applies the initialization voltage VINT, used to initialize the first transistor T1 and the pixel electrode, to the pixel PX.

[0086] The pixel circuitry of pixel PX may include multiple transistors (e.g., first transistor T1 through seventh transistor T7) and capacitor Cst. Depending on the type of transistor (e.g., p-type or n-type) and / or operating conditions, Figure 4B The first electrodes E11 to E71 and the second electrodes E12 to E72 can be source electrodes (source regions) or drain electrodes (drain regions). The first transistor T1 to the seventh transistor T7 can be TFTs.

[0087] The first transistor T1 includes a gate electrode G1 connected to the lower electrode CE1 of the capacitor Cst, a first electrode E11 connected to the power supply voltage line PL via a fifth transistor T5, and a second electrode E12 electrically connected to the pixel electrode of the OLED via a sixth transistor T6. The first transistor T1 acts as a driving transistor, receives the data signal DATA according to the switching operation of the second transistor T2, and supplies current to the OLED.

[0088] The second transistor T2 includes a gate electrode G2 connected to the first scan line SL1, a first electrode E21 connected to the data line DL, and a second electrode E22 connected to the first electrode E11 of the first transistor T1. The second transistor T2 is turned on according to the first scan signal GW received through the first scan line SL1 and performs a switching operation to transmit the data signal DATA transmitted to the data line DL to the first electrode E11 of the first transistor T1.

[0089] The third transistor T3 includes a gate electrode G3 connected to the first scan line SL1, a first electrode E31 connected to the second electrode E12 of the first transistor T1, and a lower electrode CE1 connected to the capacitor Cst, a second electrode E42 of the fourth transistor T4, and a second electrode E32 connected to the gate electrode G1 of the first transistor T1. The first electrode E31 is connected to the pixel electrode of the OLED through a sixth transistor T6. The third transistor T3 is turned on according to the first scan signal GW received through the first scan line SL1 and is connected to the first transistor T1 in a diode manner.

[0090] The fourth transistor T4 includes a gate electrode G4 connected to the second scan line SL2, a first electrode E41 connected to the initialization voltage line VIL, a lower electrode CE1 connected to the capacitor Cst, a second electrode E32 connected to the third transistor T3, and a second electrode E42 connected to the gate electrode G1 of the first transistor T1. The fourth transistor T4 is turned on according to the second scan signal GI received through the second scan line SL2, and initializes the gate voltage of the first transistor T1 by transmitting the initialization voltage VINT to the gate electrode G1 of the first transistor T1.

[0091] The fifth transistor T5 includes a gate electrode G5 connected to the emitter control line EL, a first electrode E51 connected to the power supply voltage line PL, and a second electrode E52 connected to the first electrode E11 of the first transistor T1 and the second electrode E22 of the second transistor T2.

[0092] The sixth transistor T6 includes a gate electrode G6 connected to the emission control line EL, a first electrode E61 connected to the second electrode E12 of the first transistor T1 and the first electrode E31 of the third transistor T3, and a second electrode E62 connected to the pixel electrode of the OLED.

[0093] The fifth transistor T5 and the sixth transistor T6 are turned on concurrently (e.g., simultaneously) according to the transmit control signal EM received through the transmit control line EL, so that current flows through the OLED.

[0094] The seventh transistor T7 includes a gate electrode G7 connected to the second scan line SL2, a second electrode E62 connected to the sixth transistor T6 and a first electrode E71 connected to the pixel electrode of the OLED, and a second electrode E72 connected to the initialization voltage line VIL. The seventh transistor T7 is turned on according to the second scan signal GI received via the second scan line SL2, and initializes the voltage of the pixel electrode of the OLED. In an embodiment, the seventh transistor T7 may be omitted.

[0095] Despite Figure 4B The fourth transistor T4 and the seventh transistor T7 are connected to the second scan line SL2, but this disclosure is not limited thereto. In an embodiment, the fourth transistor T4 is connected to the second scan line SL2, and the seventh transistor T7 is connected to other wiring and can operate according to signals transmitted to the wiring.

[0096] The capacitor Cst includes a lower electrode CE1 connected to the gate electrode G1 of the first transistor T1 and an upper electrode CE2 connected to the power supply voltage line PL. The lower electrode CE1 of the capacitor Cst is also connected to the second electrode E32 of the third transistor T3 and the second electrode E42 of the fourth transistor T4.

[0097] An OLED includes a pixel electrode, a counter electrode, and an emitter layer located between the pixel electrode and the counter electrode. The counter electrode can receive a second power supply voltage, ELVSS. The OLED displays an image by receiving a drive current Ioled from a first transistor T1 and emitting light.

[0098] Figure 5 This is a partial plan view showing the arrangement of pixels according to an embodiment of the present disclosure. Figure 6 It is along Figure 5 The cross-sectional view taken from line II-II'.

[0099] Multiple pixels located in the display area DA may include a first pixel PX1, a second pixel PX2, and a third pixel PX3. The first pixel PX1, second pixel PX2, and third pixel PX3 may be arranged in a repeating pattern (e.g., a predetermined pattern) in rows and columns. Each of the first pixel PX1, second pixel PX2, and third pixel PX3 may include a pixel circuit PC and an OLED electrically connected to the pixel circuit PC. The OLED of each pixel may be directly located on the pixel circuit PC to overlap with the pixel circuit PC, or it may be offset from the pixel circuit PC to overlap with the pixel circuit PC of pixels in adjacent rows or columns. The arrangement of pixels may be an arrangement of the OLEDs of the first pixel PX1, second pixel PX2, and third pixel PX3, or an arrangement of the pixel electrodes 211 of the OLEDs.

[0100] In each row R1, R2, ..., the pixel electrodes 211 of the first pixel PX1, the second pixel PX2, and the third pixel PX3 can be spaced apart from each other and arranged alternately in a zigzag pattern. The pixel electrodes 211 of the first pixel PX1 and the third pixel PX3 can be spaced apart from each other and arranged alternately on a first virtual straight line IL1 in a first direction (e.g., the x-direction). The pixel electrode 211 of the second pixel PX2 can be offset from the pixel electrodes 211 of the first pixel PX1 and the third pixel PX3 in a direction between the first direction (e.g., the x-direction) and the second direction (e.g., the y-direction). In other words, the pixel electrode 211 of the second pixel PX2 can be offset from the pixel electrodes 211 of the first pixel PX1 and the third pixel PX3 in both the x-direction and the y-direction. The pixel electrodes 211 of the second pixel PX2 can be repeatedly arranged on a second virtual straight line IL2 in the first direction (e.g., the x-direction).

[0101] In the first column C1, the pixel electrode 211 of the first pixel PX1 and the pixel electrode 211 of the third pixel PX3 can be spaced apart from each other and can be alternately arranged on the third virtual line IL3 in the second direction (e.g., the y-direction). In the second column C2 adjacent to the first column C1, the pixel electrode 211 of the second pixel PX2 can be spaced apart from each other and can be repeatedly arranged on the fourth virtual line IL4 in the second direction (e.g., the y-direction). In the third column C3 adjacent to the second column C2, the pixel electrode 211 of the third pixel PX3 and the pixel electrode 211 of the first pixel PX1 can be spaced apart from each other in an arrangement opposite to that of the first column C1 and can be repeatedly arranged on the fifth virtual line IL5 in the second direction (e.g., the y-direction).

[0102] The pixel electrode 211 of the first pixel PX1, the pixel electrode 211 of the second pixel PX2, and the pixel electrode 211 of the third pixel PX3 may have different areas. In an embodiment, the pixel electrode 211 of the third pixel PX3 may have an area larger than the area of ​​the pixel electrode 211 of the first pixel PX1 adjacent to the third pixel PX3. Additionally, the pixel electrode 211 of the third pixel PX3 may have an area larger than the area of ​​the pixel electrode 211 of the second pixel PX2 adjacent to the third pixel PX3. The pixel electrode 211 of the first pixel PX1 may have an area larger than the area of ​​the pixel electrode 211 of the second pixel PX2 adjacent to the first pixel PX1. In an embodiment, the pixel electrode 211 of the third pixel PX3 may have the same area as the pixel electrode 211 of the first pixel PX1. The pixel electrode 211 may have a polygon such as a quadrilateral or octagon, a circle, or an ellipse, and the polygon may include a shape with rounded vertices.

[0103] In one embodiment, the first pixel PX1 can be a red pixel that emits red light, the second pixel PX2 can be a blue pixel that emits blue light, and the third pixel PX3 can be a green pixel that emits green light. Alternatively, in another embodiment, the first pixel PX1 can be a red pixel, the second pixel PX2 can be a green pixel, and the third pixel PX3 can be a blue pixel.

[0104] The display area DA of the substrate 100 may include a first area A1 and a second area A2 surrounding the first area A1. The first area A1 may be the area where the OLED of each of the first pixels PX1, second pixels PX2, and third pixels PX3 is located. Pixel electrodes 211 may be located in the first area A1, and the area of ​​the first area A1 may be smaller than the area of ​​the pixel electrodes 211. The second area A2 surrounding the first area A1 (e.g., a portion of the second area A2) is located between a plurality of first areas A1. A third insulating layer 117 may be located in the second area A2. The first area A1 corresponds to the portion of the pixel electrode 211 exposed through the first opening OP1 of the third insulating layer 117, and the second area A2 corresponds to the portion of the third insulating layer 117 located between the pixel electrodes 211. Therefore, the first area A1 and the second area A2 of the substrate 100 may correspond to the first area A1 and the second area A2 of the pixels PX. When viewed from above, the first area A1 is defined as the area corresponding to the bottom surface of the first opening OP1 having the smallest area. Figure 5 In the diagram, the outline of the bottom surface of the first opening OP1 is marked with a solid line, and the outline of the pixel electrode 211 is marked with a dashed line.

[0105] Reference Figure 6 A buffer layer 111, formed to prevent or reduce impurities from penetrating into the semiconductor layer of the TFT, may be located on the substrate 100.

[0106] The substrate 100 can be formed from any of a variety of suitable materials, such as glass, metal, or plastic. According to embodiments, the substrate 100 can be a flexible substrate and may include polymeric resins such as polyethersulfone (PES), polyaryl compounds (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), or cellulose acetate propionate (CAP).

[0107] The buffer layer 111 may include an inorganic insulating material such as silicon nitride or silicon oxide, and may have a single-layer or multi-layer structure.

[0108] The TFT, capacitor Cst, and OLED 200 electrically connected to the TFT can be located on the substrate 100. When the OLED 200 is electrically connected to the TFT, it can refer to the electrical connection between the pixel electrode 211 and the TFT (i.e., the pixel electrode 211 is electrically connected to the TFT). The TFT can be... Figure 4A and Figure 4B The first transistor T1.

[0109] The TFT may include a semiconductor layer 132, a gate electrode 134, a source electrode 136S, and a drain electrode 136D. The semiconductor layer 132 may include an oxide semiconductor material. The semiconductor layer 132 may include amorphous silicon, polycrystalline silicon, or an organic semiconductor material. Considering properties such as adhesion to adjacent layers, surface flatness of the stacked layers, and processability, the gate electrode 134 may have a single-layer or multi-layer structure, including at least one of, for example, aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu).

[0110] A gate insulating layer 112, comprising an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride, may be located between the semiconductor layer 132 and the gate electrode 134. A first interlayer insulating layer 113 and a second interlayer insulating layer 114, comprising an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride, may be located between the gate electrode 134 and the source electrode 136S and the drain electrode 136D. The source electrode 136S and the drain electrode 136D may be connected to the semiconductor layer 132 through contact holes formed in the gate insulating layer 112, the first interlayer insulating layer 113, and the second interlayer insulating layer 114.

[0111] Both the source electrode 136S and the drain electrode 136D can have a single-layer or multi-layer structure, which includes at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W and Cu.

[0112] The capacitor Cst includes a lower electrode CE1 and an upper electrode CE2 that overlap each other, and a first interlayer insulating layer 113 is located between the lower electrode CE1 and the upper electrode CE2. The capacitor Cst may overlap with the TFT. Figure 6 In this embodiment, the gate electrode 134 of the TFT is the lower electrode CE1 of the capacitor Cst. In this embodiment, the capacitor Cst may not overlap with the TFT. The capacitor Cst may be covered by a second interlayer insulating layer 114.

[0113] The pixel circuit PC, including the TFT and capacitor Cst, can be covered by a first insulating layer 115 and a second insulating layer 116. The first insulating layer 115 and the second insulating layer 116 can be organic insulating layers serving as planarization insulating layers. Both the first insulating layer 115 and the second insulating layer 116 can include organic insulating materials, such as general-purpose polymers (e.g., polymethyl methacrylate (PMMA) or polystyrene (PS)), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluoropolymers, p-xylylene polymers, vinyl alcohol polymers, or blends thereof. In an embodiment, both the first insulating layer 115 and the second insulating layer 116 can include PI.

[0114] The display element (e.g., OLED 200) may be located on the second insulating layer 116. The OLED 200 may include a pixel electrode 211, an intermediate layer 231, and a counter electrode 251.

[0115] Pixel electrode 211 may be located on the second insulating layer 116 and may be connected to the TFT via connection electrode 181 on the first insulating layer 115. Wiring 183, such as data line DL or power supply line PL, may be located on the first insulating layer 115.

[0116] Pixel electrode 211 may include a conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In₂O₃), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). In embodiments, pixel electrode 211 may include a reflective film, which may include Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or compounds thereof. In embodiments, pixel electrode 211 may also include a film formed of ITO, IZO, ZnO, or In₂O₃ located above / below the reflective film.

[0117] A third insulating layer 117 may be located on the second insulating layer 116. The third insulating layer 117 may cover the edge of the pixel electrode 211 and may be a pixel-defining film that defines the pixel through a first opening OP1, a portion of which is exposed. The first opening OP1 may correspond to a first region A1. The third insulating layer 117 may increase the distance between the edge of the pixel electrode 211 and the opposing electrode 251, thereby preventing or substantially preventing arcing at the edge of the pixel electrode 211. The third insulating layer 117 may be formed of an organic material such as PI or hexamethyldisiloxane (HMDSO).

[0118] The intermediate layer 231 includes an emitting layer. The emitting layer may include a high molecular weight material or a low molecular weight material that emits light of a predetermined (or set) color. In an embodiment, the intermediate layer 231 may include a first functional layer located below the emitting layer and / or a second functional layer located above the emitting layer. The first functional layer and / or the second functional layer may include layers integrated above the plurality of pixel electrodes 211, or may include layer patterns corresponding to each of the plurality of pixel electrodes 211.

[0119] The first functional layer can have a single-layer or multi-layer structure. For example, when the first functional layer is formed of a high molecular weight material, it may include a hole transport layer (HTL) having a single-layer structure and formed of poly(3,4)-ethylene-dihydroxythiophene (PEDOT) or polyaniline (PANI). When the first functional layer is formed of a low molecular weight material, it may include a hole injection layer (HIL) and a hole transport layer (HTL).

[0120] In embodiments, the second functional layer may be omitted. For example, when both the first functional layer and the emitter layer are formed of high molecular weight materials, it is preferable to form a second functional layer to improve the characteristics of the OLED200. The second functional layer may have a single-layer or multi-layer structure. The second functional layer may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0121] The counter electrode 251 faces the pixel electrode 211, and the intermediate layer 231 is located between the counter electrode 251 and the pixel electrode 211. The counter electrode 251 may be formed of a conductive material with a low work function. For example, the counter electrode 251 may include a (semi-)transparent layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, or Ca or alloys thereof. Optionally, the counter electrode 251 may also include a layer formed of ITO, IZO, ZnO, or In2O3 on top of the (semi-)transparent layer comprising the above materials.

[0122] The opposing electrode 251 can be located on the intermediate layer 231 and the third insulating layer 117. The opposing electrode 251 can be integrally formed with multiple OLEDs 200 in the display area DA to face multiple pixel electrodes 211.

[0123] Figure 7 This is a partial plan view showing a refractive layer according to an embodiment of the present disclosure. Figure 8 It is along Figure 7 The cross-sectional view taken from line III-III'. Description of the section is optional. Figure 5 and Figure 6 The same components.

[0124] Reference Figure 7 and Figure 8A thin-film encapsulation layer can be located on the opposite electrode 251 as an encapsulation component 300. The thin-film encapsulation layer protects the OLED 200 from external moisture or oxygen. The thin-film encapsulation layer can have a multilayer structure. The thin-film encapsulation layer may include a first inorganic layer 310, an organic layer 320, and a second inorganic layer 330. Because the thin-film encapsulation layer has a multilayer structure, even if cracks occur in the thin-film encapsulation layer, the connection between the first inorganic layer 310 and the organic layer 320 or between the organic layer 320 and the second inorganic layer 330 can be prevented or substantially prevented. Therefore, the formation of external moisture or oxygen through the path it takes to penetrate into the display area DA can be prevented or minimized. In embodiments, the number of organic layers, the number of inorganic layers, and the stacking order of the organic and inorganic layers can be modified.

[0125] The first inorganic layer 310 may cover the opposing electrode 251 and may include at least one inorganic insulating layer selected from aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. Because the first inorganic layer 310 is formed together with the structure located below the first inorganic layer 310, the top surface of the first inorganic layer 310 may not be flat.

[0126] The organic layer 320 may cover the first inorganic layer 310 and may have sufficient thickness. The top surface of the organic layer 320 may be substantially flat over the display area DA. The organic layer 320 may include PET, PEN, PC, PI, polyethylene sulfonate, polyoxymethylene, polyoxymethylene, polyaryl compounds, HMDSO, or acrylic resins (e.g., PMMA or polyacrylic acid) or combinations thereof.

[0127] The second inorganic layer 330 may cover the organic layer 320 and may include at least one inorganic insulating material selected from aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The second inorganic layer 330 may extend beyond the organic layer 320 and may contact the first inorganic layer 310 in the peripheral region PA, thereby preventing or substantially preventing the organic layer 320 from being exposed to the outside.

[0128] When the thin-film encapsulation layer is formed, the structure beneath it may be damaged. For example, when the first inorganic layer 310 is formed, the layer directly beneath it may be damaged. Therefore, to prevent or reduce damage to the underlying structure when the thin-film encapsulation layer is formed, at least one cover layer and / or protective layer may be located between the opposing electrode 251 and the thin-film encapsulation layer. The protective layer may include an inorganic material.

[0129] The refractive layer 400 may be located on the OLED 200, for example, on the encapsulation member 300. The refractive layer 400 can modulate the path of light emitted by the emitting layer of the OLED 200 and can function as a focusing lens. The refractive layer 400 can alter the path of light emitted by the emitting layer of the OLED 200 in the lateral direction (e.g., a direction different from the third direction (e.g., the z-direction)), causing the light to travel substantially forward in the third direction (e.g., the z-direction). The refractive layer 400 may include a first refractive layer 410 and a second refractive layer 430.

[0130] The first refractive layer 410 can be positioned corresponding to a second region A2 of the substrate 100 and can have a second opening OP2, through which the top surface of the encapsulation member 300 corresponding to the first region A1 is exposed. That is, the first refractive layer 410 can be formed into a lattice pattern with a plurality of second openings OP2. Each second opening OP2 of the first refractive layer 410 can be formed by patterning the first refractive layer forming material on the encapsulation member 300 using a photolithography process. Figure 7 In the diagram, the outline of the bottom surface of the second opening OP2 is marked with a solid line, while the outline of the bottom surface of the first opening OP1 is marked with a dashed line. The second opening OP2 of the first refractive layer 410 may surround the first opening OP1 of the third insulating layer 117 and may overlap with the first opening OP1 of the third insulating layer 117. The size of the second opening OP2 of the first refractive layer 410 may be equal to or larger than the size of the first opening OP1 of the third insulating layer 117. The shape of the second opening OP2 of the first refractive layer 410 may be the same as the shape of the first opening OP1 of the third insulating layer 117. Although the second opening OP2 is in Figure 7 While the first opening has a quadrilateral shape, in this embodiment, the second opening OP2 can be a circle, an ellipse, or a polygon such as a triangle. The polygon can be a shape with rounded corners.

[0131] The first refractive layer 410 may have a first refractive index, for example, a refractive index of about 1.4 to about 1.5. The first refractive layer 410 may include a light-transmitting inorganic or organic material having a low refractive index. For example, the inorganic material may include silicon oxide or magnesium fluoride. The organic material may include at least one selected from the group consisting of PI, polyamide, and tris(8-hydroxyquinoline)aluminum (Alq3).

[0132] The second refractive layer 430 may fill the second opening OP2 of the first refractive layer 410 and may be located on the first refractive layer 410. The second refractive layer 430 may cover the entire surface of the substrate 100, and the top surface of the second refractive layer 430 may be substantially flat. The second refractive layer 430 may have a second refractive index that is higher than (or greater than) the first refractive index of the first refractive layer 410. For example, the second refractive layer 430 may have a refractive index of about 1.6 or greater, specifically, a refractive index of 1.6 to 1.8. In embodiments, the first refractive layer 410 and the second refractive layer 430 may have a refractive index difference of 0.1 to 0.3. The second refractive layer 430 may comprise a light-transmitting inorganic or organic material with a high refractive index. For example, the inorganic material may comprise zinc oxide, titanium oxide, zirconium oxide, niobium oxide, tantalum oxide, tin oxide, nickel oxide, silicon nitride, indium nitride, or gallium nitride. Organic materials may include those derived from PEDOT, 4,4'-bis[N-(3-methylphenyl)-N-phenylamino]biphenyl (TPD), 4,4',4”-tris[(3-methylphenyl)phenylamino]triphenylamine (m-MTDATA), 1,3,5-tris[N,N-bis(2-methylphenyl)-amino]benzene (o-MTDAB), 1,3,5-tris[N,N-bis(3-methylphenyl)-amino]benzene (m-MTDAB), 1,3,5-tris[N,N-bis(4-methylphenyl)-amino]- At least one selected from the group consisting of benzene (p-MTDAB), 4,4'-bis[N,N-bis(3-methylphenyl)-amino]-diphenylmethane (BPPM), 4,4'-dicarbazolyl-1,1'-biphenyl (CBP), 4,4',4”-tris(N-carbazolyl)triphenylamine (TCTA), 2,2',2”-(1,3,5-benzyltolyl)tri-[1-phenyl-1H-benzimidazole] (TPBI) and 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ).

[0133] The refractive layer 400 may further include a light extraction pattern 450. The light extraction pattern 450 may be located on a portion of the path of light emitted by the emitting layer of the OLED 200. The light extraction pattern 450 may alter the path of a portion of the light emitted by the emitting layer of the OLED 200 incident on the light extraction pattern 450 in a third direction (e.g., the z-direction), causing the light to travel in a direction other than the third direction (e.g., the z-direction). The light extraction pattern 450 may be located, for example, in a second opening OP2 of the first refractive layer 410 in a first region A1 of the substrate 100. The light extraction pattern 450 may be disposed in an island shape at substantially the center of the first region A1. The light extraction pattern 450 may have a third refractive index lower than the second refractive index of the second refractive layer 430. In embodiments, the light extraction pattern 450 may comprise the same material as the first refractive layer 410 and may comprise the same refractive index as the first refractive layer 410. The light extraction pattern 450 and the first refractive layer 410 can be formed by separate processes, or the light extraction pattern 450 can be formed concurrently (e.g., simultaneously) with the formation of the first refractive layer 410 by patterning the first refractive layer forming material during the formation of the first refractive layer 410.

[0134] The height H2 of the light extraction pattern 450 may be equal to or different from the height H1 of the first refractive layer 410. For example, the height H2 of the light extraction pattern 450 may be less than the height H1 of the first refractive layer 410. The term "height" refers to the maximum height of the structure from the top surface of the lower layer below it. The width W3 of the light extraction pattern 450 may vary depending on the pixel. For example, the width W3 of the light extraction pattern 450 located in the first region A1 of the third pixel PX3 may be greater than the width W3 of the light extraction pattern 450 located in the first region A1 of the first pixel PX1. The width W3 of the light extraction pattern 450 located in the first region A1 of the first pixel PX1 may be greater than the width W3 of the light extraction pattern 450 located in the first region A1 of the second pixel PX2. The term "width" regarding the width W3 refers to the maximum width of the light extraction pattern 450. When the bottom surface of the light extraction pattern 450 is larger than the top surface of the light extraction pattern 450, the width may be the maximum width of the bottom surface of the light extraction pattern 450. Both the first refractive layer 410 and the light extraction pattern 450 surrounding the second opening OP2 can have a shape with linear or tapered sides and a quadrilateral or trapezoidal cross-section. The upper part of the side surface of each portion of the first refractive layer 410 and the light extraction pattern 450 can have an arc shape.

[0135] The light extraction pattern 450 may include scattering particles. These scattering particles may be nanoscale particles. For example, the particle size of each scattering particle may range from approximately 50 nm to approximately 1000 nm. In embodiments, the scattering particles may be inorganic particles. For example, the scattering particles may include silica, ZrO2, TiO2, Al2O3, In2O3, ZnO, SnO2, and Sb2O3. In embodiments, the scattering particles may be organic particles. For example, the scattering particles may include PS, PMMA, acrylic-styrene copolymer, melamine, or PC. The scattering particles may be a single type of particle or a combination of two or more types of particles.

[0136] Figure 9 This is a view used to describe light extraction from a refractive layer according to an embodiment of the present disclosure. Figure 9 It can be Figure 8 A magnified view of a portion of the image.

[0137] Reference Figure 9 The OLED 200 can be located on an insulating surface. The insulating surface can be the top surface of at least one insulating layer on the substrate 100. For example, the insulating surface can be the top surface of the second insulating layer 116.

[0138] The second width W2 at the bottom of the second opening OP2 can be greater than the first width W1 of the bottom surface of the first opening OP1. The term "width" in relation to the first width W1 and the second width W2 refers to the maximum width of the bottom surface. For each pixel, the difference ΔW between the second width W2 and the first width W1 can be different. For example, the difference ΔW between the second width W2 and the first width W1 at the third pixel PX3 can be greater than the difference ΔW between the second width W2 and the first width W1 at the first pixel PX1, but less than the difference ΔW between the second width W2 and the first width W1 at the second pixel PX2. Although in Figure 9 The second width W2 of the second opening OP2 is the same as the width of the pixel electrode 211, but in an embodiment, the second width W2 of the second opening OP2 may be smaller than the width of the pixel electrode 211.

[0139] In region OE1, which includes the inner wall of the second opening OP2 of the first refractive layer 410, light L1 emitted from the OLED 200 and incident on the first refractive layer 410 from the second refractive layer 430 can be totally internally reflected at the interface between the second refractive layer 430 and the first refractive layer 410 to change its path, and the totally internally reflected light L2 can be extracted substantially in the third direction (e.g., the z-direction). Therefore, the area of ​​the light-emitting pattern of the pixel generated in the front virtual region increases. That is, due to the total internal reflection at the interface between the first refractive layer 410 (which is a low-refractive layer) and the second refractive layer 430 (which is a high-refractive layer), forward extraction efficiency can be improved and forward visibility can be improved.

[0140] In region OE2, which includes the side surface of the light extraction pattern 450, light L3 incident on the light extraction pattern 450 from the OLED 200 can be refracted at the interface between the light extraction pattern 450 and the second refractive layer 430, and the refracted light L4 can be extracted in a direction different from a third direction (e.g., the z-direction). Light L5 from the OLED 200 can pass through the light extraction pattern 450 and can be extracted in a substantially third direction (e.g., the z-direction) without changing its direction. Light L6 from the OLED 200 can pass through the second refractive layer 430 without passing through the light extraction pattern 450 and can be extracted in a substantially third direction (e.g., the z-direction) without changing its direction. Although in Figure 9 Not shown, but light emitted from OLED200 that is incident on light extraction pattern 450 from the second refractive layer 430 can be totally internally reflected at the interface between the second refractive layer 430 and light extraction pattern 450 to change its path, and the totally internally reflected light can be extracted in substantially the third direction (e.g., the z direction).

[0141] When the OLED 200 emits white light, the white characteristics observed at the front surface differ from those observed at the side surface. White angle difference (WAD) is a measure of the variation in white characteristics with respect to the viewing angle, and the level of WAD is assessed by measuring the amount of change in brightness and color coordinates relative to the front surface perpendicular to the screen with respect to the viewing angle. According to embodiments of this disclosure, the light extraction pattern 450 can alter the path of light by refracting and / or scattering a portion of the light passing through the light extraction pattern 450, thereby reducing the difference between the white characteristics observed at the front surface and those observed at the side surface.

[0142] Figure 10 It is according to the embodiments of this disclosure along Figure 1 The cross-sectional view taken from line I-I'. Figure 11 It shows Figure 10 A plan view of the input sensing layer 500. Figure 12 It is along Figure 11 The cross-sectional view taken from line IV-IV'. Figure 13A It shows Figure 12 A plan view of the first conductive layer CML1. Figure 13B It shows Figure 12 A plan view of the second conductive layer CML2. Figure 14 This is a partial cross-sectional view of a display panel 10' according to an embodiment of the present disclosure. Components that are the same as those described above may not be described below.

[0143] Reference Figure 10 The display device 1 may include a display panel 10', which includes a substrate 100 sequentially stacked in a third direction (e.g., the z-direction) and an encapsulation member 300 for sealing the substrate 100. The display panel 10' may also include an input sensing layer 500 and a refractive layer 400 located on the encapsulation member 300. Figure 10 For example, a refractive layer 400 is located on the encapsulation member 300, and an input sensing layer 500 is arranged between them.

[0144] Reference Figure 11 The input sensing layer 500 may include a substrate layer BL, which includes a display area DA and a peripheral area PA. The substrate layer BL may correspond to the substrate 100 of the display panel 10' and may have a shape substantially the same as that of the substrate 100. In an embodiment, the substrate layer BL may be part of an encapsulation component 300 of the display panel 10', for example, a second inorganic layer 330 located on the uppermost layer of the encapsulation component 300 (see...). Figure 14 In an embodiment, the substrate layer BL may be an insulating substrate or insulating film formed of an insulating material such as glass or polymer resin, separate from the encapsulation member 300.

[0145] Multiple sensing electrodes (TSEs) may be located in the display area (DA). Sensing signal lines connected to the sensing electrodes (TSEs) may be located in the peripheral area (PA). The sensing electrodes (TSEs) may include a first sensing electrode 510 and a second sensing electrode 520. The sensing signal lines may include a first sensing signal line 550A and a second sensing signal line 550B. That is, the input sensing layer 500 may include a first sensing electrode 510, a first sensing signal line 550A connected to the first sensing electrode 510, a second sensing electrode 520, and a second sensing signal line 550B connected to the second sensing electrode 520. The input sensing layer 500 may sense external input using mutual capacitance and / or self-capacitance methods.

[0146] The input sensing layer 500 may include multiple conductive layers. (See reference...) Figure 12The input sensing layer 500 may include a first conductive layer CML1 and a second conductive layer CML2. A first insulating layer 501, which serves as the substrate layer BL, may be located between the first conductive layer CML1 and the encapsulation member 300, and a second insulating layer 503 may be located between the first conductive layer CML1 and the second conductive layer CML2.

[0147] In this embodiment, both the first insulating layer 501 and the second insulating layer 503 can be inorganic insulating layers formed of, for example, silicon nitride. In this embodiment, the first insulating layer 501 can be omitted, and the first conductive layer CML1 can be directly located on the encapsulation member 300. In this embodiment, both the first insulating layer 501 and the second insulating layer 503 can be organic insulating layers.

[0148] The first conductive layer CML1 may include, for example, Figure 13A The first connection electrode 511 is shown. The second conductive layer CML2 may include, as shown in the figure. Figure 13B The diagram shows a first sensing electrode 510, a second sensing electrode 520, and a second connecting electrode 521. The second sensing electrodes 520 can be connected to each other via the second connecting electrode 521, which is formed in the same layer as the second sensing electrode 520. The first sensing electrodes 510 can be connected to each other via first connecting electrodes 511, which are formed in different layers from the first sensing electrodes 510. The first connecting electrodes 511 electrically connecting adjacent first sensing electrodes 510 can be connected to adjacent first sensing electrodes 510 via contact holes (CNTs) formed in the second insulating layer 503.

[0149] Both the first conductive layer CML1 and the second conductive layer CML2 comprise metals. For example, both the first conductive layer CML1 and the second conductive layer CML2 may comprise, for example, Mo, Al, Cu and / or Ti, and may have a single-layer or multi-layer structure comprising the above materials. In an embodiment, both the first conductive layer CML1 and the second conductive layer CML2 may have a multi-layer structure formed of Ti / Al / Ti.

[0150] Reference Figure 13B The first sensing electrode 510 and the second sensing electrode 520 can have a substantially rhomboid shape. The first sensing electrode 510 can be a grid structure (or lattice structure) with a plurality of holes 510H. The holes 510H can be formed to overlap with the first region A1 of the pixel. Similarly, the second sensing electrode 520 can be a grid structure (or lattice structure) with a plurality of holes 520H. The holes 520H can be formed to overlap with the first region A1 of the pixel. The holes 510H and 520H can have different sizes. The linewidth of the lattice lines can be several micrometers. Figure 14The image shows a first insulating layer 501, a second insulating layer 503 located on the packaging member 300, and a sensing electrode TSE located on the second insulating layer 503. The TSE is part of the grid lines of either the first sensing electrode 510 or the second sensing electrode 520. Figure 14 The sensing electrode TSE can be positioned as the second region A2 corresponding to the pixel.

[0151] The first sensing electrode 510 can be arranged in the y-direction, and the second sensing electrode 520 can be arranged in the x-direction intersecting the y-direction. The first sensing electrodes 510 arranged in the y-direction can be connected to each other via first connecting electrodes 511 between adjacent first sensing electrodes 510 to form a first sensing line 510C. The second sensing electrodes 520 arranged in the x-direction can be connected to each other via second connecting electrodes 521 between adjacent second sensing electrodes 520 to form a second sensing line 520R. The first sensing line 510C and the second sensing line 520R can intersect each other. In an embodiment, when viewed in a plan view, the first sensing line 510C and the second sensing line 520R can be perpendicular to each other.

[0152] The first sensing line 510C and the second sensing line 520R can be located in the display area DA, and can be connected to the sensing signal pad TP of the pad unit 540 through the first sensing signal line 550A and the second sensing signal line 550B formed in the peripheral area PA. The first sensing line 510C can be connected to the first sensing signal line 550A, and the second sensing line 520R can be connected to the second sensing signal line 550B.

[0153] The first refractive layer 410 may be located on the second insulating layer 503. The first refractive layer 410 may cover the sensing electrode TSE. The light extraction pattern 450 may be located in the second opening OP2 of the first refractive layer 410. The second refractive layer 430 may be located on the first refractive layer 410 and the light extraction pattern 450.

[0154] In an embodiment, the display panel 10' may further include a color control component, such as a color filter, located between the input sensing layer 500 and the refractive layer 400.

[0155] In the above embodiments, the contours (shapes of the top and side surfaces) of the first refractive layer 410 are the same as or similar to the contours (shapes of the top and side surfaces) of the light extraction pattern 450. In some embodiments, the contours of the light extraction pattern 450 may differ from those of the first refractive layer 410 depending on the pixel arrangement and / or the pixel emission characteristics. At least one of the shape and size of the light extraction pattern 450 in the second opening OP2, as well as the number (density) and arrangement of the light extraction patterns 450, may vary for each pixel depending on the pixel arrangement and / or the pixel emission characteristics.

[0156] Figures 15 to 20 This shows a partial plan view and a respective cross-sectional view of the refractive layer according to an embodiment of the present disclosure. In this case, Figure 15 , Figure 17 and Figure 19 The plan view PV shown refers to the top view of the diagram defined in the xy plane. Figure 16 , Figure 18 and Figure 20 The cross-sectional view CSV shown refers to the view taken along line V-V' of the plan view PV.

[0157] Reference Figure 15 and Figure 16 The light extraction pattern 450 can be disposed in an island shape at the substantially center of the first region A1 of the substrate 100. The side surface of the first refractive layer 410 surrounding the second opening OP2 can have a linear or tapered shape. The light extraction pattern 450 can be a hemisphere with an arc-shaped side surface and a semi-circular cross-section. The upper part of the side surface of the first refractive layer 410 can have an arc shape. Figure 15 In the planar view PV shown, the outline of the bottom surface of the light extraction pattern 450 is marked by a solid line. The width of the bottom surface of the light extraction pattern 450 can be different for each pixel. Figure 15 and Figure 16 In this process, as the size of the pixel electrode 211 increases, the size of the light extraction pattern 450 or the width of its bottom surface can also increase. The height of the light extraction pattern 450 can be equal to or less than the height of the first refractive layer 410.

[0158] Reference Figure 17 and Figure 18 The light extraction pattern 450 can be spaced apart from the side surface of the first refractive layer 410 surrounding the second opening OP2 by a predetermined (or set) interval, and can have a closed loop shape forming a continuous circle along the edge of the second opening OP2. The light extraction pattern 450 can have a linear shape with a quadrilateral cross-section. The side surfaces of the first refractive layer 410 surrounding the second opening OP2 and each of the light extraction pattern 450 can have a linear or tapered shape. The upper portion of the side surface of the first refractive layer 410 surrounding the second opening OP2 and each of the light extraction pattern 450 can have an arc shape. Figure 17 In the planar view PV shown, the outline of the bottom surface of the light extraction pattern 450 is marked by a solid line. The total length of the light extraction pattern 450 can be different for each pixel. Figure 17 and Figure 18 In this process, as the size of the pixel electrode 211 increases, the total length of the light extraction pattern 450 can increase. The height of the light extraction pattern 450 can be equal to or less than the height of the first refractive layer 410.

[0159] Reference Figure 19 and Figure 20 One or more light extraction patterns 450 may be arranged in an island shape at the substantially center of the first region A1. The side surfaces of each of the first refractive layer 410 and the light extraction pattern 450 surrounding the second opening OP2 may have a linear or tapered shape. The upper portion of the side surface of each of the first refractive layer 410 and the light extraction pattern 450 surrounding the second opening OP2 may have an arcuate shape. Figure 19 In the planar view PV shown, the outline of the bottom surface of the light extraction pattern 450 is marked by a solid line. For each pixel, the width of the bottom surface of the light extraction pattern 450 can be the same, and the number of light extraction patterns 450 can vary depending on the number of pixels. For example, in... Figure 19 and Figure 20 In the first region A1 of the third pixel PX3, six light extraction patterns 450 are provided; in the first region A1 of the first pixel PX1, four light extraction patterns 450 are provided; and in the first region A1 of the second pixel PX2, one light extraction pattern 450 is provided. The number of light extraction patterns 450 can increase as the size of the pixel electrode 211 increases. The height of the light extraction pattern 450 can be equal to or less than the height of the first refractive layer 410.

[0160] Figure 21 This is a partial cross-sectional view of a display panel according to an embodiment of the present disclosure.

[0161] Reference Figure 21 The refractive layer 400' may include a first refractive layer 410', a second refractive layer 430', and a light extraction pattern 450'. Figure 21 In one embodiment, the first refractive layer 410' does not have an opening.

[0162] The first refractive layer 410' may be located on the encapsulation member 300 and may have a recessed portion COA recessed into the substrate 100 and a non-recessed portion other than the recessed portion COA. The recessed portion COA may be a portion corresponding to the OLED 200. The recessed portion COA may be a portion corresponding to a first region A1 of the substrate 100 or pixel PX. The non-recessed portions between adjacent recessed portions COA may be portions corresponding to a second region A2 of the substrate 100 or pixel PX. The top surface of the recessed portion COA of the first refractive layer 410' may be recessed, and the top surface of the non-recessed portion of the first refractive layer 410' may be substantially flat. The thickness (or height) H2' of the recessed portion COA of the first refractive layer 410' may be approximately 2 / 5 to 3 / 5 of the thickness (or height) H1' of the first refractive layer 410'. The thickness H2' of the recessed portion COA may be the maximum depth of the recessed portion COA. The diameter L of the recessed portion COA may vary depending on the area of ​​the first opening OP1 of the third insulating layer 117.

[0163] The second refractive layer 430' can fill the recessed portion COA of the first refractive layer 410' and can be located on the first refractive layer 410'. Therefore, the second refractive layer 430' can have a convex surface corresponding to the recessed portion COA of the first refractive layer 410'. The second refractive layer 430' can cover the entire surface above the substrate 100 and can have a substantially flat top surface. The second refractive layer 430' can have a refractive index higher than (or greater than) the refractive index of the first refractive layer 410'. The light extraction pattern 450' can be located between the first refractive layer 410' and the second refractive layer 430'.

[0164] The light extraction pattern 450' can be disposed in an island shape at substantially the center of the recessed surface of the recessed portion COA. The light extraction pattern 450' can have the same refractive index as the first refractive layer 410'. The light extraction pattern 450' and the first refractive layer 410' can be formed by separate processes, or they can be formed concurrently (e.g., simultaneously), such that the light extraction pattern 450' protrudes from the first refractive layer 410'. Figure 21 In this embodiment, the height of the light extraction pattern 450' is the same as the thickness H2' of the recessed portion COA of the first refractive layer 410'. In another embodiment, the height of the light extraction pattern 450' can be less than the thickness H2' of the recessed portion COA of the first refractive layer 410'. For example, the top surface of the light extraction pattern 450' and the top surface of the non-recessed surface of the first refractive layer 410' can be the same, or the top surface of the light extraction pattern 450' can be smaller than the top surface of the non-recessed surface of the first refractive layer 410'. Although in Figure 21 Not shown, but an input sensing layer 500 may be further disposed between the encapsulation member 300 and the refractive layer 400' (see [reference]). Figure 10 ).

[0165] The shape and size of the light extraction pattern 450' in the recessed portion COA, as well as at least one of the number and arrangement of the light extraction patterns 450' for each pixel, can vary depending on the pixel arrangement and / or the pixel emission characteristics, as shown in reference. Figure 8 and Figures 15 to 20 As described.

[0166] The display device according to embodiments of the present disclosure can improve the light extraction efficiency at the front surface of the display device by providing a refractive layer including a low-refractive layer and a high-refractive layer. Furthermore, the display device can improve the color shift of light emitted to the side surface by positioning a light extraction pattern, which is a patterned structure, along the path of light emission between the low-refractive layer and the high-refractive layer. Therefore, when the display device is viewed from various angles, it can form a clear image regardless of the viewing angle.

[0167] One or more embodiments of this disclosure can provide a display device that improves the efficiency of light extraction within the display device and emits light with a uniform brightness distribution even when the user's viewing angle changes. However, the above effects are merely examples, and the effects according to the embodiments are described in detail by way of description.

[0168] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope as defined in this disclosure.

Claims

1. A display device, wherein, The display device includes: The display element is configured to emit light; A first refractive layer is located on the display element and has an opening corresponding to the display element; One or more light extraction patterns, each light extraction pattern being located in an island shape within the opening of the first refractive layer; and A second refractive layer is located on top of the first refractive layer, and the second refractive layer covers the first refractive layer and the one or more light extraction patterns. in, The refractive index of the second refractive layer is greater than the refractive index of the first refractive layer and the refractive index of the one or more light extraction patterns, and The one or more light extraction patterns are spaced apart from the first refractive layer, and a portion of the second refractive layer fills the opening and between the one or more light extraction patterns and the first refractive layer.

2. The display device according to claim 1, wherein, The display element includes: Pixel electrode; An intermediate layer, located on the pixel electrode, includes an emissive layer; and The opposite electrode is located on the intermediate layer. The first refractive layer is located on an insulating layer covering the edge of the pixel electrode.

3. The display device according to claim 1, wherein, The display device further includes: An encapsulation component is located between the display element and the first refractive layer.

4. The display device according to claim 3, wherein, The display device further includes: An input sensing layer is located between the encapsulation member and the first refractive layer, and includes sensing electrodes.

5. The display device according to claim 1, wherein, The refractive index of the one or more light extraction patterns is equal to the refractive index of the first refractive layer.

6. The display device according to claim 1, wherein, The upper part of the side surface of each of the one or more light extraction patterns and the first refractive layer has an arc shape.

7. The display device according to claim 1, wherein, When multiple light extraction patterns are located inside the opening of the first refractive layer, the multiple light extraction patterns are spaced apart from each other in the opening.

8. The display device according to claim 1, wherein, The height of the one or more light extraction patterns is equal to the height of the first refractive layer.

9. The display device according to claim 1, wherein, The height of the one or more light extraction patterns is less than the height of the first refractive layer.

10. The display device according to claim 1, wherein, The display elements include: a first display element configured to emit light of a first color; and a second display element configured to emit light of a second color. The light extraction pattern in the opening corresponding to the first display element in the first refractive layer and the light extraction pattern in the opening corresponding to the second display element in the first refractive layer are different from each other in at least one aspect of shape, size and number.

11. A display device, wherein, The display device includes: The display element is configured to emit light; A first refractive layer is located on the display element, the first refractive layer having a top surface, the top surface having a recessed surface corresponding to the display element; One or more light extraction patterns, each light extraction pattern being island-shaped on the recessed surface of the first refractive layer; and A second refractive layer is located on top of the first refractive layer, and the second refractive layer covers the first refractive layer and the one or more light extraction patterns. Wherein, the refractive index of the second refractive layer is greater than the refractive index of the first refractive layer and the refractive index of the one or more light extraction patterns, and The one or more light extraction patterns are spaced apart from the first refractive layer, and a portion of the second refractive layer fills the recessed portion formed by the recessed surface and fills the space between the one or more light extraction patterns and the first refractive layer.

12. The display device according to claim 11, wherein, The display device further includes: An encapsulation component is located between the display element and the first refractive layer.

13. The display device according to claim 12, wherein, The display device further includes: An input sensing layer is located between the encapsulation member and the first refractive layer, and includes sensing electrodes.

14. The display device according to claim 11, wherein, The refractive index of the one or more light extraction patterns is equal to the refractive index of the first refractive layer.

15. The display device according to claim 11, wherein, The height of the top surface of the one or more light extraction patterns is the same as the height of the top surface of the non-recessed surface of the first refractive layer.

16. The display device according to claim 11, wherein, The height of the top surface of the one or more light extraction patterns is less than the height of the top surface of the non-recessed surface of the first refractive layer.

17. The display device according to claim 11, wherein, The display elements include: a first display element configured to emit light of a first color; and a second display element configured to emit light of a second color. The light extraction pattern on the recessed surface of the first refractive layer corresponding to the first display element and the light extraction pattern on the recessed surface of the first refractive layer corresponding to the second display element are different from each other in at least one aspect of shape, size and quantity.

Images