Display Devices

Abstract

A display device includes: pixels coupled to scan lines and data lines; a data driver configured to supply respective data signals to the data lines, including an amplifier arranged at an output terminal of the data driver, the amplifier including a first power terminal and a second power terminal; a switch unit configured to perform a power switching operation of alternately connecting the first power terminal and the second power terminal of the amplifier to a first driving power source and a second driving power source; and a drive controller configured to control the data driver and the switch unit, wherein the drive controller is configured to output a switch control signal to control the switch unit and interrupt the power switching operation during a blank period between source output periods, during which the data driver is configured to output a data signal for each frame.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2019-0053927, filed on May 8, 2019, the disclosure of which is hereby incorporated by reference in its entirety. Technical Field

[0003] Exemplary embodiments / implementations of the present invention generally relate to a display device and a method of driving the display device. Background Art

[0004] The display device includes pixels arranged in a display area and a scan driver and a data driver for driving the pixels. The scan driver generates a scan signal for sequentially selecting pixels of each horizontal line during each frame period. The data driver generates a data signal corresponding to the pixel selected by the scan signal.

[0005] The data driver generates a data signal in response to the image data and the data control signal. The data signal is amplified using an amplifier placed at the output terminal of each channel, and the data driver outputs the amplified data signal. Because the amplifier has its offset, the data signal output from the data driver may have a voltage deviation caused by the offset of the amplifier.

[0006] The above information disclosed in this Background section is only for understanding the background of the present inventive concept and therefore it may contain information that does not constitute the prior art. Summary of the invention

[0007] Devices and methods constructed according to exemplary embodiments of the present invention can provide a display device and a method of driving the display device that can reduce a voltage deviation of a data signal by canceling an offset of an amplifier and effectively control a power switching period for reducing the voltage deviation.

[0008] Additional features of the inventive concept will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concept.

[0009] According to one or more exemplary embodiments of the present invention, a display device includes: a display unit including pixels coupled to scan lines and data lines; a scan driver configured to supply respective scan signals to the scan lines; a data driver configured to supply respective data signals to the data lines, the data driver including an amplifier arranged at an output terminal of the data driver, the amplifier including a first power terminal and a second power terminal; a switch unit configured to perform a power switching operation of alternately connecting the first power terminal and the second power terminal of the amplifier to a first driving power source and a second driving power source; and a drive controller configured to control the scan driver, the data driver, and the switch unit in response to input image data and a timing signal, wherein the drive controller is configured to output a switch control signal to control the switch unit, wherein the switch unit is configured to interrupt the power switching operation in response to receiving the switch control signal during a blank period, the blank period being set between source output periods, and wherein the data driver is configured to output a data signal of each frame during the source output period.

[0010] The driving controller may be configured to control the switching unit to perform a power switching operation during a source output period.

[0011] The switching unit may include: a first switch, which is configured to alternately connect the first power supply terminal of the amplifier to the first driving power supply and the second driving power supply in response to a switching control signal during a source output period; and a second switch, which is configured to alternately connect the second power supply terminal of the amplifier to the first driving power supply and the second driving power supply in response to the switching control signal during the source output period in an order opposite to that of the first switch.

[0012] The first switch and the second switch may be configured to repeatedly perform a power switching operation every predetermined period during a source output period in response to a switch control signal.

[0013] The first switch and the second switch may be configured to interrupt the power switching operation or maintain an off state during the blank period in response to the switch control signal.

[0014] The driving controller may include a switch controller configured to generate a switch control signal using the timing signal.

[0015] The switch controller may include: a counter configured to detect a blank period by counting a timing signal; a storage unit configured to store options for power switching operations of the switch unit; and a control signal generator configured to generate a switch control signal based on the blank period detected by the counter and the options for power switching operations extracted from the storage unit.

[0016] The options for the power switching operation include at least one of a driving mode of the display device, a power switching operation mode, and a period of the power switching operation.

[0017] The options for the power switching operation may further include at least one of a power switching operation mode during the blank period and information on a section in which the power switching operation of the blank period is interrupted.

[0018] The blank period may include a leading edge period and a trailing edge period which may be sequentially set between source output periods.

[0019] The data driver may include amplifiers arranged in respective output channels coupled to respective data lines, and the switching unit may be configured to: connect a first power supply terminal of at least one of the amplifiers to one of a first driving power supply and a second driving power supply within a first predetermined time period; and connect a second power supply terminal of at least one of the amplifiers to the remaining one of the first driving power supply and the second driving power supply within a second predetermined time period.

[0020] The display device may further include a sensor unit overlapping the display unit, and the driving controller may be configured to drive the sensor unit during the blank period.

[0021] According to one or more exemplary embodiments of the present invention, a method for driving a display device includes: generating a switch control signal in response to a timing signal; and outputting a data signal for each frame; while outputting the data signal, performing a power switching operation by alternately switching connections from a first power terminal and a second power terminal of an amplifier arranged at an output terminal of a data driver to a first driving power supply and a second driving power supply in response to the switch control signal, wherein the power switching operation is repeatedly performed during a source output period, the source output period refers to a time frame in which the data signal for each frame is output, and wherein the power switching operation is interrupted during a blank period, the blank period being set between the source output periods.

[0022] Generating the switch control signal may include: detecting a blank period based on the timing signal; and generating the switch control signal based on the blank period and the power switching operation option that may be pre-stored.

[0023] The power switching operation option may include at least one of a driving mode of the display device, a power switching operation mode, and a period during which the power switching operation may be performed.

[0024] The power switching operation options may further include at least one of a power switching operation mode during the blank period and information on a section in which the power switching operation of the blank period may be interrupted.

[0025] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the inventive concept.

[0027] Figure 1 A display device according to an exemplary embodiment of the present disclosure is illustrated.

[0028] Figure 2 A display unit and a display driver according to an exemplary embodiment of the present disclosure are illustrated.

[0029] Figure 3 A data driver according to an exemplary embodiment of the present disclosure is illustrated.

[0030] Figure 4 The diagram is included in Figure 3 An output buffer in the output buffer unit and a switch unit coupled to the output buffer.

[0031] Figure 5 A power switching method according to an exemplary embodiment of the present disclosure is schematically illustrated.

[0032] Figure 6 A switch controller according to an exemplary embodiment of the present disclosure is illustrated.

[0033] Figure 7 and Figure 8 The diagram is stored in Figure 6 Example of the source chopping option in the storage unit of FIG.

[0034] Fig. 9 A first switch control signal and a second switch control signal according to various exemplary embodiments of the present disclosure are illustrated.

[0035] Fig.10 The output voltage of the data driver depending on source chopping is shown. DETAILED DESCRIPTION

[0036] In the following description, for the purpose of explanation, many specific details are set forth in order to provide a comprehensive understanding of each exemplary embodiment or implementation of the present invention. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of devices or methods using one or more of the present inventions disclosed herein. However, it is apparent that each exemplary embodiment can be practiced without these specific details or with one or more equivalent settings. In other cases, well-known structures and devices are shown in block diagram form in order to avoid unnecessary obscurity of each exemplary embodiment. Further, each exemplary embodiment may be different, but need not be exclusive. For example, the specific shape, configuration and characteristics of an exemplary embodiment may be used or implemented in another exemplary embodiment without departing from the present invention.

[0037] Unless otherwise specified, the illustrated exemplary embodiments are to be understood as providing exemplary features of varying details of some of the ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter, individually or collectively referred to as "elements") of the various embodiments may be further combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0038] The use of cross-hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. Therefore, the presence or absence of cross-hatching or shading does not convey or indicate any preference or need for a specific material, material property, size, ratio, commonality between the illustrated elements, and / or any other characteristics, properties, attributes, etc. of the elements, unless so specified. Further, in the drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the exemplary embodiments may be implemented differently, a specific process sequence may be performed in an order different from the described sequence. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same reference numerals represent the same elements.

[0039] When an element such as a layer is referred to as being "on", "connected to" or "coupled to" another element or layer, it can be directly on, directly connected to or directly coupled to the other element or layer, or there can be an intermediate element or layer. However, when an element or layer is referred to as being "directly" "on", "directly connected to" or "directly coupled to" another element or layer, there is no intermediate element or layer. For this purpose, the term "connection" can refer to a physical connection, an electrical connection and / or a fluid connection with or without an intermediate element. Further, the D1 axis, the D2 axis and the D3 axis are not limited to the three axes (such as the x-axis, the y-axis and the z-axis) of a rectangular coordinate system, and can be interpreted in a broader sense. For example, the D1 axis, the D2 axis and the D3 axis can be perpendicular to each other, or different directions that are not perpendicular to each other can be represented. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0040] Although the terms "first", "second", etc. can be used in this article to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, the first element discussed below can be referred to as the second element without departing from the teachings of the present disclosure.

[0041] Spatially relative terms such as "below," "beneath," "lower," "above," "upper," "above," "above," "side" (e.g., as in "sidewall"), etc. may be used herein for descriptive purposes, and thereby, to describe the relationship of one element to another element as illustrated in the accompanying drawings. Spatially relative terms are intended to include different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is flipped, an element described as being "below" or "beneath" other elements or features would subsequently be oriented "above" the other elements or features. Thus, the exemplary term "below" may include both above and below orientations. Furthermore, the device may be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and therefore, the spatially relative descriptors used herein are interpreted accordingly.

[0042] The terms used herein are for the purpose of describing specific embodiments, and are not intended to be limiting. As used herein, the singular "one" and "the" are intended to also include plural forms, unless the context clearly indicates otherwise. Moreover, when used in this specification, the terms "include" and / or "comprise" specify the existence of the features, integers, steps, operations, elements, parts and / or its groups, but do not exclude the existence or addition of one or more other features, integers, steps, operations, elements, parts and / or its groups. It should also be noted that, as used herein, the terms "substantially", "approximately" and other similar terms are used as approximate terms and not as terms of degree, and therefore, are utilized to consider the inherent deviations in the values ​​measured, calculated and / or provided that will be recognized by those of ordinary skill in the art.

[0043] According to the practice of the art, some exemplary embodiments are described and illustrated in the accompanying drawings according to functional blocks, units and / or modules. It will be understood by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits, such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc. that can be formed using semiconductor-based manufacturing technology or other manufacturing technology. In the case where the blocks, units and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and they can be selectively driven by firmware and / or software. It is also considered that each block, unit and / or module can be implemented by dedicated hardware, or as a combination of dedicated hardware that performs some functions and processors (e.g., one or more programmed microprocessors and associated circuits) that perform other functions. In addition, each block, unit and / or module of some exemplary embodiments can be physically separated into two or more interacting and discrete blocks, units and / or modules without departing from the scope of the present invention. Further, the blocks, units and / or modules of some exemplary embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the inventive concept.

[0044] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense, unless explicitly defined as such herein.

[0045] Figure 1 A display device 10 according to an exemplary embodiment of the present disclosure is illustrated. According to an exemplary embodiment, Figure 1The display device 10 including the touch sensor is disclosed, but the display device 10 according to the present disclosure is not limited thereto.

[0046] Reference Figure 1 , the display device 10 according to an exemplary embodiment of the present disclosure may include: a display unit 100 configured to display an image, a display driver 200 configured to drive the display unit 100, a sensor unit 300 configured to sense a touch input, and a sensor driver 400 configured to drive the sensor unit 300. The display unit 100 and the sensor unit 300 may form a panel unit of the display device 10, and the display driver 200 and the sensor driver 400 may form a driver unit of the display device 10. In an exemplary embodiment, the sensor unit 300 and the sensor driver 400 may form a touch sensor configured to detect a touch input input to the panel unit of the display device 10.

[0047] According to an exemplary embodiment, the display unit 100 and the sensor unit 300 may be manufactured to form a single unit, or may be combined using an adhesive layer, etc. after they are separately produced. In addition, the display driver 200 and the sensor driver 400 may be separated from each other, or at least a portion of the display driver 200 and at least a portion of the sensor driver 400 may be integrated together into a single integrated chip (driver IC).

[0048] The display unit 100 includes a display area DA and a non-display area NDA surrounding the display area DA. The display area DA is an area forming a screen of the display device 10, and the pixels PX are arranged in the display area DA. The non-display area NDA is a remaining area other than the display area DA, and may be, for example, an edge area surrounding the screen. In the non-display area NDA, a line coupled to the pixel PX and / or at least one driving circuit for driving the pixel PX may be arranged.

[0049] In an exemplary embodiment, the display unit 100 may be a display panel capable of self-luminescence or a non-emissive display panel. For example, the display unit 100 may be configured as a display panel capable of self-luminescence (in this case, each of the pixels PX includes one or more organic / inorganic light-emitting elements), or may be configured as a non-emissive display panel such as a liquid crystal display (LCD) panel. When the display unit 100 is a non-emissive display panel, the display device 10 may further include a light source unit (e.g., a backlight unit) for supplying light to the display unit 100.

[0050] The display driver 200 drives the pixel PX in response to the image data and timing signals input from the outside. For this purpose, the display driver 200 is electrically coupled to the display unit 100, so as to supply the display unit 100 with the necessary signals for driving the pixel PX. The display driver 200 may include: a scan driver and a data driver configured to supply respective scan signals and data signals to the pixel PX, and a drive controller (e.g., a timing controller) configured to control the scan driver and the data driver. According to an exemplary embodiment, the scan driver, the data driver and / or the drive controller may be integrated into a single display driver integrated chip (IC), but the configuration is not limited thereto. For example, in another exemplary embodiment, at least one (or at least some) of the scan driver, the data driver and the drive controller may be arranged in the non-display area NDA of the display unit 100.

[0051] The sensor unit 300 (or referred to as a "sensing unit") includes a sensing area SA and a non-sensing area NSA surrounding the sensing area SA. The sensing area SA is an area in which a touch input by a user can be sensed, and the sensor electrode SE can be arranged in the sensing area SA. The non-sensing area NSA is a remaining area other than the sensing area SA, and may be, for example, a peripheral area or an edge area near the sensing area SA. In the non-sensing area NSA, a line coupled to the sensor electrode SE may be arranged.

[0052] According to an exemplary embodiment, the sensor unit 300 may overlap the display unit 100. For example, the sensing area SA may be arranged to overlap the display area DA, and the sensor electrode SE may be arranged above and / or below the pixel PX so as to overlap the pixel PX.

[0053] In an exemplary embodiment, the sensor unit 300 may be a capacitive sensor unit. For example, the sensor unit 300 may be a mutual capacitive sensor unit including a first sensor electrode SE1 and a second sensor electrode SE2 extending so as to cross each other in the sensing area SA. According to an exemplary embodiment, one of the first sensor electrode SE1 and the second sensor electrode SE2 may be a driving electrode (referred to as a "Tx electrode") supplied with a driving signal during a predetermined touch sensing period, and the other may be a sensing electrode (referred to as an "Rx electrode") outputting a sensing signal corresponding to the driving signal.

[0054] However, in the present disclosure, the structure, type and / or driving method of the sensor unit 300 are not limited to a specific structure, type and / or driving method. For example, the sensor unit 300 may be configured as a self-capacitive sensor unit including point-type sensor electrodes individually distributed in the sensing area SA. In addition, the sensor unit 300 may include sensor electrodes having various structures, types and driving methods currently known. In addition, Figure 1 An exemplary embodiment in which the display device 10 includes a touch sensor is disclosed, but the present disclosure is not limited thereto. For example, the display device 10 may selectively include various types of sensors currently known.

[0055] The sensor driver 400 is electrically coupled to the sensor unit 300, thereby transmitting / receiving a signal necessary for driving the sensor unit 300. For example, the sensor driver 400 may supply a driving signal to the sensor unit 300 during a predetermined touch sensing period, and detect a touch input by receiving a sensing signal corresponding to the driving signal from the sensor unit 300.

[0056] The sensor driver 400 may include a sensor driving circuit and a sensing circuit. According to an exemplary embodiment, the sensor driving circuit and the sensing circuit may be integrated into a single sensor IC (e.g., a touch IC), but the configuration of the sensor driving circuit and the sensing circuit is not limited thereto. In addition, according to an exemplary embodiment, the sensor driver 400 may be integrated into a single driver IC together with the display driver 200, but its configuration is not limited thereto.

[0057] According to an exemplary embodiment, the sensor driving circuit is electrically coupled to the driving electrodes (e.g., the first sensor electrodes SE1) of the sensor unit 300, thereby sequentially supplying driving signals to the driving electrodes during a predetermined touch sensing period. According to an exemplary embodiment, the sensing circuit is electrically coupled to the sensing electrodes (e.g., the second sensor electrodes SE2) of the sensor unit 300, thereby detecting touch input using sensing signals output from the respective sensing electrodes.

[0058] In an exemplary embodiment, the sensor unit 300 may be driven in a blank period provided between source output periods. The source output period may be each effective period in which the display driver 200 outputs a data signal of each frame to the display unit 100. In addition, the blank period may be a period provided between effective periods, and may be, for example, a vertical blank period.

[0059] The above-described display device 10 includes a touch sensor, thereby providing user convenience. For example, the user can easily control the display device 10 by touching the screen while viewing an image displayed in the display area DA.

[0060] Figure 2 A display unit 100 and a display driver 200 according to an exemplary embodiment of the present disclosure are illustrated.

[0061] Reference Figure 2 , the display unit 100 includes scan lines S1 to Sn, data lines D1 to Dm, and pixels PX coupled to the scan lines S1 to Sn and the data lines D1 to Dm. In addition, depending on the structure and driving method of the pixel PX, at least one type of control line may be further arranged in the display unit 100. For example, the display unit 100 may further include an emission control line that is coupled to the pixel PX in units of horizontal lines by being arranged in parallel with the scan lines S1 to Sn.

[0062] When describing exemplary embodiments of the present disclosure, “coupled” may comprehensively mean “coupled or connected” in physical and / or electrical aspects. For example, the pixel PX may be electrically coupled to the scan lines S1 to Sn and the data lines D1 to Dm.

[0063] The scan lines S1 to Sn are coupled between the scan driver 210 and the pixels PX. The scan lines S1 to Sn transmit the scan signals output from the scan driver 210 to the pixels PX. The scan signals control the timing at which the data signals are input to the respective pixels PX. For example, in response to each scan signal, the pixels PX of any one horizontal line are selected, and the selected pixels PX may be supplied with the data signals from the data lines D1 to Dm.

[0064] The data lines D1 to Dm are coupled between the data driver 220 and the pixels PX. The data lines D1 to Dm transmit data signals output from the data driver 220 to the pixels PX. Depending on the data signals, whether each of the pixels PX emits light and the brightness of the light may be controlled.

[0065] The pixel PX is supplied with scan signals and data signals from scan lines S1 to Sn and from data lines D1 to Dm, respectively. In addition, the pixel PX is supplied with pixel power from a power supply unit (not shown). For example, when the display unit 100 is a light-emitting display panel, the pixel PX may be supplied with power from a first pixel power supply ELVDD and a second pixel power supply ELVSS having different potentials. For example, the first pixel power supply ELVDD and the second pixel power supply ELVSS may have different potentials, so that the difference in the different potentials enables the light-emitting element of each of the pixels PX to emit light during the emission period of each of the pixels PX.

[0066] Each of the pixels PX emits light having brightness corresponding to the data signal during its emission period. Meanwhile, when a data signal corresponding to a black grayscale is supplied to each of the pixels PX, each of the pixels PX may maintain a non-emission state during the emission period of the corresponding frame.

[0067] In an exemplary embodiment, the pixels PX may be self-emitting pixels including their own light emitting elements, but the pixels PX are not limited thereto. That is, according to exemplary embodiments, the type, structure and / or driving method of the pixels PX may be variously changed.

[0068] The display driver 200 drives the pixel PX in response to the input image data RGB and the timing signal. The display driver 200 may include a scan driver 210, a data driver 220, a gamma voltage generator 230, a switching unit 240, and a driving controller 250 configured to control the scan driver 210, the data driver 220, the gamma voltage generator 230, and the switching unit 240. In an exemplary embodiment, the scan driver 210, the data driver 220, the gamma voltage generator 230, the switching unit 240, and / or the driving controller 250 may be integrated into a single driver IC, but the configuration thereof is not limited thereto.

[0069] The scan driver 210 is supplied with a scan control signal SCS from the drive controller 250, and supplies each scan signal to the scan lines S1 to Sn in response to the scan control signal SCS. For example, the scan driver 210 may be supplied with a scan control signal SCS including a gate start pulse (e.g., a sampling pulse input to the first scan stage) and a gate clock signal, and in response thereto, sequentially outputs a scan signal having a gate-on voltage to the scan lines S1 to Sn. When the pixel PX is selected by each scan signal in units of horizontal lines, the selected pixel PX is supplied with a data signal of a corresponding frame from the data lines D1 to Dm. According to an exemplary embodiment, the scan driver 210 may be formed inside a driver IC or the like, or may be formed or mounted on a display panel together with the pixel PX.

[0070] The data driver 220 may be supplied with image data DATA and a data control signal DCS from the driving controller 250, and may be supplied with a gamma voltage VGMA for each gray level from the gamma voltage generator 230. The data driver 220 generates each data signal using the image data DATA, the data control signal DCS, and the gamma voltage VGMA, and supplies each data signal to the data lines D1 to Dm. For example, the data driver 220 may be supplied with the image data DATA, the gamma voltage VGMA, and the data control signal DCS, the data control signal DCS including a source start pulse SSP, a source sampling clock SSC, a source output enable signal SOE, etc. For each horizontal period, the data driver 220 may output each data signal corresponding to the pixel PX selected for the corresponding horizontal period to the data lines D1 to Dm. According to an exemplary embodiment, the data driver 220 may be formed inside a driver IC or the like, or may be formed or mounted on a display panel together with the pixel PX.

[0071] The gamma voltage generator 230 is supplied with a reference gamma voltage VGMA_REF for a predetermined reference gray level from the driving controller 250, and generates a gamma voltage VGMA for each gray level for converting the image data DATA in a digital form into a data signal (e.g., data voltage) in an analog form using the reference gamma voltage VGMA_REF. For example, when the display device represents gray levels from 0 to 255, the gamma voltage generator 230 may generate a gray level voltage corresponding to a predetermined gamma value (e.g., 2.2 gamma) based on the reference gamma voltage VGMA_REF, and then supply the gray level voltage to the data driver 220.

[0072] The switch unit 240 is supplied with a switch control signal CONT (referred to as a “chopping control signal”) from the driving controller 250, and supplies power from the first driving power source VCC and the second driving power source VEE to the data driver 220 in response to the switch control signal CONT. The first driving power source VCC and the second driving power source VEE may supply operating power of an amplifier forming each output buffer of the data driver 220. In an exemplary embodiment, the switch unit 240 may alternately supply the first driving power and the second driving power to the first power source terminal and the second power source terminal of the amplifier arranged at each output terminal of the data driver 220 through power switching (referred to as “power chopping”, “source chopping”, or “source amplifier chopping”).

[0073] The driving controller 250 is supplied with input image data RGB and timing signals from the outside (e.g., a host processor), and controls the operations of the scan driver 210, the data driver 220, and the switch unit 240 in response to the input image data RGB and the timing signals. For example, the driving controller 250 may be supplied with timing signals including a vertical synchronization signal VSYNC, a horizontal synchronization signal HSYNC, a main clock signal MCLK, etc., and generates a scan control signal SCS, a data control signal DCS, and a switch control signal CONT in response thereto. The scan control signal SCS, the data control signal DCS, and the switch control signal CONT are supplied to the scan driver 210, the data driver 220, and the switch unit 240, respectively.

[0074] In addition, the driving controller 250 may rearrange the input image data RGB depending on the specification and / or driving mode of the display unit 100 and output the rearranged image data DATA to the data driver 220. The image data DATA supplied to the data driver 220 is used to generate a data signal.

[0075] In addition, the driving controller 250 may supply a reference gamma voltage VGMA_REF stored depending on the gamma configuration to the gamma voltage generator 230. For example, the driving controller 250 may supply the reference gamma voltage VGMA_REF stored in the internal memory to the gamma voltage generator 230 through a multi-time programming (MTP) process, etc. The reference gamma voltage VGMA_REF may be used to generate the gamma voltage VGMA for each gray level. According to an exemplary embodiment, the driving controller 250 may be configured as a timing controller or an integrated controller including the timing controller.

[0076] In an exemplary embodiment of the present disclosure, the driving controller 250 controls power switching performed by the switching unit 240. To this end, the driving controller 250 may include a switching controller 260.

[0077] For example, the driving controller 250 (e.g., the switch controller 260 in the driving controller 250) may detect each blank period using the timing signal, and output a switch control signal CONT for interrupting the power switching operation of the switch unit 240 (e.g., turning off the switch) during the blank period. For example, the driving controller 250 may output a switch control signal CONT (e.g., a switch control signal CONT having an "off" level) for interrupting the power switching operation of the switch unit 240 in response to each blank period. According to an exemplary embodiment, the blank period may be a vertical blank period provided between source output periods in which the data signal of each frame is output.

[0078] At the same time, the driving controller 250 may output a switch control signal CONT (e.g., a switch control signal CONT having an “on” level) for enabling a power switching operation of the switch unit 240 in a source output period in which a valid data signal is output from the data driver 220. That is, in an exemplary embodiment of the present disclosure, a power switching operation of the switch unit 240 is performed in a source output period in which a valid data signal is output, but may be temporarily interrupted in each blank period inserted between source output periods.

[0079] According to the display device (eg, Figure 1 The display device 10) can alternately supply power from the first driving power source VCC and the second driving power source VEE to the first power source terminal and the second power source terminal of the amplifier arranged at each output terminal of the data driver 220 by repeated power switching. For example, in a period (for example, a source output period of each frame) in which the power switching operation is enabled by the switch control signal CONT, the first driving power source VCC and the second driving power source VEE can supply power to the first power source terminal and the second power source terminal of the amplifier respectively during the first period, and then the second driving power source VEE and the first driving power source VCC can supply power to the first power source terminal and the second power source terminal of the amplifier respectively during the second period after the first period. The above process can be repeated at each predetermined period while the power switching operation is enabled. When the power switching method is applied, the offset of the amplifier is offset, thereby preventing or reducing the voltage deviation of the data signal output from the data driver 220. In addition, with the application of the power switching method, the degradation of the amplifier can be prevented or reduced.

[0080] Furthermore, in an exemplary embodiment of the present disclosure, the switch control signal CONT may be generated so as to enable a power switching operation by driving the switch unit 240 in a period in which the data driver 220 outputs a valid data signal (that is, in a source output period), and so as to temporarily interrupt the operation of the switch unit 240 in a period other than the source output period (that is, in each blank period inserted between the source output periods). According to this embodiment of the present disclosure, the switching period of the operating power supplied to the output buffer unit of the data driver 220 may be effectively controlled using the switch control signal CONT. For example, in a state in which the power switching operation is temporarily interrupted during at least one blank period using the switch control signal CONT, the sensor unit (e.g., Figure 1 In this case, the voltage change of the sensor electrode SE caused by the power switching is prevented or reduced, thereby effectively reducing the noise of the sensor unit 300.

[0081] Figure 3 The data driver 220 according to an exemplary embodiment of the present disclosure is illustrated.

[0082] Reference Figure 3 , the data driver 220 according to an exemplary embodiment of the present disclosure may include a shift register unit 221, a sampling latch unit 222, a holding latch unit 223, a data signal generating unit 224, and an output buffer unit 225. Here, the shift register unit 221, the sampling latch unit 222, and the holding latch unit 223 may form an input unit of the data driver 220, and the output buffer unit 225 may form an output unit of the data driver 220.

[0083] The shift register unit 221 may be supplied with a source start pulse SSP and a source sampling clock SSC from the driving controller 250. The shift register unit 221 may sequentially generate sampling pulses by shifting the source start pulse SSP for each period of the source sampling clock SSC. For this purpose, the shift register unit 221 may include a plurality of shift registers arranged in respective channels. For example, the shift register unit 221 may include m shift registers corresponding to the data lines D1 to Dm, respectively.

[0084] The sampling latch unit 222 may sequentially store the image data DATA supplied from the driving controller 250 in response to the sampling pulses sequentially supplied from the shift register unit 221. To this end, the sampling latch unit 222 may include a plurality of sampling latches arranged in respective channels. For example, the sampling latch unit 222 may include m sampling latches corresponding to the data lines D1 to Dm, respectively.

[0085] The holding latch unit 223 may be supplied with a source output enable signal SOE from the driving controller 250. The holding latch unit 223 may be supplied with image data DATA from the sampling latch unit 222, and stores the image data DATA when the source output enable signal SOE is input. For example, the holding latch unit 223 may be simultaneously supplied with image data DATA (e.g., line data) for one horizontal line from the sampling latch unit 222 in response to the source output enable signal SOE. In addition, when the source output enable signal SOE is input, the holding latch unit 223 may supply the image data DATA stored therein to the data signal generating unit 224. For this purpose, the holding latch unit 223 may include a plurality of holding latches arranged in respective channels. For example, the holding latch unit 223 may include m holding latches corresponding to the data lines D1 to Dm, respectively.

[0086] At the same time, Figure 3, the input unit of the data driver 220 is configured with a shift register unit 221, a sampling latch unit 222, and a holding latch unit 223, but the present disclosure is not limited thereto. For example, various components currently known may be additionally included in the input unit.

[0087] The data signal generating unit 224 may generate a data signal (or referred to as a "data voltage") in an analog form using the image data DATA in a digital form supplied from the input unit. To this end, the data signal generating unit 224 may include a plurality of digital-to-analog converters arranged in respective channels. Each of the digital-to-analog converters may select any one of the gamma voltages VGMA in response to the image data DATA supplied from the input unit, and supply the selected gamma voltage VGMA to each channel in the output buffer unit 225 as a data signal. For example, for each horizontal period, the first digital-to-analog converter in the first channel of the data signal generating unit 224 may generate a data signal corresponding to the image data DATA of the first pixel PX of the corresponding horizontal line, and supply the data signal to the first output buffer in the first channel of the output buffer unit 225. Hereinafter, the data signal output from the data signal generating unit 224 is referred to as a "data voltage" in order to be distinguished from the data signals DS1 to DSm that are finally output to the data lines D1 to Dm via the output buffer unit 225.

[0088] The output buffer unit 225 amplifies the data voltage supplied from the data signal generating unit 224 and supplies it to each of the data lines D1 to Dm. For this purpose, the output buffer unit 225 may include a plurality of output buffers arranged in each channel of the data driver 220. For example, the output buffer unit 225 may include a plurality of output buffers arranged in each output channel so as to be coupled to each of the data lines D1 to Dm. Each of the output buffers may include an amplifier. That is, the data driver 220 may include a plurality of amplifiers arranged at the output terminal of the data driver 220 so as to be coupled to each of the data lines D1 to Dm.

[0089] The amplifier can amplify the data voltage supplied from each digital-to-analog converter and output the amplified data voltage to the data lines D1 to Dm as data signals DS1 to DSm. That is, each of the amplifiers can be driven by receiving the data voltage supplied from each of the digital-to-analog converters as an input signal. In addition, the amplifier can be driven using power supplied from the first driving power source VCC and the second driving power source VEE and transmitted via the switch unit 240 as operating power.

[0090] Figure 4 The diagram is included in Figure 3According to an exemplary embodiment, the output buffer 225k in the output buffer unit 225 and the switch unit 240 coupled to the output buffer 225k. Figure 4 The output buffer 225k arranged in the kth channel (k is a natural number) among the multiple output buffers arranged at the output terminal of the data driver 220 is illustrated, and the multiple output buffers arranged at the output terminal of the data driver 220 may have a similar structure or the same structure.

[0091] Reference Figure 4 , each output buffer 225k is supplied with a data voltage Vdata from a corresponding one of the digital-to-analog converters, amplifies the data voltage Vdata, and outputs the amplified data voltage Vdata to each data line Dk as a data signal DSk. For this purpose, the output buffer 225k may include an amplifier (referred to as a "source amplifier") AMP. The amplifier AMP may include a first input terminal IN1, a second input terminal IN2, a first power supply terminal P_IN1, a second power supply terminal P_IN2, and an output terminal OUT.

[0092] According to an exemplary embodiment, the first input terminal IN1 of the amplifier AMP may be supplied with a data voltage Vdata from a digital-to-analog converter of a corresponding channel by being coupled to the digital-to-analog converter of the corresponding channel, and the second input terminal IN2 of the amplifier AMP may receive an output voltage (that is, a data signal DSk) fed back to the second input terminal IN2 of the amplifier AMP by being coupled to the output terminal OUT. In an exemplary embodiment, the first input terminal IN1 and the second input terminal IN2 may be an inverting input terminal and a non-inverting input terminal of the amplifier AMP, respectively, but the configuration of the first input terminal IN1 and the second input terminal IN2 is not limited thereto.

[0093] According to an exemplary embodiment, the first power terminal P_IN1 of the amplifier AMP is coupled to the first switch SW1 of the switch unit 240, so that the power from the first driving power VCC and the second driving power VEE is alternately supplied through the first switch SW1. Similarly, the second power terminal P_IN2 of the amplifier AMP is coupled to the second switch SW2 of the switch unit 240, so that the power from the first driving power VCC and the second driving power VEE is alternately supplied through the second switch SW2.

[0094] According to an exemplary embodiment, the first power terminal P_IN1 and the second power terminal P_IN2 may be supplied with power from the first driving power supply VCC and the second driving power supply VEE in different orders. For example, while the first power terminal P_IN1 is supplied with power from the first driving power supply VCC, the second power terminal P_IN2 may be supplied with power from the second driving power supply VEE, and while the first power terminal P_IN1 is supplied with power from the second driving power supply VEE, the second power terminal P_IN2 may be supplied with power from the first driving power supply VCC.

[0095] The output terminal OUT of the amplifier AMP is coupled to the data line Dk. Therefore, the data voltage Vdata amplified by the amplifier AMP may be output to each data line Dk as a data signal DSk.

[0096] The switch unit 240 alternately couples the first power terminal P_IN1 and the second power terminal P_IN2 of the amplifier AMP to the first driving power VCC and the second driving power VEE in response to the switch control signal CONT supplied from the driving controller 250. To this end, the switch unit 240 may include a first switch SW1 coupled to the first power terminal P_IN1 and a second switch SW2 coupled to the second power terminal P_IN2.

[0097] The first switch SW1 alternately couples the first power terminal P_IN1 of the amplifier AMP to the first driving power VCC and the second driving power VEE in response to the switch control signal CONT during the source output period. For example, the first switch SW1 may repeatedly perform a power switching operation every predetermined period in response to the switch control signal CONT during each source output period, through which the first power terminal P_IN1 of the amplifier AMP is alternately coupled to the first driving power VCC and the second driving power VEE.

[0098] The second switch SW2 alternately couples the second power supply terminal P_IN2 of the amplifier AMP to the first driving power supply VCC and the second driving power supply VEE in the opposite order to the first switch SW1 in response to the switch control signal CONT during the source output period. For example, the second switch SW2 may repeatedly perform a power switching operation every predetermined period in response to the switch control signal CONT during each source output period, through which the second power supply terminal P_IN2 of the amplifier AMP is alternately coupled to the first driving power supply VCC and the second driving power supply VEE.

[0099] In an exemplary embodiment, the switch unit 240 can couple the first power supply terminals P_IN1 of at least some of the amplifiers AMP arranged in the respective channels of the output buffer unit 225 to one of the first driving power supply VCC and the second driving power supply VEE at every predetermined period, and couple the second power supply terminals P_IN2 of at least some of the amplifiers AMP to the other of the first driving power supply VCC and the second driving power supply VEE.

[0100] For example, in an exemplary embodiment, the switch unit 240 can couple the first power terminal P_IN1 of the amplifier AMP in each channel of the output buffer unit 225 to one of the first driving power supply VCC and the second driving power supply VEE at every predetermined period, and couple the second power terminal P_IN2 of the amplifier AMP to the other of the first driving power supply VCC and the second driving power supply VEE.

[0101] Alternatively, in another exemplary embodiment, the switch unit 240 may couple the first power terminals P_IN1 of some of the amplifiers AMPs (e.g., the amplifiers AMPs of the odd-numbered channels) in the channels of the output buffer unit 225 to one of the first driving power supply VCC and the second driving power supply VEE at every predetermined period, and couple the second power terminals P_IN2 of the amplifiers AMPs of the odd-numbered channels to the other of the first driving power supply VCC and the second driving power supply VEE. In addition, the switch unit 240 may alternately couple the first power terminals P_IN1 and the second power terminals P_IN2 of the remaining amplifiers AMPs (e.g., the amplifiers AMPs of the even-numbered channels) of the channels of the output buffer unit 225 to the first driving power supply VCC and the second driving power supply VEE, respectively, in an order opposite to the order in which the first power terminals P_IN1 and the second power terminals P_IN2 of the amplifiers AMPs of the odd-numbered channels are coupled.

[0102] Meanwhile, during each blank period, the power switching operation of the first switch SW1 and the second switch SW2 may be interrupted. For example, each of the first switch SW1 and the second switch SW2 may interrupt the power switching operation during each blank period in response to the switch control signal CONT, and maintain a state in which the first switch SW1 and the second switch SW2 are coupled to different power supplies among the first driving power supply VCC and the second driving power supply VEE. Alternatively, each of the first switch SW1 and the second switch SW2 may maintain an off state during the blank period in response to the switch control signal CONT.

[0103] That is, according to an exemplary embodiment of the present disclosure, the switch unit 240 may perform a power switching operation according to a source output period and temporarily interrupt the power switching operation according to a blank period in response to the switch control signal CONT. The switch control signal CONT is a control signal for controlling the power switching operation of the switch unit 240, and may be, for example, a switch enable signal (referred to as a "chopping enable signal") configured to enable the operation of the first switch SW1 and the second switch SW2 according to the source output period and disable the operation of the first switch SW1 and the second switch SW2 according to the blank period.

[0104] Figure 5 A power switching method according to an exemplary embodiment of the present disclosure is schematically illustrated.

[0105] Reference Figure 2 , Figure 3 , Figure 4 and Figure 5 When the sleep exit instruction SLEEP OUT is sent from the host processor or the like to the drive controller 250, a switch control signal CONT for enabling a power switching operation (hereinafter, referred to as "source chopping") of the switch unit 240 is output from the drive controller 250 after a predetermined standby time has passed. The switch control signal CONT is sent to the switch unit 240.

[0106] For example, when the sleep exit instruction SLEEP OUT is input, the driving controller 250 may supply the switch control signal CONT having an "on" level to the switch unit 240, which enables source chopping after a preparation time (e.g., after a period corresponding to approximately two frames) for driving the data driver 220. Thus, source chopping by the switch unit 240 starts.

[0107] According to an exemplary embodiment, source chopping may be performed at a predetermined period, and the period may be continuously changed. For example, source chopping may be performed by alternately coupling each of the first switch SW1 and the second switch SW2 to the first driving power source VCC and the second driving power source VEE based on a frame period, a row period, or a column period, and the period during which source chopping is performed may be changed at a predetermined period. As described above, when source chopping is performed by complexly applying a frame period, a row period, and / or a column period, a phenomenon in which a specific pattern is visible in the display area DA may be prevented or reduced.

[0108] Meanwhile, when the sleep entry instruction SLEEP IN is transmitted from the host processor or the like to the drive controller 250, a switch control signal CONT (e.g., a switch control signal having an "off" level) for disabling source chopping is output from the drive controller 250 after a predetermined standby time (e.g., a period corresponding to approximately two frames) has elapsed. The switch control signal CONT is transmitted to the switch unit 240. Thus, the source chopping performed by the switch unit 240 is interrupted.

[0109] Figure 6 A switch controller 260 according to an exemplary embodiment of the present disclosure is illustrated.

[0110] Reference Figure 6 , the switch controller 260 according to an exemplary embodiment of the present disclosure is included in the driving controller 250, thereby generating a switch control signal CONT using a timing signal input to the driving controller 250. According to an exemplary embodiment, the switch controller 260 may include a counter 261, a storage unit 262 (or storage), and a control signal generator 263.

[0111] The counter 261 counts the timing signals input to the driving controller 250, thereby detecting each blank period. For example, the counter 261 may count the vertical synchronization signal VSYNC, the horizontal synchronization signal HSYNC and / or the main clock signal MCLK, and calculate each blank period depending on the counting result.

[0112] The storage unit 262 may store options (hereinafter, referred to as “source chopping options”) for the power switching operation of the switch unit 240. In an exemplary embodiment, the source chopping options may include a display device (eg, Figure 1 The storage unit 262 may store at least one of a driving mode (e.g., a normal mode, a low frequency mode, or a high frequency mode) of the display device 10, information on whether the source chopping operation is enabled, and a period during which the source chopping operation is performed. For example, the storage unit 262 may store a value set for at least one of the driving mode of the display device 10, information on whether the source chopping operation is enabled, and a period during which the source chopping operation is performed.

[0113] In addition, the source chopping option may further include at least one of information about whether the power switching operation is enabled in the blank period and information about the time segment in which the source chopping operation is interrupted, the time segment corresponding to the blank period. For example, the storage unit 262 may store a value set for the information about whether the power switching operation is enabled in the blank period, and a value set for the start and end of the time segment in which the source chopping operation is required to be actually interrupted in response to each blank period. That is, according to an exemplary embodiment, the start and end of the time segment in which the source chopping is interrupted in response to each blank period are additionally set, thereby making it possible to more freely control the time segment in which the source chopping is actually interrupted in response to the blank period.

[0114] The control signal generator 263 generates the switch control signal CONT based on the blank period detected by the counter 261 and based on the source chopping option extracted from the storage unit 262. For example, when an instruction to enable energy source chopping is input from a host processor or the like, the control signal generator 263 may generate the switch control signal CONT that enables energy source chopping in respective source output periods but temporarily interrupts source chopping in respective blank periods, each of which is inserted between source output periods.

[0115] In addition, based on information input from the host processor, etc., the control signal generator 263 can detect the driving mode of the display device 10 and / or the period in which the source chopping is performed, and generate a switch control signal CONT corresponding thereto. For example, the control signal generator 263 can extract a source chopping option corresponding to an instruction input from the host processor from the storage unit 262, and generate the switch control signal CONT depending on the extracted source chopping option.

[0116] Figure 7 and Figure 8 The diagram is stored in Figure 6 An example of a source chopping option in storage unit 262. For example, Figure 7 and Figure 8 Various options applicable to the source chopping performed by the switch unit 240 are illustrated.

[0117] First, refer to Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7The storage unit 262 may store information about the driving mode of the display device 10, whether the source chopping operation is enabled, and the period during which the source chopping operation is performed. For example, the storage unit 262 may store values ​​set for the source amplifier chopping timing control registers in the normal mode, in the low frequency mode, and in the high frequency mode (CHOP_CON_NOM, CHOP_CON_LFM, and CHOP_CON_HFM), a value set for the source amplifier chopping on / off signal (CHOP_EN), a value set for the source amplifier column chopping control signal (COLUM_CHOP), a value set for the source amplifier frame chopping control signal (FRAME_CHOP), and a value set for the source amplifier line chopping control signal (LINE_CHOP).

[0118] Reference Figure 8 The storage unit 262 may further store information about whether the power switching operation is enabled in the blank period (or the blank section corresponding thereto). For example, the storage unit 262 may further store a value (CHOP_BLK_EN) set for the source amplifier chopping on / off signal in the blank section.

[0119] In addition, in order to more freely control the time when the source chopping is interrupted in response to each blank period, the storage unit 262 may further store information about the time segment in which the source chopping operation is interrupted, which corresponds to the blank period. For example, the storage unit 262 may further store values ​​(CHOP_BLK_OFF_ST and CHOP_BLK_OFF_END) for setting the starting point of the interruption of the source chopping in each blank segment (or the segments before and after the blank segment) (that is, the starting point of the source chopping shutdown) and the end point of the interruption of the source chopping. In an exemplary embodiment, the time point immediately before entering each blank segment can be set as the starting point of the interruption of the source chopping, and the time point immediately before the end of each blank segment can be set as the end point of the interruption of the source chopping, but the starting point and end point of the interruption of the source chopping are not limited to this example. That is, the starting point and end point of the interruption of the source chopping can be changed differently according to an exemplary embodiment.

[0120] As in Figure 8 In an exemplary embodiment of , when options related to interruption of source chopping in a blank section are additionally stored, source chopping can be temporarily interrupted during each blank period. For example, even during a period in which source chopping is actually enabled, source chopping can be temporarily interrupted during each blank period.

[0121] According to the above-described embodiment, in the period in which the respective data signals DS1 to DSm are output from the data driver 220, the voltage deviation of the data signals DS1 to DSm is reduced by the source chopping, but the source chopping may be selectively interrupted in each blank period in which the source chopping is not necessary. When the sensor unit 300 is driven in this blank period, the noise (e.g., touch noise) of the sensor unit 300 generated by the source chopping may be prevented or reduced.

[0122] Fig. 9 The first switch control signal CONT1 and the second switch control signal CONT2 according to different exemplary embodiments of the present disclosure are illustrated. For example, the first switch control signal CONT1 may be a switch control signal generated in an exemplary embodiment in which source chopping is maintained during a period in which the display driver 200 is driven by applying the source chopping method. In addition, the second switch control signal CONT2 may be a switch control signal generated in an exemplary embodiment in which the display driver 200 is driven by applying the source chopping method but the source chopping is interrupted in each blank period. Fig. 9 In the , SOURCECHOPPING_ON and SOURCE CHOPPING_OFF indicate maintaining the source chopping operation and interrupting the source chopping operation, respectively.

[0123] Reference Fig. 9 , each blank period VBLANK includes a period in which each vertical synchronization signal VSYNC is supplied, and may further include a predetermined period set before and after the vertical synchronization signal VSYNC is supplied. For example, each blank period VBLANK may include a leading edge period PFP and a trailing edge period PBP that are sequentially set between source output periods in which the data signal DS of each frame is output. According to an exemplary embodiment, the leading edge period PFP may be set immediately after the source output period of each frame, and the trailing edge period PBP may be set immediately before the source output period of the next frame. Each vertical synchronization signal VSYNC may be supplied in each trailing edge period PBP.

[0124] According to an exemplary embodiment, the data driver 220 may output a predetermined leading voltage VFP during the leading period PFP and a predetermined trailing voltage VBP during the trailing period PBP. The predetermined leading voltage VFP and the predetermined trailing voltage VBP may be black grayscale voltages, but are not limited thereto.

[0125] In an exemplary embodiment, a first switch control signal CONT1 may be generated by which source chopping is always maintained during a period in which the display driver 200 is driven by applying the source chopping method. In addition, using the first switch control signal CONT1, source chopping performed by the switch unit 240 may be controlled so as to be always performed during a period in which the display driver 200 is enabled.

[0126] In another exemplary embodiment, a second switch control signal CONT2 may be generated, by which the display driver 200 is driven by applying a source chopping method but the source chopping is interrupted in each blank period VBLANK (e.g., the source chopping operation is temporarily interrupted). In addition, using the second switch control signal CONT2, the source chopping performed by the switch unit 240 may be controlled so as to be performed only in the source output period but interrupted in each blank period VBLANK in the period in which the display driver 200 is enabled.

[0127] That is, in an exemplary embodiment of the present disclosure, source chopping by the switching unit 240 may be easily controlled using a switching control signal CONT such as a first switching control signal CONT1 , a second switching control signal CONT2 , and the like.

[0128] According to reference Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 and Fig. 9 The method of driving the display device 10 of the described exemplary embodiment may include generating a switch control signal CONT in response to a timing signal, and outputting a data signal DS of each frame while alternately coupling a first power terminal P_IN1 and a second power terminal P_IN2 of each amplifier AMP arranged at an output terminal of the data driver 200 (e.g., the output buffer unit 225) to a first driving power supply VCC and a second driving power supply VEE in response to the switch control signal CONT. According to an exemplary embodiment, during a source output period in which the data signal DS of each frame is output, a source chopping operation may be repeatedly performed, by which the first power terminal P_IN1 and the second power terminal P_IN2 of the amplifier AMP are alternately coupled to the first driving power supply VCC and the second driving power supply VEE. In addition, according to an exemplary embodiment, the source chopping operation may be selectively interrupted during each blank period provided between the source output periods.

[0129] Fig.10The output voltages VOUT1, VOUT2 and VOUT3 of the data driver 200 according to source chopping are shown. For example, Fig.10 The diagram shows measurement results of the output voltages of the data driver 220 (hereinafter, referred to as “first output voltage VOUT1” and “second output voltage VOUT2”) when source chopping is performed at intervals of the first horizontal period 1H and the second horizontal period 2H, respectively, and measurement results of the output voltage of the data driver 220 (hereinafter, referred to as “third output voltage VOUT3”) when source chopping is interrupted. Fig.10 , CHOP_1H, CHOP_2H, and CHOP_OFF ​​respectively indicate that source chopping is performed at intervals of the first horizontal period 1H, source chopping is performed at intervals of the second horizontal period 2H, and source chopping is interrupted.

[0130] Reference Fig.10 , the noise form of the output voltages VOUT1, VOUT2 and VOUT3 of the data driver 220 varies depending on whether the source chopping is performed and the period in which the source chopping is performed. For example, when the source chopping is performed at intervals of the first horizontal period 1H, the noise in the first output voltage VOUT1 appears in each first horizontal period 1H. When the source chopping is performed at intervals of the second horizontal period 2H, the noise in the second output voltage VOUT2 appears in each second horizontal period 2H. However, when the source chopping is interrupted, in fact, no noise is generated in the third output voltage VOUT3. That is, the source chopping can cause the output voltages VOUT1, VOUT2 and VOUT3 of the data driver 220 to change.

[0131] In this case, the voltages of the data lines D1 to Dm vary, thereby generating noise caused by source chopping. Figure 1 As illustrated in , in the display device 10 including the sensor unit 300 overlapping the display unit 100 , noise in the output voltages VOUT1 , VOUT2 , and VOUT3 of the data driver 220 may flow in the sensor unit 300 .

[0132] However, as described in the above embodiment, when the source chopping is temporarily interrupted during each blank period VBLANK and the sensor unit 300 is driven during the blank period VBLANK, the voltage variation of the sensor electrode SE caused by the source chopping can be prevented. Therefore, the noise of the sensor unit 300 can be effectively reduced or prevented.

[0133] That is, according to an exemplary embodiment of the present disclosure, the offset of the amplifier AMP is offset by the source chopping, thereby reducing the voltage deviation of the data signal DS and effectively adjusting the source chopping period using the switch control signal CONT. For example, the source chopping is interrupted during each blank period, and the sensor unit 300 is driven during the blank period, thereby effectively reducing the noise of the sensor unit 300.

[0134] The display device and the method for driving the display device according to the exemplary embodiment of the present disclosure enable the offset of the amplifier to be offset by power switching, thereby reducing the voltage deviation of the data signal. In addition, the power switching period is controlled using a switch control signal so that the power switching operation is interrupted during each blank period, thereby reducing the noise of the sensor unit.

[0135] Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will become apparent from this description. Therefore, the inventive concept is not limited to these embodiments, but to the broader scope of the appended claims and various obvious modifications and equivalent arrangements as will be apparent to those of ordinary skill in the art.

Claims

1. A display device, comprising: a display unit including pixels coupled to scan lines and data lines; a scan driver configured to supply respective scan signals to the scan lines; a data driver configured to supply respective data signals to the data lines, the data driver comprising an amplifier arranged at an output terminal of the data driver, the amplifier comprising a first power supply terminal and a second power supply terminal; a switching unit configured to perform a power switching operation of alternately connecting the first power terminal and the second power terminal of the amplifier to a first driving power source and a second driving power source; as well as a driving controller configured to control the scan driver, the data driver, and the switching unit in response to input image data and a timing signal, Wherein, the driving controller is configured to output a switch control signal to control the switch unit, wherein the switch unit is configured to interrupt the power switching operation in response to receiving the switch control signal during a blank period, the blank period being set between source output periods, wherein the data driver is configured to output the data signal of each frame during the source output period, and Wherein, the switching unit is configured to alternately connect the first power supply terminal of the amplifier to the first driving power supply and the second driving power supply during the source output period, and to alternately connect the second power supply terminal of the amplifier to the first driving power supply and the second driving power supply in an order opposite to that of the first power supply terminal of the amplifier during the source output period.

2. The display device according to claim 1, wherein: The driving controller is configured to control the switching unit to perform the power switching operation during the source output period.

3. The display device according to claim 2, wherein: The switch unit comprises: a first switch configured to alternately connect the first power terminal of the amplifier to the first driving power supply and the second driving power supply in response to the switch control signal during the source output period; and a second switch configured to alternately connect the second power supply terminal of the amplifier to the first driving power supply and the second driving power supply in the reverse order of the first switch in response to the switch control signal during the source output period.

4. The display device according to claim 3, wherein: The first switch and the second switch are configured to repeatedly perform the power switching operation every predetermined period during the source output period in response to the switch control signal.

5. The display device according to claim 3, wherein: The first switch and the second switch are configured to interrupt the power switching operation or maintain an off state during the blank period in response to the switch control signal.

6. The display device according to claim 2, wherein: The driving controller includes a switch controller configured to generate the switch control signal using the timing signal.

7. The display device according to claim 6, wherein: The switch controller comprises: a counter configured to detect the blank period by counting the timing signal; a storage unit configured to store options for the power switching operation of the switch unit; and A control signal generator is configured to generate the switch control signal based on the blank period detected by the counter and the option for the power switching operation extracted from the storage unit.

8. The display device according to claim 7, wherein: The options for the power switching operation include at least one of a driving mode of the display device, a power switching operation mode, and a period of the power switching operation.

9. The display device according to claim 8, wherein: The options for the power switching operation further include at least one of a power switching operation mode during the blank period and information about a section in which the power switching operation of the blank period is interrupted.

10. The display device according to claim 1, further comprising a sensor unit overlapping the display unit, in, The driving controller is configured to drive the sensor unit during the blank period.

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