Display device

Abstract

A display device includes a window; a display panel disposed below the window and including a display area and a peripheral area outside the display area; and an assembly disposed below the display panel and at least partially overlapping the peripheral area, wherein a black matrix is disposed on a bottom surface of the window corresponding to an area of the window outside an area where the assembly is placed in the peripheral area.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2019-0062052, filed on May 27, 2019, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments relate to display devices, and more particularly, to display devices in which high-quality images can be realized. Background Technology

[0004] Recently, the uses of display devices (e.g., features) have diversified. Furthermore, the range of applications for display devices has expanded as they have become thinner and lighter.

[0005] As the area occupied by the display area of ​​a display device increases, the number of various functions related to or associated with the display device also increases. As a method for increasing various functions while expanding the display area, a display device in which various components (e.g., modules or accessories) can be arranged within the display area is investigated. Summary of the Invention

[0006] Various aspects of one or more embodiments of this disclosure relate to a display panel having areas capable of arranging various types of components (e.g., areas capable of accommodating various modules or accessories) and a display device including the display panel. However, these aspects are exemplary and do not limit the scope of this disclosure.

[0007] Other aspects will be set forth in part in the description which follows, and in part will be obvious from the description or may be learned by practice of the embodiments of this disclosure presented.

[0008] According to one or more embodiments, a display device includes a window; a display panel below the window and including a display area and an outer peripheral area outside the display area; and a component (e.g., a module or accessory) below the display panel and at least partially overlapping the outer peripheral area; wherein a black matrix is ​​on the bottom surface of the window of the area outside the area where the component is placed in the outer peripheral area.

[0009] In one embodiment, the display panel may include a substrate; an insulating layer on the substrate in a display area and an outer peripheral area, the insulating layer having a first opening in the outer peripheral area; a pixel electrode on the insulating layer in the display area; a first conductive layer on the insulating layer in the outer peripheral area and covering the first opening; an intermediate layer on the pixel electrode; and a counter electrode covering the intermediate layer and contacting the first conductive layer.

[0010] In one implementation, the component may not overlap with the opposing electrode in the peripheral region.

[0011] In one implementation, the component may at least partially overlap with the opposing electrode in the peripheral region.

[0012] In one embodiment, the display panel may further include a second conductive layer in the outer peripheral region, outside the first opening and below the insulating layer, wherein the insulating layer may include a second opening exposing the second conductive layer, and the first conductive layer contacts the second conductive layer in the second opening.

[0013] In one embodiment, the display panel may further include a baffle on the second conductive layer.

[0014] In one implementation, the component may at least partially overlap with the baffle.

[0015] In an embodiment, the display panel may further include an encapsulation layer that covers the display area and includes at least one organic layer and at least one inorganic layer.

[0016] In one embodiment, at least one organic layer of the encapsulation layer may be inside the baffle, and at least one inorganic layer of the encapsulation layer may extend outside the baffle. The component may not overlap with at least one organic layer of the encapsulation layer, but may overlap with at least one inorganic layer of the encapsulation layer.

[0017] In an implementation, the component may overlap with at least one organic layer and at least one inorganic layer.

[0018] In one implementation, the component may overlap with the outer peripheral area in the corner of the display panel.

[0019] In one embodiment, the window may include an extension extending outside the outer periphery of the display panel, and at least a portion of the component may overlap with the extension of the window.

[0020] In one implementation, the light transmittance of the first area where the component is placed in the outer peripheral area of ​​the display panel may be different from the light transmittance of the second area outside the first area.

[0021] According to one or more embodiments, a display device includes a window; a display panel below the window and including a display area and an outer peripheral area surrounding the display area; and a component (e.g., a module or accessory) below the display panel and at least partially overlapping the display area, wherein a black matrix is ​​on the bottom surface of the window of the area outside the area where the component is placed in the outer peripheral area.

[0022] In one embodiment, the display device may further include a light-inducing member that at least partially overlaps with the peripheral region and guides external light penetrating the peripheral region to the component.

[0023] In some embodiments, the light-inducing component may include an optical fiber.

[0024] In one embodiment, the display panel may include a substrate; an insulating layer on the substrate in a display area and an outer peripheral area, the insulating layer having a first opening in the outer peripheral area; a display element on the insulating layer in the display area and including a pixel electrode, an intermediate layer and a counter electrode; and a first conductive layer on the insulating layer in the outer peripheral area and covering the first opening; wherein the counter electrode may extend to the outer peripheral area and contact the first conductive layer.

[0025] In one implementation, the component may at least partially overlap with the first opening in the outer peripheral region.

[0026] In some implementations, the component may not overlap with the display elements in the display area. Attached Figure Description

[0027] The above and other aspects, features, and enhancements of certain embodiments of the present disclosure will become more apparent from the following description, taken in conjunction with the accompanying drawings, wherein:

[0028] Figure 1 This is a schematic perspective view of a display device according to an embodiment;

[0029] Figure 2 For along Figure 1 A schematic cross-sectional view of a portion of the display device according to the embodiment, taken by line I-I' in the figure;

[0030] Figures 3A to 3E For along Figure 1 A schematic cross-sectional view of each embodiment of a part of the display device, taken by line II-II' in the figure;

[0031] Figure 4 This is a schematic plan view of the display panel according to the embodiment;

[0032] Figure 5 An equivalent circuit diagram of pixels arranged in a display panel according to an embodiment;

[0033] Figure 6 For along Figure 4 A schematic cross-sectional view of a portion of the display panel according to the embodiment, taken by line III-III' in the figure;

[0034] Figures 7A to 7D For along Figure 4A cross-sectional view of the respective implementation of the display panel, taken from line IV-IV'.

[0035] Figures 8A to 8F A plan view of an example mask configured to form opposing electrodes of a display panel;

[0036] Figure 9 A schematic plan view of a display panel according to another embodiment; and

[0037] Figure 10 and Figure 11 For along Figure 9 The schematic cross-sectional view of each embodiment of a portion of the display panel, taken by line V-V'. Detailed Implementation

[0038] Reference will now be made in more detail to the embodiments, examples of which are illustrated in the accompanying drawings, wherein the same reference numerals refer to the same elements throughout the text. In this regard, the embodiments may take different forms and should not be construed as limited to the description set forth herein. Accordingly, embodiments are described below only with reference to the figures to explain aspects of this description. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. When expressions such as “at least one of…” follow a list of elements, they modify the entire list of elements without modifying any individual element in the list.

[0039] Hereinafter, embodiments of the present disclosure will be described more fully with reference to the accompanying drawings. The same reference numerals in the drawings denote the same elements, and therefore their descriptions will not be repeated.

[0040] Although terms such as “first” and “second” can be used to describe various elements, such elements should not be limited to the terms mentioned above.

[0041] Expressions used in the singular include expressions used in the plural, unless they have a clearly distinct meaning in the context.

[0042] In this disclosure, it should be understood that terms such as “comprising,” “having,” and “including” are intended to indicate the presence of a feature or element and are not intended to exclude the possibility that one or more other features or elements may be present or added.

[0043] It will be understood that when a layer, region, or element is referred to as being “formed” “on” another layer, region, or element, it may be formed, for example, directly or indirectly on another layer, region, or element, or there may be intermediate layers (multiple intermediate layers), regions (multiple regions), or components (multiple components).

[0044] For ease of explanation, the dimensions of the elements in the accompanying drawings may be enlarged. In other words, because the dimensions and thicknesses of the elements in the accompanying drawings have been arbitrarily interpreted for ease of explanation, the following embodiments are not limited to these.

[0045] When a particular implementation method can be carried out differently, the specific process sequence can be different from the order in which it is described. For example, two consecutively described processes can be carried out substantially simultaneously or in the reverse order of their description.

[0046] In this disclosure, the phrase "A and / or B" refers to A, B, or A and B. Additionally, in this disclosure, the phrase "at least one of A and B" refers to A, B, or A and B.

[0047] In the following embodiments, it will be understood that when a layer, region, or element is referred to as being “connected” to another layer, region, or element, it may be directly or indirectly connected to the other layer, region, or element. For example, it will be understood that when a layer, region, or element is referred to as being “connected” to another layer, region, or element, it may not only be directly electrically connected to the other layer, region, or element, but also indirectly electrically connected to the other layer, region, or element, with other layers, regions, or elements in between.

[0048] In this disclosure, it will be understood that when a wire is referred to as “extending in a first direction or a second direction”, it may extend not only in a linear shape, but also in a zigzag or curved shape in the first or second direction.

[0049] Additionally, in this disclosure, the term "plan view" refers to a portion of the target object viewed from above, and the term "cross-sectional view" refers to a portion of the target object cut vertically and viewed from the side. In this disclosure, the term "overlap" includes overlapping in plan views and / or cross-sectional views.

[0050] Figure 1 This is a schematic perspective view of the display device 1 according to an embodiment. Figure 2 For along Figure 1 A schematic cross-sectional view of a portion of the display device 1 according to the embodiment, taken by line I-I'. Figures 3A to 3E For along Figure 1 The schematic cross-sectional view of each embodiment of a part of the display device 1, taken by line II-II'.

[0051] Hereinafter, the display device 1 according to the embodiments is described as an organic light-emitting display device, but the display device disclosed herein is not limited thereto. In another embodiment, the display device 1 may be, for example, an inorganic light-emitting display device (inorganic EL display device) or a quantum dot light-emitting display device. For example, the emitting layer of the display element in the display device 1 may include organic materials, inorganic materials, quantum dots, organic materials and quantum dots, or inorganic materials and quantum dots.

[0052] refer to Figure 1 The display device 1 according to the embodiment may include a front surface 1a and four side surfaces 1b extending from the front surface 1a. The four corner portions 1c of the front surface 1a may have a circular shape. The corner portions 1c may be areas where adjacent edges of the front surface 1a (e.g., the upper and lower edges, and the left and right edges) meet each other. The front surface 1a may be substantially flat. At least one of the four side surfaces 1b may include a curved area and / or a flat area that curves from the front surface 1a. The length of a pair of side surfaces 1b facing each other and extending in a first direction (e.g., the x-direction) may be less than the length of a pair of side surfaces 1b facing each other and extending in a second direction (e.g., the y-direction).

[0053] The display device 1 (e.g., front surface 1a) may include a display area for displaying an image and a non-display area outside the display area. At least one of the four side surfaces 1b may include a display area. At least one of the four side surfaces 1b may include a non-display area. The display area of ​​the display device 1 may be... Figure 2 The display area DA of the display panel 10 shown in the image (will be described below).

[0054] Figure 2 This is a cross-sectional view showing the upper edge region, lower edge region, left edge region, and right edge region of the front surface 1a of the display device 1.

[0055] refer to Figure 2 The display device 1 may include a display panel 10, an input sensing layer 40, and an optical functional layer 50, which are sequentially stacked in a third direction (e.g., the z-direction) and covered by a window 60. A protective film 70 may be attached to the bottom surface of the display panel 10 to protect the display panel 10. The display device 1 may be a variety of suitable electronic devices (e.g., various suitable types of electronic devices), such as mobile phones, laptop computers, or smartwatches.

[0056] Window 60 may include a display area DA and a non-display area NDA, each corresponding to a display area and a non-display area of ​​display device 1, respectively. The non-display area NDA of window 60 may be referred to as the area from the edge of window 60 to the boundary between the display area DA and the outer peripheral area PA of display panel 10. Each of display panel 10, input sensing layer 40, and optical functional layer 50 may include a display area DA corresponding to the display area of ​​display device 1 and an outer peripheral area PA corresponding to the non-display area of ​​display device 1. Protective film 70 may be attached to a location corresponding to the display area DA and the outer peripheral area PA of display panel 10. The outer peripheral area PA of display panel 10, input sensing layer 40, and / or optical functional layer 50 is visible to a user viewing the front surface 1a of display device 1. However, the implementation is not limited thereto. The outer peripheral area PA of display panel 10, input sensing layer 40, and / or optical functional layer 50 may be curved (e.g., curved away from the front surface 1a) and invisible to a user viewing the front surface 1a of display device 1. See below for reference. Figures 3A to 3E The outer peripheral area PA of the display panel 10 may be placed in some (e.g., one or more) corner portions 1c of the display device 1.

[0057] Display panel 10 can display images. Display panel 10 may include a display area DA and an outer peripheral area PA outside the display area DA. The outer peripheral area PA may be a non-display area where no image is displayed. Display panel 10 may include pixels arranged in the display area DA. Pixels may include display elements and pixel circuitry connected to the display elements. Display elements may include organic light-emitting diodes, quantum dot organic light-emitting diodes, etc.

[0058] The input sensing layer 40 can obtain coordinate information based on external input (e.g., a touch event). The input sensing layer 40 may include sensing electrodes (or touch electrodes) and traces connected to the sensing electrodes. The input sensing layer 40 may be disposed on the display panel 10. The input sensing layer 40 can sense external input using mutual capacitance methods and / or self-capacitance methods.

[0059] The input sensing layer 40 can be formed directly on the display panel 10, or formed separately and then bonded to the display panel 10 by an adhesive layer (e.g., an optically clear adhesive). For example, the input sensing layer 40 can be formed sequentially after the process of forming the display panel 10. In this case, the input sensing layer 40 can be part of the display panel 10, and no adhesive layer may be present between the input sensing layer 40 and the display panel 10. Although Figure 2 The diagram illustrates that the input sensing layer 40 is located between the display panel 10 and the optical functional layer 50. However, in another embodiment, the input sensing layer 40 may be arranged on top of the optical functional layer 50 (e.g., closer to the window 60 than the optical functional layer 50).

[0060] The optical functional layer 50 may include an anti-reflective layer. The anti-reflective layer reduces the reflectivity of light (external light) incident from the outside toward the display panel 10 through the window 60. The anti-reflective layer may include a retarder and a polarizer. The retarder may be film-type (e.g., film retarder) or liquid crystal coated type (e.g., liquid crystal coated retarder), and may include λ / 2 retarders and / or λ / 4 retarders. The polarizer may also be film-type (e.g., film polarizer) or liquid crystal coated type (e.g., liquid crystal coated polarizer). Film-type polarizers may include stretched synthetic resin films (e.g., stretched synthetic resin films), and liquid crystal coated polarizers may include liquid crystals arranged in some manner. The retarder and polarizer may further include a protective film. The protective film of the retarder and polarizer may be defined as the base layer of the anti-reflective layer.

[0061] In another embodiment, the antireflective layer may include a black matrix and color filters. The color filters may be arranged considering the color of light emitted from each pixel of the display panel 10. Each color filter may include a red pigment or dye, a green pigment or dye, or a blue pigment or dye. Optionally, in addition to the pigments or dyes described above, each color filter may further include quantum dots. Optionally, some color filters may not include the pigments or dyes described above and may include scattering particles, such as titanium dioxide.

[0062] In another embodiment, the antireflection layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer disposed on different layers. First and second reflected light reflected from the first and second reflective layers, respectively, can destructively interfere, and thus reduce the reflectivity of external light.

[0063] The optical functional layer 50 may include a lens layer. The lens layer may improve the light output efficiency of light emitted from the display panel 10 or reduce color deviation. The lens layer may include a layer having a concave lens shape or a convex lens shape and / or may include multiple layers with different refractive indices. The optical functional layer 50 may include both an anti-reflective layer and a lens layer, or may include one of an anti-reflective layer and a lens layer.

[0064] In one embodiment, the optical functional layer 50 may be formed sequentially after the processes for forming the display panel 10 and / or the input sensing layer 40. In this case, an adhesive layer may not be required between the optical functional layer 50, the display panel 10, and / or the input sensing layer 40.

[0065] Window 60 allows light emitted from display panel 10 to be transmitted to the outside. Window 60 allows external light to be transmitted into display device 1. Window 60 may include materials with excellent light transmittance, heat resistance, chemical resistance, mechanical strength, etc. For example, window 60 may include a transparent film and / or a glass substrate, the transparent film including polyethylene terephthalate, etc. Window 60 may include a plastic substrate, the plastic substrate including poly(methyl methacrylate), polyamide, polyimide, polypropylene, polyurethane, etc.

[0066] The black matrix BM in the non-display area NDA can be disposed on the bottom surface of the window 60. The black matrix BM can be formed as a colored organic layer, for example, by a coating method. In an embodiment, an optically transparent adhesive or the like can be disposed between the window 60 and the optical functional layer 50.

[0067] like Figures 3A to 3E As shown, the display device 1 may further include components (e.g., modules or accessories) 20 configured to add various functions to the display device 1. Hereinafter, the area in the display device 1 where the components 20 are placed is referred to as the component area CA (e.g., sensor area, camera area, speaker area, etc.). In one embodiment, the component area CA may be included in the non-display area NDA of the display device 1. In another embodiment, the component area CA may be included in the display area DA of the display device 1.

[0068] Component 20 may include electronic components. For example, component 20 may include electronic components that utilize light and / or sound. For example, electronic components may include sensors that output and / or receive light, such as infrared sensors; cameras that capture images by receiving light; sensors that output and sense light or sound to measure distance and / or identify fingerprints; small lamps that output light; speakers that output sound, etc. Electronic components utilizing light may utilize light of various suitable wavelengths, such as visible light, infrared light, ultraviolet light, etc. Component 20 may include components (multiple components) related to the function of the display panel 10 as described above, and / or may include accessories, such as those that enhance the aesthetics of the display panel 10.

[0069] In an implementation, component area CA may be a transmissive area through which light and / or sound output from the electronic component to the outside and / or from the outside toward the electronic component can pass. For example, component area CA may be an area corresponding to an optical unit in a camera that includes a lens unit and an image sensor, and may not include an area corresponding to a processor connected to the optical unit, hardware or software components connected to the processor, and modules housing the processor and hardware or software components.

[0070] In one embodiment, the display device 1 may further include a housing. The housing may store the display panel 10, the input sensing layer 40, the optical functional layer 50, the window 60, and the component 20.

[0071] Figures 3A to 3E This is a cross-sectional view of the corner portion 1c according to each embodiment of the front surface 1a of the display device 1.

[0072] refer to Figure 3A The component area CA may be included in the non-display area NDA of the window 60 and may be located outside the outer peripheral area PA of the display panel 10. In other words, the component area CA may not overlap with the outer peripheral area PA of the display panel 10. The black matrix BM disposed on the bottom surface of the window 60 may be removed in the area corresponding to the component area CA. The component 20 may be disposed in the position corresponding to the component area CA and may be disposed below the display panel 10. In another embodiment, the component 20 may be inserted into the space SP defined by the window 60 and the housing.

[0073] refer to Figure 3B The component area CA may be included in the non-display area NDA of window 60, and a portion of the component area CA may be included in the peripheral area PA of display panel 10. In other words, the component area CA may partially overlap with the peripheral area PA of display panel 10. The black matrix BM disposed on the bottom surface of window 60 may be removed from the area corresponding to the component area CA. Component 20 may be disposed in the position corresponding to component area CA and may be disposed below display panel 10.

[0074] refer to Figure 3C The component area CA may be included in the non-display area NDA of window 60, and may also be included in the outer peripheral area PA of display panel 10. In other words, the entire component area CA may overlap with the outer peripheral area PA of display panel 10. The black matrix BM disposed on the bottom surface of window 60 may be removed from the area corresponding to component area CA. Component 20 may be disposed in the position corresponding to component area CA, and may be disposed below display panel 10.

[0075] refer to Figure 3D The component area CA may be included in the display area DA and the non-display area NDA of the window 60. In other words, a portion of the component area CA may overlap with the display area DA of the display panel 10, and another portion of the component area CA may overlap with the outer peripheral area PA of the display panel 10. The black matrix BM disposed on the bottom surface of the window 60 may be removed from at least one area corresponding to the component area CA. For example, the black matrix BM disposed on the bottom surface of the window 60 may be removed from the area corresponding to the outer peripheral area PA. The component 20 may be disposed in the position corresponding to the component area CA and may be disposed below the display panel 10.

[0076] refer to Figure 3EThe component area CA may be part of the display area DA of the display panel 10. In other words, the component area CA may overlap with the display area DA of the display panel 10. The component 20 may be arranged in a position corresponding to the component area CA and may be arranged below the display panel 10. The component 20 may be connected to a light-inducing member 30, which is placed in and / or outside the outer peripheral area PA of the display panel 10. The black matrix BM in the non-display area NDA of the window 60 may be removed from the area corresponding to the area where the light-inducing member 30 is arranged. The light-inducing member 30 may transmit external light to the component 20 and / or transmit (guide) light output from the component 20 to the outside. The light-inducing member 30 may include an optical fiber.

[0077] exist Figures 3A to 3E In this embodiment, the transmittance of the component area CA can be 50% or more. The transmittance of the component area CA used for operating component 20 can vary depending on the type (e.g., class) of component 20. For example, the transmittance required for a sensor used for iris recognition may differ from the transmittance required for a near-infrared (IR) light sensor. The transmittance of the component area CA can vary depending on the location of the component area CA, and the component 20 can be appropriately arranged according to the transmittance of the component area CA. For example, a component 20 requiring high transmittance can be arranged according to... Figure 3A The component area CA of the implementation method.

[0078] Figure 4 This is a schematic plan view of the display panel 10 according to an embodiment. Figure 5 An equivalent circuit diagram of a pixel P arranged in a display panel according to an embodiment.

[0079] refer to Figure 4 According to the embodiment, the display panel 10 may include a display area DA and an outer peripheral area PA outside the display area DA. Figure 4 This may be a view of the substrate 100 of the display panel 10. For example, the substrate 100 has a display area DA and a peripheral area PA.

[0080] Display panel 10 includes a plurality of pixels P arranged in display area DA. For example... Figure 5 As shown, each pixel P includes a pixel circuit PC and an organic light-emitting diode (OLED) as a display element connected to the pixel circuit PC. The pixel circuit PC may include a first transistor T1, a second transistor T2, and a capacitor Cst. Each pixel P may emit light, such as red, green, blue, or white light from the OLED. The first transistor T1 and the second transistor T2 may include thin-film transistors.

[0081] The second transistor T2 includes a switching transistor that can be connected to the scan line SL and the data line DL and transmits the data voltage input from the data line DL to the first transistor T1 according to the switching voltage input from the scan line SL. A capacitor Cst can be connected to the second transistor T2 and the drive voltage line PL and stores a voltage corresponding to the difference between the voltage received from the second transistor T2 and the first power supply voltage ELVDD supplied to the drive voltage line PL.

[0082] The first transistor T1 includes a driving transistor that can be connected to a driving voltage line PL and a capacitor Cst, and can control the driving current flowing from the driving voltage line PL through the organic light-emitting diode (OLED) according to the voltage value stored in the capacitor Cst. The OLED can emit light with a certain brightness according to the driving current. The opposite electrode (e.g., the cathode) of the OLED can receive a second power supply voltage ELVSS.

[0083] although Figure 5 The pixel circuit PC is illustrated to include two transistors and one capacitor, but this disclosure is not limited thereto. The number of transistors and the number of capacitors can vary depending on the design of the pixel circuit PC.

[0084] A scan driver that provides a scan signal for each pixel P, a data driver that provides a data signal for each pixel P, and main power wiring configured to provide a first power supply voltage ELVDD and a second power supply voltage ELVSS can be arranged in the outer peripheral area PA.

[0085] The substrate 100 may include at least one component region CA. In one embodiment, at least one component region CA may be included in the peripheral region PA. In another embodiment, a portion of at least one component region CA may be included in the display region DA.

[0086] Figure 6 For along Figure 4 A schematic cross-sectional view of a portion of the display panel 10 according to the embodiment, taken by line III-III'.

[0087] Figure 6 for Figure 4 A cross-sectional view of a portion of one of the four sides of the display panel 10 shown in the image. (Reference) Figure 6 The substrate 100 may include a glass material or a polymer resin. The substrate 100 may include multiple layers. For example, such as... Figure 6 As shown in the enlarged view, the substrate 100 may include a first base layer 101, a first isolation layer 102, a second base layer 103, and a second isolation layer 104.

[0088] Each of the first base layer 101 and the second base layer 103 may include a polymer resin. For example, the first base layer 101 and the second base layer 103 may include polymer resins such as polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC), cellulose acetate propionate (CAP), etc. The first base layer 101 and the second base layer 103 may include a transparent polymer resin.

[0089] The first isolation layer 102 and the second isolation layer 104 may be isolation layers to prevent or reduce the penetration of external foreign objects, and may include a single layer or multiple layers, each layer including inorganic materials such as silicon nitride, silicon oxide, etc.

[0090] A buffer layer 110 may be disposed on the substrate 100 to prevent or substantially prevent impurities from penetrating into the semiconductor layer of the thin-film transistor. The buffer layer 110 may comprise an inorganic insulating material, such as silicon nitride and / or silicon oxide, and may comprise a single layer or multiple layers.

[0091] A first thin-film transistor (TFT) 1 and an organic light-emitting diode (OLED) 310 electrically connected to the first TFT 1 can be arranged in the display area DA of the substrate 100. The OLED 310 can be electrically connected to the first TFT 1 via a pixel electrode 311, which is also electrically connected to the first TFT 1. The first TFT 1 can be... Figure 5 The first transistor T1 in the process.

[0092] The first thin-film transistor (TFT) 1 may include a semiconductor layer 111, a gate electrode 113, a source electrode 115a, and a drain electrode 115b. The semiconductor layer 111 may include amorphous silicon, polycrystalline silicon, and / or organic semiconductor materials. The gate electrode 113 may be disposed on the semiconductor layer 111. The gate electrode 113 may include, for example, aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may include a single-layer structure or a multilayer structure.

[0093] A gate insulating layer 120 may be disposed between the semiconductor layer 111 and the gate electrode 113 to insulate the semiconductor layer 111 and the gate electrode 113. The gate insulating layer 120 may include inorganic materials, such as silicon oxide, silicon nitride, and / or silicon oxynitride. An interlayer insulating layer 130 may be disposed on the gate electrode 113 and may include a single-layer structure or a multilayer structure, each layer including inorganic materials, such as silicon oxide, silicon nitride, silicon oxynitride, etc.

[0094] Source electrode 115a and drain electrode 115b are disposed on interlayer insulating layer 130. Each of the source electrode 115a and drain electrode 115b can be electrically connected to semiconductor layer 111 through contact holes formed in interlayer insulating layer 130 and gate insulating layer 120. Considering conductivity, etc., source electrode 115a and drain electrode 115b may include, for example, Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W and / or Cu, and may have a single-layer structure or a multilayer structure.

[0095] In one embodiment, a protective film may be provided to cover the first thin-film transistor TFT1 to protect it. The protective film may include inorganic materials, such as silicon oxide, silicon nitride, silicon oxynitride, etc. The protective film may have a single-layer structure or a multi-layer structure.

[0096] A planarization layer 140 may be disposed on the protective film. The planarization layer 140 substantially planarizes the upper portion of the protective film covering the first thin-film transistor TFT1. The planarization layer 140 may comprise commonly used commercial polymers (e.g., poly(methyl methacrylate) (PMMA) and / or polystyrene (PS)), phenolic polymer derivatives, and / or organic insulating materials (e.g., acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluoropolymers, p-xylene polymers, vinyl alcohol polymers, and / or blends thereof). Although Figure 6 The planarization layer 140 is explained as a single layer, but it can be modified in various appropriate ways; for example, the planarization layer 140 can be a multi-layer structure. The display panel 10 may include both a protective film and the planarization layer 140, or may include only the planarization layer 140 as needed.

[0097] In the display area DA of the substrate 100, an organic light-emitting diode 310 may be disposed on the planarization layer 140. The organic light-emitting diode 310 may include a pixel electrode 311, a counter electrode 315, and an intermediate layer 313 between the pixel electrode 311 and the counter electrode 315, and may include an emission layer.

[0098] The planarization layer 140 may include openings exposing the source electrode 115a or drain electrode 115b of the first thin-film transistor TFT 1. Pixel electrodes 311, which are in contact with the source electrode 115a or drain electrode 115b through the openings (and thus electrically connected to the first thin-film transistor TFT 1), may be disposed on the planarization layer 140. Pixel electrodes 311 may include semi-transparent electrodes or reflective electrodes. When pixel electrodes 311 include semi-transparent electrodes, they may include, for example, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and / or aluminum zinc oxide (AZO). When pixel electrodes 311 include reflective electrodes, they may include: a reflective film (e.g., a reflective layer) comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, and / or compounds thereof; and a layer comprising ITO, IZO, ZnO, In2O3, IGO, and / or AZO. However, the implementation is not limited to this. The pixel electrode 311 may include various suitable materials, the structure of the pixel electrode 311 may be single-layer or multi-layer, and various suitable modifications may be made.

[0099] A pixel defining layer 150 may be disposed on the planarization layer 140. The pixel defining layer 150 may define pixels by having openings corresponding to each pixel (i.e., openings exposing at least the central portion of the pixel electrode 311). Furthermore, the pixel defining layer 150 prevents or substantially prevents the generation of electric arcs at the edges of the pixel electrode 311 by insulating the edges of the pixel electrode 311 from the opposing electrode 315 on the pixel electrode 311 or by increasing the distance between the edges of the pixel electrode 311 and the opposing electrode 315 on the pixel electrode 311. The pixel defining layer 150 may comprise organic materials such as polyimide, hexamethyldisiloxane (HMDSO), etc.

[0100] The intermediate layer 313 of the organic light-emitting diode 310 includes an emission layer. The emission layer may include a polymer and / or a low molecular weight organic material that emits light of a certain color. In an embodiment, the intermediate layer 313 may include a first functional layer below the emission layer and / or a second functional layer above the emission layer. The first functional layer and / or the second functional layer may include an integrated layer (e.g., a continuous layer) above a plurality of pixel electrodes 311, or may include a patterned layer corresponding to each of the plurality of pixel electrodes 311.

[0101] The first functional layer may be a single layer or multiple layers. For example, when the first functional layer comprises a polymer material, the first functional layer may include a hole transport layer (HTL) having a single-layer structure, and may include poly(3,4-ethylenedioxythiophene) (PEDOT) and / or polyaniline (PANI). When the first functional layer comprises a low molecular weight material, the first functional layer may include a hole injection layer (HIL) and an HTL.

[0102] The second functional layer may be omitted. For example, when the first functional layer and the emitter layer comprise polymer materials, a second functional layer is preferably formed to improve the characteristics of the organic light-emitting diode 310. The second functional layer may comprise a single layer or multiple layers. The second functional layer may comprise an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0103] The counter electrode 315 may be disposed above the display area DA and the peripheral area PA, and may be integrally formed relative to a plurality of organic light-emitting diodes 310 to face a plurality of pixel electrodes 311. The counter electrode 315 may include a semi-transparent electrode or a reflective electrode. When the counter electrode 315 includes a semi-transparent electrode, the counter electrode 315 may include a layer comprising a metal having a small work function, such as Li, Ca, Ag, Mg and / or compounds thereof, such as lithium fluoride (LiF) / Ca and LiF / Al; and the counter electrode 315 may include a semi-transparent conductive layer of ITO, IZO, ZnO, In2O3, etc. When the counter electrode 315 includes a reflective electrode, the counter electrode 315 may include a layer comprising Li, Ca, Al, Ag, Mg and / or compounds thereof, such as LiF / Ca and LiF / Al. The structure and materials of the counter electrode 315 are not limited thereto, and various suitable modifications may be made.

[0104] Electrode power lines 420 can be placed in the outer peripheral region PA and can transmit preset electrical signals to the opposite electrode 315. When various conductive layers are formed in the display region DA using the same material as the various conductive layers, electrode power lines 420 can be formed simultaneously or synchronously. Figure 6 The electrode power line 420 is placed on the interlayer insulating layer 130 in the outer peripheral region PA. In this case, when the source electrode 115a and drain electrode 115b of the first thin-film transistor TFT 1 in the display region DA are formed on the interlayer insulating layer 130, the electrode power line 420 is also formed on the interlayer insulating layer 130 in the outer peripheral region PA using the same material as the source electrode 115a and drain electrode 115b of the first thin-film transistor TFT 1 in the display region DA. Accordingly, the electrode power line 420 may have the same structure as the source electrode 115a and drain electrode 115b. However, this disclosure is not limited thereto. Various suitable modifications can be made. For example, when the gate electrode 113 is formed, the electrode power line 420 can be formed simultaneously (e.g., synchronously) on the gate insulating layer 120 by using the same material as the gate electrode 113.

[0105] The opposing electrode 315 can be electrically connected to the electrode power line 420 via the conductive layer 422 without directly contacting the electrode power line 420. The planarization layer 140 may include an opening exposing the electrode power line 420. In other words, the conductive layer 422 disposed on the planarization layer 140 may extend to the electrode power line 420 exposed by the opening (thereby being electrically connected to the electrode power line 420). Accordingly, the opposing electrode 315 may contact the conductive layer 422 in the peripheral region PA, and the conductive layer 422 may contact the electrode power line 420 in the peripheral region PA.

[0106] The conductive layer 422 can be placed on the planarization layer 140, and can be formed simultaneously (e.g., synchronously) with the formation of elements (e.g., conductive elements) placed on the planarization layer 140 in the display area DA. The conductive layer 422 can be formed from the same material as the element. More specifically, when forming the pixel electrode 311 in the display area DA on the planarization layer 140, the conductive layer 422 can also be formed on the planarization layer 140 in the peripheral area PA using the same material as the pixel electrode 311. Accordingly, the conductive layer 422 can have the same structure as the pixel electrode 311. The conductive layer 422 can cover the exposed portion of the electrode power line 420 (which is not covered by the planarization layer 140). Accordingly, damage to the electrode power line 420 can be prevented or substantially prevented during the process of forming the first baffle 610 or the second baffle 620.

[0107] Furthermore, the planarization layer 140 may have an opening 140b in the peripheral region PA to prevent or substantially prevent impurities (e.g., oxygen and / or moisture) from the outside from penetrating from the planarization layer 140 into the display region DA. The conductive layer 422 and the opposing electrode 315 may completely cover the opening 140b. Accordingly, impurities penetrating the planarization layer 140 in the peripheral region PA can be effectively prevented or substantially prevented from penetrating into the planarization layer 140 in the display region DA.

[0108] A second thin-film transistor (TFT) 2 can be disposed in the outer peripheral region PA of the substrate 100. The second TFT 2 can be, for example, part of a built-in circuit unit (e.g., a scan driver, etc.) configured to control electrical signals applied to the display area DA. The second TFT 2 may include a semiconductor layer 112, a gate electrode 114, a source electrode 116a, and a drain electrode 116b. The second TFT 2 can be formed in the same process as that used to form the first TFT 1. Accordingly, a detailed description of the second TFT 2 is not required. Figure 6In this embodiment, the second thin-film transistor TFT2 can be located between the opening 140b of the planarization layer 140 and the electrode power line 420. However, the embodiment is not limited to this, and the second thin-film transistor TFT2 can be located between the display area DA and the opening 140b of the planarization layer 140.

[0109] A capping layer 160 may be disposed on the opposing electrode 315. The capping layer 160 may cover the opposing electrode 315 and may extend outside the opposing electrode 315 to contact the conductive layer 422 disposed beneath the opposing electrode 315. The capping layer 160 may cover the display area DA and extend to the outer peripheral area PA outside the display area DA. The capping layer 160 may include at least one organic material and / or inorganic material selected from the following: silicon oxide (SiO2), silicon nitride (SiN2). x Zinc oxide (ZnO2), titanium oxide (TiO2), zirconium oxide (ZrO2), ITO, tris(8-hydroxyquinoline)aluminum (Alq3), copper phthalocyanine (II) (CuPc), 4,4'-bis(N-carbazolyl)-1,1'-biphenyl (CBP) and N,N'-bis(naphthyl-1-yl)-N,N'-diphenyl-benzidine (α-NPB).

[0110] The end capping layer 160 improves the efficiency of light generated in the organic light-emitting diode 310. For example, the end capping layer 160 can enhance the outward light extraction efficiency. Preferably, the outward light extraction efficiency of the end capping layer 160 is uniformly improved in the display area DA. Considering the above, it is preferable that the end capping layer 160 has an upper surface with a curvature corresponding to the upper surface of the layer below the end capping layer 160. In other words, the upper surface of the end capping layer 160 placed on the opposing electrode 315 may have a shape corresponding to the curvature of the upper surface of the opposing electrode 315.

[0111] The encapsulation layer 500 can be placed on top of the end capping layer 160. The encapsulation layer 500 prevents the organic light-emitting diode 310 from being exposed to moisture, oxygen, etc. from the outside. The encapsulation layer 500 can extend to the display area DA and the peripheral area PA. The encapsulation layer 500 can have a multilayer structure. The encapsulation layer 500 may include a first inorganic layer 510, an organic layer 520, and a second inorganic layer 530.

[0112] The first inorganic layer 510 may cover the end capping layer 160 and may include silicon oxide, silicon nitride, silicon oxynitride, etc. Because the first inorganic layer 510 is formed along the underlying structure, the upper surface of the first inorganic layer 510 may be uneven.

[0113] The organic layer 520 may cover the first inorganic layer 510 and have sufficient thickness. The upper surface of the organic layer 520 may be substantially flat throughout the display area DA. The organic layer 520 may comprise one or more materials selected from PEN, PC, PI, polyethylene sulfonate (PES), polyoxymethylene (POM), PAR, and HMDSO.

[0114] The second inorganic layer 530 may cover the organic layer 520 and may include silicon oxide, silicon nitride, silicon oxynitride, etc. The second inorganic layer 530 may extend outside the organic layer 520 to contact the first inorganic layer 510 to prevent or substantially prevent the organic layer 520 from being exposed to the outside.

[0115] Because the encapsulation layer 500 is formed in a multilayer structure, even if cracks occur in the encapsulation layer 500, the connection between the first inorganic layer 510 and the organic layer 520 or between the organic layer 520 and the second inorganic layer 530 can be prevented or substantially prevented. Accordingly, the formation of paths through which water, oxygen, etc., from the outside penetrate into the display area DA can be prevented (or substantially prevented) or minimized.

[0116] Furthermore, the structure beneath the encapsulation layer 500 may be damaged during the process of forming the encapsulation layer 500. For example, when forming the first inorganic layer 510, the layer formed directly beneath the first inorganic layer 510 may be damaged. Accordingly, a protective layer 170 may be formed between the end capping layer 160 and the encapsulation layer 500 to prevent or substantially prevent damage to the end capping layer 160 during the process of forming the encapsulation layer 500. The protective layer 170 may include LiF. The protective layer 170 may extend outside the end capping layer 160 to prevent or substantially prevent the end capping layer 160 from directly contacting the encapsulation layer 500. In this case, the protective layer 170 may cover the end of the end capping layer 160, and the end of the protective layer 170 may be placed on the planarization layer 140. The end of the protective layer 170 may directly contact the conductive layer 422 on the planarization layer 140.

[0117] The adhesion strength between the first inorganic layer 510, which is the lowest layer of the encapsulation layer 500, and the layer comprising inorganic material is greater than the adhesion strength with the layer comprising organic material. Correspondingly, when the end capping layer 160 comprises organic material, the adhesion strength between the protective layer 170, comprising an inorganic material such as LiF, and the first inorganic layer 510 is greater than the adhesion strength between the end capping layer 160 and the first inorganic layer 510. Accordingly, the encapsulation layer 500 can be held in place with high adhesion strength to the lower layer below it. Consequently, peeling of the encapsulation layer 500 from the lower layer can be effectively prevented (or substantially prevented) or minimized during manufacturing or during use after manufacturing.

[0118] When forming the organic layer 520, the material used to form the organic layer 520 is required to be placed in a designated or predetermined area. For this purpose, such as... Figure 6 As shown, a first baffle 610 may be formed in the peripheral region PA. The first baffle 610 may have a multilayer structure. The first baffle 610 may include a first layer 611, a second layer 613, and a third layer 615 in a direction away from the substrate 100. When forming the planarization layer 140, the first layer 611 may be formed simultaneously (e.g., synchronously), and the first layer 611 is formed of the same material as the planarization layer 140. When forming the pixel defining layer 150, the second layer 613 may be formed simultaneously (e.g., synchronously), and the second layer 613 is formed of the same material as the pixel defining layer 150. The third layer 615 may include the same material as the pixel defining layer 150, or may be an organic material layer and / or an inorganic material layer (each layer is formed by a separate process).

[0119] The second baffle 620 may be located between the first baffle 610 and the opening 140b of the planarization layer 140. The second baffle 620 may be placed on the conductive layer 422 on the electrode power line 420. The second baffle 620 may have a multilayer structure and may include fewer layers than the first baffle 610, such that the second baffle 620 is positioned lower from the substrate 100 than the first baffle 610 is positioned from the substrate 100. The second baffle 620 may include a first layer 623 and a second layer 625. The first layer 623 may be formed of the same material as the pixel defining layer 150 and may be formed simultaneously (e.g., synchronously) with the formation of the pixel defining layer 150. The second layer 625 may include the same material as the pixel defining layer 150, or may be an organic material layer and / or an inorganic material layer (each layer formed by a separate process).

[0120] The first inorganic layer 510 may be formed covering the second baffle 620 and the first baffle 610, extending to the outer side of the first baffle 610. The position of the organic layer 520 on the first inorganic layer 510 may be limited by the second baffle 620, thereby preventing or substantially preventing the material used to form the organic layer 520 from overflowing above the second baffle 620. Even when some of the material used to form the organic layer 520 overflows above the second baffle 620, the position of the material in the organic layer 520 may be limited by the first baffle 610, preventing or substantially preventing the material used to form the organic layer 520 from moving in the direction toward the edge of the substrate 100.

[0121] A crack prevention baffle 630 may be placed in the outer peripheral region PA. The crack prevention baffle 630 may extend along at least a portion of the edge of the substrate 100. For example, the crack prevention baffle 630 may have a shape that extends completely around the display area DA. The crack prevention baffle 630 may have a discontinuous shape in some portions of the outer peripheral region PA.

[0122] The crack prevention baffle 630 can have various suitable shapes, and can be formed simultaneously or concurrently by using the same material as a portion of the element formed in the display area DA, or can have a multi-layer structure. Figure 6 The crack prevention baffle 630 is described as having a two-layer structure. The crack prevention baffle 630 may include a lower layer comprising the same material as the gate insulating layer 120; and an upper layer comprising the same material as the interlaminar insulating layer 130 on the gate insulating layer 120. The crack prevention baffle 630 may be placed on top of the buffer layer 110. When needed, the crack prevention baffle 630 may be placed on top of a layer placed below the buffer layer 110, and the crack prevention baffle 630 may include such a layer comprising the same material as the buffer layer 110. It may include not a single crack prevention baffle 630, but rather a plurality of crack prevention baffles 630 separated from each other.

[0123] The crack prevention baffle 630 can be formed by removing a portion of the gate insulation layer 120 and the interlayer insulation layer 130. In other words, as Figure 6 As shown, the transfer prevention groove 632 can be formed by removing the gate insulation layer 120 and the interlayer insulation layer 130 on at least one side of the crack prevention baffle 630, and the crack prevention baffle 630 may include the remaining portion of the gate insulation layer 120 and the interlayer insulation layer 130 adjacent to the transfer prevention groove 632.

[0124] The crack prevention baffle 630 may be covered by a cover layer 650. The cover layer 650 may be formed of the same material as the planarization layer 140 and may be formed simultaneously (e.g., concurrently) with the formation of the planarization layer 140. In other words, the cover layer 650 may be a layer comprising an organic material covering the crack prevention baffle 630 (including inorganic material). The cover layer 650 may fill the transport prevention groove 632 and may also cover the crack prevention baffle 630.

[0125] Figures 7A to 7D For along Figure 4 The image shows a cross-sectional view of each display panel 10 according to its respective embodiment, taken by line IV-IV'.

[0126] Figures 7A to 7D This is a cross-sectional view of some corner portions according to various embodiments of the display panel 10.

[0127] Figure 7A To explain the basis Figure 3B A diagram showing the positional relationship between the display panel 10 and components (e.g., modules or accessories) 20 in an embodiment shown in the figure. (See reference...) Figure 7AA portion of component 20 may overlap with the outer peripheral region PA of display panel 10, and the remainder of component 20 may be placed outside the outer peripheral region PA. Component region CA (where component 20 is placed) may overlap with the first baffle 610 and / or the second baffle 620 in the outer peripheral region PA. Component region CA may not overlap with the inner sides of the first baffle 610 and the second baffle 620. That is, component region CA may not overlap with the organic layer 520 of encapsulation layer 500. Component region CA may overlap with the ends of the first inorganic layer 510 and the second inorganic layer 530 of encapsulation layer 500. Component region CA may overlap with crack prevention baffle 630. The opposing electrode 315 may not be arranged in the component region CA in the outer peripheral region PA.

[0128] Figure 7B and Figure 7C For their respective interpretations Figure 3C The diagram shows the positional relationship between the display panel 10 and the component 20 in the embodiment shown. Figure 7D To explain the basis Figure 3E The diagram shows the positional relationship between the display panel 10 and the component 20 in the embodiment shown.

[0129] refer to Figure 7B Component 20 may overlap with the outer peripheral region PA of the display panel 10. Component region CA may be placed outside the opening 140b of the planarization layer 140. Component region CA may overlap with the first baffle 610 and / or the second baffle 620 in the outer peripheral region PA. Component region CA may overlap with the inner sides of the first baffle 610 and the second baffle 620. That is, component region CA may overlap with the end of the organic layer 520 of the encapsulation layer 500.

[0130] exist Figure 7B In this embodiment, component 20 may overlap with electrode power lines 420 and conductive layer 422. To ensure the required light transmittance of component 20, the width (size) of electrode power lines 420 and conductive layer 422 in component region CA may be smaller than the width (size) of electrode power lines 420 and conductive layer 422 in regions outside component region CA. In another embodiment, electrode power lines 420 and conductive layer 422 may be arranged to bypass component region CA. In this case, electrode power lines 420 and conductive layer 422 may not overlap with component region CA.

[0131] like Figure 7A and 7B As shown, component region CA can be placed in the region where the opposing electrode 315 is not disposed. However, as Figure 7C As shown, when the transmittance of the component region CA is sufficient for the component 20 to operate, a portion of the component region CA may be included in the peripheral region PA where the relative electrode 315 is arranged.

[0132] Similarly, such as Figure 7DAs shown, even when a portion of the component area CA is included in the display area DA of the display panel 10, a portion of the component area CA may still be included in the display area DA of the display panel 10 when the light transmittance of the component area CA is sufficient for the component 20 to operate. The component area CA may be limited to the display area DA of the display panel 10 adjacent to the outer peripheral area PA. More specifically, the component area CA may overlap with the pixel defining layer 150 in the display area DA, and may not overlap with the organic light-emitting diode 310 in the display area DA. In another embodiment, as Figure 7D As shown, the component area CA may overlap with a portion of the organic light-emitting diodes 310 arranged in the display area DA.

[0133] When the overall size of the module including component 20 is insufficient for component 20 to operate as it moves from the outer peripheral region PA to the display region DA, and the light transmittance of component region CA is insufficient, a light-inducing member 30 connected to component 20 may be included. The light-inducing member 30 may be included in and / or outside the outer peripheral region PA and may transmit sufficient light to component 20. The light-inducing member 30 may include an optical fiber 35 configured to transmit light between component 20 and the outside.

[0134] In one or more embodiments, the component area CA can be placed in the peripheral area PA and / or the display area DA of the display panel 10, within a range that ensures the required light transmittance of component 20 to an appropriate level. Light transmittance can be ensured by removing conductors (e.g., opposing electrode 315, electrode power line 420, conductive layer 422, etc.) disposed in the peripheral area PA and / or display area DA of the display panel 10, changing the width (size) and / or placement of the conductors, and / or adjusting the thickness of insulating layers (e.g., buffer layer 110, gate insulating layer 120, interlayer insulating layer 130, planarization layer 140, and / or pixel defining layer 150) and / or removing some insulating layers. Optionally, a light-inducing member 30 can be used.

[0135] In the embodiment described above, component 20 is described as being placed in the outer peripheral area PA formed at the corner of the display panel 10. The embodiment is not limited to this. For example, component 20 may be placed in... Figure 6 The display panel 10 is shown in the outer peripheral area PA of the four sides. In this case, the component 20 may overlap with a portion of the built-in circuit unit, and in order to ensure the light transmittance of the component area CA, the design may be modified so that some components and / or the wires of the built-in circuit unit bypass the component area CA, the size (e.g., width) of the components and / or the wires may be reduced and / or the components and / or the wires may be removed.

[0136] Figures 8A to 8F A plan view of an example of a mask 200 configured to form the opposite electrode 315 of the display panel 10.

[0137] refer to Figures 8A to 8F The mask 200 may include an opening 210 and a shielding portion 230. The opening 210 may correspond to the shape of the display panel 10 and may have dimensions corresponding to a portion of the display area DA and the outer peripheral area PA of the substrate 100. The material forming the opposing electrode 315 may be applied to the upper part of the substrate 100 through the opening 210. The shielding portion 230 may correspond to a portion of the outer peripheral area PA and the component area CA' of the substrate 100. Accordingly, the opposing electrode 315 may not be formed in the portion of the outer peripheral area PA and the component area CA' of the substrate 100 covered by the shielding portion 230. Accordingly, the process of removing the opposing electrode 315 arranged in the component area CA' may not be added, so as not to increase the manufacturing cost of the display panel 10.

[0138] Component area CA' can be placed at the corner of display panel 10. Component area CA' may include one area or more. Component area CA' can have various suitable shapes and sizes, such as circular (…). Figure 8A ),rectangle( Figure 8B and 8D ), semi-circular ( Figure 8C ), crescent shape ( Figure 8E ) and multiple straight lines ( Figure 8F As described above, in addition to the corners of the display panel 10, the component area CA' can also be placed on the four sides of the display panel 10. In this case, in addition to the corners of the display panel 10, the shielding portion 230 of the mask 200 configured to form the opposing electrode 315 may also include areas corresponding to the component areas CA' on the four sides.

[0139] Figure 9 This is a schematic plan view of a display panel 10' according to another embodiment. Figure 10 and Figure 11 For along Figure 9 A schematic cross-sectional view of a portion of the display panel 10' taken by line V-V'.

[0140] refer to Figure 9 According to the embodiment, the display panel 10' may include a display area DA and an outer peripheral area PA outside the display area DA. The display panel 10' may include a first component area CA1 included in the outer peripheral area PA and a second component area CA2 included inside the display area DA. Figure 9 The display panel 10' shown may be a view of the substrate 100. For example, the substrate 100 may include a display area DA and a peripheral area PA, as well as a first component area CA1 and a second component area CA2.

[0141] Display panel 10' includes a plurality of pixels P arranged in display area DA. Pixel P may include the above reference. Figure 5The pixel circuit is described. The outer peripheral region PA can be an area where no pixels are arranged.

[0142] refer to Figure 10 The display panel 10' may include a display layer 300 disposed on the substrate 100. The substrate 100 may include a glass material and / or a polymer resin. The substrate 100 may include multiple layers. For example, such as... Figure 6 As shown in the enlarged view, the substrate 100 may include a first base layer 101, a first isolation layer 102, a second base layer 103, and a second isolation layer 104.

[0143] Display layer 300 has a plurality of pixels P. Display layer 300 may include display elements arranged for each pixel P, as well as pixel circuitry and an insulating layer arranged for each pixel P. Pixel circuitry may include transistors and capacitors, and display elements may include organic light-emitting diodes (OLEDs). Buffer layer 110 may be included between substrate 100 and display layer 300. Display layer 300 may be covered by encapsulation components, such as encapsulation layer 500, and encapsulation layer 500 may include at least one inorganic layer and at least one organic layer. When display panel 10' includes substrate 100 (which includes a polymer resin) and encapsulation layer 500 (which includes inorganic and organic layers), the flexibility of display panel 10' can be improved.

[0144] The display panel 10' may include a first component area CA1 inside the outer peripheral area PA and a second component area CA2 inside the display area DA. The display layer 300 corresponding to the second component area CA2 may be removed. The substrate 100 corresponding to the second component area CA2 may not be removed. The first component 20 may be arranged under the display panel 10' according to the first component area CA1. The second component 25 may be arranged under the display panel 10' according to the second component area CA2.

[0145] In another embodiment, such as Figure 11 As shown, the display panel 10' may include an opening through the display panel 10' in the second component area CA2. The second component 25 may be placed inside the opening in the second component area CA2. The first component 20 may be arranged below the display panel 10' according to the first component area CA1.

[0146] Arranging sensors within the display area of ​​a display device can obstruct (e.g., interfere with) full-screen display and reduce aesthetics (due to sensor-related resolution reduction, patterning of opposing electrodes in the corresponding area, and visibility of the opposing electrode pattern). According to one or more embodiments, components are arranged in the non-display area of ​​a window and at the edge of the display area of ​​the display panel (i.e., a portion of the display area from the end of the window to the outer periphery of the adjacent display panel). Therefore, compared to display devices arranging components within the display area of ​​the display panel, the display device according to this disclosure reduces the overall dead space and effective dead space while ensuring the largest possible display area without physical deformation of the display panel. Furthermore, since the pattern of the opposing electrodes around the components is not visually discernible, screen uniformity and aesthetics are not reduced.

[0147] According to one or more embodiments, the display device exhibits excellent screen uniformity and aesthetics while ensuring the largest possible display area in the display panel (including the area where various suitable types of components (e.g., various suitable modules or accessories) are arranged). However, the effects are illustrative, and the effects according to the embodiments are described in more detail through description.

[0148] For ease of description, this document uses spatial relative terms such as “below,” “under,” “down,” “below,” “above,” “up,” etc., to describe the relationship between one element or feature illustrated in the figure and another element (or feature) or feature (or feature). It should be understood that, in addition to the orientation depicted in the figure, spatial relative terms are also intended to include different orientations of the equipment in use or operation. For example, if the equipment in the figure is flipped, an element described as “below,” “under,” or “below” other elements or features will then be oriented “above” other elements or features. Therefore, the example terms “below” and “below” can include both above and below orientations. Equipment may be oriented in other ways (e.g., rotated 90 degrees or otherwise), and the spatial relative descriptors used herein should be interpreted accordingly.

[0149] Furthermore, when describing embodiments of the present invention, the word "may" refers to "one or more embodiments of the present invention".

[0150] The display device and / or any other related device or element according to the embodiments of the invention described herein can be implemented using any suitable hardware, firmware (e.g., application-specific integrated circuit), software, or a suitable combination of software, firmware, and hardware. For example, various elements of the display device may be formed on an integrated circuit (IC) chip or on a separate IC chip. Further, various elements of the display device may be implemented on a flexible printed circuit film, a tape-on-a-chip (TCP), a printed circuit board (PCB), or formed on a substrate. Further, various elements of the display device may be processes or threads running on one or more processors in one or more computing devices, executing computer program instructions and interacting with other system elements to perform the various functions described herein. The computer program instructions are stored in memory, which may be implemented in the computing device using standard memory devices (e.g., random access memory (RAM)). The computer program instructions may also be stored in other non-transitory computer-readable media, such as, for example, CD-ROMs, flash drives, etc. Moreover, those skilled in the art will recognize that, without departing from the scope of the exemplary embodiments of the invention, the functions of various computing devices may be combined or integrated into a single computing device, or the functions of a particular computing device may be distributed across one or more other computing devices.

[0151] It is understood that the embodiments described herein should be considered in a descriptive sense only and are not intended to be limiting. The description of features or aspects within each embodiment is generally intended for other similar features or aspects that may be used in other embodiments. Although one or more embodiments have been described with reference to the figures, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope defined by the appended claims and their equivalents.

Claims

1. A display device, the display device comprising: window; A display panel is located below the window and includes a display area and an outer peripheral area outside the display area; as well as Components, the components being below the display panel and at least partially overlapping the outer peripheral area, The black matrix is ​​on the bottom surface of the window in the area outside the component area where the component is placed in the peripheral region. The display panel includes: substrate; An insulating layer is provided on the substrate in the display area and the peripheral area; and A first conductive layer is placed on top of the insulating layer in the outer peripheral region, and The width of the first conductive layer in the component area is smaller than the width of the first conductive layer in the outer peripheral area excluding the component area, or the first conductive layer is arranged to bypass the component area in the outer peripheral area.

2. The display device according to claim 1, wherein the display panel further comprises: A pixel electrode, the pixel electrode being located on the insulating layer in the display area; Intermediate layer, the intermediate layer being on the pixel electrode; as well as A counter electrode, which covers the intermediate layer and contacts the first conductive layer. The insulating layer has a first opening in the outer peripheral region, and the first conductive layer covers the first opening. The relative electrode contacts the first conductive layer in the region corresponding to the first opening in the insulating layer.

3. The display device of claim 2, wherein the component does not overlap with the opposing electrode in the peripheral region.

4. The display device of claim 2, wherein the component at least partially overlaps with the opposing electrode in the peripheral region.

5. The display device according to claim 2, wherein the display panel further comprises a second conductive layer, the second conductive layer being in the outer peripheral region, outside the first opening, and beneath the insulating layer. The insulating layer includes a second opening that exposes the second conductive layer, and The first conductive layer contacts the second conductive layer in the second opening.

6. The display device according to claim 5, wherein the display panel further includes a baffle on the second conductive layer.

7. The display device of claim 6, wherein the component at least partially overlaps with the baffle.

8. The display device of claim 6, wherein the display panel further comprises an encapsulation layer covering the display area and comprising at least one organic layer and at least one inorganic layer.

9. The display device of claim 8, wherein the at least one organic layer of the encapsulation layer is inside the baffle, and The at least one inorganic layer of the encapsulation layer extends on the outside of the baffle.

10. The display device of claim 9, wherein the component does not overlap with the at least one organic layer of the encapsulation layer, and overlaps with the at least one inorganic layer of the encapsulation layer.

11. The display device of claim 9, wherein the component overlaps with the at least one organic layer and the at least one inorganic layer.

12. The display device of claim 1, wherein the component overlaps with the outer peripheral area at the corner of the display panel.

13. The display device of claim 1, wherein the window includes an extension extending outside the outer periphery of the display panel, and At least a portion of the component overlaps with the extension of the window.

14. The display device according to claim 1, wherein in the outer peripheral region of the display panel, the light transmittance of the first region where the component is placed is different from the light transmittance of the second region outside the first region.

15. The display device according to any one of claims 2 to 11, wherein the component at least partially overlaps with the display area.

16. The display device of claim 15, further comprising a light-inducing member that at least partially overlaps with the peripheral region and guides external light penetrating the peripheral region to the component.

17. The display device of claim 16, wherein the light-inducing component comprises an optical fiber.

18. The display device of claim 15, wherein the display panel further comprises: A display element, situated on the insulating layer in the display area, includes the pixel electrode, the intermediate layer, and the opposing electrode. The opposing electrode extends to the outer peripheral region and contacts the first conductive layer.

19. The display device of claim 18, wherein the component at least partially overlaps with the first opening in the peripheral region.

20. The display device of claim 18, wherein the component does not overlap with the display element in the display area.

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