Display device with extended connection lines

Abstract

The present invention relates to a display device having an extended connection line. The display device includes: a substrate including a display area and a peripheral area at least partially surrounding the display area. Corners at the edges of the display area are curved. The peripheral area includes a pad area. Data lines are arranged in the display area. A first connection line is arranged in the display area and connected to the data lines to transmit signals from the pad area to the data lines. The first connection line includes a first portion extending from the edge in a direction away from the peripheral area and a second portion bent with respect to the first portion and extending toward the corner.

Description

Technical Field

[0001] The present disclosure relates to a display device, and more particularly, to a display device having an extended connection line. Background Art

[0002] Display devices have evolved to be thin, relatively lightweight, and consume less power. Additionally, display devices have begun to feature a larger visible area with less surrounding space where no image is displayed. Due to this reduced surrounding space, physical buttons and the like have been removed from the front surface of the display device. Summary of the Invention

[0003] According to one or more embodiments of the present disclosure, a display device includes: a substrate including a display area and a peripheral area outside the display area. Corners at the edges of the display area include a circular shape, and the peripheral area includes a pad area. Data lines are disposed in the display area. A first connection line is disposed in the display area and connected to the data lines to transmit signals from the pad area to the data lines. The display area includes a dummy area adjacent to the boundary between the display area and the peripheral area. The first connection line includes a first portion extending from the edge in a direction away from the peripheral area and a second portion bent from the first portion and extending toward the corner. The second portion is connected to the data line in the dummy area located at the corner.

[0004] In the first connection line, the first portion and the second portion may extend in a direction inclined at a specific angle with respect to a first direction in which the data lines extend.

[0005] The first portion and the second portion of the first connection line may extend in a zigzag shape.

[0006] The first portion and the second portion of the first connection line may extend linearly.

[0007] The data lines and the first connection line may be on different layers from each other.

[0008] The first connection line may further include a third portion extending in a first direction in which the data lines extend and / or a fourth portion extending in a second direction perpendicular to the first direction.

[0009] The display device may further include a second connection line disposed in the peripheral area and including one end connected to one end of the first portion of the first connection line and the other end located in the pad area.

[0010] According to one or more embodiments of the present disclosure, a display device includes: a substrate including a display area and a peripheral area outside the display area. Corners at the edges of the display area include a circular shape. The peripheral area includes a pad area. A plurality of scan lines are disposed in the display area, and each of the plurality of scan lines extends in a first direction. A plurality of first data lines are disposed in the display area, and each of the plurality of first data lines extends in a second direction perpendicular to the first direction. A plurality of first connection lines are disposed in the display area and connected to the plurality of first data lines to transmit signals from the pad area to the plurality of first data lines. Each of the plurality of first connection lines includes a first portion extending from an edge in a direction away from the peripheral area and a second portion bent from the first portion and extending toward the corner. Each of the first portion and the second portion includes first sub-portions and second sub-portions that alternately extend, the first sub-portions extending parallel to at least one of the plurality of scan lines, and the second sub-portions extending parallel to at least one of the plurality of first data lines.

[0011] In each of the plurality of first connection lines, the first portion and the second portion may extend in a direction inclined at a specific angle with respect to the first direction while alternating between the first sub-portions and the second sub-portions.

[0012] The plurality of first connection lines may be on different layers from the plurality of scan lines.

[0013] The first sub-portions may at least partially overlap with at least one of the scan lines.

[0014] The plurality of first connection lines may be on different layers from the plurality of first data lines.

[0015] The second sub-portions may at least partially overlap with at least one of the first data lines.

[0016] The first sub-portions may include a length that is n times (where n is a positive integer) a first length corresponding to a distance between two adjacent first data lines, and the second sub-portions may include a length that is m times (where m is a positive integer) a second length corresponding to a distance between two adjacent scan lines.

[0017] The first sub-portions of adjacent first connection lines may be spaced apart from each other by a length that is n times (where n is a positive integer) the second length corresponding to a distance between two adjacent scan lines, and the second sub-portions of adjacent first connection lines may be spaced apart from each other by a length that is m times (where m is a positive integer) the first length corresponding to a distance between two adjacent first data lines.

[0018] Each of the plurality of first connection lines may further include a third portion connected to the first part and linearly extending in the first direction, and a fourth portion connected to the second part and linearly extending in the first direction.

[0019] Each of the plurality of first connection lines may further include a fifth portion located between the first part and the second part and linearly extending in the first direction.

[0020] The display area may include a dummy area adjacent to the boundary between the display area and the peripheral area. The second part may be connected to one of the plurality of first data lines in the dummy area located at the corner.

[0021] The display device may further include a second connection line, which is disposed in the peripheral area and includes one end connected to the first part of each of the plurality of first connection lines and the other end located in the pad area.

[0022] The display device may further include a plurality of second data lines disposed in the display area, and each of the plurality of second data lines extends in a second direction. A third connection line may be disposed in the peripheral area and may include one end connected to one of the plurality of second data lines and the other end located in the pad area. Description of the Drawings

[0023] From the following description in conjunction with the drawings, a more complete understanding of the present disclosure and many aspects brought by the present disclosure will become more apparent, wherein:

[0024] Figure 1 is a plan view schematically illustrating an example of a display panel according to an exemplary embodiment of the present disclosure;

[0025] Figure 2 is schematically illustrated Figure 1 a conceptual diagram of area A of

[0026] Figure 3 is schematically illustrated Figure 2 a conceptual diagram of area B of

[0027] Figure 4 is schematically illustrated Figure 2 a conceptual diagram of area C of

[0028] Figure 5 is a partial enlarged Figure 2 plan view of area C of

[0029] Figure 6A and Figure 6Bis an equivalent circuit diagram of a pixel provided in a display panel according to an exemplary embodiment of the present disclosure;

[0030] Figure 7 is a plan view schematically illustrating an example of a display panel according to an exemplary embodiment of the present disclosure;

[0031] Figure 8 is schematically illustrated Figure 7 a plan view of an example of region E;

[0032] Figure 9 is schematically illustrated Figure 7 a plan view of an example of region F;

[0033] Figure 10 is Figure 8 an enlarged plan view of region E';

[0034] Figure 11 illustrates an example in which a pixel electrode and a shielding member are provided on a first connection line according to an exemplary embodiment of the present disclosure;

[0035] Figure 12 is a cross-sectional view taken along line I-I' of Figure 11 ;

[0036] Figure 13 is schematically illustrated Figure 7 a plan view of an example of a sixth region of;

[0037] Figure 14 is schematically illustrated Figure 7 a plan view of an example of a sixth region of;

[0038] Figure 15A and Figure 15B is a plan view illustrating the arrangement of a first connection line according to an exemplary embodiment of the present disclosure;

[0039] Figure 16 is a plan view illustrating the arrangement of a first connection line according to an exemplary embodiment of the present disclosure;

[0040] Figure 17 is a plan view illustrating the shape of a first connection line according to an exemplary embodiment of the present disclosure;

[0041] Figure 18 is a plan view illustrating the shape of a first connection line according to an exemplary embodiment of the present disclosure;

[0042] Figure 19 is a diagram schematically illustrating a second connection line according to an exemplary embodiment of the present disclosure;

[0043] Figure 20An example of a display panel including a first connection line according to an exemplary embodiment of the present disclosure;

[0044] Figure 21 is a diagram schematically enlarging Figure 20 a part of;

[0045] Figure 22 is a perspective view of a display device including a display panel according to an exemplary embodiment of the present disclosure;

[0046] Figure 23A and Figure 23B are cross-sectional views taken along line V-V’ of Figure 22 respectively;

[0047] Figures 24A to 24D is a diagram schematically illustrating a cross-sectional view of a display panel according to an exemplary embodiment of the present disclosure; and

[0048] Figures 25A to 25D is a diagram schematically illustrating a cross-sectional view of a display panel according to an exemplary embodiment of the present disclosure. Detailed Description

[0049] Reference will now be made in detail to the embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout the drawings and the disclosure.

[0050] Terms such as “first” and “second” are not used to limit the meaning, but to distinguish one element from another.

[0051] As used herein, the singular forms “a” and “the” are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0052] It will be understood that when used herein, the terms “comprising” and / or “including” specify the presence of the stated features or elements, but do not preclude the presence or addition of one or more other features or elements.

[0053] In contrast, when used herein, the term “consisting of” specifies the presence of the stated features or elements and excludes the presence of other features or elements.

[0054] It will be further understood that when a layer, region or element is referred to as being “on” another layer, another region or another element, it can be directly or indirectly on the other layer, another region or another element. For example, there may be an intermediate layer, an intermediate region or an intermediate element.

[0055] For ease of explanation, the dimensions of elements in the drawings may be exaggerated or reduced. Thus, although the relative dimensions and angles of the elements shown in the drawings may indicate at least one exemplary embodiment of the present disclosure, there may be other exemplary embodiments of the present disclosure having relative dimensions and angles different from those shown.

[0056] When a wiring is said to "extend in a first direction or a second direction", the wiring may extend not only in a linear shape but also in a zigzag or curved shape in the first direction or the second direction. Further, when it is said that a wiring or an element extends in a specific direction, this means that the wiring or the element extends mainly in the specific direction, for example, the wiring or the element extends more in the specific direction than in any other direction.

[0057] The phrase "in a plan view" refers to a view of a target portion seen from above, and the phrase "in a cross-sectional view" refers to a vertical cross-sectional view of the target portion seen from the side. Unless otherwise defined, the term "overlap" includes "overlap in a plan view" and "overlap in a cross-sectional view".

[0058] Unless otherwise defined, the signals described herein are general terms for voltage or current.

[0059] Hereinafter, embodiments will be described in detail with reference to the drawings, wherein the same reference numerals may refer to the same elements throughout the drawings and the disclosure.

[0060] Figure 1 is a plan view schematically illustrating an example of a display panel 10A according to an exemplary embodiment of the present disclosure. Figure 2 is schematically illustrated Figure 1 a conceptual diagram of region A of Figure 3 is schematically illustrated Figure 2 a conceptual diagram of region B of Figure 4 is schematically illustrated Figure 2 a conceptual diagram of region C of Figure 5 is a partially enlarged Figure 2 plan view of region C of

[0061] Referring to Figure 1 , according to an exemplary embodiment of the present disclosure, the display panel 10A has a display area DA for displaying an image and a peripheral area PA located outside the display area DA. No image is displayed in the peripheral area PA. The peripheral area PA at least partially surrounds the display area DA. A single substrate 100A included in the display panel 10A may include both the display area DA and the peripheral area PA.

[0062] The edge of the display area DA may form a right angle. As Figure 1 and Figure 2As shown in the figure, the first corner CN1 at the edge of the display area DA may have a circular shape. Specifically, the display area DA may include a first edge E1 and a second edge E2 facing each other, and a third edge E3 and a fourth edge E4 located between the first edge E1 and the second edge E2 and facing each other. The pad area PADA is adjacent to the fourth edge E4 among the first edge E1 to the fourth edge E4. In this regard, the first corner CN1 having a circular shape connects the first edge E1 to the fourth edge E4. In addition to the first corner CN1, the second corner CN2 at the edge of the display area DA may also have a circular shape. The second corner CN2 connects the second edge E2 to the fourth edge E4. Not only the edges, but also another part of the display area DA may have a circular shape.

[0063] A plurality of pixels PX and wirings capable of applying an electrical signal to the plurality of pixels PX may be located in the display area DA. The peripheral area PA may not have pixels PX.

[0064] Each of the plurality of pixels PX may include a display element and a circuit portion for driving the display element. For example, the display element may be an organic light-emitting diode, and the circuit portion may include a plurality of transistors, capacitors, etc.

[0065] The signal lines capable of applying an electrical signal to the plurality of pixels PX may include a plurality of scan lines SL, a plurality of data lines DL, etc. Each of the plurality of scan lines SL may extend in a first direction D1, and each of the plurality of data lines DL may extend in a second direction D2. The plurality of scan lines SL may be provided in multiple rows, for example, to transmit a scan signal to the pixels PX, and the plurality of data lines DL may be provided in multiple columns, for example, to transmit a data signal to the pixels PX. Each of the plurality of pixels PX may be connected to the corresponding scan line SL among the plurality of scan lines SL and the corresponding data line DL among the plurality of data lines DL.

[0066] The peripheral area PA may at least partially surround the display area DA. The peripheral area PA, which is an area where no pixels PX are provided, may include a pad area PADA, which is an area where various electronic devices or printed circuit boards are electrically attached. Voltage lines supply power for driving the display elements and may be located in the peripheral area PA. The plurality of pads in the pad area PADA may be electrically connected to the film on which the data driver D_IC is provided. Figure 1 The figure illustrates a chip-on-film (COF) method in which the data driver D_IC is provided on a film, and the film is electrically connected to the pads provided on the substrate 100A. According to an exemplary embodiment of the present disclosure, the data driver D_IC may be directly provided on the substrate 100A by a chip-on-glass (COG) method or a chip-on-plastic (COP) method.

[0067] As Figure 2 illustrated, the peripheral region PA may include a bending region BA, and the bending region BA may be located between the pad region PADA and the display region DA. In this case, the substrate 100A may be bent in the bending region BA to allow at least a part of the pad region PADA to overlap with the display region DA. However, the pad region PADA does not cover the display region DA, and the bending direction is set to allow the pad region PADA to be located behind the display region DA. Therefore, the user regards the display region DA as occupying most of the display panel 10A.

[0068] Figure 3 is a schematic diagram Figure 2 of the region B and shows a part of the first corner CN1. As Figure 1 and Figure 2 illustrated, when a user using the display device according to the present embodiment or an electronic device including the display device observes the first corner CN1 in a normal use environment, the first corner CN1 is considered to have a circular / bent shape. However, in an environment where wirings having a width of several micrometers or several tens of micrometers can be observed by magnifying the first corner CN1, as Figure 3 illustrated, the first corner CN1 may be shown to have a linear shape bent multiple times in the first direction D1 and the second direction D2. Although as Figure 3 illustrated, by magnifying the first corner CN1, the first corner CN1 is shown to have a linear shape bent multiple times, in a normal use environment, the first corner CN1 is considered to have a circular / bent shape, and thus the first corner CN1 is hereinafter described as having a circular shape.

[0069] The display region DA may include a dummy region DMA. The dummy region DMA may be provided along the first edge E1 to the fourth edge E4 of the display region DA, as well as the first corner CN1 and the second corner CN2, and may be adjacent to the boundary between the display region DA and the peripheral region PA. A plurality of dummy pixels DPX may be provided in the dummy region DMA. The dummy pixels DPX may surround the pixel PX and may be located around the outermost pixel PX. In the dummy region DMA, one or more dummy pixels DPX may be provided at opposite ends of each pixel column and / or at opposite ends of each pixel row. The number of dummy pixels DPX provided in each pixel column or each pixel row may be the same or different. For convenience, Figure 3 some of the plurality of pixels PX in the display region DA and some of the plurality of dummy pixels DPX are illustrated. Although the display region DA is described herein as including the dummy region DMA, the dummy region DMA may be a boundary region between the display region DA and the peripheral region PA.

[0070] A connection line 200a for transmitting an electrical signal supplied from a pad to a signal line connected to a pixel PX may be provided on a substrate 100A. For example, the signal line may be a data line DL, and the connection line 200a may be disposed between the data line DL and a pad area PADA to transmit a data signal supplied from a pad of the pad area PADA to the data line DL.

[0071] The connection line 200a may include a first connection line 201, a second connection line 203, and a third connection line 205. The first connection line 201 may be disposed in a display area DA. The second connection line 203 and the third connection line 205 may be disposed in a peripheral area PA. Some of the first connection lines 201 may be disposed in a dummy area DMA. The second connection line 203 and the third connection line 205 may be disposed in a fan-out area FOA located in the peripheral area PA. The fan-out area FOA may be located between the pad area PADA and the display area DA.

[0072] The display area DA may be divided into a plurality of areas according to an extending direction of the first connection line 201. For example, the display area DA may include a first area S1 in which the first connection line 201 extends in a first direction D1, a second area S2 in which the first connection line 201 extends in a second direction D2, and a third area S3 that is a remaining area other than the first area S1 and the second area S2. The third area S3 may be an area in which the first connection line 201 is not provided. Each of the first area S1 and the second area S2 may be plural, and each may have a triangular shape. For example, the second area S2 located at the center may be triangular. Each of the first areas S1 on both sides of the second area S2 located at the center may have an inverted triangular shape. The second area S2 located outside the first area S1 may have a right-angled triangular shape.

[0073] The first connection line 201 provided on the left side of a center line CL passing through the center of the display panel 10A in the first direction D1 and the first connection line 201 provided on the right side of the center line CL may be substantially vertically symmetric with respect to the center line CL.

[0074] Reference Figure 4, the first connection line 201 can be on a different layer from the scan line SL and the data line DL of the pixel PX. Each of the first connection lines 201 can include a first portion 201a extending in the first direction D1 and second and third portions 201b and 201c respectively extending from opposite ends of the first portion 201a in the second direction D2. The first portion 201a can connect the second portion 201b to the third portion 201c, and the first through third portions 201a - 201c can be integrally formed (formed as a single continuum). The first portion 201a of each of the first connection lines 201 can extend parallel to the scan line SL of the pixel PX and can partially overlap the scan line SL or alternatively be adjacent to the scan line SL. The first portion 201a of each of the first connection lines 201 can extend parallel to the scan line SL in one of a plurality of rows. The second and third portions 201b and 201c of each of the first connection lines 201 can extend parallel to the data line DL and can partially overlap the data line DL or alternatively be adjacent to the data line DL. The second portion 201b of each of the first connection lines 201 can extend parallel to the first data line DL1 in one of a plurality of columns. The third portion 201c of each of the first connection lines 201 can extend parallel to the second data line DL2, which is disposed in one of the columns among the plurality of columns other than the column in which the second portion 201b is disposed.

[0075] One end of the first connection line 201 can be connected to the first data line DL1, and the other end of the first connection line 201 can be connected to the second connection line 203. For example, the second portion 201b of the first connection line 201 can be connected to the first data line DL1 at a first contact portion CNT1 located in the dummy area DMA. The third portion 201c of the first connection line 201 can be connected to the second connection line 203. According to an exemplary embodiment of the present disclosure, the second connection line 203 can be the portion where the third portion 201c of the first connection line 201 extends to the peripheral area PA via the dummy area DMA. One end of the second connection line 203 can be connected to the other end of the first connection line 201, and the other end of the second connection line 203 can be connected to a pad in the pad area PADA. One end of the third connection line 205 can be connected to the second data line DL2, and the other end of the third connection line 205 can be connected to a pad in the pad area PADA. One end of the third connection line 205 can be connected to the second data line DL2 in the dummy area DMA. The third connection line 205 can be the portion where the second data line DL2 not connected to the first connection line 201 extends to the peripheral area PA via the dummy area DMA.

[0076] As Figure 5As shown in the figure, a first pattern area A1 defined between first portions 201a of adjacent first connection lines 201 may be located in a first area S1. A first dummy pattern 202a1, a second dummy pattern 202c1, and a third dummy pattern 202d1 may be provided in the first pattern area A1. The first dummy pattern 202a1 may be located on an imaginary line extending from a second portion 201b or a third portion 201c of the first connection line 201. The first dummy pattern 202a1 and the second dummy pattern 202c1 may be connected to each other by a branch 202b1 protruding from the first dummy pattern 202a1. The branch 202b1 that is part of the first dummy pattern 202a1 may be a dummy pattern. The first dummy pattern 202a1, the branch 202b1, and the second dummy pattern 202c1 may be integrally formed.

[0077] Similarly, a second pattern area A2 defined between a second portion 201b or a third portion 201c of adjacent first connection lines 201 may be located in a second area S2. A first dummy pattern 202a2, a second dummy pattern 202c2, and a third dummy pattern 202d2 may be provided in the second pattern area A2. The first dummy pattern 202a2 may be located on an imaginary line extending from a first portion 201a of the first connection line 201. The first dummy pattern 202a2 and the second dummy pattern 202c2 may be connected to each other by a branch 202b2 protruding from the first dummy pattern 202a2 in a second direction D2. The branch 202b2 that is part of the first dummy pattern 202a2 may be a dummy pattern. The first dummy pattern 202a2, the branch 202b2, and the second dummy pattern 202c2 may be integrally formed.

[0078] The first connection line 201, the first dummy pattern 202a1, the second dummy pattern 202c1, the third dummy pattern 202d1, and the branch 202b1 of the first pattern area A1, and the first dummy pattern 202a2, the second dummy pattern 202c2, the third dummy pattern 202d2, and the branch 202b2 of the second pattern area A2 may be provided on the same layer. The second dummy pattern 202c1 and the third dummy pattern 202d1 of the first pattern area A1 and the second dummy pattern 202c2 and the third dummy pattern 202d2 of the second pattern area A2 may have shapes similar to each other.

[0079] Since the light reflection characteristics in the first area S1 and the second area S2 become similar due to the first pattern area A1 and the second pattern area A2, it may be difficult to identify the division between the first area S1 and the second area S2 based on the incident angle of light.

[0080] Figure 6A and Figure 6BIt is an equivalent circuit diagram of a pixel PX provided in a display panel according to an exemplary embodiment of the present disclosure.

[0081] Reference Figure 6A , the pixel PX includes a pixel circuit PC and an organic light-emitting diode OLED as a display device connected to the pixel circuit PC. The pixel circuit PC may include a first transistor T1, a second transistor T2, and a capacitor Cst. Each pixel PX may emit, for example, red light, green light, blue light, or white light from the organic light-emitting diode OLED. The first transistor T1 and the second transistor T2 may be thin-film transistors.

[0082] The second transistor T2, which serves as a switching transistor, may be connected to a scan line SL and a data line DL, and may transfer a data signal input from the data line DL to the first transistor T1 according to a switching voltage input to the scan line SL. The capacitor Cst may be connected to the second transistor T2 and a power supply voltage line PL, and may store a voltage corresponding to the difference between the voltage corresponding to the data signal received from the second transistor T2 and a first power supply voltage ELVDD supplied to the power supply voltage line PL. The power supply voltage line PL may be spaced apart in parallel from the scan line SL or the data line DL.

[0083] The first transistor T1, which serves as a driving transistor, may be connected to the power supply voltage line PL and the capacitor Cst, and may control a driving current Ioled flowing through the organic light-emitting diode OLED from the power supply voltage line PL in response to the voltage value stored in the capacitor Cst. The organic light-emitting diode OLED may emit light with a specific brightness according to the driving current Ioled. An opposite electrode (e.g., a cathode) of the organic light-emitting diode OLED may receive a second power supply voltage ELVSS.

[0084] Although Figure 6A the pixel circuit PC shown includes two transistors and one capacitor, the embodiments are not limited thereto. The number of transistors and the number of capacitors may be variously changed according to the design of the pixel circuit PC.

[0085] Although Figure 6B the signal lines SL1, SL2, EL, and DL, an initialization voltage line VIL, and a power supply voltage line PL provided for each pixel PX are shown, the embodiments are not limited thereto. According to an exemplary embodiment of the present disclosure, at least one of the signal lines SL1, SL2, EL, and DL, the initialization voltage line VIL, and the power supply voltage line PL may be shared between adjacent pixels.

[0086] The signal lines include a first scan line SL1 for transmitting a first scan signal GW, a second scan line SL2 for transmitting a second scan signal GI, an emission control line EL for transmitting an emission control signal EM, and a data line DL that intersects the first scan line SL1 and transmits a data signal DATA. The second scan line SL2 can be connected to the first scan line SL1 of the next or previous row, and the second scan signal GI can be the first scan signal GW of the next or previous row.

[0087] The power supply voltage line PL transmits a first power supply voltage ELVDD to the first transistor T1, and the initialization voltage line VIL transmits an initialization voltage VINT for initializing the first transistor T1 and the pixel electrode of the organic light emitting diode OLED to the pixel PX.

[0088] The first scan line SL1, the second scan line SL2, the emission control line EL, and the initialization voltage line VIL can extend in a first direction D1 and can be spaced apart from each other in corresponding rows. The data line DL and the power supply voltage line PL can extend in a second direction D2 and can be spaced apart from each other in corresponding columns. The first scan line SL1 or the second scan line SL2 can be Figure 4 the scan line SL illustrated in

[0089] The pixel circuit PC of the pixel PX can include a first transistor T1 to a seventh transistor T7 and a capacitor Cst. The first transistor T1 to the seventh transistor T7 can be thin film transistors.

[0090] The first transistor T1 is connected to the power supply voltage line PL via the fifth transistor T5 and is electrically connected to the pixel electrode of the organic light emitting diode OLED via the sixth transistor T6. The first transistor T1 serves as a driving transistor, and when the data signal DATA is transmitted to the first transistor T1 according to the switching operation of the second transistor T2, the first transistor T1 supplies a driving current Ioled to the organic light emitting diode OLED.

[0091] The second transistor T2 is connected to the first scan line SL1 and the data line DL, and when the second transistor T2 is turned on according to the first scan signal GW received through the first scan line SL1, the second transistor T2 performs a switching operation for transmitting the data signal DATA transmitted through the data line DL to the node N.

[0092] The third transistor T3 is connected to the pixel electrode of the organic light emitting diode OLED via the sixth transistor T6. When the third transistor T3 is turned on according to the first scan signal GW received through the first scan line SL1, the third transistor T3 diode - connects the first transistor T1.

[0093] When the fourth transistor T4 is turned on according to the second scan signal GI received through the second scan line SL2, the fourth transistor T4 initializes the gate voltage of the first transistor T1 by transmitting the initialization voltage VINT input to the initialization voltage line VIL to the gate electrode of the first transistor T1.

[0094] When the fifth transistor T5 and the sixth transistor T6 are simultaneously turned on according to the emission control signal EM received through the emission control line EL, a current path is formed to allow the drive current Ioled to flow in the direction from the power supply voltage line PL to the organic light emitting diode OLED.

[0095] When the seventh transistor T7 is turned on according to the second scan signal GI received through the second scan line SL2, the seventh transistor T7 initializes the pixel electrode of the organic light emitting diode OLED by transmitting the initialization voltage VINT input to the initialization voltage line VIL to the pixel electrode of the organic light emitting diode OLED. The seventh transistor T7 may be omitted.

[0096] Although Figure 6B FIG. shows the fourth transistor T4 and the seventh transistor T7 connected to the second scan line SL2, but the exemplary embodiments of the present disclosure are not limited thereto. According to the exemplary embodiments of the present disclosure, the fourth transistor T4 may be connected to the second scan line SL2, and the seventh transistor T7 may be connected to a separate wiring and driven according to the signal transmitted to the wiring.

[0097] The capacitor Cst may be connected to the power supply voltage line PL and the gate electrode of the first transistor T1, and may hold the voltage applied to the gate electrode of the first transistor T1 by storing and holding the voltage corresponding to the difference between the voltages at both ends.

[0098] The organic light emitting diode OLED may include a pixel electrode, a common electrode facing the pixel electrode, and an emission layer between the pixel electrode and the common electrode. The second power supply voltage ELVSS may be applied to the common electrode. The organic light emitting diode OLED receives the drive current Ioled from the first transistor T1 and thus emits light to display an image.

[0099] The dummy pixel DPX may include the same pixel circuit PC as the Figure 6A and Figure 6B pixel PX, and may not include some elements of the organic light emitting diode OLED and thus may not emit light. According to the exemplary embodiments of the present disclosure, the dummy pixel DPX may not include a pixel electrode, but may include an emission layer and a counter electrode.

[0100] Figure 7is a plan view schematically illustrating an example of a display panel 10B according to an exemplary embodiment of the present disclosure. Figure 8 and Figure 9 is a plan view schematically illustrating Figure 7 examples of regions E and F of Figure 10 is Figure 8 an enlarged plan view of region E' of

[0101] In Figure 7 the display panel 10B of Figure 1 the setting of the first connection line 210 is different from the setting of the first connection line 201 of Figure 1 the display panel 10A. However, other details may be at least similar to the details already described. Hereinafter, configurations different from

[0102] Referring to Figure 7 , the display panel 10B according to an exemplary embodiment of the present disclosure has a display area DA for displaying an image and a peripheral area PA located outside the display area DA. For example, the substrate 100B included in the display panel 10B may include both the display area DA and the peripheral area PA. The display area DA may include dummy areas DMA provided along a first edge E1 to a fourth edge E4 and first and second corners CN1 and CN2.

[0103] A plurality of pixels PX and wirings capable of applying an electrical signal to the plurality of pixels PX may be located in the display area DA. The pixels PX may be Figure 6A and Figure 6B the pixels illustrated in

[0104] Dummy pixels DPX may be provided in the dummy areas DMA surrounding the pixels PX and adjacent to the peripheral area PA.

[0105] Connection lines 200b for transmitting an electrical signal supplied from a pad to a signal line connected to the pixel PX may be provided on the substrate 100B. For example, the signal line may be a data line DL, and the connection line 200b may be provided between the data line DL and the pad area PADA to transmit a data signal supplied from a pad in the pad area PADA to the data line DL.

[0106] The display area DA may include a fourth area S4 and a fifth area S5 in which the first connection lines 210 are provided, and a sixth area S6 that is the remaining area other than the fourth area S4 and the fifth area S5. The fourth area S4 may be the area to the left of the first center line CL1. The fifth area S5 may be the area to the right of the first center line CL1. The first center line CL1 may be an imaginary line that passes through the center of the display panel 10B in the first direction D1. The first connection line 210aA provided in the fourth area S4 and the first connection line 210bA provided in the fifth area S5 may be substantially vertically symmetric with respect to the first center line CL1. The sixth area S6 may be an area in which the first connection line 210 is not provided. Each of the fourth area S4 and the fifth area S5 may have a substantially triangular shape. The fourth area S4 may include a first sub-area S4a in which the first connection line 210aA extends from the fourth edge E4 in a direction away from the peripheral area PA, and a second sub-area S4b in which the first connection line 210aA extends toward the first corner CN1 by changing its direction in the first sub-area S4a. Each of the first sub-area S4a and the second sub-area S4b may have a substantially right-angled triangular shape. The fifth area S5 may include a third sub-area S5a in which the first connection line 210bA extends from the fourth edge E4 in a direction away from the peripheral area PA, and a fourth sub-area S5b in which the first connection line 210bA extends toward the second corner CN2 by changing its direction in the third sub-area S5a. Each of the third sub-area S5a and the fourth sub-area S5b may have a substantially right-angled triangular shape.

[0107] Each of the first connection lines 210aA disposed in the fourth region S4 may include a first portion 212 and a second portion 214. The first portion 212 may be disposed in the first sub-region S4a and may extend in a diagonal direction from the fourth edge E4 to the second center line CL2. The diagonal direction may be a direction inclined at a specific angle (e.g., an angle greater than 0 degrees and less than 90 degrees) from the first direction D1 or the second direction D2. The second portion 214 may be disposed in the second sub-region S4b and may extend in a diagonal direction from the second center line CL2 to the first corner CN1. For example, the first portion 212 may extend in a first diagonal direction DD1 rising from the lower right to the upper left, and the second portion 214 may extend in a second diagonal direction DD2 falling from the upper right to the lower left. The second portion 214 may be a portion where the first portion 212 extends by changing its direction at the second center line CL2. According to an exemplary embodiment of the present disclosure, the first portion 212 and the second portion 214 of each of the first connection lines 210aA may be substantially vertically symmetric with respect to the second center line CL2. For example, in the first connection line 210aA, the angle between the extending direction of the first portion 212 and the first direction D1 or the second direction D2 and the angle between the extending direction of the second portion 214 and the first direction D1 or the second direction D2 may be substantially the same. According to an exemplary embodiment of the present disclosure, in the first connection line 210aA, the angle between the extending direction of the first portion 212 and the first direction D1 or the second direction D2 and the angle between the extending direction of the second portion 214 and the first direction D1 or the second direction D2 may be different from each other.

[0108] Similarly, each of the first connection lines 210bA disposed in the fifth region S5 may include a first portion 216 and a second portion 218. The first portion 216 may be disposed in the third sub-region S5a and may extend in a diagonal direction from the fourth edge E4 to the third center line CL3. The second portion 218 may be disposed in the fourth sub-region S5b and may extend in a diagonal direction from the third center line CL3 to the second corner CN2. For example, the first portion 216 may extend in a third diagonal direction DD3 rising from the lower left to the upper right, and the second portion 218 may extend in a fourth diagonal direction DD4 falling from the upper left to the lower right. The second portion 218 may be a portion where the first portion 216 extends by changing its direction at the third center line CL3. According to an exemplary embodiment of the present disclosure, the first portion 216 and the second portion 218 of each of the first connection lines 210bA may be substantially vertically symmetric with respect to the third center line CL3. For example, in the first connection line 210bA, the angle between the extending direction of the first portion 216 and the first direction D1 or the second direction D2 and the angle between the extending direction of the second portion 218 and the first direction D1 or the second direction D2 may be substantially the same. According to an exemplary embodiment of the present disclosure, in the first connection line 210bA, the angle between the extending direction of the first portion 216 and the first direction D1 or the second direction D2 and the angle between the extending direction of the second portion 218 and the first direction D1 or the second direction D2 may be different from each other.

[0109] The first diagonal direction DD1 to the fourth diagonal direction DD4 may be directions between the first direction D1 and the second direction D2, and these directions are inclined at a specific angle with respect to the first direction D1 or the second direction D2.

[0110] Reference Figure 8 and Figure 9 and, the first connection line 210aA may be on a different layer from the scan line SL and the data line DL of the pixel PX. One end of the first connection line 210aA may be connected to the first data line DL1, and the other end of the first connection line 210aA may be connected to the second connection line 230. One end of the first connection line 210aA may be connected to the first data line DL1 in the dummy region DMA located at the first corner CN1. For example, the second portion 214 of the first connection line 210aA may be connected to the first data line DL1 in the second contact portion CNT2 located in the dummy region DMA.

[0111] A first portion 212 of the first connection line 210aA may be connected to the second connection line 230. According to an exemplary embodiment of the present disclosure, the second connection line 230 may be a portion where the first portion 212 of the first connection line 210aA extends to the peripheral region PA via the dummy region DMA. One end of the second connection line 230 may be connected to the other end of the first connection line 210aA, and the other end of the second connection line 230 may be located in the pad region PADA. The other end of the second connection line 230 may be connected to a pad provided in the pad region PADA.

[0112] One end of the third connection line 250 may be connected to the second data line DL2, and the other end of the third connection line 250 may be located in the pad region PADA. The other end of the third connection line 250 may be connected to a pad provided in the pad region PADA. One end of the third connection line 250 may be connected to the second data line DL2 in the peripheral region PA or the dummy region DMA. The third connection line 250 may be a portion where the second data line DL2 extends to the peripheral region PA via the dummy region DMA.

[0113] Similarly, the first connection line 210bA may be on a different layer from the scan line SL and the data line DL of the pixel PX. One end of the first connection line 210bA may be connected to the first data line DL1, and the other end of the first connection line 210bA may be connected to the second connection line 230. One end of the first connection line 210bA may be connected to the first data line DL1 in the dummy region DMA located at the second corner CN2. For example, a second portion 218 of the first connection line 210bA may be connected to the first data line DL1 in the second contact portion CNT2 located in the dummy region DMA.

[0114] A first portion 216 of the first connection line 210bA may be connected to the second connection line 230. According to an exemplary embodiment of the present disclosure, the second connection line 230 may be a portion where the first portion 216 of the first connection line 210bA extends to the peripheral region PA via the dummy region DMA. One end of the second connection line 230 may be connected to the other end of the first connection line 210bA, and the other end of the second connection line 230 may be connected to a pad of the pad region PADA.

[0115] One end of the third connection line 250 may be connected to the second data line DL2, and the other end of the third connection line 250 may be connected to a pad of the pad region PADA. One end of the third connection line 250 may be connected to the second data line DL2 in the peripheral region PA or the dummy region DMA. The third connection line 250 may be a portion where the second data line DL2 extends to the peripheral region PA via the dummy region DMA.

[0116] The first data line DL1 is a data line among the data lines DL that is adjacent to the first corner CN1 and the second corner CN2 and is connected to the first connection lines 210aA and 210bA. The second data line DL2 is a data line among the data lines DL other than the first data line DL1, for example, a data line not connected to the first connection lines 210aA and 210bA.

[0117] The first connection line 210aA and the second connection line 230 can connect the first data line DL1 disposed on the left side of the second center line CL2 and the pads of the pad region PADA. The first connection line 210bA and the second connection line 230 can connect the first data line DL1 disposed on the right side of the third center line CL3 to the pads of the pad region PADA. Since the first connection line 210 is disposed in the display region DA to connect the first data line DL1 to the second connection line 230, the peripheral region PA around the first corner CN1 and the second corner CN2 can be reduced, and thus, the dead zone can be reduced without reducing the display region DA at the first corner CN1 and the second corner CN2.

[0118] Each first data line DL1 having one end at the first corner CN1 can be connected to the first connection line 210aA and can thus be electrically connected to the second connection line 230. Each first data line DL1 having one end at the second corner CN2 can be connected to the first connection line 210bA and can thus be electrically connected to the second connection line 230. The second data line DL2 spaced apart from the first corner CN1 and the second corner CN2 by a specific distance can be directly connected to the third connection line 250.

[0119] Each of the first part 212 and the second part 214 of the first connection line 210aA can include a first sub - part 211a parallel to the scan line SL and a second sub - part 211b parallel to the data line DL that extend alternately. Each of the first part 216 and the second part 218 of the first connection line 210bA can include a first sub - part 211a parallel to the scan line SL and a second sub - part 211b parallel to the data line DL that extend alternately. The first sub - part 211a of the first connection lines 210aA and 210bA can extend parallel to the scan line SL to a first length corresponding to the distance between two adjacent data lines DL. The second sub - part 211b of the first connection lines 210aA and 210bA can extend parallel to the data line DL to a second length corresponding to the distance between two adjacent scan lines SL. The first sub - part 211a of the first connection lines 210aA and 210bA can overlap or be adjacent to the scan line SL. The second sub - part 211b of the first connection lines 210aA and 210bA can overlap or be adjacent to the data line DL.

[0120] Figure 8 and Figure 9 The embodiments illustrated in Figure 9 are such examples in which each of the first connection lines 210aA and 210bA extends to a first length overlapping a scan line SL and then is bent to extend to a second length overlapping a data line DL. For example, when the first sub - portion 211a and the second sub - portion 211b are repeated, the first portion 212 of the first connection line 210aA can be overall zig - zag in a first diagonal direction DD1, and when the first sub - portion 211a and the second sub - portion 211b are repeated, the second portion 214 can be overall zig - zag in a second diagonal direction DD2. When the first sub - portion 211a and the second sub - portion 211b are repeated, the first portion 216 of the first connection line 210bA can be overall zig - zag in a third diagonal direction DD3, and when the first sub - portion 211a and the second sub - portion 211b are repeated, the second portion 218 can be overall zig - zag in a fourth diagonal direction DD4. For example, the first connection line 210 can be a stepped pattern (or zig - zag pattern) wiring having a shape that gradually rises or falls in either direction and includes alternately connected first sub - portions 211a and second sub - portions 211b. The first sub - portion 211a and the second sub - portion 211b can be connected to each other while crossing at substantially right angles. Thus, the first connection line 210 can overlap scan lines SL of multiple rows and can overlap data lines DL of multiple columns.

[0121] In Figure 1 In the embodiments illustrated in Figure 1 , the first portion 201a of each of the first connection lines 201 extends parallel to a scan line SL provided in one row. A plurality of pixels PX can be connected to the scan line SL of each row, and a scan signal can be simultaneously applied to the plurality of pixels PX in each row. Since the first portion 201a of the first connection line 201 extends parallel to a scan line SL to n times the first length, a parasitic capacitor can be formed between the first portion 201a of the first connection line 201 and the scan line SL, and thus, coupling may occur. Therefore, the data signal transmitted to the data line DL connected to the first connection line 201 may change, and thus, deterioration of image quality due to diagonal spots may occur.

[0122] In Figure 7 In the embodiments illustrated in Figure 7 , the first connection line 210 can extend in a zig - zag shape via a plurality of pixels PX of a plurality of rows and a plurality of columns. For example, the first sub - portion 211a of the first connection line 210 can be located in different rows, and thus, as compared with Figure 1Compared with the embodiments illustrated therein, the length of overlap between the first sub - portion 211a and the scan line SL in each row can be reduced. The scan signals can be applied to multiple scan lines SL provided in different rows at different timings, and the parasitic capacitors between the first connection line 210 and the scan lines SL can be distributed among multiple rows, and thus the parasitic capacitance can be reduced. Therefore, deterioration of image quality due to diagonal spots can be prevented by reducing the influence of the scan lines SL on the data signals.

[0123] As Figure 10 illustrated, the first pattern region X1 defined between adjacent first connection lines 210aA can be located in the fourth region S4. The dummy patterns 220c1 and 220d1 can be provided in the first pattern region X1. The first pattern region X1 defined by the first connection line 210bA can be located in the fifth region S5.

[0124] The first connection line 210aA and the dummy patterns 220c1 and 220d1 of the first pattern region X1 can be provided on the same layer. The dummy patterns 220c1 and 220d1 of the first pattern region X1 can be in a floating state.

[0125] Since the light reflection characteristics in the fourth region S4 and the fifth region S5 become similar due to the first pattern region X1, it may be difficult to identify the division between the fourth region S4 and the fifth region S5 based on the incident angle of light. The dummy patterns can prevent signal interference between the pixel circuit and the first connection line, and can make it easier to manufacture by ensuring the pattern density.

[0126] As Figure 10 illustrated, the first sub - portions 211a of an adjacent pair of first connection lines 210aA and 210bA can be spaced apart from each other by a length (second length) corresponding to the distance between two adjacent scan lines SL in the second direction D2. The second sub - portions 211b of the adjacent pair of first connection lines 210aA and 210bA can be spaced apart from each other by a length (first length) corresponding to the distance between two adjacent data lines DL in the first direction D1.

[0127] The display element can be provided on the first connection line 210. Hereinafter, reference will be made to Figure 11 and Figure 12 for description.

[0128] Figure 11 An example in which the pixel electrode 131 and the shielding member 150 are provided on the first connection line 210 is illustrated. Figure 12 is a cross - sectional view taken along the line I - I’ of Figure 11 the

[0129] A plurality of pixels PX can be provided in the display area DA of the substrate 100B. A thin film transistor TFT, a capacitor Cst, and a display element 130 electrically connected to the thin film transistor TFT can be provided in each pixel PX. The display element 130 can be Figure 6A and Figure 6B an organic light emitting diode OLED. The thin film transistor TFT can be Figure 6A and Figure 6B one of the transistors. For example, Figure 12 the thin film transistor TFT illustrated in Figure 6A and Figure 6B can be the first transistor T1.

[0130] A buffer layer 111 can be located on the substrate 100B as needed. The buffer layer 111 can planarize the surface of the substrate 100B, or can prevent impurities, etc. from passing through the semiconductor layer provided on the substrate 100B. The buffer layer 111 can have a single / multilayer structure including an inorganic insulating material such as silicon oxide, silicon nitride, and / or silicon oxynitride. The buffer layer 111 can be omitted.

[0131] The thin film transistor TFT can be provided on the buffer layer 111. The thin film transistor TFT can include a semiconductor layer 121, a gate electrode 122, a source electrode 123S, and a drain electrode 123D.

[0132] The semiconductor layer 121 can include amorphous silicon, polycrystalline silicon, and / or an organic semiconductor material. The semiconductor layer 121 can include a source region, a drain region, and a channel region between the source region and the drain region.

[0133] Considering factors such as adhesion to adjacent layers, surface smoothness of the layers to be stacked, and processability, etc., the gate electrode 122 can have a single or multilayer structure including, for example, aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu).

[0134] A first insulating layer 112 can be provided between the semiconductor layer 121 and the gate electrode 122. A second insulating layer 113 and a third insulating layer 114 can each be provided between the gate electrode 122 and the source electrode 123S and the drain electrode 123D. The first insulating layer 112, the second insulating layer 113, and the third insulating layer 114 can include an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride. Figure 6A and Figure 6B The scan lines SL, SL1, and SL2 and the emission control line EL can be provided on the same layer as the gate electrode 122, for example, on the first insulating layer 112.

[0135] The source electrode 123S and the drain electrode 123D can be electrically connected to the source region and the drain region of the semiconductor layer 121 through contact holes formed in the first insulating layer 112, the second insulating layer 113, and the third insulating layer 114, respectively.

[0136] The source electrode 123S and the drain electrode 123D can have a single-layer or multi-layer structure including, for example, aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu).

[0137] The capacitor Cst includes a lower electrode CE1 and an upper electrode CE2 that overlap each other, and the second insulating layer 113 is disposed between the lower electrode CE1 and the upper electrode CE2. The capacitor Cst can overlap with the thin film transistor TFT. In this regard, Figure 12 The gate electrode 122 of the illustrated thin film transistor TFT is the lower electrode CE1 of the capacitor Cst. According to an exemplary embodiment of the present disclosure, the capacitor Cst may not overlap with the thin film transistor TFT, and the lower electrode CE1 of the capacitor Cst may be an independent element separated from the gate electrode 122 of the thin film transistor TFT. The capacitor Cst can be covered by the third insulating layer 114. Figure 6B The initialization voltage line VIL can be provided on the same layer as the upper electrode CE2 of the capacitor Cst, for example, on the second insulating layer 113.

[0138] The pixel circuit including the thin film transistor TFT and the capacitor Cst can be covered by the fourth insulating layer 115 and the fifth insulating layer 116. The fourth insulating layer 115 and the fifth insulating layer 116 as planarization insulating layers can be organic insulating layers. The fourth insulating layer 115 and the fifth insulating layer 116 can include organic insulating materials such as general polymers such as poly(methyl methacrylate) (PMMA) or polystyrene (PS), polymer derivatives having a phenol group, acrylate polymers, imide polymers, aryl ether polymers, amide polymers, fluorine polymers, parylene polymers, vinyl alcohol polymers, mixtures thereof, etc. According to an exemplary embodiment of the present disclosure, each of the fourth insulating layer 115 and the fifth insulating layer 116 can include polyimide.

[0139] Various conductive layers may be further disposed on the third insulating layer 114. For example, data lines DL and power voltage lines PL may be disposed on the third insulating layer 114, for example, on the same layer as the source electrode 123S and the drain electrode 123D. The data lines DL and the power voltage lines PL may include magnesium (Mg), aluminum (Al), copper (Cu), titanium (Ti), etc., and may have a multi-layer or single-layer structure. According to an exemplary embodiment of the present disclosure, the data lines DL and the power voltage lines PL may have a multi-layer structure of Ti / Al / Ti.

[0140] The fourth insulating layer 115 may be disposed on the data lines DL and the power voltage lines PL. As Figure 10 illustrated, the first connection line 210 and the dummy patterns 220c1 and 220d1 may be disposed on the fourth insulating layer 115. The first connection line 210 and the dummy patterns 220c1 and 220d1 may be a single film or a multi-layer film including magnesium (Mg), aluminum (Al), copper (Cu), titanium (Ti), and / or their alloys. According to an exemplary embodiment of the present disclosure, the first connection line 210 and the dummy patterns 220c1 and 220d1 may have a multi-layer structure of Ti / Al / Ti. The fifth insulating layer 116 may be disposed on the first connection line 210 and the dummy patterns 220c1 and 220d1. According to an exemplary embodiment of the present disclosure, a part of the first connection line 210 may overlap or be adjacent to the data line DL, and other parts of the first connection line 210 may overlap or be adjacent to the scan line SL. Figure 12 An example is illustrated in which the second part 211b of the first connection line 210 (210aA, 210bA) is adjacent to the data line DL and overlaps the power voltage line PL. The first part 211a of the first connection line 210 (210aA, 210bA) may overlap or be adjacent to the scan line SL.

[0141] The display element 130 may be disposed on the fifth insulating layer 116. The display element 130 may include a pixel electrode 131, a counter electrode 135, and an intermediate layer 133 between the pixel electrode 131 and the counter electrode 135.

[0142] The pixel electrode 131 may include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and / or aluminum zinc oxide (AZO). According to an exemplary embodiment of the present disclosure, the pixel electrode 131 may include a reflective film including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), and / or a compound thereof. According to an exemplary embodiment of the present disclosure, the pixel electrode 131 may further include a film on / under the above reflective film, the film including ITO, IZO, ZnO, and / or In2O3. The pixel electrode 131 may be electrically connected to the source electrode 123S or the drain electrode 123D of the thin film transistor TFT through a connection member 128 disposed on the fourth insulating layer 115.

[0143] The shielding member 150 may be further disposed on the fifth insulating layer 116. The shielding member 150 may extend along a part of the edge of the pixel electrode 131 in the first direction D1 so as not to overlap the pixel electrode 131 in a plan view, and may be disposed on the upper side or the lower side of each row. According to the setting of the pixel electrodes 131 in the same row, the shielding member 150 may have a linear shape or a zigzag shape extending in the first direction D1. The shielding member 150 may include a light-blocking metal. For example, the shielding member 150 may include magnesium (Mg), aluminum (Al), copper (Cu), titanium (Ti), etc., and may have a multi-layer or single-layer structure including the above materials. According to an exemplary embodiment of the present disclosure, the shielding member 150 may have a multi-layer structure of Ti / Al / Ti. The shielding member 150 may include the same material as the pixel electrode 131. The shielding members 150 may be spaced apart from each other and may be provided independently for each row. The shielding member 150 may be floating, or may be electrically connected to a constant voltage wiring (e.g., a power supply voltage line, an initialization voltage line, etc.) to receive a constant voltage.

[0144] The sixth insulating layer 117 covering the edge of the pixel electrode 131 may be disposed on the fifth insulating layer 116. The sixth insulating layer 117 may have an opening OP that partially exposes the pixel electrode 131, and thus may define a pixel. The sixth insulating layer 117 may include an organic material such as an acrylic resin, benzocyclobutene (BCB), polyimide, or hexamethyldisiloxane (HMDSO). Alternatively, the sixth insulating layer 117 may include the above inorganic material.

[0145] The intermediate layer 133 may be on the pixel electrode 131 exposed by the opening OP of the sixth insulating layer 117. The intermediate layer 133 includes an emission layer. The emission layer may include a polymer or a low-molecular-weight organic material that emits light of a specific color. The emission layer may be a red emission layer, a green emission layer, or a blue emission layer. Alternatively, the emission layer may have a multilayer structure in which a red emission layer, a green emission layer, and a blue emission layer are stacked to emit white light, or may have a single-layer structure including a red light-emitting material, a green light-emitting material, and a blue light-emitting material. According to an exemplary embodiment of the present disclosure, the intermediate layer 133 may include a first functional layer under the emission layer and / or a second functional layer on the emission layer. The first functional layer and / or the second functional layer may include an integral layer over the plurality of pixel electrodes 131, or may include a layer patterned to correspond to each of the plurality of pixel electrodes 131.

[0146] The first functional layer may have a single-layer or multilayer structure. For example, when the first functional layer includes a polymer material, the first functional layer may be a hole transport layer (HTL) having a single-layer structure and may include poly-(3,4)-ethylenedioxythiophene (PEDOT) or polyaniline (PANI). When the first functional layer includes a low-molecular-weight material, the first functional layer may include a hole injection layer (HIL) and an HTL.

[0147] The second functional layer is not always provided. For example, when the first functional layer and the emission layer include polymer materials, the second functional layer may be formed to make the characteristics of the organic light-emitting diode excellent. The second functional layer may have a single-layer or multilayer structure. The second functional layer may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0148] The counter electrode 135 faces the pixel electrode 131, and the intermediate layer 133 is disposed between the counter electrode 135 and the pixel electrode 131. The counter electrode 135 may include a conductive material having a low work function. For example, the counter electrode 135 may include a (semi)transparent layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof. Alternatively, the counter electrode 135 may further include a layer such as ITO, IZO, ZnO, or In2O3 on the (semi)transparent layer including the above materials. As used herein, the phrase "low work function" may be understood to mean a work function within or below the work function range for the materials listed above.

[0149] Figure 13 and Figure 14 is a schematic plan view Figure 7 of an example of the sixth region S6.

[0150] Reference Figure 13 , the dummy line 300 may be disposed in the sixth region S6. The dummy line 300 may include a plurality of first portions 301 extending in the first direction D1 and spaced apart from each other, and a plurality of second portions 302 extending in the second direction D2, crossing the first portions 301, and spaced apart from each other. The dummy line 300 may have a grid structure in which the plurality of first portions 301 and the plurality of second portions 302 are connected to each other. In the sixth region S6, the second pattern region X2 may be defined by the dummy line 300. A plurality of dummy patterns 313 and 315 may be disposed in the second pattern region X2. The dummy line 300 and the dummy patterns 313 and 315 may be in a floating state. According to an exemplary embodiment of the present disclosure, the dummy line 300 and the dummy patterns 313 and 315 may be electrically connected to the power supply voltage line PL to receive the first power supply voltage ELVDD. In this case, the dummy line 300 and the dummy patterns 313 and 315 may be used as a part of the power supply voltage line PL in the sixth region S6, and thus may allow the power supply voltage line PL to have a double wiring structure, thereby preventing a voltage drop of the power supply voltage line PL.

[0151] The dummy line 300 and the dummy patterns 313 and 315 may be disposed on the same layer. The dummy line 300 may be disposed on the same layer as the first connection line 210. The dummy line 300 and the dummy patterns 313 and 315 may be insulated from the first connection line 210. The dummy line 300 may include the same material as the first connection line 210. ( Figure 12 of) The fifth insulating layer 116 may be disposed on the dummy line 300 and the dummy patterns 313 and 315, and as Figure 14 illustrated, the display element 130 and the shielding member 150 may be disposed on the fifth insulating layer 116.

[0152] Figure 15A and Figure 15B is a plan view illustrating the arrangement of the first connection line 210 according to an exemplary embodiment of the present disclosure. Figure 15A may be Figure 7 an enlarged view of part E of

[0153] The first connection line 210 may include a first connection line 210aB disposed in the fourth region S4 and a first connection line 210bB disposed in the fifth region S5.

[0154] Reference Figure 15A, each of the first connection lines 210aB may include a first portion 212' located on the right side of the second center line CL2 and a second portion 214' located on the left side of the second center line CL2. The first portion 212' may be disposed in the first sub-region S4a and may extend in a diagonal direction from the fourth edge E4 to the second center line CL2. The diagonal direction may be a direction inclined at a specific angle (e.g., an angle greater than 0 degrees and less than 90 degrees) from the first direction D1 or the second direction D2. The second portion 214' may be disposed in the second sub-region S4b and may extend in a diagonal direction from the second center line CL2 to the first corner CN1. For example, the first portion 212' may extend in a first diagonal direction DD1, and the second portion 214' may extend in a second diagonal direction DD2. The second portion 214' may be a portion where the first portion 212' extends by changing its direction at the second center line CL2. According to an exemplary embodiment of the present disclosure, the first portion 212' and the second portion 214' of each of the first connection lines 210aB may be substantially symmetric with respect to the second center line CL2. For example, in the first connection line 210aB, the angle between the extending direction of the first portion 212' and the first direction D1 or the second direction D2 and the angle between the extending direction of the second portion 214' and the first direction D1 or the second direction D2 may be substantially the same. According to an exemplary embodiment of the present disclosure, in the first connection line 210aB, the angle between the extending direction of the first portion 212' and the first direction D1 or the second direction D2 and the angle between the extending direction of the second portion 214' and the first direction D1 or the second direction D2 may be different from each other. The first portion 212' may be connected to the second connection line 230. The second portion 214' may be electrically connected to the first data line DL1 in a dummy region DMA located at the first corner CN1.

[0155] ( Figure 12 The fifth insulating layer 116 may be disposed on the first connection line 210aB, and the pixel electrode 131 and the shielding member 150 of the display element 130 may be disposed on the fifth insulating layer 116. The region of the pixel electrode 131 where the emission layer is provided may not overlap with the first connection line 210aB.

[0156] Similarly, referring to Figure 15B, each of the first connection lines 210bB may include a first portion 216' located on the left side of the third center line CL3 and a second portion 218' located on the right side of the third center line CL3. The first portion 216' may be disposed in the third sub-region S5a and may extend in a diagonal direction from the fourth edge E4 to the third center line CL3. The second portion 218' may be disposed in the fourth sub-region S5b and may extend in a diagonal direction from the third center line CL3 to the second corner CN2. For example, the first portion 216' may extend in the third diagonal direction DD3, and the second portion 218' may extend in the fourth diagonal direction DD4. The second portion 218' may be a portion where the first portion 216' extends by changing its direction at the third center line CL3. According to an exemplary embodiment of the present disclosure, the first portion 216' and the second portion 218' of each of the first connection lines 210bB may be substantially vertically symmetric with respect to the third center line CL3. For example, in the first connection line 210bB, the angle between the extending direction of the first portion 216' and the first direction D1 or the second direction D2 and the angle between the extending direction of the second portion 218' and the first direction D1 or the second direction D2 may be substantially the same. According to an exemplary embodiment of the present disclosure, in the first connection line 210bB, the angle between the extending direction of the first portion 216' and the first direction D1 or the second direction D2 and the angle between the extending direction of the second portion 218' and the first direction D1 or the second direction D2 may be different from each other. The first portion 216' may be connected to the second connection line 230. The second portion 218' may be electrically connected to the first data line DL1 in the dummy region DMA located at the second corner CN2. The first diagonal direction DD1 to the fourth diagonal direction DD4 may be directions between the first direction D1 and the second direction D2.

[0157] ( Figure 12 The fifth insulating layer 116 may be disposed on the first connection lines 210bB, and the pixel electrode 131 and the shielding member 150 of the display element 130 may be disposed on the fifth insulating layer 116. The region of the pixel electrode 131 where the emission layer is provided may not overlap with the first connection lines 210bB.

[0158] Figure 15A and Figure 15B The embodiment in which the first connection lines 210aA and 210bA extend in a zigzag shape Figure 10 is different in that the first connection lines 210aB and 210bB extend linearly. Various numbers and shapes of dummy patterns may be located between the first connection lines 210aB and 210bB.

[0159] Figure 16It is a plan view showing the arrangement of a first connection line 210 according to an exemplary embodiment of the present disclosure.

[0160] The first connection line 210 may include a first connection line 210aC disposed in the fourth region S4 and a first connection line 210bC disposed in the fifth region S5. The first connection line 210aC may include a first portion 212” located on the right side of the second center line CL2 and a second portion 214” located on the left side of the second center line CL2. The first portion 212” and the second portion 214” may be substantially symmetric about the second center line CL2. The first connection line 210bC may include a first portion 216” located on the left side of the third center line CL3 and a second portion 218” located on the right side of the third center line CL3. The first portion 216” and the second portion 218” may be substantially symmetric about the third center line CL3.

[0161] Reference Figure 16 , the first portions 212” and 216” and the second portions 214” and 218” of the first connection lines 210aC and 210bC may cause a first sub-portion 217a parallel to the scan line SL and a second sub-portion 217b parallel to the data line DL to extend alternately. The first sub-portion 217a of the first connection lines 210aC and 210bC may extend parallel to the scan line SL to a first length. The second sub-portion 217b of the first connection lines 210aC and 210bC may extend parallel to the data line DL to a second length. The first sub-portion 217a of the first connection lines 210aC and 210bC may overlap with the scan line SL or be adjacent to the scan line SL. The second sub-portion 217b of the first connection lines 210aC and 210bC may overlap with the data line DL or be adjacent to the data line DL.

[0162] Figure 16 In the embodiment illustrated in, the first connection lines 210aC and 210bC extend overlapping the scan line SL to a first length and then are bent to extend overlapping the data line DL to a second length. For example, when the first sub-portion 217a and the second sub-portion 217b are repeated, the first portion 212” and the second portion 214” of the first connection line 210aC may be generally zigzag in a first diagonal direction DD1 and a second diagonal direction DD2. When the first sub-portion 217a and the second sub-portion 217b are repeated, the first portion 216” and the second portion 218” of the first connection line 210bC may be generally zigzag in a third diagonal direction DD3 and a fourth diagonal direction DD4. For example, the first connection line 210 may overlap with the scan lines SL of multiple rows and may overlap with the data lines DL of multiple columns.

[0163] In Figure 16In the figure, the first sub-parts 217a of the adjacent first connection lines 210aC and 210bC are spaced apart from each other by a length corresponding to the distance between three adjacent scan lines SL in the second direction D2. The second sub-parts 217b of the adjacent first connection lines 210aC and 210bC are spaced apart from each other by a length corresponding to the distance between three adjacent data lines DL in the first direction D1.

[0164] The first connection lines 210aC and 210bC may further include branches 217c protruding from the first sub-parts 217a and the second sub-parts 217b. The branches 217c may protrude from the portions where the first connection lines 210aC and 210bC are bent in the first direction D1 and the second direction D2. For example, the branches 217c may protrude from the portions where the first sub-parts 217a and the second sub-parts 217b intersect each other in the first direction D1 and the second direction D2 (e.g., the portion where the first sub-part 217a is bent to the second sub-part 217b and the portion where the second sub-part 217b is bent to the first sub-part 217a). To prevent a short circuit between the first connection lines 210aC and 210bC, the ends of the branches 217c protruding toward each other from the adjacent first connection lines 210aC and 210bC may be disconnected from each other and spaced apart from each other. The branches 217c protruding toward each other from the adjacent first connection lines 210aC and 210bC may be located on the same line. The dummy patterns 220c3 and 220d3 may be provided in the third pattern region X3 defined by the first connection lines 210aC and 210bC. The dummy patterns 220c3 and 220d3 may be in a floating state.

[0165] According to the previous embodiment, in the first connection line 210, the first sub-part has a first length, and the second sub-part has a second length. However, the present invention is not limited thereto. For example, the first connection line 210 may extend such that the first sub-part is n times as long as the first length, and the second sub-part is n times as long as the second length. Alternatively, some of the first sub-parts in the first sub-part of the first connection line 210 may have the first length, and other first sub-parts may be n times as long as the first length. Additionally, some of the second sub-parts in the second sub-part of the first connection line 210 may have the second length, and other second sub-parts may be n times as long as the second length.

[0166] According to the previous embodiment, the first connection line 210 is a linear wiring or a stepped pattern wiring that gradually rises or falls in any direction. However, the embodiment is not limited thereto. For example, as illustrated in the embodiment described below, the first connection line 210 may be a wiring in which at least one of a portion that gradually rises and / or falls in any direction, a portion that extends in a direction parallel to the data line, and a portion that extends in a direction parallel to the scan line is mixed.

[0167] Figure 17 and Figure 18 is a plan view showing the shape of a first connection line 210 according to an exemplary embodiment of the present disclosure.

[0168] Referring to Figure 17 , the first connection line 210 may include a first connection line 210aD disposed on the left side of the first center line CL1 and a first connection line 210bD disposed on the right side of the first center line CL1. According to an exemplary embodiment of the present disclosure, the first connection line 210aD and the first connection line 210bD may be substantially symmetric with respect to the first center line CL1. According to an exemplary embodiment of the present disclosure, the extending directions of the first connection line 210aD and the first connection line 210bD may be symmetric with respect to the first center line CL1, while the angles of the extending directions with respect to the first center line CL1 may be different from each other.

[0169] Each of the first connection lines 210aD may include a first portion 210a11 extending in the second direction D2, a second portion 210a12 extending in a diagonal direction between the first direction D1 and the second direction D2, and a third portion 210a13 extending in an opposite diagonal direction. The second portion 210a12 and the third portion 210a13 may be alternately arranged between a pair of first portions 210a11. The second portion 210a12 and the third portion 210a13 may be substantially symmetric. According to an exemplary embodiment of the present disclosure, the corresponding extending directions of the second portion 210a12 and the third portion 210a13 with respect to the first center line CL1 may be different from each other. The first portion 210a11 may extend linearly. The second portion 210a12 and the third portion 210a13 may extend in a linear shape as illustrated in Figure 15A or in a zigzag shape as illustrated in Figure 10 and Figure 16 .

[0170] Similarly, each of the first connection lines 210bD may include a first portion 210b11 extending in the second direction D2, a second portion 210b12 extending in a diagonal direction between the first direction D1 and the second direction D2, and a third portion 210b13 extending in an opposite diagonal direction. The second portion 210b12 and the third portion 210b13 may be alternately arranged between a pair of first portions 210b11. The second portion 210b12 and the third portion 210b13 may be substantially symmetric. According to an exemplary embodiment of the present disclosure, the corresponding extending directions of the second portion 210b12 and the third portion 210b13 with respect to the first center line CL1 may be different from each other. The first portion 210b11 may extend linearly. The second portion 210b12 and the third portion 210b13 may extend in a linear shape as illustrated inFigure 15B extends in the linear shape illustrated in Figure 10 and Figure 16 extends in the zigzag shape illustrated in

[0171] Referring to Figure 18 , the first connection line 210 may include a first connection line 210aE disposed on the left side of the first center line CL1 and a first connection line 210bE disposed on the right side of the first center line CL1. According to an exemplary embodiment of the present disclosure, the first connection line 210aE and the first connection line 210bE may be substantially symmetric with respect to the first center line CL1. According to an exemplary embodiment of the present disclosure, the extending directions of the first connection line 210aE and the first connection line 210bE may be symmetric with respect to the first center line CL1, while the angles of the extending directions with respect to the first center line CL1 may be different from each other.

[0172] Each of the first connection lines 210aE may include a first portion 210a21 extending in the second direction D2, a second portion 210a22 extending in a diagonal direction between the first direction D1 and the second direction D2, a third portion 210a23 extending in the first direction D1, and a fourth portion 210a24 extending in the opposite diagonal direction. The second portion 210a22, the third portion 210a23, and the fourth portion 210a24 may be alternated between a pair of first portions 210a21. The angles of the corresponding extending directions of the second portion 210a22 and the fourth portion 210a24 with respect to the first center line CL1 may be the same as each other. According to an exemplary embodiment of the present disclosure, the angles of the corresponding extending directions of the second portion 210a22 and the fourth portion 210a24 with respect to the first center line CL1 may be different from each other. The first portion 210a21 and the third portion 210a23 may extend linearly. The second portion 210a22 and the fourth portion 210a24 may extend in the linear shape illustrated in Figure 15A or in the zigzag shape illustrated in Figure 10 and Figure 16

[0173] ​Similarly, each of the first connection lines 210bE may include a first portion 210b21 extending in the second direction D2, a second portion 210b22 extending in a diagonal direction between the first direction D1 and the second direction D2, a third portion 210b23 extending in the first direction D1, and a fourth portion 210b24 extending in an opposite diagonal direction. The second portion 210b22, the third portion 210b23, and the fourth portion 210b24 may be alternated between a pair of the first portions 210b21. The respective extending directions of the second portion 210b22 and the fourth portion 210b24 with respect to the first center line CL1 may be the same. According to an exemplary embodiment of the present disclosure, the respective extending directions of the second portion 210b22 and the fourth portion 210b24 with respect to the first center line CL1 may be different from each other. The first portion 210b21 and the third portion 210b23 may extend linearly. The second portion 210b22 and the fourth portion 210b24 may extend in a linear shape as illustrated in Figure 15B or in a zigzag shape as illustrated in Figure 10 and Figure 16 .

[0174] Figure 19 FIG. is a diagram schematically illustrating a second connection line 230 according to an exemplary embodiment of the present disclosure.

[0175] Referring to Figure 19 , the second connection line 230 may have a zigzag pattern between the display area DA and the bending area BA (e.g., between the dummy area DMA and the bending area BA). Due to the respective different lengths of the first connection lines 210, an RC deviation may occur between the first connection lines 210. In an embodiment of Figure 19 , the second connection line 230 connected to the first connection line 210 has a zigzag pattern to reduce the length deviation of the first connection lines 210. The RC deviation between the first connection lines 210 may be compensated by increasing the number of zigzag patterns of the second connection line 230 in the directions from the center of the first center line CL1 to the edges E1 and E2.

[0176] Figure 20 FIG. illustrates an example of a display panel 10C including a first connection line according to an exemplary embodiment of the present disclosure. Figure 21 is a diagram schematically magnifying a part of Figure 20 .

[0177] Referring to Figure 20, the display panel 10C has a groove portion TH on one side of the substrate 100C, and the groove portion TH is recessed inward. The groove portion TH may be a through portion that is a removed area penetrating the upper surface and the lower surface of the substrate 100C. The groove portion TH can be variously modified to have a shape in which, for example, a U-shaped configuration or a part of a polygon is removed. Components such as cameras, speakers, sensors, etc. can be disposed in the groove portion TH. The following will refer to Figure 22 describe the component.

[0178] The display area of the substrate 100C may include a first display area DA1 as a main display area, and a second display area DA2 and a third display area DA3 that protrude from the first display area DA1 in the second direction D2. The second display area DA2 and the third display area DA3 may be spaced apart from each other by a specific distance in the first direction D1. The peripheral area PA at least partially surrounds the perimeter of the display area DA. The peripheral area PA may include a first pad area PADA1 and a first pad area PADA2, which are areas where various electronic devices or printed circuit boards, etc. are electrically attached. The display area DA may include a dummy area where dummy pixels are provided, and the dummy area at least partially surrounds the edge of the display area DA at the boundary with the peripheral area PA.

[0179] The second display area DA2 may have a first corner CN1, and the first corner CN1 has a circular shape close to the groove portion TH. The third display area DA3 may have a second corner CN2, and the second corner CN2 has a circular shape close to the groove portion TH. As Figure 21 illustrated, a first connection line 210' may be disposed in the second display area DA2 and the third display area DA3 to reduce the peripheral area PA at the first corner CN1 and the second corner CN2. The first connection line 210' may be vertically symmetric about an imaginary straight line IL. According to an exemplary embodiment of the present disclosure, the angle of the direction in which the first connection line 210' extends to the left of the imaginary straight line IL with respect to the imaginary straight line IL and the angle of the direction in which the first connection line 210' extends to the right of the imaginary straight line IL with respect to the imaginary straight line IL may be different from each other.

[0180] According to an exemplary embodiment of the present disclosure, as Figure 10 and Figure 16 illustrated, the first connection line 210' may extend in a zigzag shape via pixels PX of multiple rows and columns. According to an exemplary embodiment of the present disclosure, as Figure 15A and Figure 15B illustrated, the first connection line 210' may have a linear shape across the pixels PX. According to an exemplary embodiment of the present disclosure, as Figure 17 and Figure 18As illustrated, the first connection line 210' may have various shapes in which the linear portion and the zigzag portion are mixed.

[0181] As Figure 21 As illustrated, one end of the first connection line 210' may be electrically connected to the first data line DL1 in the third contact portion CN3 of the first corner CN1. The other end of the first connection line 210' may be connected to the second connection line 230' in the peripheral area PA. The second connection line 230' may be a portion where the other end of the first connection line 210' extends into the peripheral area PA. The second data line DL2 not connected to the first connection line 210' may be connected to the third connection line 250' in the peripheral area PA. The third connection line 250' may be a portion where the second data line DL2 extends into the peripheral area PA.

[0182] Figure 22 is a perspective view of a display device 1 including a display panel according to an exemplary embodiment of the present disclosure, and Figure 23A and Figure 23B are cross-sectional views taken along the Figure 22 line V-V', respectively.

[0183] Referring to Figure 22 , the display device 1 includes an opening area OA, a display area DA, an intermediate area MA between the opening area OA and the display area DA, and a peripheral area PA surrounding the display area DA. The display device 1 may provide a specific image by using light emitted from a plurality of pixels provided in the display area DA. Figure 22 Illustrated is one opening area OA provided inside the display area DA, and the opening area OA may be completely surrounded by the display area DA. The opening area OA may be an area where the components described below with reference to Figure 23A and Figure 23B are provided. According to an exemplary embodiment of the present disclosure, the opening area OA may be a transmissive area including a hole through at least one component of the display device 1. According to an exemplary embodiment of the present disclosure, the opening area OA may be a transmissive area where at least one component of the display device 1 does not have a hole.

[0184] The intermediate area MA may be provided between the opening area OA and the display area DA, and the display area DA may be at least partially surrounded by the peripheral area PA. The intermediate area MA and the peripheral area PA may be non-display areas in which no pixels are provided. The intermediate area MA may be completely surrounded by the display area DA, and the display area DA may be completely surrounded by the peripheral area PA.

[0185] The display area DA may include a substantially flat upper display area and side display areas extending from and continuous with the upper display area. The upper display area may include rounded corners. Each side display area may be a display area extending from at least one of four side edges of the upper display area. Each side display area may include a region curved with a specific curvature and a region curved substantially vertically.

[0186] Reference Figure 23A , the display device 1 may include a display panel 10, an input sensing layer 40 disposed on the display panel 10, and an optical function layer 50, and these components may be covered by a window 60. The display device 1 may represent one of various types of electronic devices, such as a mobile phone, a notebook computer, a smart watch, etc.

[0187] The display panel 10 may be Figure 1 the display panel 10A illustrated in Figure 7 or the display panel 10B illustrated in Figures 25A to 25D The display panel 10 will be described below with reference to

[0188] The input sensing layer 40 may be located on the display panel 10. The input sensing layer 40 obtains coordinate information according to an external input (e.g., a touch event) that can be touched by a finger or a stylus. The input sensing layer 40 may include sensing electrodes or touch electrodes and traces connected to the sensing electrodes or touch electrodes. The input sensing layer 40 may be disposed on the display panel 10. The input sensing layer 40 may sense an external input by using a mutual capacitance method and / or a self-capacitance method.

[0189] The input sensing layer 40 may be directly formed on the display panel 10, or may be separately formed and bonded to the display panel 10 through an adhesive layer such as an optically transparent adhesive. For example, the input sensing layer 40 may be continuously formed after the process of forming the display panel 10, and in this case, the input sensing layer 40 may be a part of the display panel 10, and no adhesive layer may be disposed between the input sensing layer 40 and the display panel 10. Figure 23A The input sensing layer 40 illustrated is disposed between the display panel 10 and the optical function layer 50. However, according to an exemplary embodiment of the present disclosure, the input sensing layer 40 may be disposed on the optical function layer 50.

[0190] The optical functional layer 50 may include an anti-reflection layer. The anti-reflection layer may reduce the reflectance of incident light (external light) propagating from the outside toward the display panel 10 through the window 60. The anti-reflection layer may include a retarder and a polarizer. The retarder may be a film type or a liquid crystal coating type, and may include a half-wave plate (λ / 2 retarder) and / or a quarter-wave plate (λ / 4 retarder). The polarizer may also be a film type or a liquid crystal coating type. The film type polarizer may include a stretchable synthetic resin film, and the liquid crystal coating type polarizer may include a specifically arranged liquid crystal. The retarder and the polarizer may further include a protective film. The protective films of the retarder and the polarizer may be defined as the base layers of the anti-reflection layer.

[0191] According to an exemplary embodiment of the present disclosure, the anti-reflection layer may include a black matrix and a color filter. The color filter may be set by considering the color of light emitted from each pixel of the display panel 10. Each of the color filters may include a red, green, or blue pigment or dye. Alternatively, in addition to the above pigments or dyes, each of the color filters may further include quantum dots. Alternatively, some of the color filters may not include the above pigments or dyes, but may include scattering particles such as titanium oxide.

[0192] According to an exemplary embodiment of the present disclosure, the anti-reflection layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer disposed on different layers from each other. The first reflected light and the second reflected light reflected from the first reflective layer and the second reflective layer, respectively, may undergo destructive interference, and thus, the reflectance of external light may be reduced.

[0193] The optical functional layer 50 may include a lens layer. The lens layer may increase the light output efficiency of the light emitted from the display panel 10, or may reduce color deviation. The lens layer may include a layer having a concave lens shape or a convex lens shape, and / or may include a plurality of layers having different refractive indexes from each other. The optical functional layer 50 may include both the above anti-reflection layer and the lens layer, or may include any one of them.

[0194] According to an exemplary embodiment of the present disclosure, the optical functional layer 50 may be continuously formed after the process of forming the display panel 10 and / or the input sensing layer 40. In this case, an adhesive layer may not be disposed between the optical functional layer 50 and the display panel 10 and / or the input sensing layer 40.

[0195] The display panel 10, the input sensing layer 40, and / or the optical functional layer 50 may include openings. In this regard, Figure 23AIt is shown that the display panel 10, the input sensing layer 40, and the optical function layer 50 respectively include first to third openings 10H, 40H, and 50H that overlap each other. The first to third openings 10H, 40H, and 50H may correspond to the opening area OA. According to an exemplary embodiment of the present disclosure, one or more of the display panel 10, the input sensing layer 40, and the optical function layer 50 may not include an opening. For example, one or two components selected from the display panel 10, the input sensing layer 40, and the optical function layer 50 may not include an opening. Alternatively, any one of the display panel 10, the input sensing layer 40, and the optical function layer 50 may not include an opening, as Figure 23B illustrated.

[0196] As described above, the opening area OA may be a component area (e.g., a sensor area, a camera area, a speaker area, etc.) where the component 20 for adding various functions to the display device 1 is located. As Figure 23A illustrated, the component 20 may be located in the first to third openings 10H, 40H, and 50H. Alternatively, as Figure 23B illustrated, the component 20 may be disposed under the display panel 10.

[0197] The component 20 may include an electronic component. For example, the component 20 may be an electronic component that transmits and / or receives light or transmits and / or receives sound. For example, the electronic component may include a sensor such as an infrared sensor that outputs and / or receives light, a camera that receives light to capture an image, a sensor that outputs and senses light or sound to measure a distance or identify a fingerprint, a small lamp that outputs light, a speaker that outputs sound, etc. The electronic component using light may use light in various wavelength ranges such as visible light, infrared light, ultraviolet light, etc. According to some exemplary embodiments of the present disclosure, the opening area OA may be a transmission area capable of transmitting the light and / or sound output from the component 20 to the outside or propagating the light and / or sound from the outside toward the electronic component.

[0198] According to an exemplary embodiment of the present disclosure, when the display device 1 is used as a smart watch or a vehicle dashboard, the component 20 may be an element such as a clock hand or a needle indicating specific information (e.g., vehicle speed, etc.). When the display device 1 includes a clock hand or a vehicle dashboard, the component 20 may be exposed to the outside through the window 60, and the window 60 may include an opening corresponding to the opening area OA.

[0199] As described above, the component 20 may include one or more components related to the function of the display panel 10, or may include a component such as an accessory that enhances the aesthetic appearance of the display panel 10. An optically transparent adhesive or the like may be located between the window 60 and the optical function layer 50.

[0200] Figures 24A to 24DIt is a cross-sectional view schematically illustrating a display panel 10 according to an exemplary embodiment of the present disclosure.

[0201] Reference Figure 24A , the display panel 10 includes a display layer 400 disposed on a substrate 100. The display layer 400 may include a layer between the substrate 100 and the thin film encapsulation layer 500.

[0202] The substrate 100 may include glass or a polymer resin. The substrate 100 may include various materials having flexible or bendable characteristics. When the substrate 100 includes a polymer resin, the substrate 100 may have a multi-layer structure. For example, as Figure 24A illustrated in the enlarged view of, the substrate 100 may include a first base layer 101, a first barrier layer 102, a second base layer 103, and a second barrier layer 104.

[0203] Each of the first base layer 101 and the second base layer 103 may include a polymer resin. For example, the first base layer 101 and the second base layer 103 may include a polymer resin such as polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), triacetyl cellulose (TAC), cellulose acetate propionate (CAP), etc. The first base layer 101 and the second base layer 103 may include a transparent polymer resin.

[0204] The first barrier layer 102 and the second barrier layer 104 as barrier layers for preventing the penetration of external foreign substances may have a single-layer or multi-layer structure including an inorganic material such as silicon nitride, silicon oxide, etc.

[0205] The display layer 400 includes a plurality of pixels. The display layer 400 may include: a display element layer 400A including display elements provided for each pixel, a pixel circuit layer 400B including pixel circuits provided for each pixel, and an insulating layer. Each pixel circuit may include a transistor and a storage capacitor, and each display element may include an organic light emitting diode OLED.

[0206] The display elements of the display layer 400 may be covered by an encapsulation member such as the thin film encapsulation layer 500, and the thin film encapsulation layer 500 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. When the display panel 10 includes a substrate 100 containing a polymer resin and a thin film encapsulation layer 500 containing an inorganic encapsulation layer and an organic encapsulation layer, the flexibility of the display panel 10 can be increased.

[0207] The display panel 10 may include a first opening 10H penetrating the display panel 10. The first opening 10H may be located in the opening region OA.Figure 24A The diagrams respectively include a substrate 100 and a thin film encapsulation layer 500 having through holes 100H and 500H corresponding to the first opening 10H of the display panel 10. The display layer 400 may further include a through hole 400H corresponding to the opening region OA.

[0208] According to an exemplary embodiment of the present disclosure, as Figure 24B illustrated, the substrate 100 may not include a through hole corresponding to the opening region OA. The display layer 400 may include a through hole 400H corresponding to the opening region OA. The thin film encapsulation layer 500 may not include a through hole corresponding to the opening region OA. According to an exemplary embodiment of the present disclosure, as Figure 24C illustrated, the display layer 400 may not include a through hole 400H corresponding to the opening region OA, and the display element layer 400A is not located in the opening region OA.

[0209] Although Figures 24A to 24C the display element layer 400A not located in the opening region OA is illustrated, the present invention is not limited thereto. According to an exemplary embodiment of the present disclosure, as Figure 24D illustrated, the auxiliary display element layer 400C may be located in the opening region OA. The auxiliary display element layer 400C may include display elements having a different structure and / or operating in a different manner from the display elements of the display element layer 400A.

[0210] According to an exemplary embodiment of the present disclosure, each pixel of the display element layer 400A may include an active organic light emitting diode, and the auxiliary display element layer 400C may include pixels each including a passive organic light emitting diode. When the auxiliary display element layer 400C includes display elements of passive organic light emitting diodes, elements of the pixel circuit may not exist under the corresponding passive organic light emitting diodes. For example, a part of the pixel circuit layer 400B under the auxiliary display element layer 400C may not include either a transistor or a storage capacitor.

[0211] According to an exemplary embodiment of the present disclosure, the auxiliary display element layer 400C may include a display element (e.g., an active organic light emitting diode) of the same type as the display element of the display element layer 400A, and the structure of the pixel circuit below may be different from each other. For example, the pixel circuit under the auxiliary display element layer 400C (e.g., a pixel circuit having an opaque film between the substrate and the transistor) may include a structure different from the pixel circuit under the display element layer 400A. Alternatively, the display element of the auxiliary display element layer 400C may be operated according to a control signal different from that of the display element of the display element layer 400A. Components that do not require relatively high transmittance (e.g., infrared sensors) may be provided in the opening area OA in which the auxiliary element device layer 400C is provided. In this case, the opening area OA may be a component area and an auxiliary display area.

[0212] Figures 25A to 25D is a cross-sectional view schematically illustrating a display panel 10' according to an exemplary embodiment of the present disclosure. Figures 24A to 24D The display panel 10 is described as including the thin film encapsulation layer 500, but Figures 25A to 25D The display panel 10 ′ may include a sealant 540 of the encapsulation substrate 500A.

[0213] like Figures 25A to 25C As shown in FIG, one or more of the substrate 100, the display layer 400, and the package substrate 500A may include through holes 100H, 400H, and 500AH corresponding to the opening area OA. In the opening area OA, the display element layer 400A may not be provided, or an auxiliary display element layer 400C may be provided. Figure 25D The auxiliary display element layer 400C is the same as the above reference Figure 24D Same as described.

[0214] The first connection line 210 according to one or more embodiments may have various shapes that prevent diagonal spots caused by coupling capacitance (parasitic capacitance) with the scan line SL from being visible and reduce wiring RC. The first connection line 210 may have various shapes in which a portion extending in the first direction D1, a portion extending in the second direction D2, and a portion extending in a diagonal direction are mixed. A portion of the first connection line 210 extending in the diagonal direction may have a zigzag shape ( Figure 10 、 Figure 16 ) or linear shapes ( Figure 15A 、 Figure 15B ), the zigzag shape has a repeated first sub-portion and a second sub-portion.

[0215] According to one or more exemplary embodiments of the present disclosure, the first connection line 210 may extend such that the first sub - portion is n times as long as the first length, and the second sub - portion is n times as long as the second length. In this regard, n is an integer equal to or greater than 1 (e.g., a positive integer). According to an exemplary embodiment of the present disclosure, in the first connection line 210, the first sub - portion may have the first length, and the second sub - portion may have the second length. According to an exemplary embodiment of the present disclosure, in the first connection line 210, the first sub - portion may be twice or more times as long as the first length, and the second sub - portion may be twice or more times as long as the second length. According to an exemplary embodiment of the present disclosure, some of the first sub - portions in the first sub - portion of the first connection line 210 may have the first length, and other first sub - portions may be twice or more times as long as the first length. Additionally, some of the second sub - portions in the second sub - portion of the first connection line 210 may have the second length, and other second sub - portions may be twice or more times as long as the second length.

[0216] According to one or more exemplary embodiments of the present disclosure, the first sub - portions of an adjacent pair of the first connection lines 210 may be spaced apart from each other by n times the second length. The second sub - portions of an adjacent pair of the first connection lines 210 may be spaced apart from each other by n times the first length.

[0217] According to one or more exemplary embodiments of the present disclosure, the structure of the first connection line 210 is not limited to the above - described display device, and may be applied to a display device such as a smart watch or a vehicle dashboard in which at least one rounded corner is provided at an edge of a display area.

[0218] According to one or more exemplary embodiments of the present disclosure, a display device may be provided in which a dead zone of the display device may be reduced due to connection lines in a display area, and thus a data signal may be stably transmitted to a pixel without increasing a manufacturing cost. However, one or more embodiments described herein are not limited by such an effect.

[0219] It should be understood that the exemplary embodiments of the present disclosure described herein should be considered as descriptive. The description of features or aspects within each embodiment should typically be considered as available for other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those of ordinary skill in the art will understand that various modifications may be made to them in form and detail without departing from the spirit and scope of the present disclosure.

Claims

1. A display device, comprising: a substrate including a display area and a peripheral area at least partially surrounding the display area, wherein corners of an edge of the display area are curved, and wherein the peripheral area includes a pad area; data lines disposed in the display area; and first connection lines disposed in the display area and connected to the data lines, the first connection lines transmitting signals from the pad area to the data lines; wherein the display area includes a dummy area adjacent to a boundary between the display area and the peripheral area, wherein the first connection lines include a first portion extending from the edge of the display area in a direction away from the peripheral area and a second portion bent with respect to the first portion and extending toward the corner of the edge of the display area, wherein the second portion is connected to the data lines in the dummy area, and wherein, in the first connection lines, the first portion and the second portion extend in a direction inclined with respect to a first direction in which the data lines extend.

2. The display device according to claim 1, Among them, wherein the first portion and the second portion of the first connection lines extend in a zigzag shape.

3. The display device according to claim 1, Among them, wherein the first portion and the second portion of the first connection lines extend linearly.

4. The display device according to claim 1, Among them, wherein the data lines and the first connection lines are on different layers from each other.

5. The display device according to claim 1, Among them, wherein the first connection lines further include a third portion extending in the first direction and / or a fourth portion extending in a second direction perpendicular to the first direction.

6. The display device according to claim 1, further comprising second connection lines disposed in the peripheral area and including a first end connected to the first portion of the first connection lines and a second end disposed in the pad area.

7. A display device, comprising: a substrate including a display area and a peripheral area at least partially surrounding the display area, wherein corners of an edge of the display area are curved, and wherein the peripheral area includes a pad area; a plurality of scan lines disposed in the display area, each of the plurality of scan lines extending in a first direction; a plurality of first data lines disposed in the display area, each of the plurality of first data lines extending in a second direction perpendicular to the first direction; and a plurality of first connection lines disposed in the display area and connected to the plurality of first data lines to transmit signals from the pad area to the plurality of first data lines, wherein each of the plurality of first connection lines includes a first portion extending from the edge of the display area in a direction away from the peripheral area and a second portion bent from the first portion and extending toward the corner of the edge of the display area, Wherein, each of the first part and the second part includes a first sub - part and a second sub - part that extend alternately, the first sub - part extends parallel to at least one of the plurality of scan lines, and the second sub - part extends parallel to at least one of the plurality of first data lines.

8. The display device according to claim 7, Among them, In each of the plurality of first connection lines, while the first part and the second part alternate between the first sub - part and the second sub - part, they extend in a direction inclined with respect to the first direction.

9. The display device according to claim 7, Among them, The plurality of first connection lines and the plurality of scan lines are on different layers.

10. The display device according to claim 9, Among them, The first sub - part at least partially overlaps with the at least one scan line.

11. The display device according to claim 7, Among them, The plurality of first connection lines and the plurality of first data lines are on different layers.

12. The display device according to claim 11, Among them, The second sub - part at least partially overlaps with the at least one first data line.

13. The display device according to claim 7, Among them, The first sub - part has a length that is n times the first length corresponding to the distance between two adjacent first data lines, and the second sub - part has a length that is m times the second length corresponding to the distance between two adjacent scan lines, where m and n are positive integers.

14. The display device according to claim 7, Among them, The first sub - parts of adjacent first connection lines are spaced apart by a length that is n times the second length corresponding to the distance between two adjacent scan lines, and the second sub - parts of the adjacent first connection lines are spaced apart by a length that is m times the first length corresponding to the distance between two adjacent first data lines, where m and n are positive integers.

15. The display device according to claim 7, Among them, Each of the plurality of first connection lines further includes a third part connected to the first part and linearly extending in the second direction, and a fourth part connected to the second part and linearly extending in the second direction.

16. The display device according to claim 15, Among them, Each of the plurality of first connection lines further includes a fifth part disposed between the first part and the second part and linearly extending in the first direction.

17. The display device according to claim 7, Among them, The display area includes a dummy area adjacent to the boundary between the display area and the peripheral area, wherein, the second part is connected to one of the plurality of first data lines in the dummy area disposed at the corner of the edge of the display area.

18. The display device according to claim 7, Further includes a second connection line, the second connection line is disposed in the peripheral region and includes a first end connected to the first portion of each of the plurality of first connection lines and a second end disposed in the pad region.

19. The display device according to claim 7, Further comprising: A plurality of second data lines disposed in the display region and each extending in the second direction; And A third connection line, the third connection line is disposed in the peripheral region and includes a first end connected to one of the plurality of second data lines and a second end disposed in the pad region.

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