A QFN chip package structure and its cutting and manufacturing method

Abstract

This invention discloses a QFN chip package structure and its cutting production method in the field of semiconductor manufacturing. The structure includes a lead frame arranged in an array, with an internal connecting border between adjacent lead frames. Each lead frame has an outer border on its outward-facing side. The internal connecting border has two parallel inner cutting channels, and the outer border has an outer cutting channel corresponding to its outward-facing side. The lead frame includes several chip bases arranged in an array, with pin arrays corresponding to the perimeter of each chip base. Each pin array includes several pins arranged at intervals, and adjacent pins are connected by connecting ribs. The method includes the steps of: first cutting along the outer and inner cutting channels, and then cutting the package structure along the transverse and longitudinal cutting channels. This invention improves product processing efficiency and increases production output.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor manufacturing, and specifically relates to a QFN chip package structure and its cutting and production method. Background Technology

[0002] In the current technology, QFN (Quad Planar No-Leader Package) is becoming increasingly common in IC packaging in the electronics industry. The advantages of QFN are its small size, comparable to CSP packaging, low cost, high yield, and better coplanarity and heat dissipation for high-speed and power management circuits.

[0003] In the prior art, there is a lead frame for QFN packaging, with patent application number 201721806499.0 and application date of 2017-12-21. Its structure includes several staggered outer frames, and lead frame units located within the space formed by the staggered outer frames. Each lead frame unit includes a chip mount and pins located on the outer frames. Pins between adjacent lead frame units are connected together through the outer frames. The lead frame unit also includes a tie rod, one end of which is connected to the chip mount, and the other end located on a portion of the outer frame connected to the lead frame unit, excluding the intersection with other outer frames. When producing QFN packaged fingerprint chips based on this lead frame, after cutting a single fingerprint chip and performing chamfering, since there are no tie rods at the diagonal corners of the fingerprint chip, the tie rods do not need to be cut, thus reducing production difficulty. The chip mount on the lead frame is used to mount the chip, and the lead frame is covered with a package to complete the encapsulation of the lead frame. Finally, the lead frame and the package are cut horizontally and vertically multiple times to divide them into several chips. Its shortcomings are: the lead frame has a border, and after cutting, many small edge pieces are generated around the edges, making separation inconvenient. Operators need to manually separate the edge pieces from the chip package with tweezers. Manual operation is prone to scratching the package product, resulting in a lower product qualification rate and low production efficiency. Summary of the Invention

[0004] One objective of this invention is to provide a QFN chip package structure that allows the border of the lead frame of the package to be easily removed, and then the QFN chip package structure to be cut into several chip units, thereby improving product processing efficiency, increasing output, and making the chip unit production process convenient and protecting the product.

[0005] One of the objectives of this invention is achieved as follows: a QFN chip package structure includes a lead frame, wherein multiple lead frames are arranged in an array, and an internal connecting frame is provided between adjacent lead frames. An outer frame is provided on the outward side of each lead frame. Two parallel inner cutting channels are provided on the internal connecting frame, and the two inner cutting channels are respectively provided one-to-one with the lead frames on the left and right sides. An outer cutting channel is provided on the outward side of the outer frame. The lead frame includes a plurality of chip bases arranged in an array, and pin queues are provided around each chip base. Each pin queue includes a plurality of pins arranged at intervals. Adjacent pins are connected by connecting ribs. A plurality of connecting rods connected to the corresponding connecting ribs are provided around the chip base.

[0006] The QFN chip package structure of this invention consists of multiple lead frames, each of which comprises multiple chip bases. After the package is encapsulated on the QFN chip package structure, the cutting blade of the dicing machine cuts along the inner and outer cutting channels, first separating the outer frame and inner connecting frame from the QFN chip package structure; then, the QFN chip package structure is horizontally and vertically cut, dividing each lead frame into multiple chip bases, making cutting more convenient. Compared with the prior art, the advantages of this invention are: integrating multiple lead frames and setting inner and outer cutting channels facilitates the separation of the outer frame and inner connecting frame from the main structure, improving frame removal efficiency; directly performing multiple horizontal and vertical cuts on the QFN chip package structure improves product processing efficiency, increases output, and the chip unit cutting process is convenient to operate, thus protecting the product.

[0007] As a further improvement of the present invention, a cutting groove is formed in the middle of the upper surface of the pin. The cross-section of the cutting groove along the length of the pin is an isosceles trapezoid, with the upper base of the isosceles trapezoid longer than the lower base. The depth of the cutting groove is one-third to two-fifths of the pin height. Edge grooves are formed on both the front and rear sides of the connecting rib, and the front and rear edge grooves are staggered along the length of the connecting rib. The height of the connecting rib is one-half to three-fifths of the pin height, and the connecting rib is flush with the lower surface of the pin. The cutting groove on the pin allows the cutting tool to quickly cut off the pin, and the edge groove on the connecting rib not only saves material but also facilitates the cutting tool to remove the connecting rib. The width of the connecting rib is smaller than the width of the cutting groove.

[0008] As a further improvement of the present invention, both ends of the pin are arc-shaped, and the cross-section of the pin along the width direction is an isosceles trapezoid II, with the upper base length greater than the lower base length. Grooves are formed on both the front and rear sides of the cutting groove on the pin, the grooves being semi-circular in shape, and the groove depth being one-quarter to one-third of the pin height. Because the upper base length of the isosceles trapezoid II cross-section of the pin is greater than the lower base length, when encapsulating each lead frame, the adhesive can flow downwards along the slope on both sides of the pin, facilitating encapsulation. The grooves are exposed in individual chip units, and during the surface mount process, molten solder more easily wets along the grooves, resulting in a more secure surface mount.

[0009] As a further improvement of the present invention, a set of pin sockets is provided at both the front and rear ends of the pin. Each set of pin sockets includes two pin sockets symmetrically distributed on the left and right sides of the pin. The cross-section of the pin socket along its length is an isosceles trapezoid III, with the upper base length being shorter than the lower base length. The height of the pin socket is one-third to one-half of the pin height, and the bottom surface of the pin socket is flush with the pin. During encapsulation, the adhesive can flow downwards along the slopes on both sides of the pin, and the adhesive can also flow downwards along the slopes of the pin socket. After the adhesive cures, a partial encapsulation body is also formed below the pin socket, making the connection between the encapsulation body and the lead frame more secure.

[0010] As a further improvement of the present invention, reinforcing support protrusions are provided on both the front and rear sides of the lower surface of the pin, and the reinforcing support protrusions are T-shaped. The support protrusions of the lead frame can play a supporting role. During encapsulation, the adhesive flows to the lower part of the horizontal portion of the reinforcing support protrusion. After the adhesive cures, a partial encapsulation body is also formed below the reinforcing support protrusion, making the encapsulation body more firmly connected to the lead frame.

[0011] As a further improvement of the present invention, both the inner and outer cutting channels include several arrays of cutting slots, each array of cutting slots including several cutting slots arranged at intervals, with each cutting slot staggered from each pin queue. The outer and inner cutting channels are respectively provided on the outer frame and the inner connecting frame to facilitate cutting by the cutting blade.

[0012] As a further improvement of the present invention, the pin queues around the lead frame are arranged corresponding to the outer frame or the inner connection frame. After the dicing blade cuts the QFN chip package structure along the inner and outer dicing paths, the pin queues around each lead frame are still retained.

[0013] As a further improvement of the present invention, each lead frame is provided with two rows and three columns, and each chip base on the lead frame is provided with three rows and five columns.

[0014] As a further improvement of the present invention, a package is provided corresponding to the lower side of each lead frame, and multiple wires are embedded in the package. The pins are connected to the chips on the corresponding chip base through the corresponding wires.

[0015] The second objective of this invention is to provide a method for cutting and producing a QFN chip package structure, which can cut the QFN chip package structure into several chip units, thereby improving product processing efficiency, increasing output, and making the chip unit production process convenient and protecting the product.

[0016] The second objective of this invention is achieved as follows: a method for cutting and manufacturing a QFN chip package structure, comprising the following steps:

[0017] (1) Apply a UV film to the surface of the lead frame and apply a blue film to the surface of the UV film. The area of ​​the UV film is larger than the surface of the lead frame, and the area of ​​the blue film is larger than the area of ​​the UV film.

[0018] (2) Install a chip on the other side of each chip base, connect each pin to the corresponding chip through a wire, and encapsulate the other side of the lead frame with glue so that the package is fixedly installed on the lead frame;

[0019] (3) Place the lead frame with the UV film and blue film facing down, and use the cutting blade of the cutting machine to cut along each outer cutting channel at a speed of 0.9~1.1 mm / s to cut around the QFN chip package structure. The cutting depth of the cutting blade is to cut into the blue film, so that the outer frame around the perimeter is separated from the QFN chip package structure.

[0020] (4) The cutting blade of the cutting machine cuts the QFN chip package structure along each inner cutting channel at a speed of 0.9~1.1mm / s. The cutting depth of the cutting blade is to cut into the blue film, so that the internal connecting frame between the two corresponding parallel inner cutting channels is separated from the QFN chip package structure. Then, the outer frame and the internal connecting frame separated from the QFN chip package structure are taken out from the cutting machine.

[0021] (5) The cutting blade of the cutting machine cuts the QFN chip package structure along each horizontal cutting track and each vertical cutting track at a speed of 20~30mm / s. The cutting depth is to cut through the blue film. Each horizontal cutting track is set to correspond to each pin queue arranged horizontally. The width of the horizontal cutting track is equal to the length of the upper base of the isosceles trapezoidal section of the cutting groove of each pin arranged horizontally. Each vertical cutting track is set to correspond to each pin queue arranged vertically. The width of the vertical cutting track is equal to the length of the upper base of the isosceles trapezoidal section of the cutting groove of each pin arranged vertically. The QFN chip package structure is cut into several chip units.

[0022] Compared with the prior art, the beneficial effects of the present invention are as follows: by integrating multiple lead frames and setting inner and outer cutting channels, it is easy to separate the outer frame and inner connecting frame from the main structure. Then, the QFN chip package structure is cut horizontally and vertically multiple times, which improves product processing efficiency and increases the output of chip units. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the structure of the present invention.

[0024] Figure 2 This is a schematic diagram of a single lead frame.

[0025] Figure 3 It consists of several pins and connecting ribs arranged in sequence.

[0026] Figure 4 for Figure 3 A sectional view along the AA direction.

[0027] Figure 5 for Figure 3 BB-direction sectional view.

[0028] Figure 6 This is a cross-sectional view of two adjacent pins along the midpoint of the bisecting plane.

[0029] Figure 7 This is a schematic diagram of the QFN chip package structure cut along the outer cleaving path.

[0030] Figure 8 This is a schematic diagram of the chip unit structure.

[0031] Figure 9 This is a schematic diagram of another pin structure.

[0032] Figure 10 for Figure 9 CC-direction sectional view.

[0033] Among them, 1 lead frame, 2 internal connection frame, 3 outer frame, 4 inner cutting channel, 4a cutting groove, 5 outer cutting channel, 5a cutting groove, 6 chip base, 7 pin queue, 7a pin, 8 connecting rib, 9 connecting rod, 10 cutting groove, 11 edge groove, 12 groove, 13 pin socket, 14 reinforcing support protrusion, 15 package, 16 wire, 17 chip, 18 UV film, 19 blue film. Detailed Implementation

[0034] Example 1

[0035] like Figure 1-8As shown, a QFN chip package structure includes a lead frame 1, of which multiple lead frames 1 are arranged in an array. An internal connecting frame 2 is provided between two adjacent lead frames 1. An outer frame 3 is provided on the outward side of each lead frame 1. Two parallel inner cutting channels 4 are provided on the internal connecting frame 2, and the two inner cutting channels 4 are respectively provided one-to-one with the lead frames 1 on the left and right sides. An outer cutting channel 5 is provided on the outward side of the outer frame 3. The lead frame 1 includes several chip bases 6 arranged in an array. A pin queue 7 is provided around each chip base 6. Each pin queue 7 includes several pins 7a arranged at intervals. Two adjacent pins 7a are connected by connecting ribs 8. Several connecting rods 9 connected to the corresponding connecting ribs 8 are provided around the chip base 6.

[0036] A cutting groove 10 is formed in the middle of the upper surface of pin 7a. The cross-section of the cutting groove 10 along the length of pin 7a is an isosceles trapezoid, with the upper base longer than the lower base. The depth of the cutting groove 10 is one-third to two-fifths of the height of pin 7a. Edge grooves 11 are formed on both the front and rear sides of the connecting rib 8. The front and rear edge grooves 11 are staggered along the length of the connecting rib 8. The height of the connecting rib 8 is one-half to three-fifths of the height of pin 7a, and the connecting rib 8 is flush with the lower surface of pin 7a. The cutting groove 10 on pin 7a allows the cutting tool to quickly cut off pin 7a. The edge grooves 11 on the connecting rib 8 not only save material but also facilitate the cutting tool to remove the connecting rib 8. The width of the connecting rib 8 is smaller than the width of the cutting groove 10.

[0037] Both ends of pin 7a are arc-shaped. The cross-section of pin 7a along its width is an isosceles trapezoid II, with the upper base of the isosceles trapezoid II being longer than the lower base. Grooves 12 are formed on both the front and rear sides of the cutting groove 10 on pin 7a. The grooves 12 are semi-circular in shape, and their depth is one-quarter to one-third of the height of pin 7a. Because the upper base of the isosceles trapezoid II cross-section of pin 7a is longer than the lower base, the adhesive can flow downwards along the slopes on both sides of pin 7a during encapsulation of each lead frame 1, facilitating encapsulation. The grooves 12 are exposed in individual chip units, allowing molten solder to more easily wet along the grooves 12 during surface mount processes, resulting in a more secure surface mount.

[0038] A set of pin seats 13 is provided at both ends of pin 7a. Each set of pin seats 13 includes two pin seats 13 symmetrically distributed on the left and right sides of pin 7a. The cross-section of the pin seat 13 along its length is an isosceles trapezoid III, with the upper base length being shorter than the lower base length. The height of the pin seat 13 is one-third to one-half of the height of pin 7a, and the bottom surface of the pin seat 13 is flush with that of pin 7a. During encapsulation, the adhesive can flow downwards along the slopes on both sides of pin 7a, and the adhesive can also flow downwards along the slopes of the pin seats 13. After the adhesive cures, a partial encapsulation body 15 is also formed below the pin seats 13, making the connection between the encapsulation body 15 and the lead frame 1 more secure.

[0039] Both the inner cutting channel 4 and the outer cutting channel 5 include several cutting slot arrays. The cutting slot array on the inner cutting channel 4 includes several cutting slots 4a arranged at intervals, and the cutting slot array on the outer cutting channel 5 includes several cutting slots 5a arranged at intervals. Each cutting slot is staggered from each pin queue 7. The outer cutting channel 5 and the inner cutting channel 4 are respectively set on the outer frame 3 and the inner connecting frame 2 to facilitate cutting by the cutting blade.

[0040] The pin queues 7 around the lead frame 1 correspond to the outer frame 3 or the inner connection frame 2. After the dicing blade cuts the QFN chip package structure along the inner dicing track 4 and the outer dicing track 5, the pin queues 7 around each lead frame 1 are still retained.

[0041] Each lead frame 1 has two rows and three columns, and each chip base 6 on the lead frame 1 has three rows and five columns.

[0042] A package 15 is provided corresponding to the lower side of each lead frame 1. Multiple wires 16 are embedded in the package 15. The pin 7a is connected to the chip 17 on the corresponding chip base 6 through the corresponding wires 16.

[0043] A method for cutting and manufacturing a QFN chip package structure includes the following steps:

[0044] (1) A UV film 18 is attached to the surface of the lead frame 1, and a blue film 19 is attached to the surface of the UV film 18. The area of ​​the UV film 18 is larger than the surface of the lead frame 1, and the area of ​​the blue film 19 is larger than the area of ​​the UV film 18.

[0045] (2) Install a chip 17 on the other side of each chip base 6, connect each pin 7a to the corresponding chip 17 through wire 16, and encapsulate the other side of the lead frame 1 with potting compound so that the package 15 is fixedly installed on the lead frame 1.

[0046] (3) Place the lead frame 1 with the UV film 18 and blue film 19 facing down, and cut the QFN chip package structure along each outer cutting channel 5 at a speed of 0.9~1.1 mm / s. The cutting depth of the cutting blade is to cut into the blue film 19, so that the outer frame 3 around the perimeter is separated from the QFN chip package structure 15.

[0047] (4) The cutting blade of the cutting machine cuts the QFN chip package structure along each inner cutting channel 4 at a speed of 0.9~1.1mm / s. The cutting depth of the cutting blade is to cut into the blue film 19, so that the internal connecting frame 2 between the two corresponding parallel inner cutting channels 4 is separated from the QFN chip package structure. Then, the outer frame 3 and the inner connecting frame 2 separated from the QFN chip package structure are taken out from the cutting machine.

[0048] (5) The cutting blade of the cutting machine cuts the QFN chip package structure along each transverse and longitudinal cutting track at a speed of 20~30mm / s. The cutting depth is to cut through the blue film 19. Each transverse cutting track is set to correspond to each pin queue 7 arranged in the transverse direction. The width of the transverse cutting track is equal to the length of the upper base of the isosceles trapezoidal section of the cutting groove 10 of each pin 7a arranged in the transverse direction. Each longitudinal cutting track is set to correspond to each pin queue 7 arranged in the longitudinal direction. The width of the longitudinal cutting track is equal to the length of the upper base of the isosceles trapezoidal section of the cutting groove 10 of each pin 7a arranged in the longitudinal direction. The QFN chip package structure is cut into several chip units.

[0049] The QFN chip package structure of this invention consists of multiple lead frames 1, each lead frame 1 consisting of multiple chip bases 6. After the package 15 is encapsulated on the QFN chip package structure, the cutting blade of the cutting machine cuts along the inner cutting channels 4 and outer cutting channels 5, first separating the outer frame 3 and the inner connecting frame 2 from the QFN chip package structure; then, the QFN chip package structure is horizontally and vertically cut, so that each lead frame 1 is divided into multiple chip bases 6, making cutting more convenient. The advantages of this invention are: integrating multiple lead frames 1 and setting inner cutting channels 4 and outer cutting channels 5 facilitates the separation of the outer frame 3 and the inner connecting frame 2 from the main structure, improving the frame removal efficiency; directly performing multiple horizontal and vertical cuts on the QFN chip package structure improves product processing efficiency, increases output, and the chip unit cutting production process is convenient to operate, playing a role in protecting the product.

[0050] Example 2

[0051] like Figure 9 and 10As shown, the difference from Embodiment 1 is that reinforcing support protrusions 14 are provided on both the front and rear sides of the lower surface of pin 7a, and the reinforcing support protrusions 14 are T-shaped. The support protrusions of the lead frame 1 can play a supporting role. During encapsulation, the adhesive flows to the lower part of the horizontal portion of the reinforcing support protrusion 14. After the adhesive cures, a portion of the encapsulation body 15 is also formed below the reinforcing support protrusion 14, making the connection between the encapsulation body 15 and the lead frame 1 more secure.

[0052] This invention is not limited to the above embodiments. Based on the technical solutions disclosed in this invention, those skilled in the art can make some substitutions and modifications to some of the technical features without creative effort, and all such substitutions and modifications are within the protection scope of this invention.

Claims

1. A method for cutting and manufacturing a QFN chip package structure, the QFN chip package structure including a lead frame, wherein multiple lead frames are arranged in an array, an internal connection frame is provided between adjacent lead frames, an outer frame is provided on the outward side of each lead frame, two parallel inner cutting channels are provided on the inner connection frame, the two inner cutting channels are respectively provided one-to-one with the left and right lead frames, and an outer cutting channel is provided on the outward side of the outer frame; the lead frame includes a plurality of chip bases arranged in an array, and pin arrays are correspondingly provided around the perimeter of each chip base. Each pin array comprises several pins arranged at intervals, with adjacent pins connected by connecting ribs. Several connecting rods connected to the corresponding connecting ribs are arranged around the chip base. A cutting groove is formed in the middle of the upper surface of each pin, with the cross-section of the cutting groove along the pin's length forming an isosceles trapezoid, where the upper base is longer than the lower base. The depth of the cutting groove is one-third to two-fifths of the pin's height. Edge grooves are formed on the front and rear sides of each connecting rib, staggered along the length of the connecting rib. The height of the connecting rib is one-half to three-fifths of the pin's height, and the connecting rib is flush with the lower surface of the pin. The pin has two arc-shaped ends, and its cross-section along the width direction is an isosceles trapezoid II, with the upper base longer than the lower base. Grooves are formed on both sides of the cutting groove on the pin, with the grooves being semi-circular in shape and a depth of one-quarter to one-third of the pin height. A set of pin seats is provided at both ends of the pin, each set including two pin seats symmetrically distributed on the left and right sides of the pin. The cross-section along the length direction of the pin seat is an isosceles trapezoid III, with the upper base shorter than the lower base. The height of the pin seat is one-third to one-half of the pin height, and the bottom surface of the pin seat is flush with the pin. The lower surface of the pin... Both the front and rear sides are provided with reinforcing support protrusions, which are T-shaped; the inner and outer cutting channels each include several cutting slot arrays, each cutting slot array including several cutting slots arranged at intervals, and each cutting slot is staggered with each pin queue; the pin queues around the lead frame are arranged corresponding to the outer frame or the inner connection frame; each lead frame is arranged in two rows and three columns, and each chip base on the lead frame is arranged in three rows and five columns; a package is provided corresponding to the lower side of each lead frame, and multiple wires are embedded in the package, and the pins are connected to the chips on the corresponding chip bases through the corresponding wires; characterized in that... The cutting production method includes the following steps: (1) Apply a UV film to the surface of the lead frame and apply a blue film to the surface of the UV film. The area of ​​the UV film is larger than the surface of the lead frame, and the area of ​​the blue film is larger than the area of ​​the UV film. (2) Install a chip on the other side of each chip base, connect each pin to the corresponding chip through a wire, and encapsulate the other side of the lead frame with glue so that the package is fixedly installed on the lead frame; (3) Place the lead frame with the UV film and blue film facing down, and use the cutting blade of the cutting machine to cut along each outer cutting channel at a speed of 0.9~1.1 mm / s to cut around the QFN chip package structure. The cutting depth of the cutting blade is to cut into the blue film, so that the outer frame around the perimeter is separated from the QFN chip package structure. (4) The cutting blade of the cutting machine cuts the QFN chip package structure along each inner cutting channel at a speed of 0.9~1.1mm / s. The cutting depth of the cutting blade is to cut into the blue film, so that the internal connecting frame between the two corresponding parallel inner cutting channels is separated from the QFN chip package structure. Then, the outer frame and the internal connecting frame separated from the QFN chip package structure are taken out from the cutting machine. (5) The cutting blade of the cutting machine cuts the QFN chip package structure along each horizontal cutting track and each vertical cutting track at a speed of 20~30mm / s. The cutting depth is to cut through the blue film. Each horizontal cutting track is set to correspond to each pin queue arranged horizontally. The width of the horizontal cutting track is equal to the length of the upper base of the isosceles trapezoidal section of the cutting groove of each pin arranged horizontally. Each vertical cutting track is set to correspond to each pin queue arranged vertically. The width of the vertical cutting track is equal to the length of the upper base of the isosceles trapezoidal section of the cutting groove of each pin arranged vertically. The QFN chip package structure is cut into several chip units.

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