Multi-mode control for multiple output voltage power converters

Abstract

An adaptive pulse width modulation threshold for a flyback converter is provided, which controls a transition between a pulse frequency operation mode and a pulse width modulation mode. The adaptive pulse width modulation mode is adapted in response to an output voltage of the flyback converter.

Description

Technical Field

[0001] The present application relates to isolated switching converters, and more particularly to isolated switching power converters that adapt transitions between a pulse width modulation mode of operation and a pulse frequency modulation mode of operation in response to an output voltage. Background Art

[0002] Traditionally, power adapters used to power and charge batteries in portable devices are designed and optimized for specific devices. For example, cell phone adapters are typically designed to have a constant voltage of +5V and a constant current range of about 1A. Laptop adapters are typically designed to have a constant voltage of +19V and a constant current range of about 2A. In other words, power adapter designers are able to optimize around narrow operating conditions of input line voltage and output voltage and current ranges.

[0003] The conventional topology employed in portable device adapters is a flyback (or flyback variant) power converter operating in discontinuous conduction mode (DCM). In general, there are typically three modulation regions, including: pulse width modulation (PWM) for higher load conditions; pulse frequency modulation (PFM) for light to medium load conditions; and deep PFM (DPFM) with pulse skipping mode for light to no-load conditions. The pulse skipping mode can sometimes include methods to avoid audible switching frequencies. Power converter control and power conversion components are optimized for specific output voltage and line / load ranges. For example, the operating point at which the transition between PWM to PFM is well defined. Similarly, the operating point at which the converter transitions between DCM (discontinuous conduction mode) and CDCM (critical discontinuous conduction mode) is also well defined. However, a new trend is emerging for power adapters to be able to operate over a wide range of operating parameters (such as maximum output power, output voltage, and current). Unfortunately, the control techniques of the prior art are unable to optimize efficiency performance over a wider range of operating conditions.

[0004] The efficiency of a switching power converter is primarily determined by two types of losses: switching losses and conduction losses. In most switching power converters, switching losses play a larger role as the load across the output of the power converter decreases. Conversely, conduction losses play a larger role as the load increases. As described above, in order to reduce losses under high load conditions and light load conditions, some conventional switching power converters use pulse width modulation (PWM) and pulse frequency modulation (PFM) under different load conditions. Under higher load conditions, PWM mode is generally more efficient than PFM mode. Under lower load conditions, PFM mode is generally more efficient than PWM mode. This multi-modulation technique is often referred to as multi-mode control (MMC).

[0005] In each modulation mode, the maximum primary winding current (Ipk) per on-time of the power switch transistor depends on the transformer design to avoid core saturation. For different operating conditions, it will be beneficial to make full use of the designed Ipk range. In power adapter applications with multiple output voltage levels, a lower Vout setting will result in a longer transformer reset time (Trst), thus forcing the operation into CDCM. If the system enters CDCM during PFM mode with fixed Ipk and fixed Fsw, the power converter will not be able to maintain output voltage regulation.

[0006] A conventional MMC curve followed for all output voltage conditions and load conditions is shown in FIG1 , which shows the switching frequency Fsw of the power switch transistor as a function of the output power represented by the control voltage, which is generated by the feedback loop in the isolated switching power converter. At the output power P1, the modulation mode switches from the deep pulse width modulation (DPWM) mode to the pulse frequency modulation (PFM) mode. As the output power increases to level P2, the modulation mode switches from the PFM mode to the PWM mode. During PFM operation, each power switch cycle generates a fixed peak current (Ipk) in the primary winding of the converter's transformer. During PWM and DPWM modes, this peak current varies linearly. In each power supply design, the output current of the converter is usually fixed, so a lower Vout corresponds to a lower output power. With this approach, under low output full load conditions, Fsw is high and Ipk is low, which does not fully utilize the designed Ipk range and therefore reduces efficiency.

[0007] Alternatively, due to the wide operating conditions of multi-voltage adapters, some prior art converters have adopted a continuous conduction mode (CCM) region for higher output load conditions. This approach allows the system to enter CCM (rather than operating in CDCM for lower Vout settings and higher load conditions). When the system enters CCM during PFM mode, Ipk is fixed and Fsw can be adjusted so that Vc maintains output voltage regulation. Unfortunately, using CCM requires complex feedback loop compensation and increased switch conduction losses compared to CDCM operation. Summary of the invention

[0008] A flyback converter including a primary-side controller is disclosed, the primary-side controller including: a threshold voltage module, the threshold voltage module is configured to convert a sampled output voltage signal for the flyback converter into an adaptive control voltage threshold; a logic circuit, the logic circuit is configured to activate a pulse width modulation mode for the flyback converter in response to a control voltage being greater than the adaptive control voltage threshold; a switching frequency generator, the switching frequency generator is configured to generate a switching frequency command equal to a constant value when the pulse width modulation mode is activated; and a peak voltage generator, the peak voltage generator is configured to generate a peak voltage in response to the control voltage when the pulse width modulation mode is activated, wherein the primary-side controller is configured to control a cycle of a power switch transistor to have a switching frequency in response to the switching frequency command and to control the cycle of the power switch transistor to have a pulse width in response to the peak voltage.

[0009] In addition, an operating method for a flyback converter is disclosed, the method comprising: converting an output voltage for the flyback converter into an adaptive control voltage threshold that varies with the output voltage; and in response to the control voltage for the flyback converter being greater than the adaptive control voltage threshold, modulating a power switch for the flyback converter in a pulse width modulation mode.

[0010] These advantageous features may be better understood by considering the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] FIG. 1 is a graph of switching frequency as a function of output power for a flyback converter with conventional multi-mode control.

[0012] Figure 2 is a diagram of a flyback converter with adaptive switching between a pulse frequency mode of operation and a pulse width modulation mode of operation according to an aspect of the present disclosure.

[0013] Figure 3 is used for Figure 2 A graph of the output power of the flyback converter as a function of the switching frequency and the peak voltage Vipk.

[0014] Figure 4 yes Figure 2 Diagram of the primary side controller in a flyback converter.

[0015] Embodiments of the present disclosure and their advantages will be best understood by referring to the following detailed description.It should be appreciated that like reference numerals are used to identify like elements shown in one or more of the accompanying drawings. DETAILED DESCRIPTION

[0016] An adaptive multi-mode control (MMC) method for a switching power converter is disclosed, which adjusts the transition point between PFM and PWM operation according to the output voltage so that the switching power converter can maintain CDCM operation and avoid entering CCM. This can maintain high operating efficiency over a wide range of operating conditions and simplify the feedback loop compensation design. In addition, it also has the ability to maintain zero voltage switching (ZVS) or quasi-resonant (QR) switching, thereby further reducing switching losses and EMI.

[0017] The MMC method will first be discussed for an optocoupler-based feedback system in which the secondary side controller directly senses the output voltage and compares it to a reference voltage to form an error signal. The secondary side controller filters the error signal to form a secondary side control signal (input diode current to the optocoupler). The optocoupler produces a primary side collector current that is a function of the product of the current transfer ratio (CTR) gain for the optocoupler and the input diode current. The collector current is converted into a control voltage (Vc). The primary side controller regulates the switching of the power switch transistor in response to the control voltage.

[0018] exist Figure 2 An exemplary flyback converter 200 with optocoupler-based feedback is shown in FIG. During the on-time of the power switch transistor S1, the primary winding current flows through the transformer T1 based on the magnetizing inductance of the transformer T1 and the input voltage Vin. While the primary winding current flows, the output diode D1 prevents the secondary winding current from conducting. Alternatively, the flyback converter 200 may include a synchronous rectifier switching transistor for rectifying the secondary winding current. When the power switch is closed, the magnetic energy stored in the transformer T1 causes the output diode D1 to become forward biased, thereby causing the secondary winding current to flow to charge the output capacitor C2 with the output voltage.

[0019] The secondary side controller 201 can use analog or digital feedback techniques to drive the control voltage Vc. In the flyback converter 200, the secondary side controller 201 uses digital feedback, so the output voltage is digitized by an analog-to-digital (ADC) converter. The digitized output voltage is processed by a sensing and compensation module 215, which compares the digitized output voltage with a desired reference value to form an error signal, which is compensated to form a digital control signal. The digital-to-analog converter (DAC) converts the digital control signal into an analog voltage. The driver 220 drives the diode current Id into the optocoupler 210 in response to the analog voltage. Based on the CTR gain, the optocoupler 210 generates a collector current Ic that is converted by the resistor R into the control voltage Vc.

[0020] The primary side controller 205 modulates the switching of the power switch transistor in response to the control voltage. To modulate the switching during the pulse frequency modulation mode of operation, the controller 205 determines the peak primary winding current based on the control voltage. The primary winding current flows through the sense resistor Rsense to generate a voltage V_ipk, which is the product of the sense resistor voltage and the primary winding current. The controller 105 can therefore calculate the peak value of V_ipk based on the expected peak primary winding current. Then, in each PWM switching cycle, when the peak voltage V_ipk is met, the controller 105 will turn off the power switch transistor S1.

[0021] During the PFM mode of operation, the controller 205 also determines a switching frequency Fsw for the cycle of the power switch transistor S1 as a function of the control voltage. The transition from the PFM mode of operation to the PWM mode of operation is performed based on a function of the output power represented by the control voltage. Note that the control voltage can be generated either proportionally or inversely proportionally to the optocoupler collector current. Therefore, as disclosed herein, using the control voltage as a representative of the output power takes into account whether the control voltage is proportional or inversely proportional to the output power. Regardless of the ratio, the controller 205 compares the control voltage to the PFM to PWM threshold to determine whether modulation should be performed according to the PFM mode or according to the PWM mode.

[0022] In order to provide advantageous adaptive multi-mode control, the controller 205 adapts the threshold of PFM to PWM based on the output voltage. For optocoupler-based feedback such as shown for the flyback converter 200, the secondary side controller 201 directly recognizes the output voltage. In one embodiment, the secondary side controller 201 can notify the primary side controller 205 of the output voltage through a message sent by another optocoupler or some other type of ground-isolated communication channel (such as a capacitor or a signal transformer). However, the use of another optocoupler complicates the design and increases the cost. Therefore, the primary side controller 205 in the flyback converter 200 uses a primary-only feedback technique to sense the output voltage at the transformer reset time. This primary-only sensing of the output voltage is well known in the field of flyback converters and will not be discussed in detail herein.

[0023] By considering Figure 3 The resulting adaptive MMC as implemented by the primary side controller 205 can be better understood by looking at the waveforms shown in FIG. Figure 3A graph of both the switching frequency Fsw and the peak voltage V_ipk as a function of the output power is included. As described earlier, the control voltage is used as a proxy for the output power. Therefore, for embodiments in which the control voltage is proportional to the collector current of the optocoupler, the output power axis can also be considered as the control voltage axis. When the output power rises to level P1, the primary side controller 205 calls the burst mode. During the burst mode, the power switch cycles burst according to the burst switching frequency occurs. As the output power rises from level P1, the peak primary current Ipk rises from the minimum value Ipk (min). During the burst mode, the power switch cycle occurs at a deep PWM (DPWM) switching frequency. As the output power rises to level P2, the primary side controller 205 enters the DPWM mode so that the switching frequency is the DPWM frequency. In the DPWM mode, the peak primary current continues to rise with the output power. At the output power P3, the primary side controller 205 transitions from the DPWM mode to the PFM mode. During the PFM mode, the peak current remains at the PFM level regardless of how the output power changes. During PFM mode, the switching frequency increases with the output power.

[0024] Note that the switching at output power levels P1, P2, and P3 is independent of the output voltage. Figure 4 , the primary side controller 205 therefore includes a first comparator 405, which compares the control voltage Vc with a first threshold to control the transition to burst mode at power level P1. Similarly, the primary side controller 205 includes a comparator 410, which compares the control voltage Vc with a second threshold to control the transition from burst mode to DPWM mode at power level P2. Comparator 415 compares the control voltage with a third threshold to control the transition from DPWM mode to PFM mode at power level P3. These comparators may include hysteresis to prevent noise from causing excessive transitions between modes. Finally, comparator 420 compares the control voltage with an adaptive threshold to control the transition from PFM mode to PWM mode.

[0025] like Figure 3 It can be seen that the power level P4 for the transition from PFM mode to PWM mode increases as the output voltage increases, and decreases as the output voltage decreases. This adaptation of the power level P4 occurs within the adaptation range of the output voltage. The first power level P41 corresponds to the minimum value of Vout of the output voltage adaptation range. The second power level P42 corresponds to a slightly higher level of Vout, and so on, so that the final power level P4 NThe maximum value of Vout corresponds to the output voltage adaptation range. Once in PWM mode, the peak primary current will increase with power until it is clamped at the maximum Ipk(max) level. The switching frequency for PWM mode depends on the adaptation of the power level P4. The first power level P41 produces the lowest switching frequency (PWM2) in PWM mode, while the final power level P4 N Generates the highest switching frequency (PWM1).

[0026] Refer again Figure 4 , the primary side controller 205 includes an output voltage sampling and holding module 425 for sampling and holding the output voltage. As previously described, the primary side controller 205 can use only primary feedback technology to sample at the transformer reset time to obtain the output voltage. Alternatively, the output voltage can be transmitted from the secondary side controller 201 to the sampling and holding module 425 through a ground isolation communication channel. Regardless of how the output voltage is obtained, the sampling and holding module 425 can sample the output voltage, such as by switching S / H. The resulting sampled output voltage is stored on a capacitor to be filtered and then amplified in a transconductance amplifier (gm) relative to a threshold voltage. The threshold voltage can be a certain output voltage value within the expected output voltage range. In an alternative embodiment, the sampled output voltage itself can be output from the sampling and holding module 425.

[0027] The output current from the transconductance amplifier is converted into an output voltage V by driving it through a resistor R to generate an input voltage to a threshold voltage adaptation module 430, which generates an adaptive threshold for the control voltage to control the PFM to PWM transition point. For example, the adaptive threshold can be calculated by the threshold voltage adaptation module 430 using a linear equation of A*V+B, where A and B are coefficients. If the control voltage is proportional to the optocoupler collector current, the A coefficient is positive. Conversely, if the control voltage is inversely proportional to the optocoupler collector current, the A coefficient is negative.

[0028] The logic circuit processes the outputs from the multi-mode comparators 405, 410, 415, and 420 to control the switching frequency (FSW) generator 435 and the peak voltage Vipk generator 440. Note that both generators are conventional generators. The threshold between PFM and PWM is adaptive. During the PFM mode, the transconductance amplifier gm in the switching frequency generator 435 generates an output current in response to the difference between the control voltage and the threshold VFB_clamp. The output current charges the capacitor. A comparator such as one with hysteresis compares the capacitor voltage with the threshold to trigger the counter. The logic circuit resets the capacitor by closing the switch. The logic circuit can also respond to a trigger_timer signal. The counter counts the switching cycles in response to the trigger from the comparator. As the control voltage increases, the capacitor is charged faster, so during the PFM mode, the switching frequency also increases. In the PWM mode, the control voltage input to the transconductance amplifier is clamped so that the switching frequency is constant. The clamp value corresponds to the control voltage value at the time of the adaptive conversion between the PFM and PWM modes.

[0029] During the PFM mode, the peak voltage Vipk is constant. Therefore, the peak voltage generator 440 is activated during the burst mode, the DPWM mode, and the PWM mode. The peak voltage rises the same linearly during the burst mode and the DPWM mode, so the peak voltage generator 440 includes a first transconductance amplifier that amplifies the difference between the control voltage and the lower threshold (VFB_clamp_1) to generate an output current driven into the resistor R. In order to provide compensation for the voltage generated across the resistor R, the output current is supplemented by a variable current source. The resistor voltage is buffered to generate the peak voltage Vipk. During the PWM mode, the first transconductance amplifier is disabled. The second transconductance amplifier amplifies the difference between the control voltage and the upper threshold (VFB_clamp_h) to generate an output current driven into the resistor R. With the switching frequency and peak voltage determined for each mode, the primary side controller 205 can continue to control the cycle of the power switch transistor S1 as known in the field of flyback power converters.

[0030] As those skilled in the art will now recognize and depending on the particular application at hand, various modifications, substitutions and changes may be made in and to the methods of use of the materials, devices, constructions and apparatus of the present disclosure without departing from the spirit and scope of the present disclosure. In view of this, the scope of the present disclosure should not be limited to the scope of the specific embodiments shown and described herein, as they are merely some examples of the present disclosure, but should be fully commensurate with the scope of the appended claims and their functional equivalents.

Claims

1. A flyback converter comprising a primary side controller, wherein: The primary side controller comprises: a threshold voltage adaptation module, the threshold voltage adaptation module being configured to convert a sampled output voltage signal for the flyback converter into an adaptive control voltage threshold, wherein the adaptive control voltage threshold is an output voltage value within an expected output voltage range; a logic circuit configured to activate a pulse width modulation mode for the flyback converter in response to a control voltage being greater than the adaptive control voltage threshold; a switching frequency generator configured to generate a switching frequency command equal to a constant value when the pulse width modulation mode is activated; and a peak voltage generator configured to generate a peak voltage in response to the control voltage when the pulse width modulation mode is activated, wherein the primary side controller is configured to control a cycle of the power switch transistor to have a switching frequency in response to the switching frequency command and to control a cycle of the power switch transistor to have a pulse width in response to the peak voltage, wherein the logic circuit is further configured to activate a pulse frequency modulation mode for the flyback converter in response to a control voltage being less than the adaptive control voltage threshold and greater than a pulse frequency mode threshold, and wherein the switching frequency generator is further configured to change the switching frequency in response to the control voltage when the pulse frequency modulation mode is activated.

2. The flyback converter according to claim 1, wherein: The threshold voltage adaptation module is configured to convert the sampled output voltage signal to the adaptive control voltage threshold using a linear equation.

3. The flyback converter according to claim 1, wherein: The flyback converter further includes: a secondary-side controller configured to process an output voltage of the flyback converter into an input current of an optocoupler; and An optocoupler is configured to convert the input current into an output current, wherein the primary side controller is further configured to convert the output current into the control voltage.

4. The flyback converter according to claim 1, wherein: The primary side controller further comprises: A first comparator is configured to assert a first comparator output signal in response to the control voltage being greater than the adaptive control voltage threshold, and wherein the logic circuit is further configured to activate the pulse width modulation mode in response to assertion of the first comparator output signal.

5. The flyback converter according to claim 4, wherein: The primary side controller further comprises: a second comparator configured to assert a second comparator output signal in response to the control voltage being greater than the pulse frequency mode threshold, and wherein the logic circuit is further configured to activate the pulse frequency modulation mode in response to assertion of the second comparator output signal when the first comparator output signal is not asserted.

6. The flyback converter according to claim 1, wherein: The logic circuit is further configured to activate a deep pulse width modulation mode for the flyback converter in response to the control voltage being less than the pulse frequency mode threshold and greater than a burst mode threshold.

7. The flyback converter according to claim 6, wherein: The logic circuit is further configured to activate a burst modulation mode for the flyback converter in response to the control voltage being less than the burst mode threshold.

8. A method for operating a flyback converter, comprising: Converting an output voltage for the flyback converter to an adaptive control voltage threshold that varies with the output voltage, the adaptive control voltage threshold being an output voltage value within an expected output voltage range; in response to a control voltage for the flyback converter being greater than the adaptive control voltage threshold, modulating a power switch for the flyback converter in a pulse width modulation mode; and In response to the control voltage being less than the adaptive control voltage threshold and greater than a pulse frequency modulation mode threshold, modulating the power switch in a pulse frequency modulation mode, Wherein, a peak voltage is generated in response to the control voltage when the pulse width modulation mode is activated, and a switching frequency is changed in response to the control voltage when the pulse frequency modulation mode is activated.

9. The method according to claim 8, wherein: The output voltage is converted to the adaptive control voltage threshold in response to a linear function of the output voltage.

10. The method according to claim 8, further comprising: During the pulse width modulation mode, the switching frequency of the power switch is controlled to be equal to a constant value.

11. The method according to claim 10, wherein: The constant value is a function of the adaptive control voltage threshold.

12. The method according to claim 8, further comprising: In response to the control voltage being less than the pulse frequency modulation mode threshold and greater than a burst mode threshold, the power switch is modulated in a deep pulse width modulation mode.

13. The method according to claim 12, further comprising: In response to the control voltage being less than the burst mode threshold, the power switch is modulated in a burst modulation mode.

14. The method according to claim 8, further comprising: The collector current from the optocoupler is processed to generate the control voltage.

15. The method according to claim 14, wherein: The control voltage is proportional to the collector current.

16. The method according to claim 14, wherein: The control voltage is inversely proportional to the collector current.

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