Display panel and display device

Abstract

A display panel and a display device are disclosed. The display panel includes a substrate layer, a first pixel, and a second pixel, wherein the substrate layer includes a first region and a second region having a first sub-region and a second sub-region, the first pixel is in the first region, and the second pixel is in the first sub-region. Each of the first pixel and the second pixel includes a pixel electrode, an emission layer on the pixel electrode, and a common electrode on the emission layer. The pixel electrode is offset relative to the emission layer in a direction away from the second sub-region.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2019-0077605, filed on June 28, 2019, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The technical field relates to display panels and display devices. Background Technology

[0004] Display devices can be composed of various electronic components, such as display panels for displaying images, input sensing components for detecting external input, and electronic modules. These electronic components can be electrically connected to each other via signal lines. The display panel may include light-emitting elements that generate light. The input sensing components may include sensing electrodes for detecting external input. The electronic module may include cameras, infrared sensors, proximity sensors, etc. The electronic module may be located beneath the display panel. Summary of the Invention

[0005] Some exemplary embodiments of the present invention provide display panels and display devices, the electronic modules of which have increased sensitivity.

[0006] According to some exemplary embodiments of the present invention, a display panel may include: a substrate layer including a first region and a second region, the second region including a first sub-region and a second sub-region; a plurality of first pixels in the first region; and a plurality of second pixels in the first sub-region. Each of the first pixels may include a first pixel electrode, a first emission layer on the first pixel electrode, and a first common electrode on the first emission layer. Each of the second pixels may include a second pixel electrode, a second emission layer on the second pixel electrode, and a second common electrode on the second emission layer. The second pixel electrode may be offset relative to the second emission layer in a direction away from the second sub-region.

[0007] In some embodiments, each of the first sub-region and the second sub-region can be configured as multiple. The multiple first sub-regions and multiple second sub-regions can be alternately defined in a first direction. Alternatively, the multiple first sub-regions and multiple second sub-regions can be alternately defined in a second direction intersecting the first direction.

[0008] In some implementations, the first sub-region and the second sub-region may be adjacent to each other in a first direction. The center of the overlapping region where the second emitter layer and the second pixel electrode overlap may be spaced apart from the center of the second emitter layer in the first direction.

[0009] In some implementations, the center of the overlapping region where the first emitter layer overlaps with the first pixel electrode may be spaced apart from the center of the first emitter layer in a direction opposite to the first direction.

[0010] In some implementations, each of the first emitter layer, the first pixel electrode, the second emitter layer, and the second pixel electrode may have a quadrilateral shape.

[0011] In some implementations, the area of ​​the first emitter layer is larger than the area of ​​the first pixel electrode. The area of ​​the second emitter layer may be larger than the area of ​​the second pixel electrode.

[0012] In some embodiments, the first sub-region and the second sub-region may be adjacent to each other in a first direction. A first overlapping region may be defined at the point where the first pixel electrode overlaps with the first emitter layer. A second overlapping region may be defined at the point where the second pixel electrode overlaps with the second emitter layer. The first overlapping region may be spaced apart from the second overlapping region in a second direction intersecting the first direction. An imaginary line may not overlap with the center of the first overlapping region. The imaginary line may pass through the center of the second overlapping region and may extend in the second direction.

[0013] In some implementations, pixels may not be located in the second sub-region.

[0014] In some embodiments, multiple first emission layers can be provided. Multiple second emission layers can also be provided. The multiple first emission layers and multiple second emission layers can be arranged in the same manner.

[0015] In some embodiments, multiple first pixel electrodes can be provided. Multiple second pixel electrodes can also be provided. The multiple first pixel electrodes can be arranged in a first arrangement. The multiple second pixel electrodes can be arranged in a second arrangement different from the first arrangement.

[0016] In some embodiments, the first sub-region and the second sub-region may be adjacent to each other in a first direction. Each of the plurality of first pixels and the plurality of second pixels may include a plurality of first pixel emitting regions, a plurality of second pixel emitting regions, and a plurality of third pixel emitting regions. The first pixel emitting regions and the second pixel emitting regions may be alternately arranged along a second direction intersecting the first direction. The second pixel emitting regions and the third pixel emitting regions may be alternately arranged along the second direction. The second pixel emitting regions may be spaced apart from the third pixel emitting regions in the first direction. The first pixel emitting regions may be spaced apart from the second pixel emitting regions in the first direction.

[0017] In some implementations, two first pixel emission regions are located in a first sub-region. Four second pixel emission regions are located in a first sub-region. Two third pixel emission regions are located in a first sub-region. The first pixel emission regions may be the emission regions of red pixels. The second pixel emission regions may be the emission regions of green pixels. The third pixel emission regions may be the emission regions of blue pixels.

[0018] In some embodiments, the first sub-region and the second sub-region may be adjacent to each other in a first direction. Multiple first pixel electrodes may be provided. Multiple second pixel electrodes may be provided. The first minimum distance between the multiple first pixel electrodes spaced apart in the first direction may be greater than the second minimum distance between the multiple second pixel electrodes spaced apart in the first direction.

[0019] In some implementations, the size of the first pixel electrode may be larger than the size of the second pixel electrode.

[0020] According to some exemplary embodiments of the present invention, a display device may include: a display panel defining a first display area having a first resolution and a second display area having a second resolution less than the first resolution, the display panel including a plurality of first pixels in the first display area and a plurality of second pixels in the second display area; and an electronic module below the second display area. The second display area may include an emitting area and a transmissive area, the second pixels being disposed in the emitting area and neither the first nor the second pixels being disposed in the transmissive area. Each of the first and second pixels may include a pixel electrode, an emitting layer on the pixel electrode, and a common electrode on the emitting layer. In the emitting area, the emitting layer may include an overlapping area where the emitting layer overlaps with the pixel electrode and a non-overlapping area where the emitting layer does not overlap with the pixel electrode. The non-overlapping area may be disposed between the overlapping area and the transmissive area.

[0021] In some implementations, the area of ​​the emitter layer can be larger than the area of ​​the pixel electrode.

[0022] In some implementations, each of the emitter layer and pixel electrode may have a quadrilateral shape.

[0023] In some implementations, in the emission region, the center of the pixel electrode may be spaced apart from the center of the emission layer in a direction away from the transmission region.

[0024] In some implementations, the first display area and the second display area may be adjacent in a first direction. The imaginary line may not overlap with the center of the pixel electrode in the emission area. The imaginary line may pass through the center of the pixel electrode in the first display area and may extend in the first direction.

[0025] According to some exemplary embodiments of the present invention, a display device may include a display panel comprising a first display area having a first transmittance and a second display area having a second transmittance greater than the first transmittance. The second display area may be adjacent to the first display area in a first direction. The display panel may include: a plurality of first pixels in the first display area; and a plurality of second pixels in the second display area. Each of the first and second pixels may include a pixel electrode, an emission layer on the pixel electrode, and a common electrode on the emission layer. A first minimum distance between the pixel electrodes of the first pixels may be greater than a second minimum distance between the pixel electrodes of the second pixels. Each of the first minimum distance and the second minimum distance may be a distance in a second direction intersecting the first direction. Attached Figure Description

[0026] Figure 1A A perspective view of a display device illustrating an embodiment of the concept according to the present invention is shown.

[0027] Figure 1B An exploded perspective view of a display device illustrating an embodiment of the concept according to the present invention is shown.

[0028] Figure 2 A block diagram illustrating an embodiment of a display device according to a concept of the present invention is shown.

[0029] Figure 3A A cross-sectional view of a display module illustrating an embodiment of the concept according to the present invention is shown.

[0030] Figure 3B A cross-sectional view of a display module illustrating an embodiment of the concept according to the present invention is shown.

[0031] Figure 4A A plan view of a display panel illustrating an embodiment of the concept according to the present invention is shown.

[0032] Figure 4B A plan view of a display panel illustrating an embodiment of the concept according to the present invention is shown.

[0033] Figure 4C A plan view of a display panel illustrating an embodiment of the concept according to the present invention is shown.

[0034] Figure 5A An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown.

[0035] Figure 5B An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown.

[0036] Figure 6A An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown.

[0037] Figure 6B An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown.

[0038] Figure 7 An enlarged plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0039] Figure 8 An enlarged plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0040] Figure 9 An enlarged plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0041] Figure 10 An equivalent circuit diagram of a sub-pixel illustrating an embodiment of the concept according to the present invention is shown.

[0042] Figure 11 A cross-sectional view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0043] Figure 12A A cross-sectional view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0044] Figure 12B A cross-sectional view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0045] Figure 13A A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0046] Figure 13B A cross-sectional view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0047] Figure 14A A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0048] Figure 14B A graph showing the relationship between the rate of increase in the region of increased transmittance and the change in the length of the second sub-pixel electrode is presented.

[0049] Figure 15 A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0050] Figure 16A A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0051] Figure 16B A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0052] Figure 16C A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0053] Figure 16D A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0054] Figure 17 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown.

[0055] Figure 18 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown.

[0056] Figure 19 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown.

[0057] Figure 20 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown.

[0058] Figure 21 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. Detailed Implementation

[0059] In this specification, when a component (or area, layer, part, etc.) is referred to as being "on" other components, "connected to" or "linked to" other components, that component may be directly disposed on, directly connected to or directly linked to other components, or there may be at least one intermediate component between them.

[0060] Exemplary embodiments are described with reference to the accompanying drawings, in which the same reference numerals may refer to the same elements. Furthermore, for ease of explanation, the dimensions of the elements in the drawings may be exaggerated.

[0061] The term "and / or" includes one or more combinations defined by the relevant components.

[0062] Although the terms "first," "second," etc., can be used to describe various components, these components should not be limited by these terms. These terms are used to distinguish one component from another. A first component may be referred to as a second component without departing from the teachings of one or more embodiments. Describing a component as a "first" component does not require or imply the existence of a second component or other components. The terms "first," "second," etc., can be used to distinguish different categories or sets of components. For the sake of brevity, the terms "first," "second," etc., may respectively represent "first type (or first set)," "second type (or second set)," etc.

[0063] Furthermore, the terms "below," "lower," "above," "upper," etc., are used herein to describe the relationship between one component and other components shown in the accompanying drawings. In addition to the orientations depicted in the drawings, relative terms are intended to include different orientations.

[0064] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art. Furthermore, terms defined in common dictionaries shall be understood to have the same meaning as defined in the art or the meaning relevant to the context, and shall not be construed as having an ideal or overly formal meaning unless explicitly defined herein.

[0065] It should be understood that the terms “comprising,” “including,” “having,” etc., are used to specify the presence of the stated features, wholes, steps, operations, components, elements, or combinations thereof, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, components, elements, or combinations thereof.

[0066] Now, embodiments of the present invention will be described below with reference to the accompanying drawings.

[0067] Figure 1A A perspective view of a display device illustrating an embodiment of the concept according to the present invention is shown. Figure 1B An exploded perspective view of a display device illustrating an embodiment of the concept according to the present invention is shown. Figure 2 A block diagram illustrating an embodiment of a display device according to a concept of the present invention is shown. Reference will be made below. Figure 1A , Figure 1B and Figure 2 Explain the concept of this invention.

[0068] The display device DD can be a device activated by an electrical signal. Various embodiments of the display device DD can include, for example, a tablet computer, a laptop computer, or a television. In an embodiment of the inventive concept, a smartphone is illustrated as the display device DD.

[0069] The display device DD can display an image IM on a display surface FS along a third direction DR3. The display surface FS is parallel to each of the first direction DR1 and the second direction DR2. The display surface FS on which the image IM is displayed can correspond to the front surface of the display device DD and the front surface of the window 100. The same reference numerals are assigned to the display surface of the display device DD, the front surface of the display device DD, and the front surface of the window 100. The image IM can include not only moving images but also static images. Figure 1A The clock window and application icon are shown as examples of image-based IM.

[0070] In this implementation, the front and rear surfaces (or top and bottom surfaces) of each component are defined based on the orientation of the displayed image IM. The front and rear surfaces may be opposite each other on a third direction DR3, and the normal direction of each of the front and rear surfaces may be parallel to the third direction DR3. The directions represented by the first direction DR1, the second direction DR2, and the third direction DR3 are relative concepts and may represent other directions.

[0071] The display device DD may include a window 100, a display module 200, a driving circuit section 300, a housing 400, and an electronic module 500. In some embodiments, the window 100 and the housing 400 may be combined with each other to provide the appearance of the display device DD.

[0072] Window 100 may include an optically transparent dielectric material. For example, window 100 may include glass or plastic. Window 100 may have a multilayer structure or a single-layer structure. For example, window 100 may include multiple plastic films bonded by adhesives or a glass substrate bonded to plastic films by adhesives.

[0073] When viewed on a plane, window 100 can be divided into a transmission area TA and a border area BZA. In this specification, the phrase "when viewed on a plane" can mean when viewed in the third direction DR3. Furthermore, "thickness direction" can refer to the third direction DR3.

[0074] The transmission region TA can be an optically transparent region. The border region BZA can be a region whose transmittance is relatively less than that of the transmission region TA. The border region BZA can define the shape of the transmission region TA. The border region BZA can be adjacent to and surround the transmission region TA.

[0075] The border area BZA may have a certain color. The border area BZA may cover the peripheral area NAA of the display module 200 and may prevent the peripheral area NAA from being recognized from the outside, for example, it may prevent the user from seeing the peripheral area NAA. However, this configuration is illustrated by example, and in other embodiments of the present invention, the border area BZA may be omitted in the window 100.

[0076] In this embodiment, the sensing regions SSA1 and SSA2 may overlap with the electronic module 500, which will be discussed below. The display device DD can receive external signals required by the electronic module 500 through the sensing regions SSA1 and SSA2, or can provide signals output from the electronic module 500 to the outside. According to the present invention, the sensing regions SSA1 and SSA2 may be defined to overlap with the transmission region TA. Therefore, in the region other than the transmission region TA, it is possible to omit the separate region on which the sensing regions SSA1 and SSA2 are disposed. Therefore, the area of ​​the border region BZA can be reduced.

[0077] Figure 1B Two sensing regions, SSA1 and SSA2, are depicted as an example, but the inventive concept is not limited to this arrangement. For example, three or more sensing regions may be defined, or one of the sensing regions SSA1 and SSA2 may be omitted to define a single sensing region. Figure 1B The example depicts sensing regions SSA1 and SSA2 defined in the top left portion of the transmission region TA. However, sensing regions SSA1 and SSA2 may be defined in the top right portion, central portion, bottom left portion, bottom right portion, or any other portion of the transmission region TA. Alternatively, one of sensing regions SSA1 and SSA2 may be defined in the top left portion of the transmission region TA, and the other of sensing regions SSA1 and SSA2 may be defined in the top right portion of the transmission region TA.

[0078] The display module 200 may be positioned below the window 100. In this specification, the term "below" may refer to a direction opposite to the direction in which the display module 200 provides the image IM. The display module 200 can display the image IM and can detect external input TC. The display module 200 includes a front surface IS having an active area AA and a peripheral area NAA. The active area AA may be an area activated by an electrical signal.

[0079] In this implementation, the effective area AA can be the area on which the image IM is displayed, and it can also be the area on which the external input TC is detected. The transmission area TA overlaps at least with the effective area AA. For example, the transmission area TA overlaps with the front surface of the effective area AA or at least a portion thereof, or it can overlap with the entire effective area AA. Therefore, in any case, the user can identify the image IM through the transmission area TA, or the user can provide the external input TC through the transmission area TA.

[0080] The peripheral region NAA can be a region that covers the border region BZA. The peripheral region NAA is adjacent to the active region AA. The peripheral region NAA can surround the active region AA. The peripheral region NAA can contain drive lines or drive circuits for driving the active region AA.

[0081] In one embodiment, the display module 200 is assembled such that the active area AA and the peripheral area NAA are in a flat state facing the window 100. However, this configuration is shown by way of example, and a portion of the peripheral area NAA may be curved. In this case, the curved portion of the peripheral area NAA may point towards the rear surface of the display device DD, and therefore the bezel area BZA may have a reduced area on the front surface FS of the display device DD. Alternatively, the display module 200 may be assembled such that a portion of the active area AA is also in a curved state. In contrast, according to an embodiment conceived in the present invention, the peripheral area NAA may be omitted from the display module 200.

[0082] The driving circuit section 300 can be electrically connected to the display module 200. The driving circuit section 300 may include a main circuit board MB and a flexible film CF.

[0083] The flexible film CF is electrically connected to the display module 200. The flexible film CF can be coupled to the pad PD located in the peripheral area NAA of the display module 200. The flexible film CF provides electrical signals for driving the display module 200. These electrical signals can be generated from the flexible film CF or the main circuit board MB. The main circuit board MB may include connectors for power supply or various drive circuits for driving the display module 200.

[0084] In this embodiment, the area on the display module 200 corresponding to the sensing areas SSA1 and SSA2 may have a higher transmittance than the effective area AA. The effective area AA does not overlap with the sensing areas SSA1 and SSA2. For example, at least one of the components of the display module 200 may be removed. Therefore, the electronic module 500 can easily transmit and / or receive signals through the sensing areas SSA1 and SSA2.

[0085] The electronic module 500 may include a first electronic module 501 and a second electronic module 502. When viewed on a plane, the first electronic module 501 and the second electronic module 502 may overlap with the sensing areas SSA1 and SSA2. The first electronic module 501 and the second electronic module 502 may be disposed below the display module 200. The first electronic module 501 and the second electronic module 502 may receive external objects transmitted through the sensing areas SSA1 and SSA2, or may provide output through the sensing areas SSA1 and SSA2.

[0086] The housing 400 can be combined with the window 100. The housing 400 and the window 100 can be combined to provide interior space. The interior space can accommodate the display module 200 and the electronic module 500.

[0087] The housing 400 may comprise a material with relatively high rigidity. For example, the housing 400 may comprise one of glass, plastic, and metal, or may comprise multiple frames or plates composed of any combination of glass, plastic, and metal. The housing 400 can stably protect the components of the display device DD housed within its internal space from external impacts.

[0088] Reference Figure 2 The display device DD may include a display module 200, a power module PM, a first electronic module EM1, and a second electronic module EM2. The display module 200, the power module PM, the first electronic module EM1, and the second electronic module EM2 may be electrically connected to each other.

[0089] The display module 200 may include a display panel 210 and an input sensor 220.

[0090] Display panel 210 can be configured to substantially generate an image IM. The image IM generated from display panel 210 can be displayed on front surface IS, and the user can recognize the image IM from the outside through the transmissive area TA.

[0091] Input sensor 220 can detect externally applied external input TC. For example, input sensor 220 can detect external input TC provided to window 100. External input TC can be user input. User input includes the user's body, light, heat, pressure, or various other types of input. For example, external input TC can be a user's hand or finger applied to the front surface FS. However, this is merely an example, and external input TC can be provided in various types as discussed above. Depending on the structure of display device DD, display device DD can detect external input TC applied to the side surface or rear surface of display device DD.

[0092] The power module PM provides the power required for the overall operation of the display device DD. The power module PM may include a commonly used battery module.

[0093] The first electronic module EM1 and the second electronic module EM2 may include different functional modules for operating the display device DD.

[0094] The first electronic module EM1 can be directly mounted on the motherboard that is electrically connected to the display module 200, or it can be mounted on a separate board that is electrically connected to the motherboard via a connector (not shown).

[0095] The first electronic module EM1 may include a control module CM, a wireless communication module TM, an image input module IIM, a sound (audio) input module AIM, a memory MM, and an external interface IF. One or more of the above modules may not be mounted on the motherboard, but may be electrically connected to the motherboard via a flexible circuit board.

[0096] The control module CM controls the overall operation of the display device DD. The control module CM can be a microprocessor. For example, the control module CM can activate or deactivate the display module 200. Based on touch signals received from the display module 200, the control module CM can control other modules, such as the image input module IIM and the sound input module AIM.

[0097] The wireless communication module™ can use Bluetooth and / or WiFi communication systems to send and receive wireless signals with other terminals. The wireless communication module™ can use general communication systems to send and receive voice signals. The wireless communication module™ may include a transmitter™1 for modulating and transmitting the signal to be transmitted, and a receiver™2 for demodulating the received signal.

[0098] The image input module IIM processes the image signal and converts it into image data for display on the display module 200. In recording mode or voice recognition mode, the sound input module AIM receives external sound signals through a microphone and converts the received sound signals into electronic voice data.

[0099] The external interface IF can be used as an interface to connect to an external charger, wired / wireless data port and / or card slot (e.g., memory card, SIM / UIM card).

[0100] The second electronic module EM2 may include a sound (audio) output module AOM, a light-emitting module LM, a light-receiving module LRM, and a camera module CMM. These components can be directly mounted on the motherboard, mounted on a separate board and electrically connected to the display module 200 via connectors (not shown), or electrically connected to the first electronic module EM1.

[0101] The audio output module AOM converts and outputs audio data received from the wireless communication module TM or stored in the memory MM.

[0102] A light-emitting module (LM) generates and outputs light. The LM can output infrared light. The LM may include light-emitting diode (LED) elements. A light-receiving module (LRM) detects infrared light. The LRM can be activated when a certain level or higher of infrared light is detected. The LRM may include a complementary metal-oxide-semiconductor (CMOS) sensor. After outputting infrared light generated by the LM, the infrared light can be reflected from external materials (e.g., a user's finger or face), and the reflected infrared light can then be incident on the LRM. A camera module (CMM) can capture external images.

[0103] Each of the first electronic module 501 and the second electronic module 502, according to embodiments of the present invention, may include one or more components contained in the first electronic module EM1 and the second electronic module EM2. For example, each of the first electronic module 501 and the second electronic module 502 may include one or more of a sound output module AOM, a light emission module LM, a light receiving module LRM, a camera module CMM, and a thermal sensing module. The first electronic module 501 and the second electronic module 502 can detect external objects received through sensing areas SSA1 and SSA2, or can provide sound signals such as voice or light such as infrared light to the outside through sensing areas SSA1 and SSA2.

[0104] Figure 3A A cross-sectional view of a display module illustrating an embodiment of the concept according to the present invention is shown.

[0105] Reference Figure 3A The display module 200 may include a display panel 210, an input sensor 220, and a connecting component SLM. The input sensor 220 may be referred to as an input sensing panel.

[0106] The display panel 210 according to an embodiment of the present invention can be an emitting display panel. However, the present invention is not limited thereto, and for example, the display panel 210 can be an organic light-emitting display panel or a quantum dot light-emitting display panel.

[0107] The display panel 210 may include a substrate layer BL, a display circuit layer ML, and a light-emitting element layer EML. The input sensor 220 may include a cover substrate CBL and a sensing circuit layer ML-T.

[0108] Each of the base layer BL and the cover substrate CBL can be a silicon substrate, a plastic substrate, a glass substrate, a dielectric film, or a stacked structure comprising multiple dielectric layers.

[0109] The display circuit layer ML can be disposed on the substrate layer BL. The display circuit layer ML may include multiple dielectric layers, multiple conductive layers, and semiconductor layers. The multiple conductive layers included in the display circuit layer ML can form signal lines or pixel control circuits.

[0110] The light-emitting element layer (EML) can be disposed on the display circuit layer (ML). The EML may include an emitting layer that generates light. For example, when the display panel 210 is an organic light-emitting display panel, the emitting layer may include an organic light-emitting material. In another example, when the display panel 210 is a quantum dot light-emitting display panel, the light-emitting layer may include one or more of quantum dots and quantum rods.

[0111] A cover substrate CBL can be disposed on the light-emitting element layer EML. A certain space can be defined between the cover substrate CBL and the light-emitting element layer EML. This space can be filled with air or an inert gas. In an embodiment, this space can be filled with a filler such as a silicone-based polymer, an epoxy resin, or an acryloyl-based resin.

[0112] The sensing circuit layer ML-T can be disposed on the overlay substrate CBL. The sensing circuit layer ML-T may include multiple dielectric layers and multiple conductive layers. The multiple conductive layers may form sensing electrodes for detecting external input, sensing lines connected to the sensing electrodes, and sensing pads connected to the sensing lines.

[0113] A bonding member SLM can be disposed between the substrate layer BL and the cover substrate CBL. The bonding member SLM can bond the substrate layer BL to the cover substrate CBL. The bonding member SLM can include organic materials such as photocurable resins or photoplastic resins, or inorganic materials such as glass frit sealants.

[0114] Figure 3B A cross-sectional view of a display module illustrating an embodiment of the concept according to the present invention is shown.

[0115] Reference Figure 3B The display module 200-F may include a display panel 210-F and an input sensor 220-F. The input sensor 220-F may be referred to as an input sensing layer.

[0116] The display panel 210-F may include a substrate layer BL, a display circuit layer ML, a light-emitting element layer EML, and a thin encapsulation layer TFE. The input sensor 220-F may include a substrate layer TFE and a sensing circuit layer ML-T. The thin encapsulation layer TFE and the substrate layer TFE may be the same component.

[0117] According to embodiments of the present invention, the display panel 210-F and the input sensor 220-F can be formed in a continuous process. For example, the sensing circuit layer ML-T can be formed directly on the thin encapsulation layer (or substrate layer) TFE.

[0118] Figure 4A A plan view of a display panel illustrating an embodiment of the concept according to the present invention is shown.

[0119] Reference Figure 4A A first display area DA1 and a second display area DA2 can be defined on the display panel 210. The first display area DA1 and the second display area DA2 can be connected to the display module (see...). Figure 1B The effective area of ​​200) (see Figure 1B (AA) corresponds to.

[0120] Electronic module (see) Figure 1B The electronic module 500 can be positioned below the second display area DA2. The transmittance of the second display area DA2 can be greater than that of the first display area DA1. Therefore, the electronic module 500 can easily send and / or receive signals through the second display area DA2. One or more components of the second display area DA2 can be omitted to increase the transmittance of the second display area DA2. For example, one or more pixels can be removed from the second display area DA2.

[0121] In an implementation, the second display area DA2 can be positioned relative to the sensing area (see [reference]). Figure 1A The positions corresponding to the positions of SSA1 and SSA2. For example, when setting two sensing areas SSA1 and SSA2, two second display areas DA2 (hereinafter referred to as second display areas) can be set. The second display areas DA2 can be spaced apart from each other. Each of the second display areas DA2 can be surrounded by the first display area DA1.

[0122] A first pixel PX1 can be disposed in a first display area DA1, and a second pixel PX2 can be disposed in a second display area DA2. The first pixel PX1 and the second pixel PX2 can generate light. The number of first pixels PX1 in one area can differ from the number of second pixels PX2 in another area, where the area of ​​the other area is the same as the area of ​​the first area. For example, the density of second pixels PX2 can be less than the density of first pixels PX1. For example, the number of second pixels PX2 can be less than the number of first pixels PX1. Therefore, the transmittance of the second display area DA2 can be greater than the transmittance of the first display area DA1. Furthermore, the resolution of the second display area DA2 can be less than the resolution of the first display area DA1.

[0123] Figure 4BA plan view illustrating a display panel according to an embodiment of the concept of the present invention is shown. Figure 4B In the interpretation, similar reference symbols are assigned to references. Figure 4A The components discussed will be omitted from the description.

[0124] Reference Figure 4B A first display area DA1a and a second display area DA2a can be defined on the display panel 210.

[0125] Electronic module (see) Figure 1B The 500) can be positioned below the second display area DA2a. When viewed on a plane, the second display area DA2a can be aligned with the sensing area (see 500). Figure 1A The SSA1 and SSA2 overlap. The area of ​​the second display area DA2a can be larger than the area of ​​the sensing areas SSA1 and SSA2.

[0126] Figure 4B The second display area DA2a is depicted as being defined at the left corner of the display panel 210, but the position of the second display area DA2a can be changed depending on the position of the electronic module 500. For example, in one embodiment, the second display area DA2a may be defined at the right corner of the display panel 210. In another embodiment, the second display area DA2a may be defined at both the left and right corners of the display panel 210.

[0127] Figure 4C A plan view illustrating a display panel according to an embodiment of the concept of the present invention is shown. Figure 4C In the interpretation, similar reference symbols are assigned to references. Figure 4A The components discussed will be omitted from the description.

[0128] Reference Figure 4C A first display area DA1b and a second display area DA2b can be defined on the display panel 210.

[0129] Electronic module (see) Figure 1B The 500) can be positioned below the second display area DA2b. When viewed on a plane, the second display area DA2b can be aligned with the sensing area (see 500). Figure 1A The SSA1 and SSA2 overlap. The area of ​​the second display area DA2b can be larger than the area of ​​the sensing areas SSA1 and SSA2.

[0130] The first display area DA1b and the second display area DA2b may be adjacent to each other in the second direction DR2. The first display area DA1b and the second display area DA2b may have a boundary extending along the first direction DR1 between the first display area DA1b and the second display area DA2b.

[0131] When viewed on a flat surface, the second display area DA2b can be defined on the upper portion of the display panel 210. This is because the area of ​​the second display area DA2b is larger than that of the display panel 210. Figure 4A The area of ​​the second display region DA2 discussed above is in Figure 4B The area of ​​the second display area DA2a discussed in the text can be increased, thus increasing the degree of freedom for positional changes of the electronic module 500.

[0132] Figure 5A An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. Specifically, Figure 5A This could be a display panel (see...) Figure 4A A magnified plan view of the first display area DA1 of (210).

[0133] Reference Figure 5A The first display area DA1 may include multiple sub-light-emitting areas SA1a and SA2a. The multiple sub-light-emitting areas SA1a and SA2a may include a first sub-light-emitting area SA1a and a second sub-light-emitting area SA2a.

[0134] The first sub-light-emitting region SA1a can be arranged along the second direction DR2. The second sub-light-emitting region SA2a can also be arranged along the second direction DR2. The first sub-light-emitting region SA1a and the second sub-light-emitting region SA2a can be arranged alternately along the first direction DR1. Pixels set in the first sub-light-emitting region SA1a can be different from pixels set in the second sub-light-emitting region SA2a. This will be discussed further below.

[0135] Figure 5B An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. Specifically, Figure 5B It can be shown as a display panel (see Figure 4A An enlarged plan view of the first display area DA1-a of example 210).

[0136] Reference Figure 5B The first display area DA1-a may include multiple sub-light-emitting areas SA1a and SA2a. The multiple sub-light-emitting areas SA1a and SA2a may include a first sub-light-emitting area SA1a and a second sub-light-emitting area SA2a.

[0137] The first sub-light-emitting region SA1a and the second sub-light-emitting region SA2a can be alternately arranged in the first direction DR1. Furthermore, the first sub-light-emitting region SA1a and the second sub-light-emitting region SA2a can be alternately arranged in the second direction DR2. For example, a first sub-light-emitting region SA1a and a second sub-light-emitting region SA2a can be repeatedly and alternately arranged in the first direction DR1 and the second direction DR2.

[0138] Pixels set in the first sub-light-emitting region SA1a can be different from pixels set in the second sub-light-emitting region SA2a. This will be discussed further below.

[0139] Figure 6A An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. Specifically, Figure 6A This could be a display panel (see...) Figure 4A A magnified plan view of the second display area DA2 of (210). Furthermore, Figure 6A It shows its area and Figure 5A The second display area DA2 has the same area as the first display area DA1 shown. The following description also applies to the second display area DA2. Figure 4B and Figure 4C The second display areas DA2a and DA2b are discussed in the text.

[0140] Reference Figure 6A The second display area DA2 may include an emission area EA and a transmission area TA.

[0141] The emitting region EA and the transmitting region TA can be arranged alternately along the first direction DR1 and the second direction DR2. Therefore, one emitting region EA can be adjacent to one or more transmitting regions TA.

[0142] Each of the emission regions EA may include multiple sub-emitting regions SA1b and SA2b. The multiple sub-emitting regions SA1b and SA2b may include a first sub-emitting region SA1b and a second sub-emitting region SA2b. In an embodiment, each of the emission regions EA may include two first sub-emitting regions SA1b and two second sub-emitting regions SA2b.

[0143] The first sub-light-emitting region SA1b can be arranged along the second direction DR2. The second sub-light-emitting region SA2b can also be arranged along the second direction DR2. The first sub-light-emitting region SA1b and the second sub-light-emitting region SA2b can be arranged alternately along the first direction DR1. Pixels set in the first sub-light-emitting region SA1b can be different from pixels set in the second sub-light-emitting region SA2b. This will be discussed further below.

[0144] Pixels may not be disposed in the transmissive region TA. Therefore, the transmittance of the transmissive region TA can be greater than the transmittance of the emitting region EA. Components of a pixel may not be disposed in the transmissive region TA, or one or more components of a pixel may not be disposed in the transmissive region TA. For example, in some embodiments, at least some portions of a pixel (including the entire pixel) may not be disposed in the transmissive region TA. Furthermore, in embodiments, one or more components of the display panel 210 may be omitted to increase the transmittance of the transmissive region TA.

[0145] Figure 6B An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. Specifically, Figure 6B It can be shown as a display panel (see Figure 4A An enlarged plan view of the second display area DA2-a, an example of the second display area DA2 of (210). Furthermore, Figure 6B The second display area DA2-a is shown, and its area is the same as... Figure 5B The first display area DA1-a shown has the same area. The following description also applies. Figure 4B and Figure 4C The second display areas DA2a and DA2b are discussed in the text.

[0146] Reference Figure 6B The second display area DA2-a may include a transmission area TA and an emission area EA-a.

[0147] Each of the emission regions EA-a may include multiple sub-emitting regions SA1b and SA2b. The multiple sub-emitting regions SA1b and SA2b may include a first sub-emitting region SA1b and a second sub-emitting region SA2b. In an embodiment, each of the emission regions EA-a may include two first sub-emitting regions SA1b and two second sub-emitting regions SA2b.

[0148] The first sub-light-emitting region SA1b and the second sub-light-emitting region SA2b can be alternately arranged in the first direction DR1. Furthermore, the first sub-light-emitting region SA1b and the second sub-light-emitting region SA2b can be alternately arranged in the second direction DR2. For example, a first sub-light-emitting region SA1b and a second sub-light-emitting region SA2b can be repeatedly and alternately arranged in the first direction DR1 and the second direction DR2.

[0149] Pixels set in the first sub-light-emitting region SA1b can be different from pixels set in the second sub-light-emitting region SA2b. This will be discussed further below.

[0150] Figure 7An enlarged plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0151] Figure 7 The first sub-light-emitting region SA1 and the second sub-light-emitting region SA2 are shown.

[0152] Each of the first pixel PX1 and the second pixel PX2 may include a first sub-pixel, a second sub-pixel, and a third sub-pixel. The first sub-pixel may include a first pixel emission region PX-R, the second sub-pixel may include a second pixel emission region PX-G, and the third sub-pixel may include a third pixel emission region PX-B. The first pixel emission region PX-R may be the emission region of a red pixel, the second pixel emission region PX-G may be the emission region of a green pixel, and the third pixel emission region PX-B may be the emission region of a blue pixel.

[0153] The first pixel emission region PX-R and the second pixel emission region PX-G can be set in the first sub-emitting region SA1. The second pixel emission region PX-G and the third pixel emission region PX-B can be set in the second sub-emitting region SA2.

[0154] The first pixel emission region PX-R and the second pixel emission region PX-G can be arranged alternately along the second direction DR2, and the second pixel emission region PX-G and the third pixel emission region PX-B can be arranged alternately along the second direction DR2.

[0155] The second pixel emission region PX-G, located in the first sub-light emission region SA1, can be spaced apart from the third pixel emission region PX-B in the first direction DR1. The second pixel emission region PX-G, located in the second sub-light emission region SA2, can be spaced apart from the first pixel emission region PX-R in the first direction DR1.

[0156] Figure 5A The first sub-luminescent region SA1a and Figure 6A Each of the first sub-light-emitting regions SA1b may include the same sub-pixel as the sub-pixel set in the first sub-light-emitting region SA1. Figure 5A The second sub-luminescent region SA2a and Figure 6A Each of the second sub-light-emitting regions SA2b may include the same sub-pixel as the sub-pixel set in the second sub-light-emitting region SA2.

[0157] Figure 7Each of the first pixel emission region PX-R, the second pixel emission region PX-G, and the third pixel emission region PX-B, having a quadrilateral shape, is depicted by way of example; however, the inventive concept is not limited to this configuration. For example, in embodiments, one or more of the first pixel emission region PX-R, the second pixel emission region PX-G, and the third pixel emission region PX-B may have a polygonal shape, such as a hexagonal shape. At least some of the first pixel emission region PX-R, the second pixel emission region PX-G, and the third pixel emission region PX-B may have shapes different from each other. For example, each of the first pixel emission region PX-R and the third pixel emission region PX-B may have a quadrilateral shape, and the second pixel emission region PX-G may have a hexagonal shape.

[0158] Figure 8 An enlarged plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0159] Figure 8 The first sub-light-emitting region SA1-1 and the second sub-light-emitting region SA2-1 are shown.

[0160] The first pixel emission region PX-R1 and the second pixel emission region PX-G1 can be set in the first sub-light emission region SA1-1. The second pixel emission region PX-G1 and the third pixel emission region PX-B1 can be set in the second sub-light emission region SA2-1.

[0161] The first pixel emission region PX-R1 can be spaced apart from the third pixel emission region PX-B1 in the first direction DR1. The second pixel emission region PX-G1 disposed in the first sub-light emission region SA1-1 can be spaced apart from the second pixel emission region PX-G1 disposed in the second sub-light emission region SA2-1 in the first direction DR1.

[0162] In the first sub-light-emitting region SA1-1, the second pixel emission region PX-G1 can be spaced apart from the first pixel emission region PX-R1 along the fourth direction DR4. The fourth direction DR4 can intersect with the first direction DR1 and the second direction DR2. In the second sub-light-emitting region SA2-1, the second pixel emission region PX-G1 can be spaced apart from the third pixel emission region PX-B1 along the fourth direction DR4.

[0163] Figure 9 An enlarged plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0164] Figure 9 The first sub-luminescent region SA1-2 and the second sub-luminescent region SA2-2 are shown.

[0165] The first pixel emission region PX-R2 and the second pixel emission region PX-G2 can be set in the first sub-emitting region SA1-2. The second pixel emission region PX-G2 and the third pixel emission region PX-B2 can be set in the second sub-emitting region SA2-2.

[0166] The first pixel emission region PX-R2 can be spaced apart from the third pixel emission region PX-B2 in the first direction DR1. The second pixel emission region PX-G2 disposed in the first sub-light emission region SA1-2 can be spaced apart from the second pixel emission region PX-G2 disposed in the second sub-light emission region SA2-2 in the first direction DR1.

[0167] In the first sub-light-emitting region SA1-2, the second pixel emission region PX-G2 can be spaced apart from the first pixel emission region PX-R2 in the second direction DR2. In the second sub-light-emitting region SA2-2, the second pixel emission region PX-G2 can be spaced apart from the third pixel emission region PX-B2 in the second direction DR2. For example, the sub-pixels in each of the first and second sub-light-emitting regions SA1-2 and SA2-2 can be arranged in a single column.

[0168] Figure 10 An equivalent circuit diagram of a sub-pixel illustrating an embodiment of the concept according to the present invention is shown.

[0169] Reference Figure 10 Subpixels PX can be set in the effective area (see...). Figure 1B It can provide light in AA).

[0170] Subpixels (PX) can be electrically connected to multiple signal lines. As an example of a signal line, Figure 10 The scan lines SLi and SLi-1, data line DL, first power line PL1, second power line PL2, initialization power line VIL, and transmit control line ECLi are shown. However, these are merely examples, and according to the implementation, the sub-pixel PX may be connected to additional signal lines, or one or more of the signal lines shown may be omitted.

[0171] A sub-pixel PX may include a light-emitting element LD and a pixel circuit CC. The pixel circuit CC may include a first transistor T1 through a seventh transistor T7 and a capacitor CP. In response to a data signal, the pixel circuit CC can control the amount of current flowing through the light-emitting element LD.

[0172] The light-emitting element (LD) can emit light at a specific brightness level in response to the amount of current supplied from the pixel circuit (CC). For this purpose, the level of the first power supply (ELVDD) can be set higher than the level of the second power supply (ELVSS).

[0173] Each of the first transistor T1 to the seventh transistor T7 may include an input electrode (or source electrode), an output electrode (or drain electrode), and a control electrode (or gate electrode). For ease of description, in this specification, one of the input electrode and the output electrode may be referred to as the first electrode, and the other of the input electrode and the output electrode may be referred to as the second electrode.

[0174] The first electrode of the first transistor T1 can be connected to the first power line PL1 via the fifth transistor T5. The first power line PL1 can be supplied with a first power ELVDD. The second electrode of the first transistor T1 can be connected to the anode electrode of the light-emitting element LD via the sixth transistor T6. In this specification, the first transistor T1 may be referred to as the driving transistor.

[0175] In response to the voltage applied to the control electrode of the first transistor T1, the first transistor T1 can control the amount of current flowing through the light-emitting element LD.

[0176] The second transistor T2 is connected between the data line DL and the first electrode of the first transistor T1. The control electrode of the second transistor T2 is connected to the i-th scan line SLi. When the i-th scan signal is provided to the i-th scan line SLi, the second transistor T2 is turned on to electrically connect the data line DL to the first electrode of the first transistor T1.

[0177] The third transistor T3 is connected between the second electrode of the first transistor T1 and the control electrode of the first transistor T1. The control electrode of the third transistor T3 is connected to the i-th scan line SLi. When the i-th scan signal is provided to the i-th scan line SLi, the third transistor T3 is turned on to electrically connect the second electrode of the first transistor T1 to the control electrode of the first transistor T1. Therefore, when the third transistor T3 is turned on, the first transistor T1 is connected in a diode-like configuration.

[0178] The fourth transistor T4 is connected between node ND and the initialization power line VIL. The control electrode of the fourth transistor T4 is connected to the (i-1)th scan line SLi-1. Node ND can be the node connected to the first electrode of the fourth transistor T4 and the control electrode of the first transistor T1. When the (i-1)th scan signal is provided to the (i-1)th scan line SLi-1, the fourth transistor T4 is turned on to provide the initialization voltage Vint to node ND.

[0179] The fifth transistor T5 is connected between the first power line PL1 and the first electrode of the first transistor T1. The sixth transistor T6 is connected between the second electrode of the first transistor T1 and the anode electrode of the light-emitting element LD. The emission control line ECLi or the i-th emission control line is connected to the control electrodes of the fifth transistor T5 and the sixth transistor T6.

[0180] The seventh transistor T7 is connected between the initialization power line VIL and the anode electrode of the light-emitting element LD. The control electrode of the seventh transistor T7 is connected to the i-th scan line SLi. When the i-th scan signal is provided to the i-th scan line SLi, the seventh transistor T7 is turned on to provide the initialization voltage Vint to the anode electrode of the light-emitting element LD.

[0181] The seventh transistor T7 can increase the ability of the sub-pixel PX to represent (e.g., display) black. For example, when the seventh transistor T7 is turned on, the parasitic capacitor (not shown) of the light-emitting element LD discharges. Then, when black brightness is achieved, the leakage current from the first transistor T1 can prevent the light-emitting element LD from emitting light, and thus, the ability of the sub-pixel PX to represent black can be increased.

[0182] also, Figure 10 The diagram shows the control electrode of the seventh transistor T7 connected to the i-th scan line SLi, but the inventive concept is not limited to this arrangement. In another embodiment, the control electrode of the seventh transistor T7 may be connected to either the (i-1)-th scan line SLi-1 or the (i+1)-th scan line (not shown).

[0183] Figure 10 An example including a PMOS transistor is depicted, but the inventive concept is not limited to this arrangement. In another embodiment, the pixel circuit CC may be configured to include an NMOS transistor. In yet another embodiment, the pixel circuit CC may be configured to include a combination of NMOS and PMOS transistors.

[0184] A capacitor CP is positioned between the first power line PL1 and node ND. The capacitor CP stores the voltage corresponding to the data signal. When the fifth transistor T5 and the sixth transistor T6 are turned on, the amount of current flowing through the first transistor T1 can be determined based on the voltage stored in the capacitor CP.

[0185] The light-emitting element (LD) can be electrically connected to the second electrode and the second power line PL2 of the sixth transistor T6. The LD can receive a second power line ELVSS through the second power line PL2. The LD may include an emitting layer.

[0186] The light-emitting element LD can emit light due to the voltage difference between the signal transmitted through the sixth transistor T6 and the second power ELVSS received through the second power line PL2.

[0187] The structure of sub-pixels PX is not limited to Figure 10 The structure shown is illustrated. In another embodiment, the sub-pixel PX can be implemented in various configurations suitable for the light-emitting element LD to emit light.

[0188] Figure 11 A cross-sectional view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0189] Reference Figure 11 A first dielectric layer 10 is disposed on a substrate layer BL. The first dielectric layer 10 may include a barrier layer and / or a buffer layer. The barrier layer may include an inorganic material. The barrier layer can prevent the pixel from being affected by oxygen or moisture introduced through the substrate layer BL. The buffer layer may include an inorganic material. The buffer layer can provide a surface energy lower than that of the substrate layer BL, so that the pixel can be stably formed on the substrate layer BL.

[0190] Subpixel (see Figure 10 Each of the PXs may include pixel circuitry (see PX). Figure 10 The light-emitting element (LD) can include a pixel electrode (E1), an emitting layer (EL), and a common electrode (E2).

[0191] Figure 11 Only one transistor TR is shown, which is included in the pixel circuit CC. The transistor TR can be... Figure 10 The sixth transistor T6 discussed in the text.

[0192] A transistor TR may be disposed on the first dielectric layer 10. The transistor TR includes a semiconductor pattern SP, a control electrode CE, a first electrode IE, and a second electrode OE. The semiconductor pattern SP is disposed on the first dielectric layer 10. The semiconductor pattern SP may include a semiconductor material. The control electrode CE is spaced apart from the semiconductor pattern SP across the second dielectric layer 20.

[0193] The first electrode IE and the second electrode OE penetrate the second dielectric layer 20, the third dielectric layer 30, and the fourth dielectric layer 40, and are respectively connected to one end and the other end of the semiconductor pattern SP. The transistor TR according to embodiments of the present invention can be formed with various stacked structures, and is not limited to... Figure 11 The example shown.

[0194] A fifth dielectric layer 50 is disposed on the fourth dielectric layer 40 and covers the first electrode IE and the second electrode OE. The fifth dielectric layer 50 may include organic and / or inorganic materials and may have a single-layer or multi-layer structure.

[0195] In this specification, the first dielectric layer 10 to the fifth dielectric layer 50 can be referred to as the display circuit layer ML. The stacked structure of the pixel circuit CC can correspond to the cross-sectional structure of the display circuit layer ML.

[0196] Pixel electrode E1 is disposed on the fifth dielectric layer 50. Pixel electrode E1 can penetrate the fifth dielectric layer 50 and can be electrically connected to transistor TR. Figure 11It shows that pixel electrode E1 is directly connected to transistor TR, but pixel electrode E1 can be connected through... Figure 10 The sixth transistor T6 shown is electrically connected to another transistor TR.

[0197] A sixth dielectric layer 60 may be disposed on the fifth dielectric layer 50. An opening may be defined in the sixth dielectric layer 60, and this opening may expose at least a portion of the pixel electrode E1. The sixth dielectric layer 60 may be a pixel defining layer. The opening may be connected to a sub-pixel (see...). Figure 10 The pixel emission region corresponds to the PX.

[0198] An emitting layer EL may be disposed on a pixel electrode E1 exposed to an opening defined in the sixth dielectric layer 60. The emitting layer EL may include a light-emitting material. For example, the emitting layer EL may be configured to include one or more of red, green, and blue light-emitting materials. The emitting layer EL may include a fluorescent or phosphorescent material. The emitting layer EL may include an organic or inorganic light-emitting material. The emitting layer EL may emit light in response to a potential difference between the pixel electrode E1 and the common electrode E2.

[0199] The common electrode E2 can be disposed on the emitter layer EL. The common electrode E2 can have a region from the effective region (see [link to relevant documentation]). Figure 1B (AA) extends to the outer area (see Figure 1B The NAA is a single entity. The common electrode E2 can be commonly set on multiple sub-pixels.

[0200] The common electrode E2 may comprise a transmissive conductive material or a semi-transmissive / semi-reflective conductive material. Therefore, light generated from the emitting layer EL can be easily emitted onto the third-direction DR3 via the common electrode E2. However, this configuration is shown by way of example, and depending on the design, the light-emitting element LD according to embodiments of the present invention may be driven, but is not limited to, in a bottom-emission mode or a dual-emission mode, in which the pixel electrode E1 comprises a transmissive or semi-transmissive / semi-reflective material, and in the dual-emission mode, light is emitted towards both the front and rear sides.

[0201] Figure 12A A cross-sectional view showing the configuration of a display panel according to an embodiment of the present invention is shown. Figure 12A It can be a cross-sectional view showing the transmissive area TA of the display panel 210.

[0202] The pixel may not be located in the transmission region TA. Therefore, the substrate layer BL, the first dielectric layer 10 to the sixth dielectric layer 60, and the common electrode E2 can be located in the transmission region TA.

[0203] To improve transmittance, one or more of the substrate layer BL, the first dielectric layer 10 to the sixth dielectric layer 60, and the common electrode E2 can be removed from the transmission region TA. In an embodiment, the thickness of the common electrode E2 in the transmission region TA can be smaller than that in the emission region (see [link to embodiment]). Figure 6A The thickness of the common electrode E2 in EA).

[0204] Figure 12B A cross-sectional view showing the configuration of a display panel according to an embodiment of the present invention is shown. Figure 12B It can be a cross-sectional view showing the transmissive area TA of the display panel 210.

[0205] and Figure 12A In comparison, it is possible to not Figure 12B A common electrode is set in the middle (see Figure 11 (E2). In an embodiment, the common electrode E2 may have a hole that overlaps with the transmission region TA. Therefore, the transmission region TA can increase the transmittance.

[0206] Figure 13A A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown. Figure 13B A cross-sectional view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0207] Figure 13A The substrate layer BL, pixel electrodes E1x and E1y, and emitter layers ELx and ELy are shown.

[0208] The substrate layer BL may include a first region AR1 and a second region AR2. The first region AR1 and the second region AR2 may be adjacent to each other in the second direction DR2. The first region AR1 corresponds to the first display area (see...). Figure 4A The second area AR2 corresponds to the second display area (see DA1). Figure 4A The DA2 area.

[0209] The second region AR2 may include a first sub-region SAR1 and a second sub-region SAR2. The first sub-region SAR1 may correspond to the transmission area (see...). Figure 6A (EA). The second sub-region SAR2 can correspond to the transmission region (see EA). Figure 6A (TA). The first sub-region SAR1 and the second sub-region SAR2 can be alternately confined to the first direction DR1 and the second direction DR2.

[0210] Pixel electrodes E1x and E1y may include a first pixel electrode E1x and a second pixel electrode E1y. The first pixel electrode E1x may be located in a first region AR1. The second pixel electrode E1y may be located in a second region AR2. For example, the second pixel electrode E1y may be placed in a first sub-region SAR1. The second pixel electrode E1y may not be located in the second sub-region SAR2.

[0211] The emission layers ELx and ELy can include a first emission layer ELx and a second emission layer ELy. The first emission layer ELx can be located in a first region AR1. The second emission layer ELy can be located in a second region AR2. For example, the second emission layer ELy can be placed in a first sub-region SAR1.

[0212] Multiple first emission layers ELx and multiple second emission layers ELy can be configured. In an embodiment, the first emission layers ELx and the second emission layers ELy can be arranged in the same manner. For example, each of the first emission layers ELx can have the same size as a corresponding one of the second emission layers ELy, and the spacing between the first emission layers ELx can be the same as the spacing between the second emission layers ELy.

[0213] Multiple first pixel electrodes E1x and multiple second pixel electrodes E1y can be configured. In an embodiment, the first pixel electrodes E1x can be arranged in a first arrangement, and the second pixel electrodes E1y can be arranged in a second arrangement different from the first arrangement. For example, the first minimum distance DT1 between the first pixel electrodes E1x can be different from the second minimum distance DT2 between the second pixel electrodes E1y. The first minimum distance DT1 can be the spacing between two first pixel electrodes E1x that are spaced apart from each other and are closest to each other in the first direction DR1. The second minimum distance DT2 can be the spacing between two second pixel electrodes E1y that are spaced apart from each other and are closest to each other in the first direction DR1.

[0214] A first emission layer ELx can be disposed on a first pixel electrode E1x, and a second emission layer ELy can be disposed on a second pixel electrode E1y. When viewed in a plane, a portion of the first emission layer ELx can overlap with the first pixel electrode E1x, and a portion of the second emission layer ELy can overlap with the second pixel electrode E1y. The area of ​​the first emission layer ELx can be larger than the area of ​​the first pixel electrode E1x, and the area of ​​the second emission layer ELy can be larger than the area of ​​the second pixel electrode E1y.

[0215] According to an embodiment of the present invention, the second pixel electrode E1y can be offset from the second emission layer ELy in a direction away from the second sub-region SAR2. That is, the closer portion of the second emission layer ELy is closer to the second sub-region SAR2 than the farther portion of the second emission layer ELy that overlaps with the second pixel electrode E1y. The closer portion of the second emission layer ELy does not overlap with the second pixel electrode E1y. In other words, the second pixel electrode E1y does not overlap with the edge of the second emission layer ELy that is closest to the second sub-region SAR2 among all its edges. The transmittance of the second pixel electrode E1y can be less than the transmittance of the second emission layer ELy. For example, the second pixel electrode E1y may include opaque metal. Because the second pixel electrode E1y is offset in a direction away from the second sub-region SAR2, the display panel (see...) Figure 4A (210) can have increased transmittance in the portions corresponding to ATR1 and ATR2 of the first sub-region SAR1. Therefore, the electronic module below the second region AR2 (see Figure 1B (500) can increase sensitivity.

[0216] Reference Figure 13B The second emission layer ELy is offset from the second pixel electrode E1y. Therefore, when viewed on the third-direction DR3, the closer portion ELy-p of the second emission layer ELy does not overlap with the second pixel electrode E1y.

[0217] A first overlapping region OA1 is defined where the first emission layer ELx overlaps with the first pixel electrode E1x, and a second overlapping region OA2 is defined where the second emission layer ELy overlaps with the second pixel electrode E1y. Because the second pixel electrode E1y is offset from the second emission layer ELy, a non-overlapping region NOA can be located between the second overlapping region OA2 and the second sub-region SAR2. The transmittance of the non-overlapping region NOA can be greater than the transmittance of the second overlapping region OA2.

[0218] The center CP2 of the second overlapping region OA2 can be spaced apart from the center CP-Ey of the second transmission layer ELy. For example, the center CP2 can be spaced apart from the center CP-Ey in a direction away from the nearest second sub-region SAR2 in the second sub-region SAR2. Therefore, the center CP-Ey can be located between the center CP2 and the nearest second sub-region SAR2 in the second sub-region SAR2.

[0219] The center CP1 of the first overlapping region OA1 can be spaced apart from the center CP-Ex of the first emitter layer ELx. For example, when the center CP2 is spaced apart from the center CP-Ey in the first direction DR1, the center CP1 can be spaced apart from the center CP-Ex in a direction opposite to the first direction DR1. Figure 13AAs shown, when center CP2 is positioned to the left of center CP-Ey, center CP1 can be positioned to the right of center CP-Ex. This configuration will be explained by an example where the first pixel electrode E1x and the second pixel electrode E1y are spaced apart in the second direction DR2, and the first emitter layer ELx and the second emitter layer ELy are also spaced apart in the second direction DR2.

[0220] The center CP-Ey of the second emitter layer ELy and the center CP-Ex of the first emitter layer ELx can be set on the same imaginary line extending along the second direction DR2. Conversely, the center CP1 of the first overlapping region OA1 and the center CP2 of the second overlapping region OA2 are not set on the same imaginary line extending along the second direction DR2. For example, center CP1 may not overlap with the imaginary line IL that passes through center CP2 and extends along the second direction DR2.

[0221] Figure 14A A plan view of a display panel illustrating an embodiment of the concept according to the present invention is shown. Figure 14B A graph showing the relationship between the rate of increase in the region of increased transmittance and the change in the length of the second sub-pixel electrode is presented.

[0222] refer to Figure 14A and Figure 14B This shows a launch area (see...) Figure 6A The emission region EA can include four sub-emitting regions SA1b and SA2b. Therefore, the emission region EA can include two first pixel emission regions (see EA). Figure 7 PX-R), four second pixel emission regions (see PX-R), and four second pixel emission regions (see PX-R). Figure 7 PX-G) and two third pixel emission regions (see ... Figure 7 PX-B).

[0223] Figure 14A The diagram shows a first sub-pixel electrode E1-R, a second sub-pixel electrode E1-G, and a third sub-pixel electrode E1-B disposed in a first pixel emission region PX-R, a second pixel emission region PX-G, and a third pixel emission region PX-B.

[0224] According to an embodiment of the present invention, the transmittance of the emission region EA can be increased by adjusting the positions of the first sub-pixel electrode E1-R, the second sub-pixel electrode E1-G, and the third sub-pixel electrode E1-B.

[0225] When determining the product based on resolution and size, it is possible to obtain the first width DTa and the second width DTb of each of the sub-light-emitting regions SA1b and SA2b, the minimum margin and minimum spacing between the first sub-pixel electrode E1-R, the second sub-pixel electrode E1-G and the third sub-pixel electrode E1-B, and the area of ​​the first sub-pixel electrode E1-R, the second sub-pixel electrode E1-G and the third sub-pixel electrode E1-B.

[0226] The first width DTa can be a length parallel to the first direction DR1, and the second width DTb can be a length parallel to the second direction DR2. For example, the first width DTa and the second width DTb can each be approximately 63 μm. The minimum pitch can be approximately 13.8 μm. The minimum margin can be approximately 5 μm. The area of ​​the first sub-pixel electrode E1-R can be approximately 379.1 μm. 2 The area of ​​the second sub-pixel electrode E1-G can be approximately 263.7 μm. 2 Furthermore, the area of ​​the third sub-pixel electrode E1-B can be approximately 703.6 μm. 2 .

[0227] The area of ​​the first sub-pixel electrode E1-R can correspond to the product of the first length DRa and the second length DTRb of the first sub-pixel electrode E1-R. The area of ​​the second sub-pixel electrode E1-G can correspond to the product of the first length DTGa and the second length DTGb of the second sub-pixel electrode E1-G. The area of ​​the third sub-pixel electrode E1-B can correspond to the product of the first length DTBb and the second length DTBb of the third sub-pixel electrode E1-B. The first lengths DRa, DTGa, and DTBa can be the lengths of the sides extending in the first direction DR1, and the second lengths DTRb, DTGb, and DTBb can be the lengths of the sides extending in the second direction DR2.

[0228] When viewed in a plane, each of the first sub-pixel electrode E1-R, the second sub-pixel electrode E1-G, and the third sub-pixel electrode E1-B can have a quadrilateral shape. Furthermore, when viewed in a plane, each of the emission layers on the first sub-pixel electrode E1-R, the second sub-pixel electrode E1-G, and the third sub-pixel electrode E1-B can also have a quadrilateral shape.

[0229] Figure 14B It is a graph showing the ratio of the region with increased transmittance depending on the change in the second length DTGb of the second sub-pixel electrode E1-G.

[0230] The regions with increased transmittance can correspond to portions of ATR1 and ATR2. These portions can also correspond to areas that do not have the first sub-pixel electrode E1-R, the second sub-pixel electrode E1-G, and the third sub-pixel electrode E1-B. The ratio of the regions with increased transmittance can be the ratio of the area of ​​portions of ATR1 and ATR2 to the area of ​​the emission region EA.

[0231] Equation 1 below can be defined as representing a first value corresponding to the sum of the second lengths DTRb and DTGb, and also representing a second value corresponding to the sum of the second lengths DTGb and DTBb.

[0232] [Equation 1]

[0233] First value = Second value = Second width - 2 * (Minimum spacing) - Minimum margin

[0234] According to Equation 1 above, the first and second values ​​can each be approximately 30.4 μm. Therefore, when the second length DTGb of the second sub-pixel electrode E1-G is determined individually, the second length DTRb and the second length DTBb can be obtained. Furthermore, since the areas of the first sub-pixel electrode E1-R, the second sub-pixel electrode E1-G, and the third sub-pixel electrode E1-B are determined, the first lengths DRa, DTGa, and DTBa can also be obtained.

[0235] As a result of measuring how the ratio of the region with increased transmittance changes with the second length DTGb, the ratio has a maximum increase rate of approximately 41.3% when the second length DTGb is approximately 11.55 μm. In this case, the first length DTGra is determined to be approximately 20.11 μm, the first length DTGa to be approximately 22.83 μm, the first length DTGa to be approximately 37.33 μm, the second length DTRb to be approximately 18.85 μm, and the second length DTBb to be approximately 18.85 μm.

[0236] Figure 15 A plan view illustrating the configuration of a display panel according to an embodiment of the present invention is shown. Figure 15 In the description, with Figure 13A Components that are identical to each other are assigned the same reference symbol, and duplicate interpretations will be omitted.

[0237] Figure 15 The substrate layer BL, pixel electrodes E1x and E1ya, and emitter layers ELx and ELy are shown.

[0238] Pixel electrodes E1x and E1ya may include a first pixel electrode E1x and a second pixel electrode E1ya. The first pixel electrode E1x may be disposed in a first region AR1. The second pixel electrode E1ya may be disposed in a second region AR2. For example, the second pixel electrode E1ya may be placed in a first sub-region SAR1.

[0239] Each of the first pixel electrode E1x and the second pixel electrode E1ya can be a second sub-pixel electrode (see [link]). Figure 14A (E1-G). In an implementation, the first length DTGa1 can be smaller than the first length DTGa. Therefore, the size of the second pixel electrode E1ya can be smaller than the size of the first pixel electrode E1x. Therefore, the first sub-region SAR1 can have increased transmittance in the portion adjacent to the second sub-region SAR2.

[0240] although Figure 15 Only the first pixel electrode E1x and the second pixel electrode E1ya corresponding to each of the second sub-pixel electrodes E1-G are shown, but this interpretation can also be applied to the first sub-pixel electrode (see [link to documentation]). Figure 14A The pixel electrode corresponding to E1-R and the third sub-pixel electrode (see E1-R) Figure 14A The pixel electrode corresponding to E1-B).

[0241] Figure 16A A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0242] Figure 16A The diagram shows the first sub-pixel electrodes E1-Rx and E1-Ry, the second sub-pixel electrodes E1-Gx and E1-Gy, and the third sub-pixel electrodes E1-Bx and E1-By, as well as the first sub-emitting layers EL-Rx and EL-Ry, the second sub-emitting layers EL-Gx and EL-Gy, and the third sub-emitting layers EL-Bx and EL-By.

[0243] The first sub-pixel electrode E1-Rx, the second sub-pixel electrode E1-Gx, and the third sub-pixel electrode E1-Bx, as well as the first sub-emitting layer EL-Rx, the second sub-emitting layer EL-Gx, and the third sub-emitting layer EL-Bx, can be disposed in the first region AR1 and included in the first display region DA1.

[0244] The first sub-pixel electrode E1-Ry, the second sub-pixel electrode E1-Gy, and the third sub-pixel electrode E1-By, as well as the first sub-emission layer EL-Ry, the second sub-emission layer EL-Gy, and the third sub-emission layer EL-By, can be disposed in the first sub-region SAR1 and included in the second display region DA2.

[0245] In the first sub-region SAR1, the first sub-pixel electrode E1-Ry, the second sub-pixel electrode E1-Gy, and the third sub-pixel electrode E1-By are offset relative to the first sub-emitting layer EL-Ry, the second sub-emitting layer EL-Gy, and the third sub-emitting layer EL-By, respectively. The areas of the first sub-emitting layer EL-Ry, the second sub-emitting layer EL-Gy, and the third sub-emitting layer EL-By can be larger than the areas of the first sub-pixel electrode E1-Ry, the second sub-pixel electrode E1-Gy, and the third sub-pixel electrode E1-By, respectively. Similarly, the areas of the first sub-emitting layer EL-Rx, the second sub-emitting layer EL-Gx, and the third sub-emitting layer EL-Bx can be larger than the areas of the first sub-pixel electrode E1-Rx, the second sub-pixel electrode E1-Gx, and the third sub-pixel electrode E1-Bx, respectively.

[0246] In the first sub-region SAR1, the first sub-pixel electrode E1-Ry, the second sub-pixel electrode E1-Gy, and the third sub-pixel electrode E1-By can move relative to the first sub-emission layer EL-Ry, the second sub-emission layer EL-Gy, and the third sub-emission layer EL-By in a direction away from the second sub-region SAR2 (or away from the transmission region TA).

[0247] Figure 16B A plan view showing the configuration of a display panel according to an embodiment of the present invention is shown.

[0248] Figure 16B The diagram shows the first sub-pixel electrodes E1-Rx1, E1-Ry1, the second sub-pixel electrodes E1-Gx1, E1-Gy1, and the third sub-pixel electrodes E1-Bx1, E1-By1, as well as the first sub-emitting layers EL-Rx1, EL-Ry1, the second sub-emitting layers EL-Gx1, EL-Gy1, and the third sub-emitting layers EL-Bx1, EL-By1.

[0249] The first sub-pixel electrode E1-Rx1, the second sub-pixel electrode E1-Gx1, and the third sub-pixel electrode E1-Bx1, as well as the first sub-emitting layer EL-Rx1, the second sub-emitting layer EL-Gx1, and the third sub-emitting layer EL-Bx1, can be disposed in the first region AR1 and included in the first display region DA1.

[0250] The first sub-pixel electrode E1-Ry1, the second sub-pixel electrode E1-Gy1, and the third sub-pixel electrode E1-By1, as well as the first sub-emitting layer EL-Ry1, the second sub-emitting layer EL-Gy1, and the third sub-emitting layer EL-By1, can be disposed in the second region AR2 and included in the second display region DA2.

[0251] In the second region AR2, one or more of the first sub-pixel electrode E1-Ry1, the second sub-pixel electrode E1-Gy1, and the third sub-pixel electrode E1-By1 may be offset relative to one or more of the corresponding first sub-emitting layer EL-Ry1, the second sub-emitting layer EL-Gy1, and the third sub-emitting layer EL-By1.

[0252] For example, the positional relationship between the first sub-pixel electrode E1-Rx1 and the first sub-emitting layer EL-Rx1 disposed in the first region AR1 can be different from the positional relationship between the first sub-pixel electrode E1-Ry1 and the first sub-emitting layer EL-Ry1 disposed in the second region AR2. In the second region AR2, the first sub-pixel electrode E1-Ry1 can be offset relative to the first sub-emitting layer EL-Ry1 in a direction away from the transmission region TA.

[0253] The positional relationship between the second sub-pixel electrode E1-Gx1 and the second sub-emitting layer EL-Gx1 disposed in the first region AR1 can share at least some characteristics with the positional relationship between the second sub-pixel electrode E1-Gy1 and the second sub-emitting layer EL-Gy1 disposed in the second region AR2. For example, the second sub-pixel electrode E1-Gy1, which is spaced apart from the first sub-pixel electrode E1-Ry1 only in the second direction DR2, can be offset relative to the second sub-emitting layer EL-Gy1 in a direction away from the transmission region TA.

[0254] The position of the third sub-pixel electrode E1-By1 in the second region AR2 relative to the third sub-emitting layer EL-By1 can be the same as the position of the third sub-pixel electrode E1-Bx1 in the first region AR1 relative to the third sub-emitting layer EL-Bx1.

[0255] Figure 16C A plan view illustrating the configuration of a display panel according to an embodiment of the present invention is shown. Figure 16C In the implementation method, the above will be explained in Figure 16B The different configurations discussed here will be omitted from the explanation.

[0256] Figure 16C The diagram shows the first sub-pixel electrodes E1-Rx1, E1-Ry1, the second sub-pixel electrodes E1-Gx1, E1-Gy1, and the third sub-pixel electrodes E1-Bx1, E1-By1, as well as the first sub-emitting layers EL-Rx1, EL-Ry1, the second sub-emitting layers EL-Gx1, EL-Gy1, and the third sub-emitting layers EL-Bx1, EL-By1.

[0257] In the above Figure 16BIn the embodiment shown, the third sub-pixel electrode E1-By1 and the second sub-pixel electrode E1-Gy1 are alternately arranged along the second direction DR2, and the second sub-pixel electrode E1-Gy1 and the first sub-pixel electrode E1-Ry1 are alternately arranged along the second direction DR2. Figure 16C In this context, when a single unit is defined as including a third sub-pixel electrode E1-By1 and a second sub-pixel electrode E1-Gy1 arranged along the second direction DR2, and a first sub-pixel electrode E1-Ry1 and a second sub-pixel electrode E1-Gy1 arranged along the second direction DR2, the single unit can be repeatedly arranged along the second direction DR2.

[0258] In a single unit, one of the two second sub-pixel electrodes E1-Gy1 can be offset relative to the second sub-emitting layer EL-Gy1 in a direction away from the transmission region TA. For example, the positional relationship between the second sub-emitting layer EL-Gy1 and one of the two second sub-pixel electrodes E1-Gy1 disposed in the second region AR2 can be different from the positional relationship between the second sub-emitting layer EL-Gx1 and one of the two second sub-pixel electrodes E1-Gx1 disposed in the first region AR1, and the positional relationship between the other of the two second sub-emitting layers EL-Gy1 and the other of the two second sub-pixel electrodes E1-Gy1 disposed in the second region AR2 can be the same as the positional relationship between the other of the two second sub-emitting layers EL-Gx1 and the other of the two second sub-pixel electrodes E1-Gx1 disposed in the first region AR1.

[0259] Figure 16D A plan view illustrating the configuration of a display panel according to an embodiment of the present invention is shown. Figure 16D In the implementation method, the above will be explained in Figure 16B The different configurations discussed here will be omitted from the explanation.

[0260] Figure 16D The diagram shows the first sub-pixel electrodes E1-Rx1, E1-Ry1, the second sub-pixel electrodes E1-Gx1, E1-Gy1, and the third sub-pixel electrodes E1-Bx1, E1-By1, as well as the first sub-emitting layers EL-Rx1, EL-Ry1, the second sub-emitting layers EL-Gx1, EL-Gy1, and the third sub-emitting layers EL-Bx1, EL-By1.

[0261] In the above Figure 16B In the embodiment shown, the third sub-pixel electrode E1-By1 and the second sub-pixel electrode E1-Gy1 are arranged along the second direction DR2, and the second sub-pixel electrode E1-Gy1 and the first sub-pixel electrode E1-Ry1 are arranged along the second direction DR2. Figure 16DIn this context, when a single unit is defined as including a third sub-pixel electrode E1-By1 and a second sub-pixel electrode E1-Gy1 arranged along the second direction DR2, and a first sub-pixel electrode E1-Ry1 and a second sub-pixel electrode E1-Gy1 arranged along the second direction DR2, the single unit can be repeatedly arranged along the second direction DR2.

[0262] Figure 16C and Figure 16D The illustration depicts, by way of example, that the third sub-pixel electrodes E1-Bx1 and E1-By1 and the third sub-emitter layers EL-Bx1 and EL-By1 have the same dimensions, but the inventive concept is not limited to this arrangement. For example, in an embodiment, the dimensions of the third sub-pixel electrodes E1-Bx1 and E1-By1 may be smaller than the dimensions of the third sub-emitter layers EL-Bx1 and EL-By1.

[0263] Figure 17 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. The second display area DA2-1 is shown in the enlarged view, illustrating... Figures 4A to 4C It is a part of one of the second display areas DA2, DA2a and DA2b depicted in the figure.

[0264] Reference Figure 17 The second display area DA2-1 may include an emitting area EA-1 and a transmissive area TA-1. The emitting area EA-1 and the transmissive area TA-1 may be arranged alternately along a first direction DR1 and also alternately along a second direction DR2. The area of ​​each of the transmissive areas TA-1 may correspond to the area of ​​each of the emitting areas EA-1.

[0265] Each of the emission regions EA-1 may include two sub-emitting regions SA1b and SA2b. Sub-emitting regions SA1b and SA2b may include a first sub-emitting region SA1b and a second sub-emitting region SA2b. In an embodiment, each of the emission regions EA-1 may include a first sub-emitting region SA1b and a second sub-emitting region SA2b. The first sub-emitting region SA1b and the second sub-emitting region SA2b may be arranged on a first direction DR1.

[0266] Figure 18 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. The second display area DA2-2 is shown in the enlarged view, illustrating... Figures 4A to 4C It is a part of one of the second display areas DA2, DA2a and DA2b depicted in the figure.

[0267] Reference Figure 18The second display area DA2-2 may include an emitting area EA-2 and a transmissive area TA-2. The area of ​​each in the transmissive area TA-2 may correspond to the area of ​​each in the emitting area EA-2.

[0268] Each of the emitting regions EA-2 may include sixteen sub-emitting regions SA1b and SA2b. Sub-emitting regions SA1b and SA2b may include a first sub-emitting region SA1b and a second sub-emitting region SA2b. In one embodiment, each of the emitting regions EA-2 may include eight first sub-emitting regions SA1b and eight second sub-emitting regions SA2b. The first sub-emitting regions SA1b may be arranged on a first direction DR1, and the second sub-emitting regions SA2b may be arranged on the first direction DR1. Furthermore, the first sub-emitting regions SA1b and the second sub-emitting regions SA2b may be alternately arranged on a second direction DR2.

[0269] Figure 19 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. The second display area DA2-3 is shown in the enlarged view, illustrating... Figures 4A to 4C It is a part of one of the second display areas DA2, DA2a and DA2b depicted in the figure.

[0270] Reference Figure 19 The second display area DA2-3 may include an emitting area EA-3 and a transmissive area TA-3. The area of ​​each of the transmissive areas TA-3 may correspond to the area of ​​each of the emitting areas EA-3.

[0271] Each of the emission regions EA-3 may include eight sub-emitting regions SA1b and SA2b. Sub-emitting regions SA1b and SA2b may include a first sub-emitting region SA1b and a second sub-emitting region SA2b. In one embodiment, each of the emission regions EA-3 may include four first sub-emitting regions SA1b and four second sub-emitting regions SA2b. The first sub-emitting regions SA1b may be arranged on the second direction DR2, and the second sub-emitting regions SA2b may be arranged on the second direction DR2. Furthermore, the first sub-emitting regions SA1b and the second sub-emitting regions SA2b may be alternately arranged on the first direction DR1.

[0272] Figure 20 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. The second display area DA2-4 is shown in the enlarged view, illustrating... Figures 4A to 4C It is a part of one of the second display areas DA2, DA2a and DA2b depicted in the figure.

[0273] Reference Figure 20 The second display area DA2-4 may include an emitting area EA-4 and a transmitting area TA-4. The emitting area EA-4 and the transmitting area TA-4 may each extend along a fourth direction DR4. The fourth direction DR4 may intersect with a first direction DR1 and a second direction DR2. The emitting area EA-4 and the transmitting area TA-4 may be alternately arranged on a fifth direction DR5. The fifth direction DR5 may intersect with the fourth direction DR4. The fifth direction DR5 may also intersect with the first direction DR1 and the second direction DR2.

[0274] Each of the emitting regions EA-4 may include sub-emitting regions SA1b and SA2b. Sub-emitting regions SA1b and SA2b may be arranged in a stepped configuration. For example, when viewed in a plane, the second sub-emitting region SA2b may be positioned laterally to one side of the first sub-emitting region SA1b. The first sub-emitting region SA1b may be positioned below the second sub-emitting region SA2b. As described above, the first and second sub-emitting regions SA1b and SA2b may be repeatedly arranged to allow each of the emitting regions EA-4 to have a stepped shape. The shape of each of the transmission regions TA-4 may correspond to the shape of the adjacent emitting region EA-4. Therefore, each of the transmission regions TA-4 may also have a stepped shape.

[0275] Figure 21 An enlarged plan view of a display panel, partially illustrating an embodiment of the concept according to the present invention, is shown. The second display area DA2-5 is shown in the enlarged view, illustrating... Figures 4A to 4C It is a part of one of the second display areas DA2, DA2a and DA2b depicted in the figure.

[0276] Reference Figure 21 The second display area DA2-5 may include an emitting area EA-5 and a transmitting area TA-5. The emitting area EA-5 and the transmitting area TA-5 may each extend along the second direction DR2. The emitting area EA-5 and the transmitting area TA-5 may be alternately arranged on the first direction DR1.

[0277] Each of the emission regions EA-5 may include sub-emitting regions SA1b and SA2b. Sub-emitting regions SA1b and SA2b may include a first sub-emitting region SA1b and a second sub-emitting region SA2b. The first sub-emitting region SA1b may be arranged on the second direction DR2, and the second sub-emitting region SA2b may be arranged on the second direction DR2. Furthermore, the first sub-emitting region SA1b and the second sub-emitting region SA2b may be alternately arranged on the first direction DR1.

[0278] According to an embodiment of the present invention, the pixel electrode adjacent to the transmissive region of the display panel can be offset from the emissive layer in a direction away from the transmissive region. Therefore, the emissive region can have increased transmittance in the portion adjacent to the transmissive region. Consequently, the electronic module disposed beneath the display panel can have increased sensitivity.

[0279] Although embodiments have been described with reference to several illustrative examples, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the inventive concept as set forth in the appended claims. Therefore, the technical scope of the inventive concept is not limited to the foregoing embodiments and examples, but rather to the appended claims.

Claims

1. Display panel, including: The substrate layer includes a first region and a second region, the second region including a first sub-region and a second sub-region, wherein the second sub-region corresponds to the transmission region; Multiple first pixels, in the first region; and Multiple second pixels, in the first sub-region, Each of the plurality of first pixels includes a first pixel electrode, a first emission layer on the first pixel electrode, and a first common electrode on the first emission layer. Each of the plurality of second pixels includes a second pixel electrode, a second emission layer on the second pixel electrode, and a second common electrode on the second emission layer. The second pixel electrode is offset relative to the second emission layer in a direction away from the second sub-region, such that the second pixel electrode does not overlap with the edge of the second emission layer that is closest to the second sub-region among all its edges.

2. The display panel according to claim 1, wherein, Each of the first sub-region and the second sub-region is configured as multiple. Wherein, multiple first sub-regions and multiple second sub-regions are alternately defined in a first direction, and The plurality of first sub-regions and the plurality of second sub-regions are alternately defined in a second direction intersecting the first direction.

3. The display panel according to claim 1, wherein, The first sub-region and the second sub-region are adjacent to each other in a first direction, and Wherein, the center of the overlapping region where the second emission layer and the second pixel electrode overlap is spaced apart from the center of the second emission layer in the first direction.

4. The display panel according to claim 3, wherein, The center of the overlapping region where the first emission layer and the first pixel electrode overlap is spaced apart from the center of the first emission layer in a direction opposite to the first direction.

5. The display panel according to claim 1, wherein, Each of the first emitter layer, the first pixel electrode, the second emitter layer, and the second pixel electrode has a quadrilateral shape.

6. The display panel according to claim 1, wherein, The area of ​​the first emitting layer is larger than the area of ​​the first pixel electrode, and The area of ​​the second emission layer is larger than the area of ​​the second pixel electrode.

7. The display panel according to claim 1, wherein, The first sub-region and the second sub-region are adjacent to each other in a first direction. Specifically, a first overlap region is defined at the point where the first pixel electrode overlaps with the first emitter layer. Specifically, a second overlap region is defined at the point where the second pixel electrode overlaps with the second emitter layer. Wherein, the first overlapping region is spaced apart from the second overlapping region in a second direction intersecting the first direction, and The imaginary line does not overlap with the center of the first overlapping region, and the imaginary line passes through the center of the second overlapping region and extends in the second direction.

8. The display panel according to claim 1, wherein, The pixel is not set in the second sub-region.

9. The display panel according to claim 1, wherein, The first emission layer is configured as multiple layers. The second emission layer is configured as multiple layers, and The plurality of first emission layers and the plurality of second emission layers are arranged in the same manner.

10. The display panel according to claim 1, wherein, The first pixel electrode is configured as multiple. The second pixel electrode is configured as multiple. Wherein, a plurality of the first pixel electrodes are arranged in a first arrangement, and In this arrangement, multiple second pixel electrodes are arranged in a second arrangement, which is different from the first arrangement.

11. The display panel according to claim 1, wherein, The first sub-region and the second sub-region are adjacent to each other in a first direction. Each of the plurality of first pixels and the plurality of second pixels includes a plurality of first pixel emission regions, a plurality of second pixel emission regions, and a plurality of third pixel emission regions. The first pixel emission region and the second pixel emission region are arranged alternately along a second direction intersecting the first direction. The second pixel emission region and the third pixel emission region are arranged alternately along the second direction. Wherein, the second pixel emission region is spaced apart from the third pixel emission region in the first direction, and The first pixel emission region is spaced apart from the second pixel emission region in the first direction.

12. The display panel according to claim 11, wherein, The two first pixel emission regions are located in the first sub-region. Among them, the four second pixel emission regions are located in the first sub-region. The two third pixel emission regions are located in the first sub-region. Wherein, the first pixel emission region is the light-emitting region of the red pixel. Wherein, the second pixel emission region is the light-emitting region of the green pixel, and The third pixel emission region is the light-emitting region of the blue pixel.

13. The display panel according to claim 1, wherein, The first sub-region and the second sub-region are adjacent to each other in a first direction. The first pixel electrode is configured as multiple. The second pixel electrode is configured as multiple, and Wherein, the first minimum distance between a plurality of first pixel electrodes spaced apart in the first direction is greater than the second minimum distance between a plurality of second pixel electrodes spaced apart in the first direction.

14. The display panel according to claim 1, wherein, The size of the first pixel electrode is larger than the size of the second pixel electrode.

15. A display device, including: A display panel defines a first display area having a first resolution and a second display area having a second resolution less than the first resolution. The display panel includes a plurality of first pixels in the first display area and a plurality of second pixels in the second display area. as well as The electronic module is located below the second display area. The second display area includes an emitting area and a transmissive area. The second pixel is disposed in the emitting area, while neither the first pixel nor the second pixel is disposed in the transmissive area. Each of the first pixels includes a first pixel electrode, a first emission layer on the first pixel electrode, and a first common electrode on the first emission layer. Each of the second pixels includes a second pixel electrode, a second emission layer on the second pixel electrode, and a second common electrode on the second emission layer. The second pixel electrode is offset relative to the second emission layer in a direction away from the transmission region, such that the second pixel electrode does not overlap with the edge of the second emission layer that is closest to the transmission region among all its edges. Wherein, in the emission region, the second emission layer includes an overlapping region where the second emission layer overlaps with the second pixel electrode and a non-overlapping region where the second emission layer does not overlap with the second pixel electrode, and The non-overlapping region is located between the overlapping region and the transmission region.

16. The display device according to claim 15, wherein, The area of ​​the emission layer is larger than the area of ​​the pixel electrode.

17. The display device according to claim 15, wherein, Each of the emitter layer and the pixel electrode has a quadrilateral shape.

18. The display device according to claim 15, wherein, In the emission region, the center of the pixel electrode is spaced apart from the center of the emission layer in a direction away from the transmission region.

19. The display device according to claim 15, wherein, The first display area and the second display area are adjacent in a first direction, and The imaginary line does not overlap with the center of the pixel electrode in the emission region, and the imaginary line passes through the center of the pixel electrode in the first display region and extends in the first direction.

20. A display device, comprising a display panel, the display panel including a first display area having a first transmittance and a second display area having a second transmittance greater than the first transmittance, the second display area being adjacent to the first display area in a first direction. in, The display panel includes: Multiple first pixels, in the first display area; and Multiple second pixels, in the second display area, The second display area includes an emitting area and a transmissive area. The second pixel is disposed in the emitting area, while neither the first pixel nor the second pixel is disposed in the transmissive area. Each of the plurality of first pixels includes a first pixel electrode, a first emission layer on the first pixel electrode, and a first common electrode on the first emission layer; each of the plurality of second pixels includes a second pixel electrode, a second emission layer on the second pixel electrode, and a second common electrode on the second emission layer; the second pixel electrode is offset relative to the second emission layer in a direction away from the transmission region, such that the second pixel electrode does not overlap with the edge of the second emission layer that is closest to the transmission region among all its edges. Wherein, the first minimum distance between the pixel electrodes of the first pixel is greater than the second minimum distance between the pixel electrodes of the second pixel, and each of the first minimum distance and the second minimum distance is a distance in a second direction intersecting the first direction.

Images