Semiconductor device and sensor device

Abstract

The present invention provides a semiconductor device and a sensor device. These devices detect degradation of a correction memory. The semiconductor device includes: a correction memory storing correction data for correcting a correction target; a correction unit that uses the correction data read from the correction memory to correct a detection value of a sensor element; a diagnosis unit that uses the correction data read from the correction memory to diagnose the correction memory; and a control unit that controls readout conditions for reading the correction data from the correction memory, wherein the control unit sets a first readout condition different from a second readout condition, the first readout condition being the readout condition for reading the correction data for correction and the second readout condition being the readout condition for reading the correction data for diagnosis.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a sensor device. Background Art

[0002] Conventionally, there are known technologies for correcting deviations in semiconductor devices using correction data stored in nonvolatile memory (see Patent Document 1). There are also known technologies for correcting detected values ​​in physical quantity sensor devices such as pressure sensors and acceleration sensors using correction data stored in nonvolatile memory. Furthermore, there are known technologies for preventing malfunctions in reading data from nonvolatile memory (see, for example, Patent Document 2).

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2003-110029

[0004] Patent Document 2: Japanese Patent Application Laid-Open No. 2001-76496 Summary of the Invention

[0005] Technical issues

[0006] For nonvolatile memories, it is desirable to be able to detect a situation where the possibility of a data read malfunction increasing before the data read malfunction occurs.

[0007] Technical Solution

[0008] To solve the above-mentioned problems, one embodiment of the present invention provides a semiconductor device. The semiconductor device may include a correction memory storing correction data for correcting the detection value of a sensor element. The semiconductor device may include a correction operation unit that reads the correction data from the correction memory to correct the detection value of the sensor element. The semiconductor device may include a diagnostic unit that reads the correction data from the correction memory to diagnose the correction memory. The semiconductor device may include a control unit that controls the reading conditions when reading the correction data from the correction memory. The control unit may set a first reading condition when the correction operation unit reads the correction data to be different from a second reading condition when the diagnostic unit reads the correction data.

[0009] The reading conditions may be such that the susceptibility of errors in the correction data read out changes when the conditions are changed.

[0010] The diagnosis unit may compare the correction data read out under the second reading condition with the reference data to diagnose the correction memory.

[0011] The reference data may be correction data read out under the first reading condition.

[0012] The control unit may set a second reading condition under which the correction data read out is more likely to be erroneous than the first reading condition.

[0013] The correction memory may include a control gate to which a gate voltage is applied. The correction memory may include an output terminal whose output value varies depending on whether the gate voltage applied to the control gate is above a threshold voltage. The correction memory may include a floating gate that accumulates charge corresponding to the value of the correction data and changes the threshold voltage by accumulating the charge. The control unit may cause the gate voltage applied to the control gate to read the correction data to differ between the first read condition and the second read condition.

[0014] The correction memory may include a first cell, wherein a threshold voltage of the first cell increases as charge accumulated in a floating gate increases. The diagnostic unit may set a gate voltage applied to the first cell under the second read condition to a voltage higher than the gate voltage applied to the first cell under the first read condition.

[0015] The correction memory may include a second cell in which a threshold voltage decreases as charge accumulated in a floating gate increases. The diagnostic unit may set a gate voltage applied to the second cell under the second read condition to a voltage lower than the gate voltage applied to the second cell under the first read condition.

[0016] The correction memory may include a plurality of dual cells including a first cell and a second cell. The diagnostic unit may read correction data from the plurality of first cells to diagnose the plurality of first cells. The diagnostic unit may read correction data from the plurality of second cells to diagnose the plurality of second cells.

[0017] The correction memory may include a current source connected to the output terminal and defining a threshold current. The control unit may make the threshold current different between the first reading condition and the second reading condition.

[0018] The diagnosis section may set a threshold current of the first cell under the second read condition to a current smaller than a threshold current of the first cell under the first read condition.

[0019] The diagnosis section may set a threshold current of the second cell under the second read condition to a current greater than a threshold current of the second cell under the first read condition.

[0020] The diagnosis unit may detect a reading condition under which an error occurs in the correction data, and diagnose the correction memory based on a change over time in the reading condition.

[0021] In a second aspect of the present invention, there is provided a sensor device including a sensor element and the semiconductor device according to the first aspect. The correction target of the semiconductor device may be a detection value of the sensor element.

[0022] It should be noted that the above summary of the invention does not list all the features of the present invention. In addition, sub-combinations of these feature groups can also constitute inventions. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a block diagram showing an example of the sensor device 100 according to one embodiment of the present invention.

[0024] Figure 2 This is a diagram for explaining the outline of the correction memory 20.

[0025] Figure 3 It is a cross-sectional view showing an example of the switching element 22 .

[0026] Figure 4 This is a diagram showing an example of temporal changes in the IV characteristics of the switching element 22 .

[0027] Figure 5 1 and 2 are diagrams for explaining an example of the operation of the sensor device 100 .

[0028] Figure 6 2 is a diagram showing a configuration example of the correction memory 20 .

[0029] Figure 7 1 is a diagram illustrating another operation example of the sensor device 100 .

[0030] Figure 8 FIG. 1 is a diagram showing another configuration example of the correction memory 20 .

[0031] Figure 9 1 is a diagram illustrating another operation example of the sensor device 100 .

[0032] Figure 10 FIG. 1 is a diagram showing another configuration example of the correction memory 20 .

[0033] Figure 11 1 and 2 are diagrams showing IV characteristics of the cells 28 when a bit value 1 is written into the first cell 28 - 1 and the second cell 28 - 2 .

[0034] Figure 12 1 and 2 are diagrams for explaining an example of the operation of the sensor device 100 having two units.

[0035] Figure 13 This is a diagram illustrating another operation example of the sensor device 100 having two units.

[0036] Figure 14 This is a block diagram showing another example of the sensor device 100 according to one embodiment of the present invention.

[0037] Figure 151 is a diagram illustrating another operation example of the sensor device 100 .

[0038] Explanation of symbols

[0039] 10…Control unit, 20…Correction memory, 21…Current source, 22…Switching element, 23…Semiconductor substrate, 24…Control gate, 25…Floating gate, 26…Drain region, 27…Source region, 28…Cell, 28-1…First cell, 28-2…Second cell, 30…Auxiliary memory, 31…Reference voltage source, 32…Selection unit, 34…Selection unit, 40…Diagnosis unit, 42…Test data output unit, 44…Error determination unit, 50…Sensor element, 60…Amplification circuit, 70…Correction calculation unit, 80…Output unit, 90…Semiconductor device, 100…Sensor device, 200…Coordinate graph, 201…Table, 202…Graph DETAILED DESCRIPTION

[0040] The present invention will be described below by way of embodiments of the invention, but the following embodiments do not limit the invention as claimed. Furthermore, all combinations of features described in the embodiments are not necessarily essential to the solution provided by the invention.

[0041] The following description uses the correction of sensor element detection values ​​as an example, but the present invention is not limited to correction of sensor element detection values. For example, in the semiconductor device described in Patent Document 1, the present invention can also be applied to the diagnosis of a nonvolatile memory that stores data for correcting characteristic variations of switching elements.

[0042] Figure 1 This is a block diagram illustrating an example of a sensor device 100 according to one embodiment of the present invention. As an example, sensor device 100 is used in various devices for automotive, medical, or industrial applications. Sensor device 100 may include a sensor element 50, such as a pressure sensor or acceleration sensor, that detects a predetermined physical quantity. Alternatively, it may be a device that processes the detection value of external sensor element 50. Sensor element 50 is formed on, for example, a semiconductor substrate.

[0043] The sensor device 100 of this embodiment includes a control unit 10, a correction memory 20, a diagnostic unit 40, a sensor element 50, and a correction calculation unit 70 (correction unit). The sensor device 100 may further include at least a portion of an auxiliary memory 30, an amplifier circuit 60, and an output unit 80. Furthermore, the sensor device 100 may be configured to include the sensor element 50 formed on a semiconductor substrate, and a semiconductor device 90 in which components other than the sensor element 50 are formed on the same semiconductor substrate.

[0044] Correction memory 20 stores correction data for correcting the detection value (correction target) of sensor element 50. Correction data is used to adjust the sensitivity of sensor element 50, the temperature characteristics of sensor element 50, and other factors. Correction data can be pre-entered into correction memory 20 at the time of shipment of sensor device 100, installation of sensor device 100, or other times. Correction data can be generated based on the results of operating sensor device 100 under predetermined conditions.

[0045] Correction memory 20 is, for example, a nonvolatile memory. Examples of nonvolatile memory include flash memory, EPROM, or EEPROM. Correction memory 20 stores digital data by storing a predetermined physical quantity. As an example, the predetermined physical quantity is the amount of charge accumulated in the floating gate. Correction memory 20 can output binary data corresponding to whether the stored physical quantity is above a predetermined threshold.

[0046] Auxiliary memory 30 temporarily stores correction data read from correction memory 20. Auxiliary memory 30 is, for example, a register. Amplifier circuit 60 amplifies the amplitude of the detection signal output by sensor element 50 and outputs it. The detection signal represents the detection value detected by sensor element 50. In this specification, the term "detection signal" may be used instead of the detection value of sensor element 50. Correction calculation unit 70 uses correction data to correct the detection signal output by amplifier circuit 60. In this specification, correction data used to correct the detection signal of sensor element 50 is referred to as correction data 1. The case where correction data 1 is read to correct the detection signal of sensor element 50 is sometimes referred to as "normal time." Output unit 80 outputs digital data corresponding to the detection signal corrected by correction calculation unit 70 as data representing the detection value of sensor element 50. Note that correction data 1 may also be input to at least one of sensor element 50 and amplifier circuit 60. At least part of the correction processing using correction data 1 may be performed by either sensor element 50 or amplifier circuit 60.

[0047] The physical quantity stored in the correction memory 20 may change over time compared to immediately after data is written. For example, the charge stored in the floating gate may decrease due to natural degradation caused by discharge, leakage due to oxide film defects, or current drain due to external noise.

[0048] If the correction data stored in the correction memory 20 changes, the characteristics of the sensor device 100 will change. The diagnostic unit 40 diagnoses whether the possibility of errors in the data (i.e., physical quantities) stored in the correction memory 20 will increase in the future. In the event of leakage due to oxide film defects or drainage due to external noise, the value of a specific bit of the correction memory 20 changes. In such a case, the change can be detected using a majority voting circuit or the like. When a majority voting circuit is used, each bit of the correction memory 20 has a plurality of units. The majority voting circuit outputs the logic value output by a larger number of units among the logic values ​​output by each unit as the logic value of its bit. Thus, even if the value of a few units has changed, the logic value of its bit will not be wrong. In addition, by detecting that the value of each unit has changed, it is possible to detect in advance that the possibility of errors in the logic value of its bit in the future has increased.

[0049] However, in the above-mentioned method, when the values ​​of most cells have changed simultaneously due to natural degradation, etc., it is difficult to detect in advance that the possibility of errors in the data of the correction memory 20 has increased. Since natural degradation occurs in each cell in the same way, the physical quantity of each cell will change in the same way. Therefore, if natural degradation continues, it becomes easy for errors to occur in most cells at the same time. In the majority voting circuit, if the logical values ​​of most cells change, the logical values ​​of their bits will be incorrect. On the other hand, if natural degradation continues, the logical values ​​of most cells will change almost simultaneously. Therefore, in the method using the majority voting circuit, it is impossible to detect in advance that the possibility of errors has increased, and the logical values ​​of their bits will be incorrect.

[0050] The sensor device 100 of this example can detect that the possibility of errors in the data of the correction memory 20 has increased even when the physical quantities of most units have degraded in the same way due to natural degradation, etc. The control unit 10 controls the reading conditions when reading the correction data from the correction memory 20. The reading conditions are conditions under which the likelihood of errors (i.e., errors) in the correction data read out changes when the conditions are changed. As an example, the correction memory 20 has a switching element including a control gate and a floating gate corresponding to each bit. In this case, the reading condition can be the voltage value of the gate voltage applied to the control gate, or it can be the value of the current flowing through the switching element. In this specification, this current is sometimes referred to as a threshold current.

[0051] In this example, the diagnostic unit 40 diagnoses the correction memory 20 based on the correction data 2 read from the correction memory 20. In this specification, the process of performing a diagnosis by reading the correction data 2 is sometimes referred to as "diagnosis time." The control unit 10 differs the first reading condition when the correction calculation unit 70 reads the correction data 1 from the second reading condition when the diagnostic unit 40 reads the correction data 2. In the correction memory 20 of this example, the logical value of each bit is read by applying a predetermined gate voltage to the control gate. The control unit 10 may differ the gate voltage under the first reading condition from the second reading condition, or may differ the threshold current under the first reading condition from the second reading condition.

[0052] In this example, the control unit 10 sets a second reading condition under which the correction data read from the correction memory 20 is more likely to be erroneous than the first reading condition. Specifically, if the physical quantity stored in the correction memory 20 gradually decreases (or increases) due to natural degradation, and if the correction data is periodically read under the first and second reading conditions, the control unit 10 sets a condition such that the correction data read under the second reading condition will be erroneous sooner than the correction data read under the first reading condition.

[0053] If an error occurs in the correction data 2 read under the second reading condition, it is known that the physical quantity stored in the correction memory 20 has changed to a certain degree or more due to natural degradation, etc. Thus, the diagnostic unit 40 can detect a higher probability of an error in the correction data 1 before the error occurs in the correction data 1.

[0054] The diagnostic unit 40 in this example includes a test data output unit 42 and an error determination unit 44. The test data output unit 42 outputs test data corresponding to the correction data 2. The test data may be a value obtained by performing a predetermined operation on the correction data 2. For example, the test data may include a parity check code, a cyclic code, or a checksum of the correction data 2. The test data may also include the correction data 2 itself.

[0055] The error determination unit 44 determines whether an error has occurred in the correction data 2 based on the inspection data output by the inspection data output unit 42. The error determination unit 44 may compare the inspection data with reference data. The reference data may be stored in the correction memory 20. The reference data may include a parity check code, a cyclic code, or a checksum of the correction data stored in the correction memory 20.

[0056] When an error is detected by the error determination unit 44, the output unit 80 generates an error output indicating the error. This allows the user of the sensor device 100 to be informed that there is a high possibility that the correction data 1 has an error.

[0057] Figure 2 2 is a diagram illustrating an outline of the correction memory 20. The correction memory 20 includes one or more cells 28. One cell 28 may store 1-bit data, or a plurality of cells 28 may store 1-bit data.

[0058] Cell 28 includes a current source 21 and a switching element 22. Current source 21 is connected to the drain terminal D of switching element 22 and defines the threshold current I1 of cell 28. In this example, switching element 22 is a MOSFET with a floating gate. Drain terminal D of switching element 22 is connected to a high potential line VDD via current source 21, while source terminal S of switching element 22 is connected to a low potential line GND. The voltage at drain terminal D when a predetermined gate voltage VG is applied to gate terminal G of switching element 22 allows the data of the corresponding bit to be read. In other words, drain terminal D functions as the output terminal of cell 28.

[0059] Figure 3 This is a cross-sectional view showing an example of a switching element 22. The switching element 22 in this example includes a P-type semiconductor substrate 23, an N-type drain region 26, an N-type source region 27, a floating gate 25, and a control gate 24. The drain region 26 and the source region 27 are spaced apart from each other on the upper surface of the semiconductor substrate 23. The P-type region between the drain region 26 and the source region 27 functions as the MOSFET channel.

[0060] The floating gate 25 and the control gate 24 are disposed above the channel. The semiconductor substrate 23, the floating gate 25, and the control gate 24 may be insulated by an insulating film. A gate voltage is applied to the control gate 24.

[0061] Charge corresponding to the value of the data stored in cell 28 is accumulated on floating gate 25. The gate voltage at which switching element 22 transitions from an OFF state to an ON state and the current flowing through switching element 22 is equal to or greater than a predetermined threshold current I1 is called the threshold voltage of cell 28. This threshold voltage varies depending on the amount of charge accumulated on floating gate 25. In this example, the threshold voltage increases as the amount of charge accumulated on floating gate 25 increases. Specifically, floating gate 25 accumulates charge corresponding to the value of each bit of the correction data, and this accumulated charge causes the threshold voltage of cell 28 to change.

[0062] Figure 4 This is a diagram showing an example of temporal changes in the IV characteristics of the switching element 22 . Figure 4The horizontal axis of each graph in FIG1 represents the gate voltage VG of the switching element 22, and the vertical axis represents the source-drain current Ids. In this example, the gate voltage for data reading is V1, and the threshold current is I1. The output value of the drain terminal D of the switching element 22 changes depending on whether the gate voltage applied to the control gate 24 of the switching element 22 is above the threshold voltage.

[0063] In the unwritten state, where no charge is stored in the floating gate 25, the threshold voltage Vth is lower than the gate voltage V1 for data reading. Therefore, when the gate voltage V1 is applied to the switching element 22, the switching element 22 turns on. In this case, the bit value read from the cell 28 via the drain terminal D is 0 (or L).

[0064] Next, in this example, to write a bit value of 1 into cell 28, a charge greater than a predetermined amount is accumulated on floating gate 25. Immediately after writing, the threshold voltage Vth of cell 28 becomes greater than the gate voltage V1 used for data reading. Immediately after writing, if gate voltage V1 is applied to switching element 22, switching element 22 is turned off, and drain voltage VD becomes a voltage corresponding to high potential VDD. Therefore, the bit value read from cell 28 is 1 (or H).

[0065] In this way, by accumulating a charge corresponding to the bit value on floating gate 25, the bit value can be stored in cell 28. However, as time passes after data is written, the amount of charge accumulated in floating gate 25 decreases due to natural degradation, etc. Consequently, the threshold voltage Vth of cell 28 changes, as shown in degradation state 1 and degradation state 2. In degradation state 1, when gate voltage V1 is applied to switching element 22, current begins to flow through switching element 22. However, the current flowing through switching element 22 is less than threshold current I1, and the bit value read from cell 28 is 1 (or H). Therefore, in degradation state 1, although data retention degradation continues, data reading errors will not occur.

[0066] As shown in degradation state 2, if the charge on floating gate 25 further decreases, threshold voltage Vth becomes lower than gate voltage V1. In degradation state 2, if gate voltage V1 is applied to switching element 22, the current flowing through switching element 22 becomes higher than threshold current I1, and the bit value read from cell 28 becomes 0 (or L). In other words, the bit value read from cell 28 may be erroneous.

[0067] In this example, sensor device 100 detects degradation of data storage in, for example, degradation state 1, before degradation state 2. This allows the user to replace sensor device 100 before it reaches degradation state 2. This prevents sensor device 100 from outputting erroneous data. When controlling an engine or other device based on data output from sensor device 100, malfunction of the engine or other device can be prevented.

[0068] Figure 5 This is a diagram illustrating an example of the operation of the sensor device 100. The switch element 22 of this example has Figure 4 The sensor device 100 has the same characteristics as the example shown. The reading conditions for correction data differ between normal operation and diagnostic operation. The sensor device 100 of this example reads correction data 1 using gate voltage V1 during normal operation and reads correction data 2 using gate voltage V2 during diagnostic operation.

[0069] As described above, the gate voltage V2 is a gate voltage at which correction data is more likely to be erroneous than the gate voltage V1. Figure 4 and Figure 5 As shown in FIG. 1 , when the threshold voltage Vth of cell 28 increases as the charge accumulated in floating gate 25 increases, gate voltage V2 is higher than gate voltage V1. Gate voltage V2 may be greater than 110%, greater than 120%, or greater than 130% of gate voltage V1. Alternatively, gate voltage V2 may be less than 150% of gate voltage V1.

[0070] exist Figure 3 In the illustrated switching element 22, the semiconductor substrate 23 can be N-type, and the drain region 26 and source region 27 can be P-type. In this case, as the charge accumulated in the floating gate 25 increases, the threshold voltage Vth of the cell 28 decreases. In this example, the gate voltage V2 is lower than the gate voltage V1. The gate voltage V2 can be less than 90% of the gate voltage V1, less than 80% of the gate voltage V1, or less than 70% of the gate voltage V1. Alternatively, the gate voltage V2 can be greater than 50% of the gate voltage V1.

[0071] exist Figure 5 In the example shown, by using gate voltage V2 during diagnosis, degradation of the charge amount of floating gate 25 can be detected before the value of correction data 1 becomes erroneous during normal operation (degraded state 2). For example, if gate voltage V2 is applied to switching element 22 in degradation state 1, a current greater than threshold current I1 flows through switching element 22. As a result, the bit value read from cell 28 becomes 0, enabling error detection.

[0072] Figure 6 1 is a diagram showing an example of the configuration of the correction memory 20. The correction memory 20 in this example is as follows Figure 5 As shown in FIG. 1 , the gate voltage applied to the cell 28 is switched between normal and diagnostic operation. The correction memory 20 includes one or more cells 28, a reference voltage source 31, and a selection unit 32. The reference voltage source 31 generates a gate voltage V1 used in normal operation and a gate voltage V2 used in diagnostic operation. The selection unit 32 selects one of the gate voltages V1 and V2 based on a switching signal received from the control unit 10 and applies the selected voltage to each cell 28. With this configuration, the following operations can be performed: Figure 5 The action shown.

[0073] Figure 7 is a diagram illustrating another example of the operation of the sensor device 100. The switch element 22 of this example has Figure 4 The sensor device 100 of this example reads correction data 1 using threshold current I1 during normal operation and reads correction data 2 using threshold current I2 during diagnosis. In this example, the gate voltage for data reading during normal operation and diagnosis is V1.

[0074] As described above, the threshold current I2 is a threshold current at which correction data is more likely to be erroneous than the threshold current I1. Figure 4 and Figure 7 As shown, when the charge accumulated in the floating gate 25 increases and the threshold voltage Vth of the cell 28 increases, the threshold current I2 is a current smaller than the threshold current I1. The threshold current I2 may be less than 90% of the threshold current I1, less than 80% of the threshold current I1, or less than 70% of the threshold current I1. Alternatively, the threshold current I2 may be greater than 50% of the threshold current I1.

[0075] exist Figure 7 In the example shown, by using threshold current I2 during diagnosis, degradation of the charge level of floating gate 25 can be detected before the correction data value becomes erroneous (degraded state 2). For example, if gate voltage V1 is applied to switching element 22 in degradation state 1, a current greater than threshold current I2 flows through switching element 22. As a result, the bit value read from cell 28 becomes 0, enabling error detection.

[0076] Figure 8 1 is a diagram showing another configuration example of the correction memory 20. The correction memory 20 in this example is as follows Figure 7As shown, the threshold current in the cell 28 is switched between normal operation and diagnosis. The correction memory 20 includes a reference voltage source 31 and one or more cells 28. The reference voltage source 31 applies a gate voltage V1 to each cell 28.

[0077] Each unit 28 has Figure 2 In addition to the configuration described above, the device further includes a current source 21-1, a current source 21-2, and a selection unit 34. The current source 21-1 generates a threshold current I1 used in normal operation, and the current source 21-2 generates a threshold current I2 used in diagnosis. The selection unit 34 selects one of the current source 21-1 and the current source 21-2 based on a switching signal received from the control unit 10, and connects it to the drain terminal D of the switching element 22. With this configuration, it is possible to perform Figure 7 Action as shown.

[0078] Figure 9 is a diagram illustrating another example of the operation of the sensor device 100. The switch element 22 of this example has Figure 4 The sensor device 100 of this embodiment reads correction data 1 using gate voltage V1 and threshold current I1 in normal operation, and reads correction data 2 using gate voltage V2 and threshold current I2 in diagnosis. By such control, degradation of the charge amount of the floating gate 25 can be detected at an earlier stage. Figure 6 The reference voltage source 31 and the selection unit 32 are shown. In addition, each unit 28 may have Figure 8 The current source 21 - 1 , the current source 21 - 2 and the selection unit 34 are shown.

[0079] Figure 10 This is a diagram showing another example of the configuration of the correction memory 20. The correction memory 20 of this example has a first unit 28-1 and a second unit 28-2 for one bit. A pair of the first unit 28-1 and the second unit 28-2 is sometimes referred to as a double unit. The first unit 28-1 and the second unit 28-2 are connected to the first unit 28-1 and the second unit 28-2. Figure 2 and Figure 3 That is, if the charge accumulated in the floating gate 25 increases, the threshold voltage Vth increases, and if the charge accumulated in the floating gate 25 decreases, the threshold voltage Vth decreases.

[0080] The second cell 28-2 is written to output a value complementary to the first cell 28-1. Specifically, when the first cell 28-1 outputs a logic value of 1, the charge on the floating gate 25 is increased, while the second cell 28-2 decreases the charge on the floating gate 25 and outputs a logic value of 0. Alternatively, when the first cell 28-1 outputs a logic value of 0, the charge on the floating gate 25 is decreased, while the second cell 28-2 increases the charge on the floating gate 25 and outputs a logic value of 1. If the first cell 28-1 outputs a logic value of 1 and the second cell 28-2 outputs a logic value of 0, the correction memory 20 may treat the value of that bit as 1. Alternatively, if the first cell 28-1 outputs a logic value of 0 and the second cell 28-2 outputs a logic value of 1, the correction memory 20 may treat the value of that bit as 0. Because the value of a single bit is determined based on the logic values ​​of both cells 28, bit errors are less likely to occur.

[0081] Figure 11 This graph shows the IV characteristics of each cell 28 when a bit value of 1 is written to the first cell 28-1 and the second cell 28-2. Specifically, charge accumulates in the floating gate 25 of the first cell 28-1 to a predetermined level or greater. Meanwhile, charge is drained from the floating gate 25 of the second cell 28-2, reducing the charge level to a predetermined level or less. In this example, the normal gate voltage V1 is 0V. Furthermore, the threshold current is I1.

[0082] As described above, if charges are accumulated in the floating gate 25 of the first cell 28-1, the threshold voltage Vth1 of the first cell 28-1 increases. In addition, if charges are drawn from the floating gate 25 of the second cell 28-2, the threshold voltage Vth2 of the second cell 28-2 decreases.

[0083] Figure 12 1 is a diagram illustrating an example of the operation of the sensor device 100 having two units. Figure 12 In FIG. 2 , the upper graph 200 shows the IV characteristics of each cell 28 when the first cell 28 - 1 and the second cell 28 - 2 are degraded. Figure 12 In the figure, the lower table 201 shows the reading conditions for correction data during normal operation or during diagnosis for each state of each cell 28. The state of each cell 28 indicates whether it is immediately after writing or in a degraded state. In addition, the table 201 shows the logical value H / L read for each state of each cell 28.

[0084] In this example, in normal operation, the gate voltage V1 of the first cell 28-1 and the second cell 28-2 is 0 V. During diagnosis, the gate voltage V2 is applied to the first cell 28-1, and the gate voltage V2' is applied to the second cell 28-2. In either case, the threshold current is I1.

[0085] exist Figure 12 Graph 202 in the lower portion shows the range of gate voltage VG for outputting a logic value L and the range of gate voltage VG for outputting a logic value H in each state of cell 28 shown in table 201. The horizontal axis in graph 202 corresponds to the horizontal axis (gate voltage VG) in graph 200. In graph 202, the boundaries between the range of gate voltage VG for outputting a logic value L and the range of gate voltage VG for outputting a logic value H are shown by bold solid lines. Each boundary corresponds to the gate voltage VG at which the IV characteristic curve intersects the threshold current I1 in each state. In graph 202, the logical value when the corresponding gate voltage VG is applied to cell 28 in each state is shown in bold.

[0086] If the first cell 28-1 degrades, the threshold voltage Vth1 of the first cell 28-1 decreases. Therefore, by setting the gate voltage V2 during diagnosis to be greater than the gate voltage V1 (0V) during normal operation, degradation of the first cell 28-1 can be detected during diagnosis before errors occur in the data read during normal operation. It should be noted that the gate voltage V2 is less than the threshold voltage Vth1 immediately after the bit value 1 is written to the first cell 28-1. The gate voltage V2 can be less than 90% of the threshold voltage Vth1 immediately after the bit value 1 is written to the first cell 28-1, less than 80% of the threshold voltage Vth1 immediately after the bit value 1 is written to the first cell 28-1, or less than 70% of the threshold voltage Vth1 immediately after the bit value 1 is written to the first cell 28-1.

[0087] If the second cell 28-2 degrades, the threshold voltage Vth2 of the second cell 28-2 increases. Therefore, by making the gate voltage V2' during diagnosis lower than the gate voltage V1 (0V) during normal operation, it is possible to detect degradation of the second cell 28-2 during diagnosis before errors occur in the data read during normal operation. It should be noted that the gate voltage V2' is higher than the threshold voltage Vth2 immediately after the bit value 1 is written to the second cell 28-2. The gate voltage V2' may be greater than 110% of the threshold voltage Vth2 immediately after the bit value 1 is written to the second cell 28-2, or greater than 120% of the threshold voltage Vth2 immediately after the bit value 1 is written to the second cell 28-2, or greater than 130% of the threshold voltage Vth2 immediately after the bit value 1 is written to the second cell 28-2.

[0088] Figure 13 This is a diagram illustrating another example of the operation of the sensor device 100 having two cells. In this example, the sensor device 100 makes the threshold current of each cell 28 different between normal operation and diagnosis. In addition, the gate voltage applied to each cell 28 is V1 (0V) both in normal operation and diagnosis. Figure 12Same as the example.

[0089] In this example, the threshold currents of the first cell 28-1 and the second cell 28-2 are I1 in normal operation, and I2 and I2' in diagnosis operation.

[0090] If the first cell 28-1 degrades, its threshold voltage Vth1 decreases. Therefore, by making the diagnostic threshold current I2 smaller than the normal threshold current I1, degradation of the first cell 28-1 can be detected during diagnosis before errors occur in read data during normal operation.

[0091] If the second cell 28-2 degrades, the threshold voltage Vth2 of the second cell 28-2 increases. Therefore, by making the threshold current I2' during diagnosis greater than the threshold current I1 during normal operation, degradation of the second cell 28-2 can be detected during diagnosis before errors occur in read data during normal operation.

[0092] In the case of dual cells, the control unit 10 controls the reading conditions independently for each cell 28. This allows the reading conditions suitable for each cell 28 to be set, and allows for highly accurate detection of degradation.

[0093] In the case of double units, it is also possible to combine Figure 12 Examples and Figure 13 For example, gate voltage V2 and threshold current I2 can be set for the first cell 28-1 during diagnosis. Gate voltage V2' and threshold current I2' can be set for the second cell 28-2 during diagnosis. This allows for earlier detection of cell 28 degradation.

[0094] Furthermore, if the correction memory 20 includes multiple dual cells, the diagnostic unit 40 can perform a diagnostic process for multiple first cells 28-1 and a diagnostic process for multiple second cells 28-2. The diagnostic unit 40 can use the logical product or logical sum of the outputs of multiple first cells 28-1 to detect whether a particular first cell 28-1 has degraded. The diagnostic unit 40 can use the logical product or logical sum of the outputs of multiple second cells 28-2 to detect whether a particular second cell 28-2 has degraded. By collectively diagnosing cells 28 of the same type, the correction memory 20 can be efficiently diagnosed.

[0095] Diagnostic unit 40 may diagnose degradation of correction memory 20 each time sensor device 100 is activated. Diagnostic unit 40 may also diagnose degradation of correction memory 20 each time an external device that utilizes data output from sensor device 100 is activated. Diagnostic unit 40 may also diagnose degradation of correction memory 20 at predetermined intervals.

[0096] Figure 14 This is a block diagram showing another example of the sensor device 100 according to one embodiment of the present invention. The operation of the diagnosis unit 40 of the sensor device 100 in this example is similar to that of FIG. Figure 1 The sensor device 100 shown is different. Other actions are the same as Figures 1 to 13 The sensor devices 100 shown are identical.

[0097] Figure 1 The diagnostic unit 40 shown reads reference data stored in the correction memory 20. In this example, the diagnostic unit 40 receives correction data 1 read from the correction memory 20 under a first normal reading condition as reference data. The diagnostic unit 40 compares the correction data 1 read under the first normal reading condition with the correction data 2 read under a second diagnostic reading condition to detect degradation of the correction memory 20.

[0098] In this example, the test data output unit 42 generates test data 1 for correction data 1 and test data 2 for correction data 2. As described above, the test data is obtained by performing a predetermined operation on the correction data. The error determination unit 44 compares the two test data to determine whether the correction memory 20 has degraded. This operation allows for diagnosis of correction memory 20 degradation before errors occur in the correction data 1 under normal circumstances.

[0099] Figure 15 This diagram illustrates another example of the operation of sensor device 100. In this example, sensor device 100 varies the reading conditions during diagnosis to measure the boundary value of the reading conditions where errors occur in correction data 2. Sensor device 100 diagnoses correction memory 20 based on the temporal changes in the measured boundary value of the reading conditions.

[0100] For example, the diagnostic unit 40 can estimate the time when the correction data 1 is normally erroneous based on the gradient of the change over time (ie, the degradation rate), and can generate an error output when the difference between the estimated time and the current time becomes smaller than a reference value.

[0101] The diagnosis unit 40 may also compare the waveform that changes over time with a preset reference characteristic to diagnose the correction memory 20. The diagnosis unit 40 may also generate an error output when the measured boundary value of the reading condition is lower than the reference characteristic.

[0102] While the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. Those skilled in the art will appreciate that various modifications or improvements can be made to the above embodiments. It will be understood from the claims that such modifications or improvements are also encompassed within the technical scope of the present invention.

Claims

1. A semiconductor device, characterized in that: have: a correction memory storing correction data for correcting a correction object; a correction unit that corrects the correction object using the correction data read from the correction memory; a diagnosis unit configured to diagnose the correction memory using the correction data read from the correction memory; as well as a control unit that controls a reading condition when reading the correction data from the correction memory, The control unit makes a first reading condition different from a second reading condition, wherein the first reading condition is a reading condition for reading the correction data for correcting the correction object, and the second reading condition is a reading condition for reading the correction data for the diagnosis. The correction memory includes: a control gate to which a gate voltage is applied; an output terminal, an output value of which changes depending on whether the gate voltage applied to the control gate is above a threshold voltage; a floating gate that accumulates charge corresponding to the value of the correction data and changes the threshold voltage by accumulating the charge; as well as a current source connected to the output terminal and defining a threshold current, The control unit makes the gate voltage and the threshold current applied to the control gate for reading the correction data different between the first reading condition and the second reading condition.

2. The semiconductor device according to claim 1, wherein The reading condition is a condition in which the likelihood of error in the correction data read out changes when the condition is changed.

3. The semiconductor device according to claim 1 or 2, wherein: The diagnosis unit compares the correction data read under the second reading condition with reference data to diagnose the correction memory.

4. The semiconductor device according to claim 3, wherein The reference data is the correction data read under the first reading condition.

5. The semiconductor device according to claim 1 or 2, wherein: The control unit sets the second reading condition under which the correction data read out is more likely to be erroneous than the first reading condition.

6. The semiconductor device according to claim 1 or 2, wherein: The correction memory includes a first unit in which the threshold voltage increases as the charge accumulated in the floating gate increases. The diagnosis section sets the gate voltage applied to the first cell under the second read condition to a voltage higher than the gate voltage applied to the first cell under the first read condition.

7. The semiconductor device according to claim 1 or 2, wherein: The correction memory includes a plurality of double cells including a first cell and a second cell, wherein the threshold voltage of the first cell increases as the charge accumulated in the floating gate increases, and the threshold voltage of the second cell decreases as the charge accumulated in the floating gate increases. The diagnostic unit reads the correction data from the plurality of first units to diagnose the plurality of first units, and reads the correction data from the plurality of second units to diagnose the plurality of second units.

8. The semiconductor device according to claim 1 or 2, wherein: The correction memory includes a first unit in which the threshold voltage increases as the charge accumulated in the floating gate increases. The diagnosis section sets a threshold current of the first cell under the second read condition to be smaller than a threshold current of the first cell under the first read condition.

9. The semiconductor device according to claim 1 or 2, wherein: The diagnosis unit detects the reading condition under which an error occurs in the correction data, and diagnoses the correction memory based on a change in the reading condition over time.

10. A sensor device, characterized in that: have: The semiconductor device according to any one of claims 1 to 9; and sensor elements; The correction object is the detection value of the sensor element.

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