Optical sensor, method of manufacturing the same, and display device including the same

Abstract

The present application relates to an optical sensor, a method of manufacturing an optical sensor, and a display device. The optical sensor comprises a substrate, a circuit element layer disposed on the substrate and comprising circuit elements, and a photoelectric element layer comprising photoelectric elements, a self-assembled monolayer, and a bias electrode connected to the photoelectric elements, wherein the photoelectric elements are connected to the circuit elements, and wherein the self-assembled monolayer is disposed on the photoelectric elements.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2019-0091281, filed with the Korean Intellectual Property Office on July 26, 2019, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This invention relates to optical sensors, methods for manufacturing optical sensors, and display devices including optical sensors. Background Technology

[0004] Recently, display devices such as smartphones and tablet PCs have been used in various fields, and therefore, biometric authentication methods using user fingerprints and other information have been widely adopted. To provide fingerprint sensing functionality, fingerprint sensors can be provided either embedded in or attached to the display device. Such display devices with integrated fingerprint sensors are called in-display fingerprint sensors (FoD).

[0005] FoD can be configured as, for example, a photosensor. For instance, a photosensor FoD uses light-emitting elements disposed within pixels as a light source and can include an optical sensor array. The optical sensor array can be configured as, for example, a CMOS image sensor (CIS).

[0006] CMOS image sensors may include vertical P-intrinsic-N (PIN) diodes. Noise may be generated when a small amount of sensing current output from the PIN diode is transmitted to the outside. Summary of the Invention

[0007] According to an exemplary embodiment of the present invention, an optical sensor includes: a substrate; a circuit element layer disposed on the substrate and including circuit elements; and a photoelectric element layer including a photoelectric element, a self-assembled monolayer, and a bias electrode connected to the photoelectric element, wherein the photoelectric element is connected to the circuit elements, and wherein the self-assembled monolayer is disposed on the photoelectric element.

[0008] In an exemplary embodiment of the present invention, the optoelectronic element includes: a lower electrode connected to a circuit element; a P-intrinsic-N (PIN) layer disposed on the lower electrode; and an upper electrode disposed on the PIN layer and connected to a bias electrode.

[0009] In an exemplary embodiment of the present invention, the optoelectronic element layer further includes a protective layer covering the upper electrode, and a bias electrode is formed on the protective layer and connected to the upper electrode through a contact hole formed in the protective layer.

[0010] In an exemplary embodiment of the present application, the self-assembled monolayer is formed between the protective layer and the bias electrode.

[0011] In an exemplary embodiment of the present application, the PIN layer includes an N-type semiconductor layer disposed on the lower electrode, an I-type semiconductor layer formed on the N-type semiconductor layer, and a P-type semiconductor layer formed on the I-type semiconductor layer.

[0012] In an exemplary embodiment of the present application, the circuit element layer includes an active pattern having a channel region and a source region and a drain region on opposite sides of the channel region, respectively, a gate insulating layer covering the active pattern, a gate electrode formed on the gate insulating layer, wherein at least a portion of the gate electrode overlaps the channel region, an interlayer insulating layer covering the gate electrode, a source electrode and a drain electrode formed on the interlayer insulating layer and connected to the source region and the drain region, respectively, through contact holes, and a protective layer covering the source electrode and the drain electrode.

[0013] In an exemplary embodiment of the present application, the optical sensor further includes a planarization layer formed on the photoelectric element layer.

[0014] According to an exemplary embodiment of the present application, a method of manufacturing an optical sensor includes forming a circuit element layer on a substrate, wherein the circuit element layer includes at least one circuit element, forming a photoelectric element on the circuit element layer, wherein the photoelectric element is connected to the at least one circuit element, forming a protective layer covering the photoelectric element, forming a self-assembled monolayer on the protective layer, forming a contact hole in the self-assembled monolayer and the protective layer, and forming a bias electrode connected to the photoelectric element through the contact hole.

[0015] In an exemplary embodiment of the present application, the method of manufacturing an optical sensor further includes cleaning the substrate after forming the contact hole.

[0016] In an exemplary embodiment of the present application, the method of manufacturing an optical sensor further includes performing an oxygen plasma treatment on the substrate after forming the bias electrode.

[0017] In an exemplary embodiment of the present application, the self-assembled monolayer is etched by the oxygen plasma treatment in a region where the bias electrode is not formed.

[0018] In an exemplary embodiment of the present application, the method of manufacturing an optical sensor further includes forming a planarization layer covering the bias electrode after performing the oxygen plasma treatment on the substrate.

[0019] In an exemplary embodiment of the present application, forming the photoelectric element includes forming a lower electrode connected to the at least one circuit element; forming a P-Intrinsic-N (PIN) film on the lower electrode, wherein the PIN film includes an N-type semiconductor layer, an I-type semiconductor layer, and a P-type semiconductor layer; forming an upper electrode film on the PIN film; and forming a PIN layer and an upper electrode by patterning the PIN film and the upper electrode film, respectively.

[0020] In an exemplary embodiment of the present application, forming the contact hole includes forming a mask having an opening corresponding to the upper electrode on the self-assembled monolayer; dry-etching the self-assembled monolayer; wet-etching the protection layer; and removing the mask.

[0021] According to an exemplary embodiment of the present application, a display apparatus includes a display panel including pixels; and an optical sensor disposed on the display panel and including a plurality of sensor pixels, wherein each of the plurality of sensor pixels includes a first substrate; a first circuit element layer disposed on the first substrate and including first circuit elements configured the plurality of sensor pixels; and a photoelectric element layer including a photoelectric element, a self-assembled monolayer, and a bias electrode connected to the photoelectric element, wherein the photoelectric element is connected to the first circuit elements, and wherein the bias electrode overlaps the self-assembled monolayer.

[0022] In an exemplary embodiment of the present application, the photoelectric element includes a lower electrode connected to the first circuit element; a P-Intrinsic-N (PIN) layer disposed on the lower electrode; and an upper electrode disposed on the PIN layer and connected to the bias electrode.

[0023] In an exemplary embodiment of the present application, the photoelectric element layer further includes a first protection layer covering the upper electrode, and the bias electrode is formed on the first protection layer and connected to the upper electrode through a contact hole formed in the first protection layer.

[0024] In an exemplary embodiment of the present application, the self-assembled monolayer is formed between the first protection layer and the bias electrode.

[0025] In an exemplary embodiment of the present application, the display panel includes a second substrate; a second circuit element layer disposed on the second substrate and including second circuit elements configured the pixels; a light emitting element layer formed on the second circuit element layer and including light emitting elements forming the plurality of pixels; and a second protection layer formed on the light emitting element layer.

[0026] In an exemplary embodiment of the present application, the display panel further includes a light blocking layer disposed between the second substrate and the second circuit element layer and including an opening through which the incident light passes. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 and Figure 2is a plan view schematically showing a display device according to an exemplary embodiment of the present application;

[0028] Figure 3 is a sectional view of a display device according to an exemplary embodiment of the present application;

[0029] Figure 4 is a sectional view of a display device according to an exemplary embodiment of the present application;

[0030] Figure 5 is a plan view showing a configuration of an optical sensor and a fingerprint detector according to an exemplary embodiment of the present application;

[0031] Figure 6 is a circuit diagram showing a sensor pixel shown in Figure 5

[0032] Figure 7 is a side sectional view of a sensor pixel shown in Figure 6

[0033] Figure 8 , Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 , Figure 14 and Figure 15 are diagrams showing a method of manufacturing a sensor pixel according to an exemplary embodiment of the present application; and

[0034] Figure 16 is a graph showing a leakage current of a PIN diode according to a driving voltage of an optical sensor. DETAILED DESCRIPTION

[0035] Hereinafter, exemplary embodiments of the present application will be described in detail with reference to the accompanying drawings. The same or similar reference denotations can be used for the same or similar configurations elements in the drawings and the present specification, and thus, repetitive description can be omitted.

[0036] Figure 1 and Figure 2 are plan views schematically showing a display device according to an exemplary embodiment of the present application. For example, Figure 1 and Figure 2 are diagrams schematically showing a display panel included in a display device according to an exemplary embodiment of the present application and a driving circuit for driving the display panel. For convenience, Figure 1 and Figure 2 separately show the display panel and the driving circuit, but the present application is not limited thereto. For example, all or a part of the driving circuit can be integrally implemented on the display panel.

[0037] ​​The display device 10 can be provided in various shapes. For example, the display device 10 can be provided in a rectangular plate shape having two pairs of sides, and in each pair of sides, the sides can be parallel to each other. The display device 10 can display certain visual information, such as text, video, a photo, a two-dimensional or three-dimensional image, or the like, in an image display direction.

[0038] The display device 10 can have flexibility in whole or in at least a part. For example, the entire display device 10 can be flexible, or the display device 10 can be flexible in a region corresponding to a flexible region.

[0039] Referring to Figure 1 and Figure 2 , the display device 10 includes a display panel 110 and a driving circuit 200 for driving the display panel 110.

[0040] The display panel 110 includes a display area AA and a non-display area NA. The display area AA is an area in which a plurality of pixels PXL (which can also be referred to as sub-pixels) are provided and can be referred to as an active area. In an exemplary embodiment of the present application, each of the pixels PXL can include at least one light emitting element. The display device 10 displays an image in the display area AA by driving the pixels PXL in response to image data input from the outside (e.g., an external device).

[0041] In an exemplary embodiment of the present application, the display area AA can include a sensing area SA. The sensing area SA can include at least a portion of the pixels PXL provided in the display area AA.

[0042] As shown in Figure 1 , at least a portion of the display area AA can be provided as the sensing area SA. In an exemplary embodiment of the present application, as shown in Figure 2 , the entire display area AA can be provided as the sensing area SA.

[0043] Further, Figure 1 an example in which only one sensing area SA is formed in the display area AA is illustrated, but the present application is not limited thereto. For example, a plurality of sensing areas SA can be arranged in the display area AA. In this embodiment, the plurality of sensing areas SA can have the same area and shape or different areas and shapes.

[0044] Further, Figure 1 an example in which the sensing area SA is formed in at least a portion of the display area AA is illustrated, but the present application is not limited thereto. For example, the sensing area SA can overlap at least a portion of the display area AA.

[0045] The non-display area NA is disposed around the display area AA, and can be referred to as a non-active area. For example, the non-display area NA can at least partially surround the display area AA. In an exemplary embodiment of the present application, the non-display area NA can be a remaining area of the display panel 110 other than the display area AA. In an exemplary embodiment of the present application, the non-display area NA can include a wiring area, a pad area, various dummy areas, etc.

[0046] In an exemplary embodiment of the present application, the display apparatus 10 can further include a plurality of sensor pixels SPXL disposed in the sensing area SA. The sensor pixels SPXL can be configured as sensors for sensing light. In an exemplary embodiment of the present application, when light emitted from a light source disposed in the display apparatus 10 is reflected by a user’s finger, the sensor pixels SPXL can detect the reflected light and output a corresponding electrical signal (e.g., a voltage signal). The electrical signal can be transmitted to the driving circuit 200 which will be described below and used for fingerprint detection. Hereinafter, the present application will be described by way of example in which the sensor pixels SPXL are used for fingerprint detection, but the sensor pixels SPXL can also be used to perform various functions such as a touch sensor or a scanner.

[0047] When the sensor pixels SPXL are arranged in the sensing area SA, the sensor pixels SPXL can overlap the pixels PXL or can be arranged around the pixels PXL. For example, a part or all of the sensor pixels SPXL can overlap the pixels PXL, or can be disposed between the pixels PXL. In an exemplary embodiment of the present application, the sensor pixels SPXL and the pixels PXL can have the same size or different sizes. However, the present application is not limited to the size and arrangement between the sensor pixels SPXL and the pixels PXL.

[0048] When the sensor pixels SPXL are arranged to at least partially adjoin or overlap the pixels PXL, the sensor pixels SPXL can use the light emitting elements disposed in the pixels PXL as light sources. In the present embodiment, the sensor pixels SPXL can form a fingerprint sensor of an optical sensing method together with the light emitting elements disposed in the pixels PXL. As such, when the display apparatus 10 in which the fingerprint sensor is embedded is configured by using the pixels PXL as light sources without a separate external light source, the thickness of the optical sensor type fingerprint sensor and the display apparatus 10 having the same can be reduced, and the manufacturing cost thereof can be reduced.

[0049] In an exemplary embodiment of the present application, the sensor pixels SPXL can be arranged on a back surface (e.g., a rear surface) of a surface (e.g., a front surface) facing a display image of the display panel 110. However, the present application is not limited thereto.

[0050] The driving circuit 200 can drive the display panel 110. For example, the driving circuit 200 can output a data signal corresponding to image data to the display panel 110, or can output a driving signal for the sensor pixels SPXL, and can receive an electrical signal (e.g., a sensing signal) from the sensor pixels SPXL. The driving circuit 200 can detect a user's fingerprint pattern by using the electrical signal.

[0051] In an exemplary embodiment of the present application, the driving circuit 200 can include a panel driver 210 and a fingerprint detector 220. For convenience, Figure 1 and Figure 2 The panel driver 210 and the fingerprint detector 220 are separately illustrated, but the present application is not limited thereto. For example, at least a part of the fingerprint detector 220 can be integrated with the panel driver 210, or can operate together with the panel driver 210.

[0052] The panel driver 210 can sequentially provide a data signal corresponding to image data to the pixels PXL while sequentially monitoring the pixels PXL of the display area AA. Then, the display panel 110 can display an image corresponding to the image data.

[0053] In an exemplary embodiment of the present application, the panel driver 210 can provide a driving signal for fingerprint sensing to the pixels PXL. The driving signal can be set to cause the pixels PXL to emit light and operate as a light source of the sensor pixels SPXL. In the present embodiment, the driving signal for fingerprint sensing can be provided to the pixels PXL disposed in a specific area of the display panel 110, for example, the pixels PXL disposed in the sensing area SA. In an exemplary embodiment of the present application, the driving signal for fingerprint sensing can be provided by the fingerprint detector 220.

[0054] The fingerprint detector 220 can transmit a driving signal (e.g., a driving voltage) for driving the sensor pixels SPXL to the sensor pixels SPXL, and can detect a user's fingerprint based on an electrical signal received from the sensor pixels SPXL. The driving voltage of the sensor pixels SPXL can be, for example, about -7V to about -3V, but the present application is not limited thereto.

[0055] Figure 3 is a cross-sectional view of a display apparatus according to an exemplary embodiment of the present application. For example, Figure 3 is Figure 1 and Figure 2 a cross-sectional view of the sensing area SA of the display apparatus 10 shown in FIGS. 1A and 1B.

[0056] Referring to Figure 3The display device 10 can include the display panel 110 and the optical sensor PSL provided on one surface of the display panel 110 in the sensing area SA. Further, the display device 10 can include the substrate SUB and the circuit element layer BPL, the light emitting element layer LDL, the first protective layer PTL1, the first adhesive layer ADL1, and the window WIN arranged in this order on one surface (e.g., the upper surface) of the substrate SUB. Further, the display device 10 can include the second adhesive layer ADL2 and the second protective layer PTL2 arranged in this order on the other surface (e.g., the lower surface) of the substrate SUB in the sensing area SA.

[0057] The substrate SUB can be a base member of the display panel 110, and can be a substantially transparent and transmissive substrate. The substrate SUB can be a rigid substrate including, for example, glass or tempered glass, or a flexible substrate formed of, for example, plastic. However, the material of the substrate SUB is not limited thereto, and the substrate SUB can be formed of various materials.

[0058] As shown in FIG. 1A, the substrate SUB can include the display area AA and the non-display area NA. The display area AA can include a plurality of pixel areas PXA, each of which includes one pixel PXL. Figure 1 Figure 2 As shown in FIG. 1A, the substrate SUB can include the display area AA and the non-display area NA. The display area AA can include a plurality of pixel areas PXA, each of which includes one pixel PXL.

[0059] The circuit element layer BPL is provided on one surface of the substrate SUB, and can include at least one conductive layer. For example, the circuit element layer BPL can include a plurality of circuit elements, a plurality of power supplies for driving the pixels PXL, and a wiring for supplying a signal. The plurality of circuit elements can configure, for example, a pixel circuit of the pixels PXL and the sensor pixels SPXL. In this case, the circuit element layer BPL can include a plurality of conductive layers for forming various circuit elements such as at least one transistor and a capacitor, and a wiring connected to the at least one transistor and the capacitor. Further, the circuit element layer BPL can include at least one insulating layer provided between the plurality of conductive layers. Further, the circuit element layer BPL can include a wiring portion provided in the non-display area NA of the substrate SUB, and supplying power and a signal corresponding to the wiring connected to the pixels PXL.

[0060] The light emitting element layer LDL can be provided on one surface of the circuit element layer BPL. The light emitting element layer LDL can include a plurality of light emitting elements LD connected to the circuit elements and / or the wiring of the circuit element layer BPL through a contact hole or the like. In the exemplary embodiment of the present application, at least one of the plurality of light emitting elements LD can be provided for each pixel PXL.

[0061] ​Each of the pixels PXL can include a circuit element provided in the circuit element layer BPL and at least one light emitting element LD provided in the light emitting element layer LDL, which is provided on the circuit element layer BPL.

[0062] The first protective layer PTL1 can be provided on the light emitting element layer LDL to cover the display area AA. The first protective layer PTL1 can include a sealing member such as a thin film encapsulation (TFE) or an encapsulation substrate, and can further include a protective film or the like in addition to the sealing member.

[0063] The first adhesive layer ADL1 couples the first protective layer PTL1 to the window WIN by being provided between the first protective layer PTL1 and the window WIN. The first adhesive layer ADL1 can include a transparent adhesive such as an optical clear adhesive (OCA), and can include various adhesive materials other than this.

[0064] For example, the window WIN can be a protective member provided on the top of a module of the display device 10 including the display panel 110, and can be a substantially transparent and transmissive substrate. The window WIN can have a multi-layer structure including, for example, a glass substrate, a plastic film, and / or a plastic substrate. The window WIN can include a rigid substrate or a flexible substrate, and the material of the window WIN is not particularly limited.

[0065] In the exemplary embodiment of the present disclosure, the display device 10 can further include a polarizing plate and / or a touch sensor layer (e.g., a touch electrode layer). For example, the display device 10 can further include a polarizing plate and / or a touch sensor layer provided between the first protective layer PTL1 and the window WIN.

[0066] The second protective layer PTL2 can be provided on the other surface of the substrate SUB. The second protective layer PTL2 can be bonded to the substrate SUB by a second adhesive layer ADL2.

[0067] The second adhesive layer ADL2 can firmly bond (or attach) the substrate SUB to the second protective layer PTL2. The second adhesive layer ADL2 can include a transparent adhesive such as an OCA. For example, the second adhesive layer ADL2 can include a pressure sensitive adhesive (PSA), in which the adhesive material acts when a pressure for bonding the second adhesive layer ADL2 to an adhesive surface is applied. When the second adhesive layer ADL2 includes a pressure sensitive adhesive, the second adhesive layer ADL2 can be attached to the substrate SUB and the second protective layer PTL2 by pressure alone, without the need for a separate heat treatment or UV treatment at room temperature.

[0068] The second protective layer PTL2 can prevent the inflow of oxygen and moisture from the outside, and can be provided in a single layer or multiple layers. The second protective layer PTL2 can be formed in the form of a film to further secure the flexibility of the display panel 110. The second protective layer PTL2 can be coupled with the optical sensor PSL through another adhesive layer including a transparent adhesive such as OCA.

[0069] In an exemplary embodiment of the inventive concept, a selective light blocking film can also be provided under the second protective layer PTL2. The selective light blocking film can block a predetermined frequency region (e.g., infrared rays) of external light introduced into the display device 10, thereby preventing light of the predetermined frequency region from being incident on the sensor pixels SPXL of the optical sensor PSL. In the above description, the selective light blocking film can be provided under the second protective layer PTL2, but the inventive concept is not limited thereto. For example, in an exemplary embodiment of the inventive concept, the selective light blocking film can be provided on any layer of the display device 10 and on the upper portion of the optical sensor PSL. Furthermore, when a configuration element blocking infrared rays is included in the display panel 110, the selective light blocking film can be omitted.

[0070] The optical sensor PSL is attached to the back surface (e.g., rear surface) of the display panel 110 by an adhesive or the like to overlap at least one region of the display panel 110. For example, the optical sensor PSL can be provided to overlap the display panel 110 in the sensing area SA. The optical sensor PSL can include a plurality of sensor pixels SPXL distributed at a predetermined resolution and / or interval.

[0071] The sensor pixels SPXL can have a predetermined number, size, and arrangement such that an identifiable fingerprint image can be generated from electrical signals output by the sensor pixels SPXL. The distance between the sensor pixels SPXL can be densely provided such that reflected light reflected from an observation target (e.g., a fingerprint, etc.) is incident on at least two adjacent sensor pixels SPXL.

[0072] The sensor pixels SPXL can sense external light and output a corresponding electrical signal, e.g., a voltage signal. Depending on valleys and ridges formed on a fingerprint of a user's finger, the reflected light received by each of the sensor pixels SPXL can have different optical characteristics (e.g., frequency, wavelength, size, etc.). Accordingly, each of the sensor pixels SPXL can output a voltage signal having different electrical characteristics in response to the optical characteristics of the reflected light. The voltage signals output by the sensor pixels SPXL can be converted into image data by the fingerprint detector 220 and used to identify a fingerprint of a user.

[0073] As described above, the display apparatus 10 according to the exemplary embodiment of the present application includes the light emitting element layer LDL and the fingerprint sensor including the optical sensor PSL. The light emitting element layer LDL can include the light emitting elements LD, which can also serve as light sources of the photosensitive sensor. The optical sensor PSL can include the sensor pixels SPXL, which receive reflected light emitted from the light emitting element layer LDL and reflected from an object (e.g., a fingerprint area of a finger) located above the display apparatus 10.

[0074] Further, although the display apparatus 10 utilizes the light emitting elements LD of the pixels PXL as light sources of the fingerprint sensor, the present application is not limited thereto. For example, the display apparatus according to the exemplary embodiment of the present application can include a separate light source for fingerprint detection.

[0075] A fingerprint detection method of the display apparatus 10 according to the exemplary embodiment of the present application will be described below. During a fingerprint detection period in which the sensor pixels SPXL are activated, the pixels PXL (e.g., the light emitting elements LD provided in the pixels PXL) in the display area AA can emit light in a region of the display area AA in which a user's finger (e.g., a fingerprint area) is in contact with or in the vicinity of the display area AA. For example, all of the pixels PXL in the display area AA can emit light simultaneously or sequentially during the fingerprint detection period. Further, only some of the pixels PXL in the display area AA can emit light at predetermined intervals, or only some of the pixels PXL can emit light of a predetermined color (e.g., light having a short wavelength, such as blue light). Further, the sensor pixels SPXL can be driven simultaneously or sequentially during the fingerprint detection period.

[0076] Some of the light emitted from the pixels PXL can be reflected by the user's finger and incident on the sensor pixels SPXL. At this time, the user's fingerprint form (or, for example, a fingerprint pattern) can be detected based on a difference in the amount of light reflected from the ridges and valleys of the fingerprint and / or a waveform of the reflected light.

[0077] Figure 4 is a cross-sectional view of a display apparatus according to an exemplary embodiment of the present application.

[0078] Referring to Figure 4In an exemplary embodiment of the present disclosure, the display apparatus 10' can further include a light blocking layer PHL. The light blocking layer PHL can be disposed within the display panel 110 or between the display panel 110 and the sensor pixels SPXL to block a portion of light incident on the sensor pixels SPXL. For example, the light blocking layer PHL can selectively block and transmit light (hereinafter, referred to as reflected light) reflected from an object (e.g., a finger) that is about to come into contact with or has come into contact with the upper end of the display panel 110. Some of the light incident on the light blocking layer PHL can be blocked, and some of the remaining light can pass through the pinhole PIH to reach the sensor pixels SPXL below the light blocking layer PHL.

[0079] The light blocking layer PHL includes a plurality of pinholes PIH. The pinholes PIH can be optical holes and can be a kind of light-transmissive holes. For example, the pinholes PIH can be light-transmissive holes having a relatively small size (e.g., area). For example, the pinholes PIH can have a minimum size of the light-transmissive holes in the layers of the display apparatus 10' that overlap each other. For example, the pinholes PIH can be located on a path along which the reflected light passes through the display panel 110 in an oblique direction or a perpendicular direction and is incident on the sensor pixels SPXL.

[0080] The display panel 110 can be transparently formed in an area in which the pinholes PIH are disposed, so that the reflected light reflected by the fingerprint of the finger or the like can pass through the corresponding pinholes PIH. In addition, in order to reduce a loss of the reflected light required for fingerprint detection, the display panel 110 can be configured so that light of an observation field of view (FOV) (or, for example, referred to as a viewing angle) satisfying a predetermined angle range can be transmitted through each pinhole PIH.

[0081] For example, the display panel 110 can be transparent and formed in an area overlapping the pinholes PIH while having a larger area than the corresponding pinholes PIH with respect to the area in which the respective pinholes PIH are disposed. Hereinafter, the area in which the reflected light is transparently formed so as to be transmitted is referred to as an "optical opening area".

[0082] When an observation viewing angle of a desired range is referred to as θ, a thickness of the circuit element layer BPL is referred to as q, and a width of the optical opening area OPA formed at an interface between the circuit element layer BPL and the light emitting element layer LDL is referred to as 2p based on a center of each pinhole PIH, it can be determined that 2p = 2 × (q × tanθ). In an exemplary embodiment of the present disclosure, the observation field of view can be an angle in a range of about 30 to 60 degrees, for example, 45 degrees, and the present disclosure is not limited thereto.

[0083] The pinhole PIH can have a predetermined width w, for example, the width w is in a range of about 5 μm to about 20 μm, and the width of the optical opening area OPA can be 2p + w in consideration of the width w of the pinhole PIH. In this way, the width of the optical opening area OPA to be implemented in each layer of the display apparatus 10 can be gradually increased as it is distanced from the light blocking layer PHL (for example, as it travels toward the upper and lower portions of the light blocking layer PHL, respectively).

[0084] The width w (or, for example, diameter) of the pinhole PIH can be set to be about 10 times or more of the wavelength of the reflected light, for example, about 4 μm or about 5 μm or more, to prevent diffraction of light. Also, the width w of the pinhole PIH can be set to a size sufficient to prevent image blurring and more clearly detect the shape of a fingerprint. For example, the width w of the pinhole PIH can be set to be about 15 μm or less. However, the present application is not limited thereto, and the width w of the pinhole PIH can vary according to the wavelength bandwidth of the reflected light and / or the layer thickness of the module.

[0085] The interval (or, for example, pitch) between adjacent pinholes PIH can be set according to the distance between the light blocking layer PHL and the optical sensor PSL and the wavelength range of the reflected light. For example, when the observation field of view of the reflected light to be obtained is about 45 degrees, the distance between adjacent pinholes PIH can be set to be greater than twice the distance between the light blocking layer PHL and the optical sensor PSL, and can be set to be equal to or greater than the sum of the distance and a predetermined error range. In this case, it is possible to prevent the images observed by the respective sensor pixels SPXL from overlapping each other, and thus it is possible to prevent image blurring.

[0086] Only the reflected light that passes through the pinhole PIH can reach the sensor pixel SPXL of the optical sensor PSL. The sensor pixel SPXL can output an electrical signal, for example, a voltage signal, corresponding to the received reflected light.

[0087] As described above, the display apparatus 10' according to an exemplary embodiment of the present application includes a fingerprint sensor including a light emitting element layer LDL, an optical sensor PSL, and a light blocking layer PHL. The light emitting element layer LDL can include a light emitting element LD that can also serve as a light source of a photosensitive sensor. At least one of the light emitting elements LD can be provided in each pixel area PXA. The optical sensor PSL can include a sensor pixel SPXL that receives reflected light emitted from the light emitting element layer LDL and reflected from an object (for example, a fingerprint area of a finger) located above the display apparatus 10'. The light blocking layer PHL can include a pinhole PIH disposed between the light emitting element layer LDL and the optical sensor PSL to selectively transmit the reflected light.

[0088] Figure 5 is a plan view showing a configuration of an optical sensor and a fingerprint detector according to an example embodiment of the present application.

[0089] Referring to Figure 5 , the optical sensor PSL can include an array of sensor pixels SPXL. In an example embodiment of the present application, the sensor pixels SPXL can be arranged in a two-dimensional array, and are not limited thereto. Each sensor pixel SPXL can include a photoelectric element that photoelectrically converts incident light into an electric charge according to an amount of received light. The specific structure of the sensor pixel SPXL will be described in detail below with reference to Figure 6 .

[0090] The fingerprint detector 220 can include a horizontal driver 221, a vertical driver 222, and a controller 223.

[0091] The horizontal driver 221 can be connected to the sensor pixels SPXL through drive lines H1 to Hn. The horizontal driver 221 can be configured with a shift register or an address decoder. In an example embodiment of the present application, the horizontal driver 221 can apply a driving signal to drive a selected sensor pixel SPXL among the sensor pixels SPXL. For example, the horizontal driver 221 can apply a driving signal in units of sensor pixels. The horizontal driver 221 can include a reset unit for resetting unnecessary charges stored in the sensor pixels SPXL.

[0092] The sensor pixel SPXL selected and driven by the horizontal driver 221 senses light using a photoelectric element disposed in the sensor pixel SPXL and outputs an electric signal, for example, a voltage signal, corresponding to the detected light. The electric signal output in this way can be, for example, an analog signal.

[0093] The vertical driver 222 can be connected to the sensor pixels SPXL through signal lines V1 to Vm. The vertical driver 222 can process signals output from the sensor pixels SPXL.

[0094] The vertical driver 222 can, for example, perform a correlated double sampling (CDS) process for removing noise from the received electric signal. In addition, the vertical driver 222 can convert an analog signal received from the sensor pixels SPXL into a digital signal. In an example embodiment of the present application, an analog-to-digital converter of the vertical driver 222 can be provided for each sensor pixel column, and the analog-to-digital converters of the vertical driver 222 can process analog signals received from the sensor pixel columns in parallel.

[0095] The vertical driver 222 can be further configured by a shift register or an address decoder. The vertical driver 222 can select the processing circuit corresponding to the sensor pixel column in a regular order, for example, an analog-digital converter. An electrical signal, for example, a digital signal, processed by the processing circuit selected by the vertical driver 222 can be output.

[0096] The controller 223 can be configured by a timing generator or the like that generates various timing signals, and can control the horizontal driver 221 and the vertical driver 222 based on the timing signals generated by the corresponding timing generator.

[0097] In the exemplary embodiment of the present application, the controller 223 can generate image data from a signal (for example, an electrical signal) received from the vertical driver 222, and the controller 223 can process the generated image data. Further, in the exemplary embodiment of the present application, the controller 223 can detect a fingerprint from the processed image data, or perform authorization and / or external transmission of the detected fingerprint. However, the generation of image data and the fingerprint detection can not be performed by the controller 223, but can be performed by an external host processor or the like. In the present embodiment, the controller 223 can transmit the electrical signal (for example, a digital signal) received from the vertical driver 222 to the external host processor, or can transmit the electrical signal via the panel driver 210 or the like. For example, the controller 223 can directly transmit the electrical signal received from the vertical driver 222 to the external host processor.

[0098] Figure 6 is a circuit diagram showing a sensor pixel shown in Figure 5 of the exemplary embodiment of the present application. Figure 6 The sensor pixel SPXL disposed in the x-th sensor pixel row and the x-th sensor pixel column is shown as a sensor pixel SPXL having a three-transistor structure.

[0099] Referring to Figure 6 , the sensor pixel SPXL is an example of a photoelectric element, and includes a photodiode PD, a transfer transistor TRTX, a reset transistor TRRX, and an amplification transistor TRAMP. Figure 6 An example in which the transistors are N-type transistors is shown; however, in the exemplary embodiment of the present application, at least some of the transistors can be P-type, and the circuit structure of the sensor pixel SPXL can be modified accordingly.

[0100] The anode electrode of the photodiode PD is grounded. The transfer transistor TRTX is connected between the cathode electrode of the photodiode PD and the first node N1, and the gate electrode of the transfer transistor TRTX is connected to the horizontal driver 221. When a drive signal is applied by the drive line Hx, the transfer transistor TRTX is turned on, and operates as a transfer gate unit that transfers the charge photoelectrically converted by the photodiode PD to the first node N1 that is a charge-voltage converter.

[0101] The reset transistor TRRX is connected between the reset power supply VRESET and the first node N1, and can receive a reset signal through the gate electrode. When the reset signal is applied, the reset transistor TRRX can be turned on, and set the voltage of the first node N1 to the voltage of the reset power supply VRESET. Further, the reset signal can be applied by the reset line RST connected to the gate electrode of the reset transistor TRRX.

[0102] The amplification transistor TRAMP is connected between the reset power supply VRESET and the signal line Vx, and the gate electrode is connected to the first node N1. The amplification transistor TRAMP operates as an amplifier that outputs a signal corresponding to the voltage of the first node N1 to the signal line Vx.

[0103] In the exemplary embodiment of the present application, the structure of the sensor pixel SPXL is not limited to the above description, and the sensor pixel SPXL can be modified to include, for example, a four-transistor structure or the like.

[0104] Figure 7 is a side sectional view of a sensor pixel shown in Figure 6 FIG. 11, according to an exemplary embodiment of the present application. For example, Figure 7 shows a side sectional view of one transistor TR (e.g., a transfer transistor TRTX) and a photodiode PD included in the sensor pixel SPXL.

[0105] Referring to Figure 7 , the sensor pixel SPXL can include a buffer layer 712, a circuit element layer BPL, a photoelectric element layer PDL, and a planarization layer 770, which are sequentially stacked on a surface (e.g., an upper surface of the substrate 711) of the substrate 711.

[0106] For example, the substrate 711 can be a base member of the optical sensor PSL, and can be a rigid substrate including, for example, glass or tempered glass, or a flexible substrate formed of, for example, a plastic material. However, the material of the substrate 711 is not limited thereto, and the substrate 711 can be formed of various materials.

[0107] The buffer layer 712 can be disposed on the substrate 711. The buffer layer 712 can be formed of a silicon oxide (SiO x ) film and / or a silicon nitride (SiNx ) a single layer or multiple layers of a film.

[0108] The transistor TR can be provided over the buffer layer 712. The transistor TR can be one of an oxide thin film transistor (TFT) formed of an indium gallium zinc oxide (IGZO)-based material, low-temperature polysilicon (LTPS), and amorphous silicon thin film transistor (a-Si TFT). The transistor TR can have, for example, the following structure.

[0109] The active pattern 721 can be provided over the buffer layer 712. The active pattern 721 can include a channel region 721a through which electrons move and a source region 721b and a drain region 721c formed at one side and the other side of the channel region 721a, respectively. For example, the source region 721b and the drain region 721c are formed at opposite sides of the channel region 721a, respectively.

[0110] The gate insulating layer 722 can be provided over the active pattern 721. The gate insulating layer 722 can include one or more inorganic layers and / or organic layers. The gate insulating layer 722 can be formed of a silicon oxide (SiO x ) film and / or a silicon nitride (SiN x ) film. The material forming the gate insulating layer 722 is not limited to the above-described material, and the gate insulating layer 722 can include, for example, an inorganic insulating material or an organic insulating material such as SiO x , SiN x , SiON, SiOF, AlO x , or the like. The gate insulating layer 722 can insulate the active pattern 721 from the gate electrode 723 to be described below.

[0111] The gate electrode 723 is provided over the gate insulating layer 722. The gate electrode 723 can be provided to correspond to the channel region 721a of the active pattern 721. For example, the gate electrode 723 can overlap the channel region 721a. For example, when the transistor TR is a transfer transistor TRTX, the gate electrode 723 can be electrically connected to the drive line Hx. For example, the drive line Hx can be provided on the same layer as the gate electrode 723, and the gate electrode 723 can extend from the drive line Hx.

[0112] The gate electrode 723 can be a single layer or a multilayer formed of a conductive material. The gate electrode 723 can be formed of, for example, Ti, Cu, Mo, Al, Au, Cr, TiN, Ag, Pt, Pd, Ni, Sn, Co, Rh, Ir, Fe, Ru, Os, Mn, W, Nb, Ta, Bi, Sb, Pb, or the like. The gate electrode 723 can be formed of an alloy such as MoTi and AlNiLa. The gate electrode 723 can be a multilayer formed of, for example, Ti / Cu, Ti / Au, Mo / Al / Mo, ITO / Ag / ITO, TiN / Ti / Al / Ti, TiN / Ti / Cu / Ti, or the like.

[0113] The interlayer insulating layer 724 can be provided on the gate electrode 723. The interlayer insulating layer 724 can include one or more inorganic films and / or organic films. For example, the interlayer insulating layer 724 can be formed of a single layer or a multilayer of a silicon oxide (SiO x ) film and / or a silicon nitride (SiN x ) film.

[0114] A contact hole can be formed in the interlayer insulating layer 724 to connect the source electrode 725a and the drain electrode 725b to the source region 721b and the drain region 721c of the active pattern 721, respectively.

[0115] The source electrode 725a and the drain electrode 725b formed of a conductive material can be provided on the interlayer insulating layer 724. The source electrode 725a and the drain electrode 725b can be electrically connected to the source region 721b and the drain region 721c of the active pattern 721, respectively, through the contact holes of the interlayer insulating layer 724.

[0116] A first protective layer 730 is provided on the source electrode 725a and the drain electrode 725b. The first protective layer 730 can be formed of a single layer or a multilayer of a silicon oxide (SiO x ) film and / or a silicon nitride (SiN x ) film.

[0117] A lower electrode 741 of a photoelectric element PD is provided on the first protective layer 730. The lower electrode 741 can be connected to the source electrode 725a of the transistor TR through a contact hole provided in the first protective layer 730.

[0118] The lower electrode 741 can be formed of an opaque metal such as molybdenum (Mo) or a transparent oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), or zinc oxide (ZnO), depending on the characteristics of the photoelectric element PD.

[0119] In the example embodiment of the present application, the photoelectric element PD can be configured as a PIN diode. In the present embodiment, a P-i-N layer PIN is provided on the lower electrode 741, and the P-i-N layer PIN includes a stacked N (negative) type semiconductor layer 742 containing N-type impurities, an I (intrinsic) type semiconductor layer 743 containing no impurities, and a P (positive) type semiconductor layer 744 containing P-type impurities.

[0120] The I type semiconductor layer 743 can be formed to be relatively thicker than the N type semiconductor layer 742 and the P type semiconductor layer 744. The P-i-N layer PIN can be formed to include a material capable of converting light incident from the outside into an electric signal, and include, for example, a material such as a-Se, HgI2, CdTe, PbO, PbI2, BiI3, GaAs, and Ge.

[0121] The upper electrode 745 is provided on the P-i-N layer PIN. The upper electrode 745 can be formed of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), and / or zinc oxide (ZnO) according to the characteristics of the photoelectric element PD.

[0122] The upper electrode 745 is provided on the P-i-N layer PIN, and can have an area smaller than that of the P-i-N layer PIN, thereby exposing a portion of the P-i-N layer PIN. For example, an end portion of the upper electrode 745 provided on the P-i-N layer PIN can be formed on an inner surface of the P-i-N layer PIN, the area of the upper electrode 745 being smaller than the P-i-N layer PIN so as not to coincide with the end portion of the P-i-N layer PIN. For example, the upper electrode 745 can be provided to have a concave structure exposing an edge portion of the P-i-N layer PIN. For example, the upper electrode 745 can have a recess or a concave portion, thereby exposing an edge portion of the P-i-N layer PIN. In this way, by arranging the upper electrode 745 on the P-i-N layer PIN in a concave structure, the leakage current of the photoelectric element PD can be reduced.

[0123] The second protective layer 750 is provided on the upper electrode 745. The second protective layer 750 can be formed on the substrate 711. For example, the second protective layer 750 can be formed on the entire surface of the substrate 711. The second protective layer 750 can be formed of a single layer or multiple layers of a silicon oxide (SiO x ) film and / or a silicon nitride (SiN x ) film.

[0124] As described above, the photoelectric element PD configured by the PIN diode can detect external light, convert the light into an electric signal, and output the electric signal. For example, if light of a certain region (e.g., a visible light region) is incident on the P-intrinsic-N layer PIN, the I-type semiconductor layer 743 is depleted by the P-type semiconductor layer 744 and the N-type semiconductor layer 742, and thus an electric field is generated inside the I-type semiconductor layer 743. Holes and electrons generated by the light drift by the electric field and are collected in the P-type semiconductor layer 744 and the N-type semiconductor layer 742.

[0125] The bias electrode 760 can be formed on the second protective layer 750. The bias electrode 760 can be electrically connected to the upper electrode 745 of the photoelectric element PD through a contact hole formed in the second protective layer 750. According to the circuit structure of the sensor pixel SPXL illustrated in FIG. 8B, the bias electrode 760 can be grounded or connected to a certain voltage. Figure 6

[0126] In an exemplary embodiment of the present application, a self-assembled monolayer SAM can be formed between the second protective layer 750 and the bias electrode 760. For example, the self-assembled monolayer SAM can extend beyond the side surface of the bias electrode 760, and can include a hole so that the bias electrode 760 can be electrically connected to the upper electrode 745. The self-assembled monolayer SAM can include a head group chemically bonded to the surface of the second protective layer 750 or the like, and a hydrophobic end portion including a carbon chain connected to the head group.

[0127] For example, the self-assembled monolayer SAM can be formed by using at least one of trichloroalkylsilane, dichlorodialkylsilane, chlorotrialkylsilane, trichloro(1H, 1H, 2H, 2H-perfluorooctyl)silane, hexamethyldisiloxane, alkylsiloxane, alkanethiol, alkylphosphonic acid, alkyltrichlorosilane, and / or alkyltrialkoxysilane.

[0128] For example, the self-assembled monolayer SAM can be formed of a transparent material that allows light to pass through. The transparent material can be an organosilicon compound including a head group such as an ethoxysilane, a methoxysilane, or the like, and a hydrophobic end portion including a carbon chain linked to the head group.

[0129] The self-assembled monolayer SAM can be formed by using a coating method, a printing method, a deposition method, or the like. For example, when a compound having a functional group capable of performing bonding (e.g., covalent bonding, hydrogen bonding, or chemical adsorption) is deposited on the second protective layer 750 by chemical vapor deposition (CVD) or the like, the self-assembled monolayer SAM can be formed as a compound that is self-aligned on the second protective layer 750.

[0130] ​As described above, the end portion of the self-assembled monolayer SAM can have hydrophobicity. Therefore, the self-assembled monolayer SAM does not react with moisture and is robust to wet etching. Further, the head group of the self-assembled monolayer SAM can be easily separated from the second protective layer 750 or the like by an oxygen plasma treatment or the like.

[0131] A planarization layer 770 can be provided on the bias electrode 760. The planarization layer 770 can have a substantially flat upper surface and can be used to increase the surface flatness of the optical sensor PSL. The planarization layer 770 can include an organic material or an inorganic material. For example, the planarization layer 770 can be an organic material, and the planarization layer 770 can be formed of a photoresist, a polyacrylic resin, a polyimide resin, a polyamide resin, a siloxane resin, an acrylic resin, an epoxy resin, or the like.

[0132] Hereinafter, a method of manufacturing a sensor pixel SPXL according to Figure 7 the exemplary embodiment of the present application shown in FIG. 1 will be described in detail.

[0133] Figure 8 to Figure 15 is a diagram showing a method of manufacturing a sensor pixel. For example, Figure 8 to Figure 15 A process of forming a photoelectric element layer PDL in the sensor pixel SPXL is shown.

[0134] The method of forming each layer to be described below can use a photolithography process including deposition, photoresist coating (PR coating), exposure, development, etching, and photoresist stripping (PR stripping) that are generally known. For example, in the case of deposition, a method such as sputtering can be applied in the case of a metal material, and a method such as plasma-enhanced vapor deposition (PECVD) can be applied in the case of a semiconductor or an insulating film. Further, in the case of etching, dry etching or wet etching can be selectively used depending on the material.

[0135] First, as shown in Figure 8 In the substrate 711, a buffer layer 712 and a circuit element layer BPL are formed. The buffer layer 712 can be selectively formed as needed, and can not be formed. On the buffer layer 712, an active pattern 721, a gate insulating layer 722, a gate electrode 723, an interlayer insulating layer 724, a source electrode 725a, and a drain electrode 725b can be sequentially stacked.

[0136] A first protective layer 730 can be formed on an upper portion of the circuit element layer BPL. The first protective layer 730 can be formed to cover the substrate 711 on which the circuit element layer BPL is formed. For example, the first protective layer 730 can cover the entire surface (e.g., the upper surface) of the substrate 711. A contact hole overlapping the source electrode 725a can be formed in the first protective layer 730. For example, the first protective layer 730 can be formed by coating the upper portion of the circuit element layer BPL with a solidified material used to form the first protective layer 730, and by placing a mask having an opening on the solidified material. Further, the first protective layer 730 can be formed by irradiating the solidified material exposed by the opening with ultraviolet light to solidify the solidified material and by removing the remaining solidified material other than the solidified solidified material. The coating of the solidified material can be performed, for example, by using a spray method, but the present application is not limited thereto. The method of forming the first protective layer 730 is not limited to the above description.

[0137] A lower electrode 741 of the photovoltaic element PD connected to the source electrode 725a through a contact hole of the first protective layer 730 is formed on the first protective layer 730. Further, a P-i-N film PIN' including an N-type semiconductor film 742', an I-type semiconductor film 743', and a P-type semiconductor film 744' and an upper electrode film 745' are sequentially stacked to cover the substrate 711 and the lower electrode 741. For example, the P-i-N film PIN' and the upper electrode film 745' can cover the entire surface of the substrate 711.

[0138] Next, as shown in FIG. 7B, the upper electrode film 745' can be patterned by a mask process to form an upper electrode 745, and the P-i-N film PIN' can be patterned to form a P-i-N layer PIN. In the exemplary embodiment of the present application, the patterning can be performed by using a wet etching method using an etchant. Figure 9

[0139] In the exemplary embodiment of the present application, the end portion of the upper electrode 745 and the end portion of the P-i-N layer PIN do not coincide with each other, and the upper electrode 745 can be patterned to have a smaller area than the P-i-N layer PIN. In this way, if the upper electrode 745 is formed in the inner layer of the P-i-N layer PIN to form an inner recess structure in which the edge of the P-i-N layer PIN is exposed, the leakage current of the photovoltaic element PD can be minimized. For example, the upper electrode 745 can have a shorter length than the length of the P-i-N layer PIN, as viewed in a cross-sectional view.

[0140] The patterned P-i-N layer PIN can form a PIN diode type photovoltaic element PD together with the lower electrode 741 and the upper electrode 745.

[0141] Next, as shown in FIG. 7B, the upper electrode film 745' can be patterned by a mask process to form an upper electrode 745, and the P-i-N film PIN' can be patterned to form a P-i-N layer PIN. In the exemplary embodiment of the present application, the patterning can be performed by using a wet etching method using an etchant.​Figure 10 As shown in FIG. 7B, a second protective layer 750 is formed on the upper electrode 745 of the photoelectric element PD. The method of forming the second protective layer 750 can be substantially the same as the method of forming the first protective layer 730. Therefore, a detailed description thereof will be omitted.

[0142] Next, as shown in FIG. 7C, a self-assembled monolayer SAM' is formed on the second protective layer 750. The self-assembled monolayer SAM' can be formed as a compound that is self-aligned on the second protective layer 750. When a compound having a functional group (e.g., a head group) capable of interacting with the surface of the second protective layer 750 and performing bonding (such as covalent bonding, hydrogen bonding, and chemical adsorption) with the surface of the second protective layer 750 is provided to the second protective layer 750, the self-assembled monolayer SAM' can be formed as a compound that is self-aligned on the second protective layer 750. Figure 11

[0143] The self-assembled monolayer SAM' can be provided in a liquid phase or a gas phase on the second protective layer 750. For example, by coating the upper portion of the second protective layer 750 with a solution containing a self-assembling compound, the self-assembled monolayer SAM' can be provided on the second protective layer 750. The solution containing the compound can include water as, for example, a catalyst.

[0144] Further, by placing the substrate 711 on which the second protective layer 750 is formed in a low-pressure (e.g., about 500 Pa or less) vacuum chamber together with a self-assembling compound, the self-assembled monolayer SAM' can be formed on the second protective layer 750. Here, after air in the vacuum chamber is exhausted, water vapor can be injected as a catalyst so that the compound can self-assemble on the second protective layer 750. An amount of water vapor can be injected so that the pressure in the chamber is maintained at about 500 Pa.

[0145] Next, as shown in FIG. 7D, a contact hole is formed in the self-assembled monolayer SAM' and the second protective layer 750 so that a portion of the upper electrode 745 is exposed. To form the contact hole, a process of patterning the self-assembled monolayer SAM' and a process of patterning the second protective layer 750 can be sequentially performed. Figure 12 For example, a mask (e.g., a photoresist mask) having an opening in a region corresponding to the upper electrode 745 can be formed on the self-assembled monolayer SAM'. Thereafter, a first etching process of etching the self-assembled monolayer SAM' and a second etching process of etching the second protective layer 750 can be performed. The first etching process can be achieved by performing a dry etching such as an oxygen plasma process. The second etching process can be achieved by performing, for example, a wet etching. Thereafter, the mask can be removed from the self-assembled monolayer SAM by a lift-off process or the like. However, the process of generating the contact hole is not limited to the above-described process.

[0146] For example, a mask (e.g., a photoresist mask) having an opening in a region corresponding to the upper electrode 745 can be formed on the self-assembled monolayer SAM'. Thereafter, a first etching process of etching the self-assembled monolayer SAM' and a second etching process of etching the second protective layer 750 can be performed. The first etching process can be achieved by performing a dry etching such as an oxygen plasma process. The second etching process can be achieved by performing, for example, a wet etching. Thereafter, the mask can be removed from the self-assembled monolayer SAM by a lift-off process or the like. However, the process of generating the contact hole is not limited to the above-described process.​

[0147] After the contact holes are formed, the substrate 711 can be cleaned. A cleaning liquid such as deionized water or pure water can be used to clean the substrate 711. For example, buffered oxide etchant (BOE) can be used as a cleaning liquid. Cleaning can remove mask residue, other impurities, etc., from the upper electrode 745 exposed by the contact holes. Furthermore, cleaning can evenly distribute uneven etched portions around the contact holes.

[0148] Silicon oxide (SiO) forms the second protective layer 750 x ) film and / or silicon nitride (SiN) x The membrane can be easily corroded by substances such as BOE used as cleaning fluid in the cleaning process. Therefore, a portion of the side surface of the P-intrinsic-N layer PIN may be exposed to the outside through the second protective layer 750 etched during the cleaning process, and leakage current may occur. In this invention, a self-assembled monolayer SAM' robust to wet etching is formed on the second protective layer 750 prior to the cleaning process, thereby preventing damage to the second protective layer 750 during the cleaning process.

[0149] Next, as Figure 13 As shown, a bias electrode 760 is formed, connected to the upper electrode 745 of the photoelectric element PD through a contact hole in the second protective layer 750. Furthermore, the bias electrode 760 is formed on a self-assembled single-film SAM'. Subsequently, as... Figure 14 As shown, if the substrate 711 is subjected to oxygen plasma treatment, the self-assembled monolayer SAM' exposed in the area where the bias electrode 760 is not formed is etched. The remaining self-assembled monolayer SAM' that is not etched by plasma treatment can form a self-assembled monolayer SAM between the second protective layer 750 and the bias electrode 760.

[0150] In addition, such as Figure 15 As shown, a planarization layer 770 may also be formed. According to an exemplary embodiment of the present invention, a third protective layer may be formed before the planarization layer 770 is formed to cover the second protective layer 750 on which the bias electrode 760 is formed.

[0151] Figure 16 This is a graph showing the leakage current of the PIN diode based on the driving voltage of the optical sensor.

[0152] For example, Figure 16Leakage currents I_leakage for each driving voltage V_diode of a PIN diode as a photoelectric element PD are shown when a contact hole is formed in the second protective layer 750 and a cleaning process is performed without forming a self-assembled monolayer SAM' as in the comparative example and when a contact hole is formed after forming a self-assembled monolayer SAM' on the second protective layer 750 and a cleaning process is performed as in the present application.

[0153] The PIN diode can be driven by a voltage of about -7 to about -3 V. Referring to Figure 7 to Figure 15 If a contact hole is formed in the second protective layer 750 and a BOE cleaning process is performed in a state in which a self-assembled monolayer SAM' is not formed, a portion of the second protective layer 750 can be corroded due to a chemical reaction with a cleaning solution. In this case, if a portion of a P-intrinsic-N layer PIN of the PIN diode is exposed or at least a thickness of the second protective layer 750 is reduced, a current can leak into the exposed area when the PIN diode is driven. In this case, a large amount of leakage current I_leakage can occur as shown in a first curve 1. The leakage current I_leakage is noise as a sensing current of the PIN diode, and thus the sensing accuracy can be reduced.

[0154] In the present application, if a contact hole is formed after forming a self-assembled monolayer SAM' on the second protective layer 750 and a cleaning process is performed, the second protective layer 750 can be protected by the self-assembled monolayer SAM' robust to wet etching without being exposed to a cleaning liquid, and thus corrosion can not occur. Then, as shown in a second curve 2, a leakage current I_leakage can be reduced when the PIN diode is driven, and thus the sensing accuracy can be increased.

[0155] The present application provides an optical sensor capable of preventing an insulating layer shielding a PIN diode having a vertical structure from being etched during a cleaning process, a method of manufacturing the optical sensor, and a display device including the optical sensor.

[0156] The optical sensor, the method of manufacturing the optical sensor, and the display device including the optical sensor according to an exemplary embodiment of the present application can minimize occurrence of a leakage current in a PIN diode having a vertical structure.

[0157] The optical sensor, the method of manufacturing the optical sensor, and the display device including the optical sensor according to an exemplary embodiment of the present application can prevent occurrence of a leakage current of a PIN diode, thereby reducing noise acting on a sensing current, and thus the accuracy of fingerprint sensing can be increased.

[0158] While the application has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details can be made therein without departing from the spirit and scope of the application.

Claims

1. Optical sensors, including: Substrate; A circuit element layer is disposed on the substrate and includes circuit elements; as well as The optoelectronic component layer is disposed above the circuit component layer. The optoelectronic element layer includes: Optoelectronic components are connected to the circuit components. A protective layer is configured to cover the photoelectric element. A self-assembled monolayer is formed directly on the outer surface of the protective layer. This self-assembled monolayer is resistant to wet etching or cleaning processes and is configured to prevent corrosion of the protective layer during wet etching or cleaning processes in the manufacturing process. A bias electrode is connected to the photoelectric element. The protective layer is more susceptible to wet etching or cleaning processes than the self-assembled monolayer.

2. The optical sensor according to claim 1, wherein, The optoelectronic element includes: The lower electrode is connected to the circuit element; A P-intrinsic-N layer is disposed on the lower electrode; and The upper electrode is disposed on the P-intrinsic-N layer and connected to the bias electrode.

3. The optical sensor according to claim 2, in, The protective layer covers the upper electrode, and The bias electrode is formed on the protective layer and connected to the upper electrode through a contact hole formed in the protective layer.

4. The optical sensor according to claim 3, wherein, The self-assembled monolayer is formed between the protective layer and the bias electrode.

5. The optical sensor according to claim 2, wherein, The P-intrinsic-N layer includes: An N-type semiconductor layer is disposed on the lower electrode; A type I semiconductor layer is formed on the type N semiconductor layer; and A P-type semiconductor layer is formed on the I-type semiconductor layer.

6. The optical sensor according to claim 1, wherein, The circuit element layer includes: An active pattern having a channel region and a source region and a drain region located on opposite sides of the channel region; A gate insulating layer covers the active pattern; A gate electrode is formed on the gate insulating layer, wherein at least a portion of the gate electrode overlaps with the channel region; An interlayer insulating layer covers the gate electrode; Source and drain electrodes are formed on the interlayer insulating layer and connected to the source and drain regions respectively through contact holes; and A protective layer covers the source electrode and the drain electrode.

7. The optical sensor according to claim 1, further comprising: A planarization layer is formed on the optoelectronic element layer.

8. A method for manufacturing an optical sensor, comprising: A circuit element layer is formed on a substrate, wherein the circuit element layer includes at least one circuit element; An optoelectronic element is formed on the circuit element layer, wherein the optoelectronic element is connected to the at least one circuit element; A protective layer is formed to cover the optoelectronic element; A self-assembled monolayer is formed directly on the outer surface of the protective layer. The self-assembled monolayer is capable of resisting wet etching or cleaning processes and is configured to prevent corrosion of the protective layer during wet etching or cleaning processes in the manufacturing process. Contact holes are formed in the self-assembled monolayer and the protective layer; and A bias electrode is formed that is connected to the photoelectric element through the contact hole. The protective layer is more susceptible to wet etching or cleaning processes than the self-assembled monolayer.

9. A display device, including: Display panel, including pixels; as well as An optical sensor, disposed on the display panel, includes multiple sensor pixels. Each of the plurality of sensor pixels includes: First substrate; A first circuit element layer is disposed on the first substrate and includes first circuit elements configured with the plurality of sensor pixels; A photoelectric element layer is disposed above the first circuit element layer, and the photoelectric element layer includes: The optoelectronic element is connected to the first circuit element. A protective layer is configured to cover the photoelectric element. A self-assembled monolayer is formed directly on the outer surface of the protective layer. This self-assembled monolayer is resistant to wet etching or cleaning processes and is configured to prevent corrosion of the protective layer during wet etching or cleaning processes in the manufacturing process. Bias electrode, connected to the photoelectric element The protective layer is more susceptible to wet etching or cleaning processes than the self-assembled monolayer.

10. The display device according to claim 9, wherein, The optoelectronic element includes: The lower electrode is connected to the first circuit element; A P-intrinsic-N layer is disposed on the lower electrode; and The upper electrode is disposed on the P-intrinsic-N layer and connected to the bias electrode.

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