Voltage generation module and power management chip

Abstract

The present invention provides a voltage generation module and a power management chip. The voltage generation module includes a reference voltage generation circuit, a comparison circuit, a switch circuit and a voltage control circuit; the reference voltage generation circuit generates a first reference voltage and a second reference voltage; the comparison circuit provides an on control signal or a off control signal; when the switch circuit control input terminal and the voltage output terminal are disconnected, the voltage control circuit controls the output voltage signal outputted from the voltage output terminal according to the first reference voltage. The present invention solves the problem that the existing voltage generation module cannot accurately generate an output voltage signal without setting an additional mask layer or a bandgap reference module, so that when the input voltage is lower than the predetermined output voltage, the output voltage signal is the input voltage, and when the input voltage is higher than the predetermined output voltage, the voltage value of the output voltage signal is stabilized at the set voltage value.

Description

Technical Field

[0001] The present invention relates to the technical field of voltage generation, and in particular to a voltage generation module and a power management chip. Background Art

[0002] For power management chips with a wide input voltage range (2.5V to 45V), an additional voltage VDD needs to be generated as the power supply for the internal core circuit. When the input voltage is lower than the set value of VDD, VDD follows the input voltage; when the input voltage is higher than the set value of VDD, VDD stabilizes at a predetermined value. The traditional voltage generation module for generating VDD cannot accurately generate VDD without setting an additional mask layer or bandgap reference module. Summary of the invention

[0003] The main purpose of the present invention is to provide a voltage generating module and a power management chip to solve the problem that the existing voltage generating module cannot accurately generate an output voltage signal without setting an additional mask layer or a bandgap reference module, so that when the input voltage is lower than the predetermined output voltage, the output voltage signal is the input voltage, and when the input voltage is higher than the predetermined output voltage, the voltage value of the output voltage signal is stable at the set voltage value.

[0004] In order to achieve the above object, the present invention provides a voltage generation module, including a reference voltage generation circuit, a comparison circuit, a switch circuit and a voltage control circuit, wherein:

[0005] The reference voltage generating circuit is electrically connected to the input terminal, the first reference voltage terminal and the second reference voltage terminal respectively, and is used to generate the first reference voltage and the second reference voltage according to the input voltage provided by the input terminal, and output the first reference voltage through the first reference voltage terminal, and output the second reference voltage through the second reference voltage terminal;

[0006] The comparison circuit is electrically connected to the input terminal and the second reference voltage terminal respectively, and is used to compare the second reference voltage with the input voltage, and when the comparison shows that the input voltage is less than the second reference voltage, provide an on control signal to the control terminal of the switch circuit, and when the comparison shows that the input voltage is greater than the second reference voltage, provide an off control signal to the control terminal of the switch circuit;

[0007] The control end of the switch circuit is electrically connected to the comparison circuit, the first end of the switch circuit is electrically connected to the input end, and the second end of the switch circuit is electrically connected to the voltage output end. The switch circuit is used to control the connection between the input end and the voltage output end when the control end receives the start control signal, and is also used to control the disconnection between the input end and the voltage output end when the control end receives the shutdown control signal;

[0008] The voltage control circuit is electrically connected to the first reference voltage terminal and the voltage output terminal respectively, and is used to control an output voltage signal output by the voltage output terminal according to the first reference voltage when the switch circuit controls the input terminal and the voltage output terminal to be disconnected.

[0009] Optionally, the reference voltage generating circuit includes a first generating branch, a second generating branch and a third generating branch; the first generating branch includes a first control end, the second generating branch includes a second control end, and the third generating branch includes a third control end; the first control end, the second control end and the third control end are electrically connected to each other;

[0010] A first current flowing through the first generating branch, a second current flowing through the second generating branch, and a third current flowing through the third generating branch are equal;

[0011] The first generating branch is electrically connected to the input end, and is used to generate the first current according to the input voltage;

[0012] The second generating branch is electrically connected to the first reference voltage terminal, and is used to generate the second current according to the first reference voltage terminal;

[0013] The third generating branch is electrically connected to the second reference voltage terminal, and is used to generate the third current according to the second reference voltage.

[0014] Optionally, the first generating branch includes a first generating transistor, a second generating transistor, a first resistor, a second resistor, a first control transistor, a second control transistor and a third control transistor, wherein:

[0015] A first electrode of the first control transistor is electrically connected to the input terminal, and a control electrode of the first control transistor and a second electrode of the first control transistor are both electrically connected to the first control terminal;

[0016] The control electrode of the second control transistor is electrically connected to the first control terminal, the first electrode of the second control transistor is electrically connected to the input terminal, and the second electrode of the second control transistor is electrically connected to the first electrode of the first generating transistor;

[0017] The control electrode of the third control transistor is electrically connected to the start control terminal and the first electrode of the first generation transistor respectively, the first electrode of the third control transistor is electrically connected to the first control terminal, and the second electrode of the third control transistor is electrically connected to the control electrode of the first generation transistor and the first end of the first resistor respectively;

[0018] The second electrode of the first generating transistor is electrically connected to the second end of the first resistor and the first voltage end respectively;

[0019] The first end of the second resistor is electrically connected to the second electrode of the third control transistor, and the second end of the second resistor is electrically connected to the first electrode of the second generating transistor;

[0020] The control electrode of the second generation transistor is electrically connected to the first electrode of the second generation transistor, and the second electrode of the second generation transistor is electrically connected to the second end of the first resistor;

[0021] The first current is the sum of a current flowing through the first resistor and a current flowing through the second resistor.

[0022] Optionally, the first generating transistor and the second generating transistor are NPN type transistors;

[0023] The first control transistor and the second control transistor are P-type transistors, and the third control transistor is an N-type transistor.

[0024] Optionally, the second generating branch includes a fourth control transistor and a third resistance circuit;

[0025] The control electrode of the fourth control transistor is electrically connected to the second control terminal, the first electrode of the fourth control transistor is electrically connected to the input terminal, and the second electrode of the fourth control transistor is electrically connected to the first voltage terminal through the third resistance circuit;

[0026] The second current is a current flowing through the third resistance circuit.

[0027] Optionally, the third resistance circuit includes at least one third resistor connected in series;

[0028] The fourth control transistor is a P-type transistor.

[0029] Optionally, the third generating circuit includes a fifth control transistor, a sixth control transistor, a seventh control transistor, an eighth control transistor and a fourth resistor;

[0030] The control electrode of the fifth control transistor is electrically connected to the third control terminal, the first electrode of the fifth control transistor is electrically connected to the input terminal, and the second electrode of the fifth control transistor is electrically connected to the first end of the fourth resistor;

[0031] The control electrode of the sixth control transistor is electrically connected to the third control terminal, the first electrode of the sixth control transistor is electrically connected to the input terminal, and the second electrode of the sixth control transistor is electrically connected to the first electrode of the eighth control transistor;

[0032] The control electrode of the seventh control transistor is electrically connected to the control electrode of the eighth control transistor, the first electrode of the seventh control transistor is electrically connected to the second end of the fourth resistor, and the second electrode of the seventh control transistor is electrically connected to the second electrode of the eighth control transistor;

[0033] The control electrode of the eighth control transistor is electrically connected to the first electrode of the eighth control transistor, and the second electrode of the eighth control transistor is electrically connected to the first voltage terminal;

[0034] The first end of the fourth resistor is electrically connected to the second reference voltage end.

[0035] Optionally, the fifth control transistor, the sixth control transistor, the seventh control transistor and the eighth control transistor are P-type transistors.

[0036] Optionally, the comparison circuit includes a first comparison transistor, a second comparison transistor, a third comparison transistor and a fourth comparison transistor;

[0037] The control electrode of the first comparison transistor is electrically connected to the control electrode of the second comparison transistor, the first electrode of the first comparison transistor is electrically connected to the input terminal, and the second electrode of the first comparison transistor is electrically connected to the control terminal of the switch circuit;

[0038] The control electrode of the second comparison transistor is electrically connected to the second electrode of the second comparison transistor, the first electrode of the second comparison transistor is electrically connected to the input terminal, and the second electrode of the second comparison transistor is electrically connected to the first end of the fourth resistor;

[0039] The control electrode of the third comparison transistor is electrically connected to the start control terminal, the first electrode of the third comparison transistor is electrically connected to the control terminal of the switch circuit, and the second electrode of the third comparison transistor is electrically connected to the first voltage terminal;

[0040] The control electrode of the fourth comparison transistor is electrically connected to the control electrode of the third comparison transistor, the first electrode of the fourth comparison transistor is electrically connected to the second end of the fourth resistor, and the second electrode of the fourth comparison transistor is electrically connected to the first voltage end.

[0041] Optionally, the first comparison transistor and the second comparison transistor are both P-type transistors, and the third comparison transistor and the fourth comparison transistor are both N-type transistors.

[0042] Optionally, the switching circuit includes a switching transistor;

[0043] The control pole of the switch transistor is the control end of the switch circuit, the first pole of the switch transistor is the first end of the switch circuit, and the second pole of the switch transistor is the second end of the switch circuit.

[0044] Optionally, the switching transistor is a P-type transistor.

[0045] Optionally, the voltage control circuit includes a buffer, a voltage control transistor and a control capacitor;

[0046] The input end of the buffer is electrically connected to the first reference voltage end, and the output end of the buffer is electrically connected to the control electrode of the voltage control transistor; the buffer is used to provide the first reference voltage to the control electrode of the voltage control transistor;

[0047] The first electrode of the voltage-controlled transistor is electrically connected to the input terminal, and the second electrode of the voltage-controlled transistor is electrically connected to the voltage output terminal;

[0048] The first end of the control capacitor is electrically connected to the output end of the buffer, and the second end of the control capacitor is electrically connected to the first voltage end.

[0049] Optionally, the voltage-controlled transistor is an N-type transistor.

[0050] Optionally, the voltage generation module of the present invention further includes a ninth control transistor; the reference voltage generation circuit includes a second generation branch; the second generation branch includes a fourth control transistor and a third resistance circuit;

[0051] The second electrode of the fourth control transistor is electrically connected to the third resistance circuit through the ninth control transistor;

[0052] The control electrode of the ninth control transistor is electrically connected to the input end of the buffer, the first electrode of the ninth control transistor is electrically connected to the second electrode of the fourth control transistor, and the second electrode of the ninth control transistor is electrically connected to the first voltage end through the third resistance circuit.

[0053] Optionally, the ninth control transistor is an N-type transistor.

[0054] The present invention also provides a power management chip, comprising the above-mentioned voltage generation module.

[0055] The voltage generation module and power management chip described in the embodiment of the present invention adopt a reference voltage generation circuit, a comparison circuit, a switch circuit and a voltage control circuit, and can generate the output voltage signal according to the input voltage; when the input voltage is lower than the predetermined output voltage, the output voltage signal is the input voltage, and when the input voltage is higher than the predetermined output voltage, the voltage value of the output voltage signal is stabilized at the set voltage value. The structure of the voltage generation module described in the embodiment of the present invention is not complicated, and the voltage generation module described in the embodiment of the present invention does not require an additional mask layer (mask layer) and Bandgap (bandgap reference) module. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 is a structural diagram of a voltage generating module according to an embodiment of the present invention;

[0057] Figure 2 is a circuit diagram of a voltage generating module according to an embodiment of the present invention;

[0058] Figure 3 is a circuit diagram of a voltage generating module according to another embodiment of the present invention. DETAILED DESCRIPTION

[0059] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0060] The transistors used in all embodiments of the present invention may be triodes, thin film transistors, field effect transistors or other devices with the same characteristics. In the embodiments of the present invention, in order to distinguish the two electrodes of the transistor except the control electrode, one of the electrodes is called the first electrode and the other is called the second electrode.

[0061] In actual operation, when the transistor is a triode, the control electrode may be a base, the first electrode may be a collector, and the second electrode may be an emitter; or, the control electrode may be a base, the first electrode may be an emitter, and the second electrode may be a collector.

[0062] In actual operation, when the transistor is a thin film transistor or a field effect transistor, the control electrode can be a gate, the first electrode can be a source, and the second electrode can be a drain; or, the control electrode can be a gate, the first electrode can be a drain, and the second electrode can be a source.

[0063] The voltage generation module described in the embodiment of the present invention includes a reference voltage generation circuit 11, a comparison circuit 12, a switch circuit 13 and a voltage control circuit 14, wherein:

[0064] The reference voltage generating circuit 11 is electrically connected to the input terminal, the first reference voltage terminal Vt1 and the second reference voltage terminal Vt2 respectively, and is used to generate a first reference voltage Vreg and a second reference voltage Vldo according to the input voltage VIN provided by the input terminal, and output the first reference voltage Vreg through the first reference voltage terminal Vt1, and output the second reference voltage Vldo through the second reference voltage terminal Vt2;

[0065] The comparison circuit 12 is electrically connected to the input terminal and the second reference voltage terminal Vt2, respectively, and is used to compare the second reference voltage Vldo with the input voltage VIN, and provide an on control signal to the control terminal of the switch circuit 13 when the comparison shows that the input voltage VIN is less than the second reference voltage Vldo, and is used to provide an off control signal to the control terminal of the switch circuit 13 when the comparison shows that the input voltage VIN is greater than the second reference voltage Vldo;

[0066] The control end of the switch circuit 13 is electrically connected to the comparison circuit 12, the first end of the switch circuit 13 is electrically connected to the input end, and the second end of the switch circuit 13 is electrically connected to the voltage output end O1. The switch circuit 13 is used to control the connection between the input end and the voltage output end O1 when the control end receives the start control signal, and is also used to control the disconnection between the input end and the voltage output end O1 when the control end receives the shutdown control signal;

[0067] The voltage control circuit 14 is electrically connected to the first reference voltage terminal Vt1 and the voltage output terminal O1 respectively, and is used to control the output voltage signal output by the voltage output terminal O1 according to the first reference voltage Vreg when the switch circuit controls the input terminal and the voltage output terminal O1 to be disconnected.

[0068] The voltage generation module described in the embodiment of the present invention adopts a reference voltage generation circuit 11, a comparison circuit 12, a switch circuit 13 and a voltage control circuit 14, and can generate the output voltage signal according to the input voltage VIN; when the input voltage VIN is lower than the predetermined output voltage, the output voltage signal is the input voltage VIN, and when the input voltage VIN is higher than the predetermined output voltage, the voltage value of the output voltage signal is stabilized at the set voltage value. The structure of the voltage generation module described in the embodiment of the present invention is not complicated, and the voltage generation module described in the embodiment of the present invention does not require an additional mask layer (mask layer) and Bandgap (bandgap reference) module, and the generated output voltage signal is not affected by temperature, and can follow the input voltage well when the input voltage is low (for example, less than 3V), meeting the low-voltage working requirements.

[0069] In a specific implementation, the reference voltage generating circuit may include a first generating branch, a second generating branch and a third generating branch; the first generating branch includes a first control end, the second generating branch includes a second control end, and the third generating branch includes a third control end; the first control end, the second control end and the third control end are electrically connected to each other;

[0070] A first current flowing through the first generating branch, a second current flowing through the second generating branch, and a third current flowing through the third generating branch are equal;

[0071] The first generating branch is electrically connected to the input end, and is used to generate the first current according to the input voltage;

[0072] The second generating branch is electrically connected to the first reference voltage terminal, and is used to generate the second current according to the first reference voltage terminal;

[0073] The third generating branch is electrically connected to the second reference voltage terminal, and is used to generate the third current according to the second reference voltage.

[0074] In an embodiment of the present invention, the reference voltage generating circuit may include a first generating branch, a second generating branch and a third generating branch, the first generating branch generates the first current according to the input voltage, the second generating branch generates the second current according to the first reference voltage terminal; the third generating branch generates the third current according to the second reference voltage, and the first control terminal, the second control terminal and the third control terminal are electrically connected to each other so that the first current flowing through the first generating branch, the second current flowing through the second generating branch and the third current flowing through the third generating branch are equal, so that a first reference voltage independent of temperature and a second reference voltage independent of temperature can be obtained.

[0075] Optionally, the first generating branch includes a first generating transistor, a second generating transistor, a first resistor, a second resistor, a first control transistor, a second control transistor and a third control transistor, wherein:

[0076] A first electrode of the first control transistor is electrically connected to the input terminal, and a control electrode of the first control transistor and a second electrode of the first control transistor are both electrically connected to the first control terminal;

[0077] The control electrode of the second control transistor is electrically connected to the first control terminal, the first electrode of the second control transistor is electrically connected to the input terminal, and the second electrode of the second control transistor is electrically connected to the first electrode of the first generating transistor;

[0078] The control electrode of the third control transistor is electrically connected to the start control terminal and the first electrode of the first generation transistor respectively, the first electrode of the third control transistor is electrically connected to the first control terminal, and the second electrode of the third control transistor is electrically connected to the control electrode of the first generation transistor and the first end of the first resistor respectively;

[0079] The second electrode of the first generating transistor is electrically connected to the second end of the first resistor and the first voltage end respectively;

[0080] The first end of the second resistor is electrically connected to the second electrode of the third control transistor, and the second end of the second resistor is electrically connected to the first electrode of the second generating transistor;

[0081] The control electrode of the second generation transistor is electrically connected to the first electrode of the second generation transistor, and the second electrode of the second generation transistor is electrically connected to the second end of the first resistor;

[0082] The first current is the sum of a current flowing through the first resistor and a current flowing through the second resistor.

[0083] In a specific implementation, the startup control terminal may be electrically connected to a startup control circuit;

[0084] The startup control circuit may be configured to output a startup control current signal when generating voltage.

[0085] Optionally, the first voltage terminal may be a ground terminal or a low voltage terminal, but is not limited thereto.

[0086] In an embodiment of the present invention, the first generating transistor and the second generating transistor are NPN type transistors;

[0087] The first control transistor and the second control transistor are P-type transistors, and the third control transistor is an N-type transistor;

[0088] But it is not limited to this.

[0089] Optionally, the second generating branch includes a fourth control transistor and a third resistance circuit;

[0090] The control electrode of the fourth control transistor is electrically connected to the second control terminal, the first electrode of the fourth control transistor is electrically connected to the input terminal, and the second electrode of the fourth control transistor is electrically connected to the first voltage terminal through the third resistance circuit;

[0091] The second current is a current flowing through the third resistance circuit.

[0092] In a specific implementation, the third resistance circuit may include at least one third resistor connected in series;

[0093] The fourth control transistor is a P-type transistor, but is not limited thereto.

[0094] Optionally, the third generating circuit includes a fifth control transistor, a sixth control transistor, a seventh control transistor, an eighth control transistor and a fourth resistor;

[0095] The control electrode of the fifth control transistor is electrically connected to the third control terminal, the first electrode of the fifth control transistor is electrically connected to the input terminal, and the second electrode of the fifth control transistor is electrically connected to the first end of the fourth resistor;

[0096] The control electrode of the sixth control transistor is electrically connected to the third control terminal, the first electrode of the sixth control transistor is electrically connected to the input terminal, and the second electrode of the sixth control transistor is electrically connected to the first electrode of the eighth control transistor;

[0097] The control electrode of the seventh control transistor is electrically connected to the control electrode of the eighth control transistor, the first electrode of the seventh control transistor is electrically connected to the second end of the fourth resistor, and the second electrode of the seventh control transistor is electrically connected to the second electrode of the eighth control transistor;

[0098] The control electrode of the eighth control transistor is electrically connected to the first electrode of the eighth control transistor, and the second electrode of the eighth control transistor is electrically connected to the first voltage terminal;

[0099] The first end of the fourth resistor is electrically connected to the second reference voltage end.

[0100] In the embodiment of the present invention, the fifth control transistor, the sixth control transistor, the seventh control transistor and the eighth control transistor are P-type transistors, but not limited thereto.

[0101] Optionally, the comparison circuit includes a first comparison transistor, a second comparison transistor, a third comparison transistor and a fourth comparison transistor;

[0102] The control electrode of the first comparison transistor is electrically connected to the control electrode of the second comparison transistor, the first electrode of the first comparison transistor is electrically connected to the input terminal, and the second electrode of the first comparison transistor is electrically connected to the control terminal of the switch circuit;

[0103] The control electrode of the second comparison transistor is electrically connected to the second electrode of the second comparison transistor, the first electrode of the second comparison transistor is electrically connected to the input terminal, and the second electrode of the second comparison transistor is electrically connected to the first end of the fourth resistor;

[0104] The control electrode of the third comparison transistor is electrically connected to the start control terminal, the first electrode of the third comparison transistor is electrically connected to the control terminal of the switch circuit, and the second electrode of the third comparison transistor is electrically connected to the first voltage terminal;

[0105] The control electrode of the fourth comparison transistor is electrically connected to the control electrode of the third comparison transistor, the first electrode of the fourth comparison transistor is electrically connected to the second end of the fourth resistor, and the second electrode of the fourth comparison transistor is electrically connected to the first voltage end.

[0106] In the embodiment of the present invention, the first comparison transistor and the second comparison transistor are both P-type transistors, and the third comparison transistor and the fourth comparison transistor are both N-type transistors, but the present invention is not limited thereto.

[0107] Optionally, the switching circuit includes a switching transistor;

[0108] The control pole of the switch transistor is the control end of the switch circuit, the first pole of the switch transistor is the first end of the switch circuit, and the second pole of the switch transistor is the second end of the switch circuit.

[0109] In the embodiment of the present invention, the switch transistor may be a P-type transistor, but is not limited thereto.

[0110] Optionally, it is characterized in that the voltage control circuit includes a buffer, a voltage control transistor and a control capacitor;

[0111] The input end of the buffer is electrically connected to the first reference voltage end, and the output end of the buffer is electrically connected to the control electrode of the voltage control transistor; the buffer is used to provide the first reference voltage to the control electrode of the voltage control transistor;

[0112] The first electrode of the voltage-controlled transistor is electrically connected to the input terminal, and the second electrode of the voltage-controlled transistor is electrically connected to the voltage output terminal;

[0113] The first end of the control capacitor is electrically connected to the output end of the buffer, and the second end of the control capacitor is electrically connected to the first voltage end.

[0114] In a specific implementation, the buffer can improve the driving capability of its output end.

[0115] In the embodiment of the present invention, the voltage-controlled transistor is an N-type transistor, but not limited thereto.

[0116] like Figure 2 As shown, in Figure 1 Based on the embodiment of the voltage generating module shown, the voltage generating module further includes a start control circuit 20; the reference voltage generating circuit may include a first generating branch 21, a second generating branch 22 and a third generating branch 23;

[0117] The first generating branch 21 includes a first generating transistor Q1, a second generating transistor Q2, a first resistor R1, a second resistor R2, a first control transistor M1, a second control transistor M2 and a third control transistor M3, wherein:

[0118] The source of the first control transistor M1 is electrically connected to the input terminal, and the gate of the first control transistor M1 and the drain of the first control transistor M1 are both electrically connected to the first control terminal; the input terminal is used to provide an input voltage VIN; the first control terminal, the second control terminal and the third control terminal are electrically connected to each other;

[0119] The gate of the second control transistor M2 is electrically connected to the first control terminal, the source of the second control transistor M2 is electrically connected to the input terminal, and the drain of the second control transistor M2 is electrically connected to the collector of the first generating transistor Q1;

[0120] The gate of the third control transistor M3 is electrically connected to the start control terminal S1 and the collector of the first generating transistor Q1, the drain of the third control transistor M3 is electrically connected to the first control terminal, and the source of the third control transistor M3 is electrically connected to the base of the first generating transistor Q1 and the first end of the first resistor R1;

[0121] The emitter of the first generating transistor Q2 is electrically connected to the second end of the first resistor R1 and the ground terminal GND respectively;

[0122] A first end of the second resistor R2 is electrically connected to the drain of the third control transistor M3, and a second end of the second resistor R2 is electrically connected to the collector of the second generating transistor Q2;

[0123] The base of the second generating transistor Q2 is electrically connected to the collector of the second generating transistor Q2, and the emitter of the second generating transistor Q2 is electrically connected to the second end of the first resistor R1;

[0124] The second generating branch 22 includes a fourth control transistor M4 and a third resistor circuit R3;

[0125] The gate of the fourth control transistor M4 is electrically connected to the second control terminal, the source of the fourth control transistor M4 is electrically connected to the input terminal, and the drain of the fourth control transistor M4 is electrically connected to the ground terminal GND through the third resistor circuit R3;

[0126] The third generating circuit 23 includes a fifth control transistor M5, a sixth control transistor M6, a seventh control transistor M7, an eighth control transistor M8 and a fourth resistor R4;

[0127] The gate of the fifth control transistor M5 is electrically connected to the third control terminal, the source of the fifth control transistor M5 is electrically connected to the input terminal, and the drain of the fifth control transistor M5 is electrically connected to the first terminal of the fourth resistor R4;

[0128] The gate of the sixth control transistor M6 is electrically connected to the third control terminal, the source of the sixth control transistor M6 is electrically connected to the input terminal, and the drain of the sixth control transistor M6 is electrically connected to the source of the eighth control transistor M8;

[0129] The gate of the seventh control transistor M7 is electrically connected to the gate of the eighth control transistor M8, the drain of the seventh control transistor M7 is electrically connected to the second end of the fourth resistor R4, and the source of the seventh control transistor M7 is electrically connected to the drain of the eighth control transistor M8;

[0130] The gate of the eighth control transistor M8 is electrically connected to the drain of the eighth control transistor M8, and the source of the eighth control transistor M8 is electrically connected to the ground terminal GND;

[0131] The first end of the fourth resistor R4 is electrically connected to the second reference voltage end Vt2;

[0132] The comparison circuit 12 includes a first comparison transistor M11, a second comparison transistor M12, a third comparison transistor M13 and a fourth comparison transistor M14;

[0133] The gate of the first comparison transistor M11 is electrically connected to the gate of the second comparison transistor M12, the source of the first comparison transistor M11 is electrically connected to the input terminal, and the drain of the first comparison transistor M11 is electrically connected to the gate of the switch transistor M0;

[0134] The gate of the second comparison transistor M12 is electrically connected to the drain of the second comparison transistor M12, the source of the second comparison transistor M12 is electrically connected to the input terminal, and the drain of the second comparison transistor M12 is electrically connected to the first end of the fourth resistor R1;

[0135] The gate of the third comparison transistor M13 is electrically connected to the startup control circuit 20, the drain of the third comparison transistor M13 is electrically connected to the gate of the switch transistor M0, and the source of the third comparison transistor M13 is electrically connected to the ground terminal GND; the startup control circuit 20 is used to output a startup control current when generating a voltage, so that M1, M2, M3 and Q1 work normally;

[0136] The gate of the fourth comparison transistor M14 is electrically connected to the gate of the third comparison transistor M13, the drain of the fourth comparison transistor M14 is electrically connected to the second end of the fourth resistor R4, and the source of the fourth comparison transistor M14 is electrically connected to the ground terminal GND;

[0137] The switch circuit 13 includes a switch transistor M0;

[0138] The gate of the switch transistor M0 is the control terminal of the switch circuit 13, the source of the switch transistor M0 is the first terminal of the switch circuit 13, and the drain of the switch transistor M0 is the second terminal of the switch circuit 13;

[0139] The source of the switch transistor M0 is electrically connected to the input terminal, and the drain of the switch transistor M0 is electrically connected to the voltage output terminal O1;

[0140] The voltage control circuit 14 includes a buffer B1, a voltage control transistor M20 and a control capacitor C0;

[0141] The input terminal of the buffer B1 is electrically connected to the first reference voltage terminal Vt1, and the output terminal of the buffer B1 is electrically connected to the gate of the voltage control transistor M20; the buffer B1 is used to provide the first reference voltage Vreg to the gate of the voltage control transistor M20 to enhance the driving capability of the gate of M20 (in the embodiment of the present invention, since the size of M20 is large, the driving capability of the gate of M20 needs to be enhanced);

[0142] The drain of the voltage control transistor M20 is electrically connected to the input terminal, and the source of the voltage control transistor M20 is electrically connected to the voltage output terminal O1;

[0143] A first end of the control capacitor C0 is electrically connected to the output end of the buffer B1 , and a second end of the control capacitor C0 is electrically connected to a ground end GND.

[0144] exist Figure 2 In the illustrated embodiment, the capacitor labeled C1 is a first capacitor, a first end of C1 is electrically connected to the voltage output end O1 , and a second end of C1 is electrically connected to the ground end GND.

[0145] exist Figure 2 In the illustrated embodiment, Q1 and Q2 are NPN transistors, M1 and M2 are PMOS transistors (P-type metal-oxide-semiconductor transistors), M3 is an NMOS transistor (N-type metal-oxide-semiconductor transistor), M4 is a PMOS transistor, M5 and M6 are PMOS transistors, M7 and M8 are NMOS transistors, M11 and M12 are PMOS transistors, M13 and M14 are NMOS transistors; M0 is a PMOS transistor, and M20 is an NMOS transistor, but is not limited thereto.

[0146] exist Figure 2 In the illustrated embodiment, when voltage is generated, the start-up control circuit 20 provides a start-up control current signal, and charges the parasitic capacitance of the gate of M3 through the start-up control current signal, so as to increase the potential of the gate of M3, thereby turning on M3, M13 and M14, but not limited to this.

[0147] The present invention Figure 2 The embodiment of the voltage generating module shown in the figure is in operation.

[0148] M4 obtains Vreg by mirroring the current of M1, and the current flows through R3; the ratio of the current flowing through M4 to the current flowing through M1 is equal to the ratio K1 between the width-to-length ratio of M4 and the width-to-length ratio of M1, and the current flowing through M1 flows through R3 to obtain Vreg; by selecting the ratio of the resistance value R2z of R2 to the resistance value R1z of R1, Vreg can be made independent of temperature; wherein K1 is a positive number;

[0149] M5 generates Vldo at both ends of R4 by mirroring the current of M1 and passing the current through R4; the ratio of the current flowing through M5 to the current flowing through M1 is equal to the ratio K2 between the width-to-length ratio of M5 and the width-to-length ratio of M1. By selecting the ratio of the resistance value R2z of R2 to the resistance value R1z of R1, Vldo can be made independent of temperature; wherein K2 is a positive number;

[0150] The current flowing through R1 is equal to Vbe_Q1 / R1, and the current flowing through R2 is equal to ΔVbe / R2;

[0151] Where ΔVbe is equal to Vbe_Q2-Vbe_Q1;

[0152] The current flowing through R3 is equal to (Vbe_Q1 / R1z+ΔVbe / R2z)×K1;

[0153] When M12 is turned off, the current flowing through R4 is equal to (Vbe_Q1 / R1z+ΔVbe / R2z)×K2;

[0154] Wherein, Vreg is the first reference voltage, Vldo is the second reference voltage, Vbe_Q1 is the voltage between the base of Q1 and the emitter of Q1, Vbe_Q2 is the voltage between the base of Q2 and the emitter of Q2; ΔVbe is equal to the difference between Vbe_Q2 and Vbe_Q1;

[0155] According to the above current proportional relationship, Vreg and Vldo can be obtained, and Vreg and Vldo are independent of temperature;

[0156] When voltage is generated, under the control of the startup control current provided by S1, the relevant circuit starts to work. When VIN is less than Vldo, M11 and M12 are both turned off, the gate of M0 is connected to the ground terminal GND through M13, M0 is turned on, and the output voltage signal output by O1 is the input voltage VIN;

[0157] M11, M12, M13 and M14 form a comparator to compare VIN and Vldo. When VIN increases and the difference between VIN and Vldo is greater than the absolute value of the threshold voltage of M12, M11 and M12 are turned on, and the gate and source of M0 are both connected to VIN, and M0 is turned off. At this time, the output voltage signal output by O1 is controlled by M20, and M20 is in the saturation region (the gate-source voltage of M20 is greater than the threshold voltage Vth_m20 of M20), and the voltage value of the output voltage signal is equal to Vreg-Vth_m20. When VIN continues to increase, since M20 is always in the saturation region, O1 continues to output an output voltage signal that is not affected by VIN.

[0158] In the embodiment of the present invention, since Vbe_Q1 is negatively correlated with temperature and ΔVbe is negatively correlated with temperature, by selecting the ratio of the resistance value R2z of R2 to the resistance value R1z of R1, Vreg and Vldo can be made independent of temperature.

[0159] The present invention Figure 2When the embodiment of the voltage generating module shown is in operation, Vreg depends on the ratio of the resistance value of R3 to the resistance value of R1, and the ratio of the resistance value of R3 to the resistance value of R2, and is independent of temperature.

[0160] Optionally, the voltage generation module described in the embodiment of the present invention further includes a ninth control transistor;

[0161] The second electrode of the fourth control transistor is electrically connected to the third resistance circuit through the ninth control transistor;

[0162] The control electrode of the ninth control transistor is electrically connected to the input end of the buffer, the first electrode of the ninth control transistor is electrically connected to the second electrode of the fourth control transistor, and the second electrode of the ninth control transistor is electrically connected to the first voltage end through the third resistance circuit.

[0163] In the embodiment of the present invention, the ninth control transistor may be an N-type transistor, but is not limited thereto.

[0164] like Figure 3 As shown, in Figure 2 Based on the embodiment of the voltage generating module shown in the figure, the voltage generating module described in the embodiment of the present invention further includes a ninth control transistor M30;

[0165] M4 is electrically connected to R3 through M30;

[0166] The gate of M30 is electrically connected to the input end of the buffer B1 , the gate of M30 is electrically connected to the drain of M30 , the drain of M30 is electrically connected to the drain of M4 , and the source of M30 is electrically connected to the ground GND through the third resistance circuit R3 .

[0167] exist Figure 3 In the illustrated embodiment, M30 is an NMOS transistor, but the present invention is not limited thereto.

[0168] The present invention Figure 3 The embodiment shown in FIG. 1 is in operation with Figure 2 The working process of the embodiment shown is different in that:

[0169] When VIN increases and the difference between VIN and Vldo is greater than the absolute value of the threshold voltage of M12, M11 and M12 are turned on, then the gate and source of M0 are connected to VIN, and M0 is turned off. At this time, the output voltage signal output by O1 is controlled by M20, and M20 is in the saturation region (the gate-source voltage of M20 is greater than the threshold voltage Vth_m20 of M20). At this time, M30 is also in the saturation region, and the voltage value of the output voltage signal is equal to Vreg+Vth_m30-Vth_m20; when VIN continues to increase, since M20 is always in the saturation region, O1 continues to output an output voltage signal that is not affected by VIN.

[0170] Since M30 and M20 are transistors of the same type, Vth_m30 and Vth_m20 can be made substantially equal, so that when VIN is large, the voltage value of the output voltage signal is equal to Vreg.

[0171] The power management chip described in the embodiment of the present invention includes the above-mentioned voltage generation module.

[0172] The display device provided in the embodiment of the present invention can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc.

[0173] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A voltage generating module, characterized in that: It includes a reference voltage generating circuit, a comparison circuit, a switch circuit and a voltage control circuit, wherein: The reference voltage generating circuit is electrically connected to the input terminal, the first reference voltage terminal and the second reference voltage terminal respectively, and is used to generate the first reference voltage and the second reference voltage according to the input voltage provided by the input terminal, and output the first reference voltage through the first reference voltage terminal, and output the second reference voltage through the second reference voltage terminal; The comparison circuit is electrically connected to the input terminal and the second reference voltage terminal respectively, and is used to compare the second reference voltage with the input voltage, and when the comparison shows that the input voltage is less than the second reference voltage, provide an on control signal to the control terminal of the switch circuit, and when the comparison shows that the input voltage is greater than the second reference voltage, provide an off control signal to the control terminal of the switch circuit; The control end of the switch circuit is electrically connected to the comparison circuit, the first end of the switch circuit is electrically connected to the input end, and the second end of the switch circuit is electrically connected to the voltage output end. The switch circuit is used to control the connection between the input end and the voltage output end when the control end receives the start control signal, and is also used to control the disconnection between the input end and the voltage output end when the control end receives the shutdown control signal; The voltage control circuit is electrically connected to the first reference voltage terminal and the voltage output terminal respectively, and is used to control the output voltage signal output by the voltage output terminal according to the first reference voltage when the switch circuit controls the input terminal to be disconnected from the voltage output terminal; The voltage generation module also includes a startup control circuit; The startup control circuit is electrically connected to the startup control terminal, and is used to output a startup control current signal to the startup control terminal when generating voltage.

2. The voltage generating module according to claim 1, wherein: The reference voltage generating circuit comprises a first generating branch, a second generating branch and a third generating branch; the first generating branch comprises a first control terminal, the second generating branch comprises a second control terminal, and the third generating branch comprises a third control terminal; the first control terminal, the second control terminal and the third control terminal are electrically connected to each other; A first current flowing through the first generating branch, a second current flowing through the second generating branch, and a third current flowing through the third generating branch are equal; The first generating branch is electrically connected to the input end, and is used to generate the first current according to the input voltage; The second generating branch is electrically connected to the first reference voltage terminal, and is used to generate the second current according to the first reference voltage; The third generating branch is electrically connected to the second reference voltage terminal, and is used to generate the third current according to the second reference voltage.

3. The voltage generating module according to claim 2, wherein: The first generating branch includes a first generating transistor, a second generating transistor, a first resistor, a second resistor, a first control transistor, a second control transistor and a third control transistor, wherein: A first electrode of the first control transistor is electrically connected to the input terminal, and a control electrode of the first control transistor and a second electrode of the first control transistor are both electrically connected to the first control terminal; The control electrode of the second control transistor is electrically connected to the first control terminal, the first electrode of the second control transistor is electrically connected to the input terminal, and the second electrode of the second control transistor is electrically connected to the first electrode of the first generating transistor; The control electrode of the third control transistor is electrically connected to the start control terminal and the first electrode of the first generation transistor respectively, the first electrode of the third control transistor is electrically connected to the first control terminal, and the second electrode of the third control transistor is electrically connected to the control electrode of the first generation transistor and the first end of the first resistor respectively; The second electrode of the first generating transistor is electrically connected to the second end of the first resistor and the first voltage end respectively; The first end of the second resistor is electrically connected to the second electrode of the third control transistor, and the second end of the second resistor is electrically connected to the first electrode of the second generating transistor; The control electrode of the second generation transistor is electrically connected to the first electrode of the second generation transistor, and the second electrode of the second generation transistor is electrically connected to the second end of the first resistor; The first current is the sum of a current flowing through the first resistor and a current flowing through the second resistor.

4. The voltage generating module according to claim 3, wherein: The first generating transistor and the second generating transistor are NPN type transistors; The first control transistor and the second control transistor are P-type transistors, and the third control transistor is an N-type transistor.

5. The voltage generating module according to claim 2, wherein: The second generating branch includes a fourth control transistor and a third resistance circuit; The control electrode of the fourth control transistor is electrically connected to the second control terminal, the first electrode of the fourth control transistor is electrically connected to the input terminal, and the second electrode of the fourth control transistor is electrically connected to the first voltage terminal through the third resistance circuit; The second current is a current flowing through the third resistance circuit.

6. The voltage generating module according to claim 5, wherein: The third resistance circuit includes at least one third resistor connected in series; The fourth control transistor is a P-type transistor.

7. The voltage generating module according to claim 2, wherein: The third generating circuit includes a fifth control transistor, a sixth control transistor, a seventh control transistor, an eighth control transistor and a fourth resistor; The control electrode of the fifth control transistor is electrically connected to the third control terminal, the first electrode of the fifth control transistor is electrically connected to the input terminal, and the second electrode of the fifth control transistor is electrically connected to the first end of the fourth resistor; The control electrode of the sixth control transistor is electrically connected to the third control terminal, the first electrode of the sixth control transistor is electrically connected to the input terminal, and the second electrode of the sixth control transistor is electrically connected to the first electrode of the eighth control transistor; The control electrode of the seventh control transistor is electrically connected to the control electrode of the eighth control transistor, the first electrode of the seventh control transistor is electrically connected to the second end of the fourth resistor, and the second electrode of the seventh control transistor is electrically connected to the second electrode of the eighth control transistor; The control electrode of the eighth control transistor is electrically connected to the first electrode of the eighth control transistor, and the second electrode of the eighth control transistor is electrically connected to the first voltage terminal; The first end of the fourth resistor is electrically connected to the second reference voltage end.

8. The voltage generating module according to claim 7, wherein: The fifth control transistor, the sixth control transistor, the seventh control transistor and the eighth control transistor are P-type transistors.

9. The voltage generating module according to claim 7, wherein: The comparison circuit includes a first comparison transistor, a second comparison transistor, a third comparison transistor and a fourth comparison transistor; The control electrode of the first comparison transistor is electrically connected to the control electrode of the second comparison transistor, the first electrode of the first comparison transistor is electrically connected to the input terminal, and the second electrode of the first comparison transistor is electrically connected to the control terminal of the switch circuit; The control electrode of the second comparison transistor is electrically connected to the second electrode of the second comparison transistor, the first electrode of the second comparison transistor is electrically connected to the input terminal, and the second electrode of the second comparison transistor is electrically connected to the first end of the fourth resistor; The control electrode of the third comparison transistor is electrically connected to the start control terminal, the first electrode of the third comparison transistor is electrically connected to the control terminal of the switch circuit, and the second electrode of the third comparison transistor is electrically connected to the first voltage terminal; The control electrode of the fourth comparison transistor is electrically connected to the control electrode of the third comparison transistor, the first electrode of the fourth comparison transistor is electrically connected to the second end of the fourth resistor, and the second electrode of the fourth comparison transistor is electrically connected to the first voltage end.

10. The voltage generating module according to claim 9, wherein: The first comparison transistor and the second comparison transistor are both P-type transistors, and the third comparison transistor and the fourth comparison transistor are both N-type transistors.

11. The voltage generating module according to any one of claims 1 to 10, characterized in that: The switch circuit includes a switch transistor; The control pole of the switch transistor is the control end of the switch circuit, the first pole of the switch transistor is the first end of the switch circuit, and the second pole of the switch transistor is the second end of the switch circuit.

12. The voltage generating module according to claim 11, wherein: The switch transistor is a P-type transistor.

13. The voltage generating module according to any one of claims 1 to 10, characterized in that: The voltage control circuit includes a buffer, a voltage control transistor and a control capacitor; The input terminal of the buffer is electrically connected to the first reference voltage terminal, and the output terminal of the buffer is electrically connected to the control electrode of the voltage control transistor; The buffer is used to provide the first reference voltage to the control electrode of the voltage-controlled transistor; The first electrode of the voltage-controlled transistor is electrically connected to the input terminal, and the second electrode of the voltage-controlled transistor is electrically connected to the voltage output terminal; The first end of the control capacitor is electrically connected to the output end of the buffer, and the second end of the control capacitor is electrically connected to the first voltage end.

14. The voltage generating module according to claim 13, wherein: The voltage-controlled transistor is an N-type transistor.

15. The voltage generating module according to claim 13, wherein: It also includes a ninth control transistor; the reference voltage generating circuit includes a second generating branch; the second generating branch includes a fourth control transistor and a third resistor circuit; The control electrode of the fourth control transistor is electrically connected to the second control terminal, the first electrode of the fourth control transistor is electrically connected to the input terminal, and the second electrode of the fourth control transistor is electrically connected to the third resistance circuit through the ninth control transistor; The control electrode of the ninth control transistor is electrically connected to the input end of the buffer, the first electrode of the ninth control transistor is electrically connected to the second electrode of the fourth control transistor, and the second electrode of the ninth control transistor is electrically connected to the first voltage end through the third resistance circuit.

16. The voltage generating module according to claim 15, wherein: The ninth control transistor is an N-type transistor.

17. A power management chip, characterized in that: The method comprises a voltage generating module as claimed in any one of claims 1 to 16.

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