Display device
By using insulating resin and a sealing member of conductive balls in the display device, the upper pad and the lower pad are electrically connected, which solves the problem of large contact resistance between the pad and the leads of the printed circuit board, and improves the display performance.
Patent Information
- Application Number
- CN202010686829.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-09-02
- Filing Date
- 2020-07-16
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2040-07-16
AI Technical Summary
In the area of the driving IC or other printed circuits present on the periphery of the glass substrate of the display device, the contact resistance between the pad and the leads of the printed circuit board is large, which affects the display performance.
A sealing member including an insulating resin and a conductive ball dispersed in the insulating resin is used to electrically connect the upper pad and the lower pad through the conductive ball to reduce the contact resistance.
Effectively reduce the contact resistance between the pad of the display panel and the leads of the printed circuit board, and improve the display performance.
Smart Images

Figure CN112447797B_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0108399, filed on September 2, 2019, which is hereby incorporated by reference for all purposes as if fully set forth herein. Technical Field
[0003] Exemplary embodiments of the present disclosure generally relate to a display device. Background Art
[0004] With the development of multimedia technology, display devices have become increasingly important. Therefore, various display devices such as liquid crystal display (LCD) devices and organic light emitting diode display (OLED) devices are currently being developed.
[0005] There is an area on the periphery of the glass substrate of the display device where a driver IC or other printed circuits are arranged. This area can be called a "frame", which is a non-display area where no image is displayed.
[0006] The above information disclosed in this Background section is only for understanding the background of the present inventive concept and therefore the above information may contain information that does not constitute the prior art. Summary of the invention
[0007] Exemplary embodiments of the present disclosure provide a display device in which a contact resistance between a pad of a display panel and a lead of a printed circuit board disposed at one side of the display panel is reduced.
[0008] Additional features of the inventive concept will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concept.
[0009] An exemplary embodiment of the present disclosure provides a display device, the display device comprising: a first substrate including a first base substrate and a lower pad disposed on one end of the first base substrate; a second substrate disposed above the first substrate, and the second substrate including a second base substrate and an upper pad disposed on one end of the second base substrate; a side pad electrically connected to the lower pad and the upper pad; and a sealing member disposed between the first substrate and the second substrate. The sealing member comprises an insulating resin and conductive balls dispersed in the insulating resin, and the upper pad and the lower pad are electrically connected to each other through the conductive balls.
[0010] The first substrate may include a display area and a non-display area positioned around the display area, and the sealing member, the lower pad, and the upper pad may be disposed in the non-display area.
[0011] The first substrate may include: a first conductive layer disposed on the first base substrate and including a gate electrode of a thin film transistor; and a second conductive layer disposed on the first conductive layer and including a source electrode and a drain electrode of the thin film transistor. The lower pad may include a first lower pad and a second lower pad disposed on the first lower pad, and the first conductive layer may include the first lower pad, and the second conductive layer may include the second lower pad.
[0012] An outer surface of the first lower pad, an outer surface of the second lower pad, and an outer surface of the upper pad may be aligned with each other in a thickness direction.
[0013] The first substrate may further include: a first insulating layer disposed between the first conductive layer and the second conductive layer; a second insulating layer disposed on the second conductive layer; and a color filter disposed between the second insulating layer and the first insulating layer, and the color filter may be disposed in the display area.
[0014] The first substrate may further include a first column spacer disposed on the same layer as the color filter and overlapping the lower pad, and the second substrate may further include a second column spacer disposed between the first column spacer and the upper pad.
[0015] The first column spacer may be in direct contact with the second column spacer.
[0016] An outer surface of the first column spacer and an outer surface of the second column spacer may be positioned closer to the inside than an outer surface of the upper pad and an outer surface of the lower pad.
[0017] The side surface pad may be in direct contact with the outer surface of the first column spacer and the outer surface of the second column spacer.
[0018] The first lower pad may be in direct contact with the second lower pad.
[0019] The first substrate may further include a third conductive layer disposed on the second conductive layer and including a pixel electrode defining each pixel in the display area.
[0020] The first substrate may further include a connection electrode disposed between the sealing member and the second insulating layer, and the third conductive layer may include the connection electrode. The connection electrode penetrates the second insulating layer and the first insulating layer to be connected to the first lower pad.
[0021] The conductive ball of the sealing member may electrically connect the connection electrode and the upper pad.
[0022] The lower pad may further include a third lower pad disposed between the first column spacer and the second column spacer, and the third conductive layer may further include the third lower pad.
[0023] The second insulating layer may extend between the first column spacer and the second lower pad.
[0024] The lower pad may further include a third lower pad disposed between the first column spacer and the second column spacer, and the third lower pad may be connected to the second lower pad through a contact hole formed penetrating the second insulating layer.
[0025] The second lower pad may be connected to the first lower pad through a contact hole penetrating the first insulating layer.
[0026] The second substrate may further include a common electrode disposed on the second base substrate, and the common electrode and the upper pad may be disposed on the same layer and may be spaced apart from each other.
[0027] Another exemplary embodiment provides a display device, the display device comprising: a first substrate including a first base substrate; a first conductive layer disposed on the first base substrate, and the first conductive layer includes a gate electrode and a first lower pad of a thin film transistor; a first insulating layer disposed on the first conductive layer; a second conductive layer disposed on the first insulating layer, and the second conductive layer includes a source electrode and a drain electrode of the thin film transistor and a second lower pad disposed on the first lower pad; a second insulating layer disposed on the second conductive layer; and a third conductive layer disposed on the second insulating layer, and the third conductive layer includes a pixel electrode connected to the source electrode or the drain electrode of the thin film transistor; and a second substrate disposed above the first substrate, and the second substrate includes: a second base substrate and an upper pad disposed on the second base substrate; a side pad electrically connected to the lower pad and the upper pad; and a sealing member disposed between the first substrate and the second substrate. The sealing member includes an insulating resin and conductive balls dispersed in the insulating resin, and the first substrate also includes a connecting electrode arranged between the sealing member and the second insulating layer, the connecting electrode is connected to the first lower pad through the second insulating layer and the first insulating layer, and the connecting electrode and the upper pad are electrically connected to each other through the conductive balls.
[0028] The display device may further include a printed circuit board attached to the side pad.
[0029] The connection electrode may be disposed on the same layer as the pixel electrode.
[0030] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] The accompanying drawings are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the disclosure and together with the description serve to explain the inventive concept.
[0032] Figure 1 is a perspective view of a display device according to an exemplary embodiment of the present disclosure.
[0033] Figure 2 yes Figure 1 An exploded perspective view of a portion of a display device shown in FIG.
[0034] Figure 3 is a cross-sectional view of a first pixel, a second pixel, and a third pixel.
[0035] Figure 4 It is along Figure 1 A cross-sectional view taken along line IV-IV'.
[0036] Figure 5 yes Figure 1 Different cross-sectional views of a display device.
[0037] Figure 6 is relative to Figure 4 A cross-sectional view of one end of a display panel.
[0038] Figure 7 yes Figure 4 Another cross-sectional view of a display panel.
[0039] Figure 8 is a cross-sectional view for illustrating application of a first signal and a second signal through a printed circuit board.
[0040] Fig. 9 is a cross-sectional view of a display device according to another exemplary embodiment of the present disclosure.
[0041] Fig.10 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0042] Fig.11 is relative to Fig.10 A cross-sectional view of one end of a display panel.
[0043] Fig.12 yes Fig.10 Another cross-sectional view of a display panel.
[0044] Fig.13 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0045] Fig.14 yes Fig.13 A cross-sectional view of a display panel.
[0046] Fig.15 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0047] Fig.16 is relative to Fig.15 A cross-sectional view of one end of a display panel.
[0048] Fig.17 yes Fig.15 Another cross-sectional view of a display panel.
[0049] Fig.18 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0050] Fig.19is relative to Fig.18 A cross-sectional view of one end of a display panel.
[0051] Fig. 20 yes Fig.18 Another cross-sectional view of a display panel.
[0052] Fig.21 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0053] Fig. 22 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0054] Fig.23 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0055] Fig.24 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0056] Fig.25 is a perspective view of a display device according to still another exemplary embodiment of the present disclosure. DETAILED DESCRIPTION
[0057] In the following description, for the purpose of illustration, many specific details are set forth in order to provide a thorough understanding of various exemplary embodiments of the present disclosure. As used herein, an "embodiment" is a non-limiting example of a device or method using one or more inventive concepts disclosed herein. However, it is apparent that various exemplary embodiments may be practiced without these specific details or with one or more equivalent arrangements. In other cases, well-known structures and devices are shown in the form of block diagrams to avoid unnecessary confusion of various exemplary embodiments. In addition, various exemplary embodiments may be different, but need not be exclusive. For example, without departing from the inventive concept, the specific shape, configuration, and characteristics of an exemplary embodiment may be used or implemented in another exemplary embodiment.
[0058] Unless otherwise specified, the exemplary embodiments shown will be understood as providing exemplary features of variable details of some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects of various embodiments (hereinafter, individually or collectively referred to as "elements") can be combined, separated, interchanged and / or rearranged in other ways without departing from the inventive concept.
[0059] The use of cross-hatching and / or shading is often provided in the drawings to clarify the boundaries between adjacent elements. Thus, unless otherwise specified, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between the elements shown, and / or any other characteristic, attribute, property, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the exemplary embodiments can be implemented differently, a specific process sequence can be performed differently from the described sequence. For example, two processes described in succession can be performed substantially simultaneously, or in an order opposite to the described sequence. In addition, the same figure numerals refer to the same elements.
[0060] When an element or layer is referred to as being "on" another element or layer, "connected to" or "coupled to" another element or layer, the element or layer may be directly on, directly connected to or directly coupled to the other element or layer, or there may be intermediate elements or layers. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to" or "directly coupled to" another element or layer, there are no intermediate elements or layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection and / or a fluid connection with or without intermediate elements. In addition, the DR1 axis, the DR2 axis and the DR3 axis are not limited to the three axes of a rectangular coordinate system such as the x-axis, the y-axis and the z-axis, and may be interpreted in a broader sense. For example, the DR1 axis, the DR2 axis and the DR3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0061] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Thus, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element.
[0062] For descriptive purposes, spatially relative terms such as "under," "below," "below," "down," "above," "up," "above," "higher," and "side" (e.g., as in "sidewall") may be used herein to describe the relationship of one element to another element(s) as shown in the accompanying drawings. In addition to the orientations depicted in the accompanying drawings, spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the accompanying drawings is flipped, an element described as "under" or "beneath" other elements or features would subsequently be oriented "above" the other elements or features. Thus, the exemplary term "under" can encompass both above and below orientations. In addition, the device may be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and as such, the spatially relative descriptors used herein are interpreted accordingly.
[0063] The term used herein is for the purpose of describing specific embodiments, and is not intended to be limited. As used herein, unless the context clearly indicates otherwise, the singular form "one", "a kind of" and "the (the)" are also intended to include plural forms. In addition, when used in this specification, the term "includes", "comprising", "containing" and / or "having" illustrate the existence of stated features, integral bodies, steps, operations, elements, components and / or their groups, but do not exclude the existence or addition of one or more other features, integral bodies, steps, operations, elements, components and / or their groups. It is also noted that, as used herein, the term "substantially", "about" and other similar terms are used as approximate terms rather than degree terms, so as to explain the inherent deviations of measured values, calculated values and / or provided values that will be recognized by those of ordinary skill in the art.
[0064] Various exemplary embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of idealized exemplary embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances are anticipated. Therefore, the exemplary embodiments disclosed herein should not necessarily be construed as limited to the shapes of the specifically illustrated regions, but will include deviations in shape due to, for example, manufacturing. In this manner, the regions illustrated in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of regions of the device, and as such, are not necessarily intended to be limiting.
[0065] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. Unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formalized sense.
[0066] Hereinafter, exemplary embodiments of the present disclosure will be described with reference to the accompanying drawings.
[0067] Figure 1 is a perspective view of a display device according to an exemplary embodiment of the present disclosure. Figure 2 yes Figure 1 An exploded perspective view of a portion of a display device shown in FIG.
[0068] In the following description, a liquid crystal display device including a liquid crystal layer is adopted as a display device, but the inventive concept is not limited thereto.
[0069] The display device according to the exemplary embodiment of the present disclosure can be used in large electronic devices such as televisions and electronic bulletin boards, and in small and medium-sized electronic devices such as personal computers, laptop computers, car navigation devices, and cameras. In addition, the display device can be used in tablet PCs, smart phones, personal digital assistants (PDAs), portable multimedia players (PMPs), game devices, wristwatch-type electronic devices, etc. The electronic devices listed above are only exemplary, and the display device can be used in other electronic devices.
[0070] Reference Figure 1 , the display device 1 according to an exemplary embodiment may have a rectangular shape having long sides and short sides. For example, the long sides of the display device 1 may extend in the first direction DR1, and the short sides of the display device 1 may extend in the second direction DR2. Although the corner where the long side and the short side of the display device 1 meet may form a right angle, this is merely exemplary. The display device 1 may have rounded corners.
[0071] In some exemplary embodiments, the shape of the display device 1 when viewed from the top in a plan view may include a square, a circle, an oval, or other polygonal shapes.
[0072] In some exemplary embodiments, the display device 1 may be adopted by a spliced display device (a public information display (PID) or a spliced display (TD)). In this case, the long sides or short sides of each display device 1 of the spliced display device may be connected to each other. Some display devices 1 may form one side of the spliced display device, some other display devices 1 may be positioned at the corners of the spliced display device to form two adjacent sides, and some other display devices 1 may be positioned inside the spliced display device and surrounded by other display devices 1. The display devices 1 may have different frame shapes depending on the position, or may have the same frame shape.
[0073] In an exemplary embodiment, a plurality of display devices 1 may be arranged in a lattice pattern, but the inventive concept is not limited thereto. The display devices 1 may be connected in the first direction DR1 or the second direction DR2, or may be connected in a specific pattern. The display devices 1 may have the same size, but the inventive concept is not limited thereto. The display devices 1 may have different sizes.
[0074] The spliced display device may have a flat shape, but the inventive concept is not limited thereto. The spliced display device may have a three-dimensional shape to provide a three-dimensional effect. When the spliced display device has a three-dimensional shape, each display device 1 included in the spliced display device may have a curved shape, or may be connected to each other in a planar shape or at a predetermined angle, so that the spliced display device can be formed in a three-dimensional shape.
[0075] The frames of the multiple display devices 1 may be directly connected to each other, or may be connected to each other through a connecting member (not shown). In this way, since the display devices 1 are connected to each other in the spliced display device, the two frames of the adjacent display devices 1 are arranged together at each connection portion. Therefore, each display device 1 needs to have a thin frame. To this end, a side connection pad may be provided.
[0076] Hereinafter, the display device 1 according to the exemplary embodiment of the present disclosure, which can be used alone, will be described in detail.
[0077] Reference Figure 1 , each display device 1 may include a display panel, a backlight unit BLU disposed under the display panel, a printed circuit board 400 disposed on a side surface of the display panel, and a main circuit board 600 connected to the printed circuit board 400 .
[0078] The display panel may include a first substrate 100 , a liquid crystal layer 200 , and a second substrate 300 .
[0079] The first substrate 100, the second substrate 300, and the backlight unit BLU may have a rectangular shape having a long side in a first direction DR1 and a short side in a second direction DR2 perpendicular to the first direction DR1. However, it will be understood that the shapes of the first substrate 100, the second substrate 300, and the backlight unit BLU are not limited thereto. Some portions of the first substrate 100, the second substrate 300, and the backlight unit BLU may have curved portions as needed.
[0080] The backlight unit BLU may generate light and may provide the generated light to the first substrate 100, the liquid crystal layer 200, and the second substrate 300. The display panel including the first substrate 100, the liquid crystal layer 200, and the second substrate 300 may generate an image using the light provided from the backlight unit BLU and may provide the image to the outside.
[0081] The first substrate 100 may include a display area DA that displays an image and a non-display area NDA that does not display an image. The non-display area NDA may, for example, surround the display area DA. Although not shown in the drawings, the display device 1 may further include a window member on the second substrate 300 that covers the display panel and transmits the image to the outside. Figure 2 As shown in , a plurality of pixels PX1, PX2, and PX3 may be provided in the display area DA. The plurality of pixels PX1, PX2, and PX3 may be arranged in a matrix along a first direction DR1 and a second direction DR2. The first pixel PX1 may emit light in a red wavelength range (e.g., a peak wavelength of about 610 to 650 nm). The second pixel PX2 may emit light in a green wavelength range (e.g., a peak wavelength of about 510 to 550 nm). The third pixel PX3 may emit light in a blue wavelength range (e.g., a peak wavelength of about 430 to 470 nm).
[0082] The pixels PX1 , PX2 , and PX3 in the display area DA are illustrated as being repeatedly arranged in the first direction DR1 , but the inventive concept is not limited thereto.
[0083] A non-emission area PB may be provided around each of the pixels PX1, PX2, and PX3 in the display area DA (see Figure 3 ). When viewed from the top in a plan view, the non-exit area PB may surround each of the pixels PX1, PX2, and PX3 in the display area DA.
[0084] As described below, each of the pixels PX1, PX2, and PX3 in the display area DA may be defined as a pixel electrode 161 (see FIG. 1 ) connected to the first substrate 100. Figure 3) overlaps with the light shielding pattern 310 (see FIG. 2 ). Generally, each of the pixels PX1, PX2, and PX3 refers to an area from which light provided from the first substrate 100 can be emitted. However, as will be described below, a portion of each of the pixels PX1, PX2, and PX3 may overlap with the light shielding pattern 310 (see FIG. 2 ). Figure 3 In a portion of each of the pixels PX1, PX2, and PX3 that overlaps with the light shielding pattern 310, light provided from the first substrate 100 may not be emitted.
[0085] In the non-display area NDA, a sealing member SEAL (see FIG. 1 ) coupling the first substrate 100 and the second substrate 300 may be disposed. Figure 4 ). In other words, the sealing member SEAL may be disposed between the first substrate 100 and the second substrate 300. The sealing member SEAL will be described in detail later.
[0086] The backlight unit BLU may be, for example, an edge type backlight unit or a direct type backlight unit, but exemplary embodiments of the present disclosure are not limited thereto.
[0087] Although not shown in the drawings, the first substrate 100 may include a plurality of lower pads 123 and 135 (see Figure 4 ), the plurality of lower pads 123 and 135 are oriented toward Figure 1 and Figure 2 The lower pads 123 and 135 (see FIG. 1 ) extend from one end of the display panel (one end of the long side in the second direction DR2) shown in FIG. Figure 4 ) may extend from the display area DA of the first substrate 100 to the non-display area NDA located at one end of the display panel. More than one first lower pad 123 may be provided. The plurality of first lower pads 123 may be electrically connected to the thin film transistors of the pixels PX1, PX2, and PX3, respectively.
[0088] The first lower pads 123 may be spaced apart from each other along the first direction DR1. As the first lower pads 123 are aligned with more than one second lower pads 135 in the thickness direction, more than one second lower pads 135 may be respectively disposed on the first lower pads 123, and the second lower pads 135 may be spaced apart from each other in the first direction DR1.
[0089] The printed circuit board 400 may be disposed on a side surface of one end (long side) of the display panel. Figure 1 As shown in FIG. 4 , more than one printed circuit board 400 may be provided. The printed circuit boards 400 may be spaced apart from each other in the first direction DR1.
[0090] However, it will be understood that the inventive concept is not limited thereto. The printed circuit board 400 may be disposed on the long side of one end of the display panel and the long side of the other end of the display panel, and may also be disposed on the short side of the display panel. In addition, the printed circuit board 400 may be disposed on the long side and the short side of the display panel, respectively.
[0091] Each printed circuit board 400 may include a driver integrated circuit 450. The driver integrated circuit 450 may be used as a data driver chip. According to an exemplary embodiment of the present disclosure, the driver integrated circuit 450 is used as a data driver chip and is used as a chip on film (COF) formed on the printed circuit board 400.
[0092] The main circuit board 600 may be connected to the printed circuit board 400. The main circuit board 600 may include, for example, a timing controller (not shown). The timing controller may be mounted on the main circuit board 600 in the form of an integrated circuit chip and electrically connected to the driving integrated circuit 450. The timing controller may output a gate control signal, a data control signal, and image data.
[0093] The driving integrated circuit 450 may receive image data and a data control signal from the timing controller. The driving integrated circuit 450 may generate an analog data voltage corresponding to the image data in response to the data control signal to output the analog data voltage. Each of the pixels PX1, PX2, and PX3 in the display area DA may receive a data voltage in response to a gate signal provided through a gate line of the first substrate 100. Each of the pixels PX1, PX2, and PX3 represents a grayscale corresponding to the data voltage, thereby controlling the transmittance of the area in which the pixels PX1, PX2, and PX3 are disposed.
[0094] Figure 3 is a cross-sectional view showing a first pixel, a second pixel, and a third pixel. Figure 4 It is along Figure 1 A cross-sectional view taken along line IV-IV'. Figure 5 are different cross-sectional views of the display device. Figure 3 Not only the pixels PX1 , PX2 , and PX3 but also the non-exit region PB located adjacent to each of the pixels PX1 , PX2 , and PX3 is shown. Figure 4 is a cross-sectional view of a portion in which lower pads 123 and 135 of the first substrate 100 are disposed. Figure 5 is a cross-sectional view of a portion where the lower pads 123 and 135 are not provided.
[0095] Reference Figure 1 as well as Figures 3 to 5, the display panel may include a first substrate 100, a second substrate 300 disposed over the first substrate 100, and a liquid crystal layer 200 disposed between the first substrate 100 and the second substrate 300. The display panel may further include a sealing member SEAL and columnar spacers CS and 147 disposed between the first substrate 100 and the second substrate 300. The first substrate 100 and the second substrate 300 may be disposed over the display area DA and the non-display area NDA positioned around the display area DA.
[0096] The first substrate 100 may include a first base substrate 101, a buffer layer 102 disposed on the first base substrate 101, a semiconductor layer 105 disposed on the buffer layer 102, a first insulating layer 111 disposed on the semiconductor layer 105, a first conductive layer disposed on the first insulating layer 111, a second insulating layer 112 disposed on the first conductive layer, a second conductive layer disposed on the second insulating layer 112, color filters 141, 143 and 145 disposed on the second conductive layer, a third insulating layer 150 disposed on the color filters 141, 143 and 145, a third conductive layer disposed on the third insulating layer 150, and a lower alignment layer 170 and a second dam DAM2 disposed on the third conductive layer.
[0097] In an exemplary embodiment, the first base substrate 101 may be a transparent insulating substrate. Herein, the transparent insulating substrate may include a glass material, a quartz material, or a transparent plastic material. According to another exemplary embodiment, the first base substrate 101 may be a flexible substrate, or may have a shape in which a plurality of films, etc. are stacked.
[0098] The buffer layer 102 may be disposed on the first base substrate 101. The buffer layer 102 may prevent moisture and oxygen from penetrating into the first base substrate 101 from the outside. The buffer layer 102 may include silicon nitride (SiN x ) layer, silicon oxide (SiO 2 ) layer and silicon oxynitride (SiO x N y ) layers.
[0099] The semiconductor layer 105 may be disposed on the buffer layer 102. The semiconductor layer 105 forms a channel of a thin film transistor. The semiconductor layer 105 may be disposed in each of the pixels PX1, PX2, and PX3 in the display area DA, and in some embodiments may be disposed in the non-display area NDA. The semiconductor layer 105 may include a source / drain region and an active region. The semiconductor layer 105 may include polycrystalline silicon, but is not limited to polycrystalline silicon.
[0100] The first insulating layer 111 may be disposed on the semiconductor layer 105. The first insulating layer 111 may be disposed on the entire surface of the first base substrate 101. The first insulating layer 111 may be a gate insulating layer having a gate insulating function. The first insulating layer 111 may include a silicon compound, a metal oxide, and the like. For example, the first insulating layer 111 may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide, and the like. Silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide, and the like may be used alone or in combination.
[0101] The first conductive layer may be disposed on the first insulating layer 111. The first conductive layer may include a gate electrode 121 of a thin film transistor and a first lower pad 123. The gate electrode 121 may be disposed in each of the pixels PX1, PX2, and PX3.
[0102] The first lower pad 123 may be disposed across the display area DA and the non-display area NDA. The first lower pad 123 may extend to one end of the first base substrate 101 adjacent to the printed circuit board 400. The outer surface of the first lower pad 123 may be aligned with the side surface of one end of the first base substrate 101.
[0103] The first conductive layer may include at least one metal selected from the group consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W) and copper (Cu). The first conductive layer may be composed of a single layer or a plurality of layers of the materials listed above.
[0104] The second insulating layer 112 may be disposed on the first conductive layer. The second insulating layer 112 may insulate the first conductive layer from the second conductive layer. The second insulating layer 112 may be selected from the materials of the first insulating layer 111 listed above. The second insulating layer 112 may be disposed on the entire surface of the display area DA and a portion of the non-display area NDA. The second insulating layer 112 may expose the upper surface of the first lower pad 123 at one end of the non-display area NDA.
[0105] The second conductive layer may be disposed on the second insulating layer 112. The second conductive layer may include a source electrode 131, a drain electrode 133, and a second lower pad 135 of the thin film transistor. The source electrode 131 and the drain electrode 133 may be electrically connected to the source region and the drain region of the semiconductor layer 105 through contact holes penetrating the second insulating layer 112 and the first insulating layer 111, respectively.
[0106] The second conductive layer may include at least one selected from the group consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W) and copper (Cu). The second conductive layer may be composed of a single layer of the materials listed above. However, it will be understood that the inventive concept is not limited thereto. The second conductive layer may be a stack of multiple layers. For example, the second conductive layer may have a stack structure of Ti / Al / Ti, Mo / Al / Mo, Mo / AlGe / Mo and Ti / Cu.
[0107] The second lower pad 135 may be disposed in the non-display area NDA, may overlap the first lower pad 123 in the thickness direction, and may directly contact the first lower pad 123 in line with the first lower pad 123 in the thickness direction.
[0108] Although the second insulating layer 112 is illustrated as being in contact with the inner surface of the second lower pad 135 , this is merely exemplary.
[0109] Color filters 141 , 143 , and 145 may be disposed on the second conductive layer.
[0110] The color filters 141 , 143 , and 145 may include a first color filter 141 disposed in the first pixel PX1 , a second color filter 143 disposed in the second pixel PX2 , and a third color filter 145 disposed in the third pixel PX3 .
[0111] The light may have a wavelength range of red light after it has passed through the first color filter 141; the light may have a wavelength range of green light after it has passed through the second color filter 143; and the light may have a wavelength range of blue light after it has passed through the third color filter 145. However, the color of the light after passing through the color filters 141, 143, and 145 is not limited to the primary colors (red, green, and blue). Each of the color filters 141, 143, and 145 may reproduce one of cyan, magenta, yellow, and white. The first to third color filters 141 to 145 may be formed of different materials that display different colors.
[0112] According to an exemplary embodiment of the present disclosure, a first column spacer 147 may be disposed in the non-display area NDA. The first column spacer 147 may be disposed on the same layer as the color filters 141, 143, and 145. The first column spacer 147 may be made of the same material as the first color filter 141. In some exemplary embodiments, the first column spacer 147 may be made of the same material as the second color filter 143 or the third color filter 145.
[0113] The first column spacer 147 may overlap the second lower pad 135 in the thickness direction. The first column spacer 147 may serve to maintain a certain distance between the first substrate 100 and the second substrate 300 together with a second column spacer CS to be described later.
[0114] The third insulating layer 150 may be disposed on the color filters 141, 143, and 145. The third insulating layer 150 may insulate the second conductive layer from the third conductive layer. The third insulating layer 150 may include an organic insulating material. The organic insulating material may include at least one of the following materials: polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, benzocyclobutene (BCB), etc.
[0115] The third insulating layer 150 may be disposed in the display area DA and in a portion of the non-display area NDA. The third insulating layer 150 may not overlap the second lower pad 135 in the thickness direction. The outer surface of the third insulating layer 150 may be aligned with the inner surface of the second lower pad 135 in the thickness direction.
[0116] The third conductive layer may be disposed on the third insulating layer 150. The third conductive layer may include a pixel electrode 161 connected to the thin film transistor of the pixels PX1, PX2, and PX3 and a connection electrode 163 disposed to overlap with the sealing member SEAL. A region in the display area DA in which the pixel electrode 161 is disposed may be defined as each of the pixels PX1, PX2, and PX3 as described above. The pixel electrode 161 may be electrically connected to the source electrode 131 or the drain electrode 133 of the thin film transistor.
[0117] The third conductive layer may include a transparent conductive material. Examples of the transparent conductive material include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 )wait.
[0118] The connection electrode 163 may be electrically connected to the first lower pad 123 through a contact hole penetrating the third insulating layer 150 and the second insulating layer 112 .
[0119] The lower alignment layer 170 and the second dam DAM2 may be disposed on the third conductive layer. The lower alignment layer 170 may be disposed above each of the pixels PX1, PX2, and PX3 and the non-exit region PB positioned around the pixels PX1, PX2, and PX3. The lower alignment layer 170 may induce an initial alignment of liquid crystal molecules in the liquid crystal layer 200. For example, the lower alignment layer 170 may include a polymer organic material having an imide group in a repeating unit of a main chain.
[0120] The lower alignment layer 170 may completely cover the pixel electrode 161 , and may partially extend outward.
[0121] The second dam DAM2 may serve to prevent a material of the lower alignment layer 170 from flowing downward to the non-display area NDA. The second dam DAM2 may be in contact with a side surface of the lower alignment layer 170.
[0122] The second dam DAM2 may be directly disposed on the upper surface of the third insulating layer 150 , but the inventive concept is not limited thereto.
[0123] The first substrate 100 may further include a bottom polarizing layer BPOL disposed under the first base substrate 101 .
[0124] The second substrate 300 may include a second base substrate 301 , a light shielding pattern 310 disposed on the second base substrate 301 , a fourth conductive layer disposed on the light shielding pattern 310 , and an upper alignment layer 330 and a first dam DAM1 disposed on the fourth conductive layer.
[0125] The second base substrate 301 may face the first base substrate 101. The second base substrate 301 may be made of transparent glass, plastic, etc., and may be made of the same material as the first base substrate 101 in an exemplary embodiment.
[0126] The light shielding pattern 310 may be disposed on the second base substrate 301. The light shielding pattern 310 may be disposed so as to overlap the non-exit area PB and the non-display area NDA. The light shielding pattern 310 may overlap a portion of each of the pixels PX1, PX2, and PX3.
[0127] The light shielding pattern 310 can block light from traveling toward the non-exit area PB and the non-display area NDA. The material of the light shielding pattern 310 is not specifically limited as long as the material can block light. According to an exemplary embodiment of the present disclosure, the light shielding pattern 310 can be made of a photosensitive composition, an organic material, or a metal material. According to an exemplary embodiment of the present disclosure, the photosensitive composition may include an adhesive resin, a polymerizable monomer, a polymerizable oligomer, a pigment, a dispersant, and the like. The metal material may include chromium, and the like.
[0128] The fourth conductive layer may include a common electrode 320 disposed in the display area DA and an upper pad 340 disposed in the non-display area NDA.
[0129] At least a portion of the common electrode 320 may overlap with the pixel electrode 161 in each of the pixels PX1, PX2, and PX3. The common electrode 320 may have, for example, a shape of a single continuous plate. However, it will be understood that the inventive concept is not limited thereto. The common electrode 320 may include a plurality of slits. In an exemplary embodiment, the common electrode 320 may be made of a transparent conductive material such as ITO and IZO or a reflective metal such as aluminum, silver, chromium, or an alloy thereof.
[0130] The upper pad 340 may be disposed in the non-display area NDA. The upper pad 340 may be disposed on the same layer as the common electrode 320 and may be made of the same material as the common electrode 320. The upper pad 340 may overlap the sealing member SEAL and the first column spacer CS.
[0131] An upper alignment layer 330 and a first dam DAM1 may be disposed on the fourth conductive layer. The upper alignment layer 330 may induce an initial alignment of liquid crystal molecules in the liquid crystal layer 200. The upper alignment layer 330 may be made of, for example, the same material as the lower alignment layer 170. The upper alignment layer 330 may be disposed above each of the pixels PX1, PX2, and PX3 and a non-exit region PB positioned around the pixels PX1, PX2, and PX3.
[0132] The upper alignment layer 330 may cover a portion of the common electrode 320 .
[0133] The first dam DAM1 may serve to prevent a material of the upper alignment layer 330 from flowing downward to the non-display area NDA. The first dam DAM1 may be in contact with a side surface of the upper alignment layer 330.
[0134] The first dam DAM1 may be directly disposed on the lower surface of the common electrode 320 , but the inventive concept is not limited thereto.
[0135] The second substrate 300 may further include a top polarizing layer UPOL disposed on the second base substrate 301 .
[0136] The top polarizing layer UPOL and the bottom polarizing layer BPOL may be disposed in the display area DA and the non-display area NDA, but the inventive concept is not limited thereto.
[0137] The liquid crystal layer 200 may be disposed between the first substrate 100 and the second substrate 300. The liquid crystal layer 200 may be disposed in the display area DA.
[0138] The sealing member SEAL may be disposed between the first substrate 100 and the second substrate 300. The sealing member SEAL may be disposed in the non-display area NDA and disposed outside the liquid crystal layer 200.
[0139] The sealing member SEAL may overlap with the common electrode 320 and the upper pad 340 to be in direct contact with the common electrode 320 and the upper pad 340, and may be in direct contact with the light shielding pattern 310 at a space between the common electrode 320 and the upper pad 340. In addition, the sealing member SEAL may overlap with and contact the third insulating layer 150 and the connection electrode 163.
[0140] The sealing member SEAL may prevent the liquid crystal layer 200 from flowing downward to the non-display area NDA.
[0141] like Figure 4 As shown in , the sealing member SEAL may include a resin layer RL and conductive balls CB dispersed in the resin layer RL. There may be a plurality of conductive balls CB.
[0142] The conductive balls CB may be used to electrically connect the upper pads 340 with the connection electrodes 163 .
[0143] The second column spacer CS may be further disposed in the non-display area NDA located outside the sealing member SEAL. The second column spacer CS may overlap the first column spacer 147 in the thickness direction and may be in direct contact with the first column spacer 147.
[0144] The outer surfaces of the first lower pad 123, the second lower pad 135, and the upper pad 340 may be aligned with each other in the thickness direction, and the outer surfaces may be positioned closer to the outside than the outer surfaces of the column spacers CS and 147. In other words, the outer surfaces of the column spacers CS and 147 may be positioned closer to the inside than the outer surfaces of the first lower pad 123, the second lower pad 135, and the upper pad 340. The outer surfaces of the column spacers CS and 147 may be aligned with each other in the thickness direction.
[0145] According to an exemplary embodiment of the present disclosure, the display panel may further include a side pad SPAD disposed on a side surface of one end of each of the first substrate 100 and the second substrate 300. There may be a plurality of side pads SPAD. The side pads SPAD may be Figure 1 The side pads SPAD may be electrically connected to the lower pads 123 and 135 and the upper pad 340, respectively.
[0146] That is, the side pads SPAD may be in direct contact with the outer surfaces of the lower pads 123 and 135 and the upper pads 340 and the outer surfaces of other insulating layers of the first substrate 100 and the outer surfaces of other elements of the second substrate 300. In addition, the side pads SPAD may be in direct contact with the outer surfaces of the columnar spacers CS and 147.
[0147] The side pad SPAD may include a conductive material, and examples of the conductive material may include, but are not limited to, silver (Ag), copper (Cu), and gold (Au).
[0148] The printed circuit board 400 may be disposed on the side pad SPAD. The printed circuit board 400 may include a plurality of leads. The leads may be Figure 1 The leads are spaced apart from each other in the first direction DR1. Each lead can be coupled to another lead in the second direction DR2 via a coupling member AM between the lead itself and the respective side pad SPAD. The coupling member AM may include an anisotropic conductive film ACF. That is, the side pad SPAD may be electrically connected to the lead through the anisotropic conductive film ACF.
[0149] from Figure 5 It can be seen that outer surfaces of the column spacers CS and 147 may be aligned with side surfaces of other elements of the first and second substrates 100 and 300 in regions where the lower pads 123 and 135 and the upper pad 340 are not disposed.
[0150] Figure 6 is relative to Figure 4 A cross-sectional view of one end of a display panel. Figure 7 yes Figure 4 Another cross-sectional view of a display panel. Figure 6 and Figure 7 In the cross-sectional view of FIG. 1 , for the sake of convenience, the side pads SPAD of the display panel are not depicted. Figure 6 The cross-sectional view shows one end of the first substrate 100 and the second substrate 300 described above with respect to the second direction DR2 (a region where the lower pads 123 and 135 and the upper pad 340 are disposed but the column spacers CS and 147 are not disposed). Figure 7 The cross-sectional view shows one end of the first substrate 100 and the second substrate 300 described above with respect to the second direction DR2 (a region where the lower pads 123 and 135 and the upper pad 340 are provided together with the column spacers CS and 147).
[0151] Reference Figure 6 , the first lower pad 123 may be Figure 1 The second lower pads 135 may be spaced apart from each other in the first direction DR1. Figure 1 The first lower pads 123 may overlap the second lower pads 135 in the thickness direction, respectively. The first columnar spacer 147 may be disposed between adjacent first lower pads 123. The first columnar spacer 147 may contact side surfaces of the lower pads 123 and 135.
[0152] The upper pad 340 may also be Figure 1 The upper pad 340 may overlap the lower pads 123 and 135 in the thickness direction.
[0153] The second column spacer CS may be disposed between adjacent upper pads 340. The second column spacer CS may be in contact with side surfaces of the upper pads 340.
[0154] Reference Figure 7 , the first column spacer 147 may overlap the lower pads 123 and 135. That is, the first column spacer 147 may contact the upper surface of the second lower pad 135. The second column spacer CS may overlap the upper pad 340. That is, the second column spacer CS may contact the lower surface of the upper pad 340.
[0155] Figure 8 is a cross-sectional view for illustrating application of a first signal and a second signal through a printed circuit board.
[0156] Reference Figure 8 , the first signal S1 and the second signal S2 can be applied to the display panel from the printed circuit board 400 through the lower pads 123 and 135 and the upper pad 340, respectively. Specifically, the second signal S2 can be applied to the first lower pad 123 from the printed circuit board 400 through the side pads SPAD, the upper pad 340, the sealing member SEAL and the connecting electrode 163. The second signal S2 can be applied to the first lower pad 123 from the printed circuit board 400 through the side pads SPAD. More specifically, the sealing member SEAL includes a conductive ball CB as described above. The upper pad 340 and the connecting electrode 163 can be electrically connected to each other through the conductive ball CB. In addition to applying the first signal S1 and the second signal S2 to the display panel through different paths, the first signal S1 can be the same as the second signal S2. For example, each of the first signal S1 and the second signal S2 can be a data voltage, a gate signal or a power supply voltage applied to a single first lower pad 123.
[0157] For example, the second signal S2 may be applied to the first lower pad 123 via the second lower pad 135 .
[0158] In the display device 1 according to an exemplary embodiment of the present disclosure, the side pad SPAD electrically connected to the printed circuit board 400 is in physical contact with the upper pad 340 of the second substrate 300 and the lower pads 123 and 135 of the first substrate 100, so that the contact area can be increased. Even if the contact area is increased, the total resistance can actually be reduced only when the upper pad 340 and the first lower pad 123 are electrically connected to each other. Therefore, as described above, the side pad SPAD can be electrically connected to the upper pad 340 and the lower pads 123 and 135. Specifically, the signal is applied to a first lower pad 123 from the printed circuit board 400 through the path of the first signal S1 and the path of the second signal S2, so that the signals S1 and S2 applied to the side pad SPAD are applied to each of the pixels PX1, PX2 and PX3 of the display panel through two parallel paths, thereby reducing the total resistance. In this way, line defects can be prevented.
[0159] Hereinafter, a display device according to other exemplary embodiments of the present disclosure will be described. In the following description, the same or similar elements will be denoted by the same or similar reference numerals, and redundant descriptions will be omitted or briefly described.
[0160] Fig. 9 is a cross-sectional view of a display device according to another exemplary embodiment of the present disclosure.
[0161] according to Fig. 9 The display device of the exemplary embodiment shown in Figure 4 The display device shown in FIG. 1 is different in that the common electrode 320_1 does not overlap with the sealing member SEAL.
[0162] Other components are the same as above Figure 4 The corresponding elements described are the same; therefore, redundant descriptions will be omitted.
[0163] Fig.10 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Fig.11 is relative to Fig.10 A cross-sectional view of one end of a display panel. Fig.12 yes Fig.10 Another cross-sectional view of a display panel.
[0164] according to Figures 10 to 12 The display device of the exemplary embodiment shown in Figure 4 , Figure 6 and Figure 7 The display device shown in FIG. 1 is different in that the third conductive layer further includes a third lower pad 165 interposed between the first column spacer 147 and the second column spacer CS.
[0165] More specifically, the third conductive layer may further include a third lower pad 165 disposed between the first column spacer 147 and the second column spacer CS.
[0166] The third lower pad 165 may cover the upper surface and the side surface of the first columnar spacer 147, and the third lower pad 165 may contact the upper surface of the second lower pad 135 disposed thereunder. The outer surface of the third lower pad 165 may be aligned with the outer surfaces of the lower pads 123 and 135 disposed thereunder in the thickness direction. The side pad SPAD may directly contact the outer surfaces of the lower pads 123, 135, and 165.
[0167] According to the present exemplary embodiment of the present disclosure, the display device further includes a third lower pad 165 disposed on the third conductive layer, so that the contact area with the side pad SPAD can be increased. As a result, the contact resistance between the side pad SPAD and the lower pads 123, 135 and 165 can be reduced.
[0168] In addition, the third lower pad 165 further covers the upper surface of the second lower pad 135 partially exposed by the first column spacer 147 , thereby preventing corrosion of the exposed second lower pad 135 .
[0169] Reference Fig.11 , the third lower pad 165 may be in direct contact with the adjacent first column spacer 147 .
[0170] Reference Fig.12 , the third lower pad 165 may be disposed on the first column spacer 147 , and may be disposed between the first column spacer 147 and the second column spacer CS.
[0171] Fig.13 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Fig.14 yes Fig.13 A cross-sectional view of a display panel.
[0172] Reference Fig.13 and Fig.14 In the display device according to the present exemplary embodiment, the third insulating layer 150_1 may further extend toward one end of the non-display area NDA. More specifically, the third insulating layer 150_1 may overlap the first columnar spacer 147 in the thickness direction. Since the third insulating layer 150_1 further extends toward one end of the non-display area NDA, corrosion of the exposed second lower pad 135 may be prevented.
[0173] Reference Fig.14, the third insulating layer 150_1 may cover side surfaces and upper surfaces of the adjacent lower pads 123 and 135. The first column spacer 147 may be disposed on the third insulating layer 150_1.
[0174] Fig.15 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Fig.16 is relative to Fig.15 A cross-sectional view of one end of a display panel. Fig.17 yes Fig.15 Another cross-sectional view of a display panel.
[0175] according to Figures 15 to 17 The display device of the exemplary embodiment shown is different from the display device according to the embodiment in that the third insulating layer 150_2 completely extends to one end of the non-display area NDA. Fig.13 The display devices of the exemplary embodiments are different.
[0176] More specifically, the outer surface of the third insulating layer 150_2 may be aligned in the thickness direction with the outer surfaces of the lower pads 123 and 135 and the outer surface of the upper pad 340. The outer surface of the third insulating layer 150_2 may be in contact with the side pad SPAD.
[0177] Reference Fig.16 and Fig.17 , the third insulating layer 150_2 may be in contact with side surfaces and upper surfaces of the lower pads 123 and 135. The first column spacer 147 may be disposed on the third insulating layer 150_2.
[0178] Fig.18 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure. Fig.19 is relative to Fig.18 A cross-sectional view of one end of a display panel. Fig. 20 yes Fig.18 Another cross-sectional view of a display panel.
[0179] according to Figures 18 to 20 The display device of the exemplary embodiment shown in Figures 15 to 17 The display device shown in FIG. 1 is different in that the third conductive layer further includes a third lower pad 165 overlapping the first column spacer 147 .
[0180] More specifically, as Fig.10 As in the exemplary embodiment of the present invention, the third lower pad 165 may be disposed between the first column spacer 147 and the second column spacer CS. The third lower pad 165 may be in direct contact with the upper surface of the third insulating layer 150_2.
[0181] Reference Fig.19, the third lower pad 165 may be disposed between the upper pad 340 and the lower pads 123 and 135 .
[0182] Reference Fig. 20 , the third lower pad 165 may be disposed between the first column spacer 147 and the second column spacer CS.
[0183] Fig.21 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0184] according to Fig.21 The display device of the exemplary embodiment shown in Fig.18 The display device of the exemplary embodiment is different in that the second insulating layer 112_1 completely extends toward one end of the non-display area NDA.
[0185] The second insulating layer 112_1 may be disposed between the second lower pad 135 and the first lower pad 123 .
[0186] Fig. 22 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0187] according to Fig. 22 The display device of the exemplary embodiment shown in Fig.21 The display device of FIG. 1 is different in that the third insulating layer 150_3 includes a first contact hole CNT1, and the third lower pad 165 is connected to the second lower pad 135 through the first contact hole CNT1.
[0188] Other components are the same as above Fig.21 and Fig.18 The corresponding elements described are the same. Therefore, redundant descriptions will be omitted.
[0189] Fig.23 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0190] according to Fig.23 The display device of the exemplary embodiment shown in Fig.21 The display device of FIG. 1 is different in that the second insulating layer 112_2 includes a second contact hole CNT2, and the second lower pad 135 is connected to the first lower pad 123 through the second contact hole CNT2.
[0191] The other elements are the same as the corresponding elements described above; therefore, redundant descriptions will be omitted.
[0192] Fig.24 is a cross-sectional view of a display device according to still another exemplary embodiment of the present disclosure.
[0193] according to Fig.24 The display device of the exemplary embodiment shown in Fig. 22 The display device of the exemplary embodiment is different in that the second insulating layer 112_2 includes Fig.23 The second contact hole CNT2.
[0194] The other elements are the same as the corresponding elements described above; therefore, redundant descriptions will be omitted.
[0195] Fig.25 is a perspective view of a display device according to still another exemplary embodiment of the present disclosure.
[0196] according to Fig.25 The display device 1_1 of the exemplary embodiment shown in FIG. Figure 1 The display device 1 of the exemplary embodiment is different in that an organic light emitting display device is used as the display device.
[0197] More specifically, the organic light emitting display device may include a first substrate 100_1 and a second substrate 300_1 disposed on the first substrate 100_1. In addition, one printed circuit board 400 may be disposed on a side surface of one end (short side) of each of the first substrate 100_1 and the second substrate 300_1.
[0198] Unlike the display device 1 according to the exemplary embodiment, the organic light emitting display device includes neither the backlight unit BLU nor the liquid crystal layer 200 .
[0199] Unlike the first substrate 100, the first substrate 100_1 does not include the color filters 141, 143 and 145, the lower alignment layer 170 and the second dam DAM2, but may include the common electrode 320. That is, the organic light emitting layer may be further disposed between the common electrode 320 and the pixel electrode 161 opposite to the pixel electrode 161.
[0200] Unlike the second substrate 300, the second substrate 300_1 may not include the common electrode 320, the upper alignment layer 330, and the first dam DAM1. The second substrate 300_1 may be an encapsulation substrate for encapsulating an organic light emitting layer of the first substrate 100_1.
[0201] The inventive concept provides a display device in which a contact resistance between a pad of a display panel and a lead of a printed circuit board disposed at one side of the display panel can be reduced.
[0202] Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such embodiments, but rather to the broader scope of the present disclosure and various obvious modifications and equivalent arrangements as will be apparent to those of ordinary skill in the art.
Claims
1. A display device, wherein: The display device comprises: A first substrate, comprising a first base substrate and a lower pad disposed on one end of the first base substrate; a second substrate disposed above the first substrate, and the second substrate includes a second base substrate and an upper pad disposed on one end of the second base substrate; a side pad electrically connected to the lower pad and the upper pad; and a sealing member disposed between the first substrate and the second substrate, in: The sealing member includes an insulating resin and conductive balls dispersed in the insulating resin; The upper pad and the lower pad are electrically connected to each other through the conductive ball; The lower pad includes an upper surface facing the second substrate; The upper pad includes a lower surface facing the first substrate; and The side pad directly contacts the upper surface of the lower pad and the lower surface of the upper pad.
2. The display device according to claim 1, wherein: The first substrate includes a display area and a non-display area positioned around the display area, and The lower pad and the upper pad are disposed in the non-display area.
3. A display device, wherein: The display device comprises: A first substrate, comprising a first base substrate and a lower pad disposed on one end of the first base substrate; a second substrate disposed above the first substrate, and the second substrate includes a second base substrate and an upper pad disposed on one end of the second base substrate; a side pad electrically connected to the lower pad and the upper pad; and a sealing member disposed between the first substrate and the second substrate, in: The sealing member includes an insulating resin and conductive balls dispersed in the insulating resin; The upper pad and the lower pad are electrically connected to each other through the conductive ball; The first substrate further comprises: a display area and a non-display area positioned around the display area; A first conductive layer, disposed on the first base substrate and including a gate electrode of a thin film transistor; and a second conductive layer, disposed on the first conductive layer and comprising a source electrode and a drain electrode of the thin film transistor; The lower pad and the upper pad are disposed in the non-display area; The lower pad includes a first lower pad and a second lower pad disposed on the first lower pad; and The first conductive layer includes the first lower pad, and the second conductive layer includes the second lower pad.
4. The display device according to claim 3, wherein: An outer surface of the first lower pad, an outer surface of the second lower pad, and an outer surface of the upper pad are aligned with each other in a thickness direction.
5. The display device according to claim 4, wherein: The first substrate further comprises: a first insulating layer, disposed between the first conductive layer and the second conductive layer; a second insulating layer, disposed on the second conductive layer; and a color filter disposed between the second insulating layer and the first insulating layer; and The color filter is disposed in the display area.
6. The display device according to claim 5, wherein: The first substrate further includes a first column spacer disposed on the same layer as the color filter and overlapping the lower pad; and The second substrate further includes a second column spacer disposed between the first column spacer and the upper pad.
7. The display device according to claim 6, wherein: The first column spacer is in direct contact with the second column spacer.
8. The display device according to claim 6, wherein: An outer surface of the first column spacer and an outer surface of the second column spacer are positioned closer to the inside than an outer surface of the upper pad and an outer surface of the lower pad.
9. The display device according to claim 8, wherein: The side surface pad is in direct contact with the outer surface of the first column spacer and the outer surface of the second column spacer.
10. The display device according to claim 9, wherein: The first lower pad is in direct contact with the second lower pad.
11. The display device according to claim 6, wherein: The first substrate further includes a third conductive layer disposed on the second conductive layer and including a pixel electrode defining each pixel in the display area.
12. The display device according to claim 11, wherein: The first substrate further includes a connection electrode disposed between the sealing member and the second insulating layer, and the third conductive layer includes the connection electrode; and The connection electrode penetrates the second insulating layer and the first insulating layer to be connected to the first lower pad.
13. The display device according to claim 12, wherein: The conductive ball of the sealing member electrically connects the connection electrode and the upper pad.
14. The display device according to claim 13, wherein: The lower pad further includes a third lower pad disposed between the first column spacer and the second column spacer; and The third conductive layer further includes the third lower pad.
15. The display device according to claim 6, wherein: The second insulating layer extends between the first column spacer and the second lower pad.
16. The display device according to claim 15, wherein: The lower pad further includes a third lower pad disposed between the first column spacer and the second column spacer; and The third lower pad is connected to the second lower pad through a contact hole formed through the second insulating layer.
17. The display device according to claim 16, wherein: The second lower pad is connected to the first lower pad through a contact hole penetrating the first insulating layer.
18. The display device according to claim 3, wherein: The second substrate further includes a common electrode disposed on the second base substrate; and The common electrode and the upper pad are disposed on the same layer and are spaced apart from each other.
19. A display device, wherein: The display device comprises: The first substrate comprises: a first base substrate; A first conductive layer is disposed on the first base substrate, and the first conductive layer includes a gate electrode of a thin film transistor and a first lower pad; A first insulating layer, disposed on the first conductive layer; A second conductive layer is disposed on the first insulating layer, and the second conductive layer includes a source electrode and a drain electrode of the thin film transistor and a second lower pad disposed on the first lower pad; a second insulating layer, disposed on the second conductive layer; and a third conductive layer disposed on the second insulating layer, and the third conductive layer includes a pixel electrode connected to the source electrode or the drain electrode of the thin film transistor; and a second substrate disposed above the first substrate, and comprising: a second base substrate and an upper pad disposed on the second base substrate; a side pad electrically connected to the lower pad and the upper pad; and a sealing member disposed between the first substrate and the second substrate, in: The sealing member includes an insulating resin and conductive balls dispersed in the insulating resin; The first substrate further includes a connection electrode disposed between the sealing member and the second insulating layer; The connection electrode is connected to the first lower pad through the second insulating layer and the first insulating layer; and The connection electrode and the upper pad are electrically connected to each other through the conductive ball.
20. The display device according to claim 19, wherein: The display device also includes a printed circuit board attached to the side pads.
21. The display device according to claim 19, wherein: The connecting electrode and the pixel electrode are arranged on the same layer.
Citation Information
Patent Citations
Algorithm Techniques for Software Program and Digital Contents Update Improvement by using Binary Patch Method
KR1020190108399A
Display device
CN106324927A
Liquid crystal display and manufacturing method thereof
US20100134745A1