Electronic Devices

By forming a plurality of driving units in the peripheral area of ​​the display panel of the electronic device and adopting a specific driving unit arrangement sequence, the secondary coupling problem of the electronic device during the driving of the display unit is solved, and the display effect is improved.

CN112530332BActive Publication Date: 2025-02-18INNOLUX CORP
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN201910881389.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-09-18
Publication Date
2025-02-18
Estimated Expiration
2039-09-18

AI Technical Summary

Technical Problem

The existing electronic devices have secondary coupling problems during the driving process of display unit, resulting in poor display quality.

Method used

By forming a plurality of driving units in the first peripheral region of the display panel and adopting a specific driving unit arrangement sequence, the coupling sequence is designed to separate the driving timing of each gate line.

Benefits of technology

The secondary coupling problem of electronic devices during the display unit driving process is effectively reduced and the display effect is improved.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN112530332B_ABST
    Figure CN112530332B_ABST
Patent Text Reader

Abstract

The present invention provides an electronic device, comprising a panel. The panel comprises a display area, a first peripheral area, and a plurality of driving units. The display area comprises a plurality of odd-numbered gate lines and a plurality of even-numbered gate lines. The first peripheral area is arranged adjacent to the display area. The plurality of driving units are arranged in the first peripheral area and comprise a first driving unit group and a second driving unit group. The first driving unit group comprises N driving units. The N driving units correspond to N of the first 2N of the plurality of odd-numbered gate lines or N of the first 2N of the plurality of even-numbered gate lines, wherein N is a positive integer greater than 1. The second driving unit group is arranged adjacent to the first driving unit group and comprises 2P driving units to correspond to P odd-numbered gate lines and P even-numbered gate lines, respectively.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to an electronic device, and in particular to an electronic device with a display panel. Background Art

[0002] With the development of manufacturing technology of electronic devices (such as display panels), gate driving circuits can be manufactured on a glass substrate (GOP) of the display panel. However, electronic devices with this architecture still have the problem of poor display quality, which needs to be improved. Summary of the invention

[0003] The invention provides an electronic device which can provide a good display effect.

[0004] The electronic device of the present invention includes a display panel (for the sake of simplicity, the "display panel" is referred to as the "panel" in the following content). The panel includes a substrate, and includes a display area, a first peripheral area and a plurality of driving units. The display area includes a plurality of odd gate lines and a plurality of even gate lines. The first peripheral area is arranged adjacent to the display area. The plurality of driving units are arranged in the first peripheral area. More specifically, the plurality of driving units can be formed directly on the substrate, and their positions are in the first peripheral area, but the present invention is not limited thereto. The plurality of driving units include a first driving unit group and a second driving unit group. The first driving unit group includes N driving units. The N driving units correspond to N of the first 2N of the plurality of odd gate lines or N of the first 2N of the plurality of even gate lines, where N is a positive integer greater than 1. The second driving unit group is arranged adjacent to the first driving unit group. The second driving unit includes eight driving units to correspond to four odd gate lines and four even gate lines, respectively.

[0005] Based on the above, the electronic device of the present invention can reduce the secondary coupling problem of the electronic device during the display unit driving process by arranging the driving units in a specific order. Therefore, the electronic device of the present invention can provide a good display effect.

[0006] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present invention and together with the description serve to explain the principles of the present invention.

[0008] Figure 1 is a schematic diagram of an electronic device according to an embodiment of the present invention;

[0009] Figure 2 is a schematic diagram of a portion of a display unit array of an electronic device according to an embodiment of the present invention;

[0010] Figure 3 is a schematic diagram of the arrangement of a plurality of driving units according to an embodiment of the present invention;

[0011] Figure 4 is a schematic diagram of arrangement of a plurality of driving units according to another embodiment of the present invention;

[0012] Figure 5 is a schematic diagram of an arrangement of a plurality of driving units according to another embodiment of the present invention;

[0013] Figure 6 According to the present invention Figure 3 A schematic diagram of another embodiment of the first peripheral area and the second peripheral area;

[0014] Figure 7 is based on Figure 6 A timing diagram of waveforms of multiple clock signals of multiple driving units in the first peripheral area of ​​an embodiment.

[0015] Description of Figure Numbers

[0016] 100, 300, 400, 500: Electronic devices

[0017] 101: Panel

[0018] 110, 310, 410, 510: Display area

[0019] 120: Surroundings

[0020] 121, 321, 421, 521, 621: First peripheral area

[0021] 122, 322, 422, 522, 622: Second peripheral area

[0022] 210: Display unit array

[0023] 321_1~321_M、322_1~322_M、421_1~421_M、422_1~422_M、521_1~521_M、522_1~522_M、621_1、622_1:Drive unit group

[0024] CLK1, CLK5, CLK10, CLK14, CLK9, CLK13, CLK2, CLK6: clock signals

[0025] DL: Data Line

[0026] R1~R3, G1~G3 display units

[0027] GL1~GL6: Gate lines

[0028] H: unit time DETAILED DESCRIPTION

[0029] In this document, the same or similar components will use the same or similar reference numerals, and their redundant description will be omitted. In addition, the features in different embodiments can be arbitrarily replaced, mixed and matched as long as they do not violate the inventive spirit of the present invention or conflict with each other, and simple equivalent changes and modifications made in accordance with this specification or claims are still within the scope of the present invention. Certain words will be used in the present specification and the appended claims to refer to specific components. It should be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. This document is not intended to distinguish between components that have the same function but different names.

[0030] In the claims and the following description, the words “including”, “comprising” and “having” are open-ended terms and thus should be interpreted as meaning “including but not limited to…”.

[0031] In addition, the terms "first", "second", etc. mentioned in this specification or claims are only used to name discrete elements or distinguish different embodiments or ranges, and are not used to limit the upper or lower limit of the number of elements, nor to limit the manufacturing order or arrangement order of the elements. The same terms may not be used in the claims, and may be replaced by "first", "second", "third", etc. according to the order of the elements declared in the claims. Accordingly, the first component in the following specification may be the second component in the claims.

[0032] Figure 1 is a schematic diagram of an electronic device according to an embodiment of the present invention. Figure 1, the electronic device 100 includes a panel 101, and the panel 101 includes a display area 110, a periphery 120, and a first peripheral area 121 and a second peripheral area 122 disposed adjacent to the display area 110. In the present invention, the first peripheral area 121 and the second peripheral area 122 may, for example, be disposed at the periphery of the display area 110. The display area 110 may further include a plurality of display units (not shown) arranged in an array. The substrate used for the panel 101 may, for example, be a hard substrate or a soft flexible substrate, but is not limited thereto. For example, in the present invention, the hard substrate may be, for example, a glass substrate, a quartz substrate, or a sapphire substrate, and the soft flexible substrate may be, for example, a polyimide (PI) substrate, a polycarbonate (PC) substrate, or a polyethylene terephthalate (PET) substrate, etc. In the present invention, the electronic device 100 may be a liquid crystal display (LCD), an organic light emitting diode display (OLED Display), an inorganic light emitting diode display (LED Display), a sub-millimeter inorganic light emitting diode display (Mini-LED Display), a micro-inorganic light emitting diode (Micro-LED Display), a quantum dot diode display (QLED Display), or an electrophoretic display (EPD) and other displays that can present images, but is not limited thereto. In the present invention, a plurality of driving units may be directly formed in the first peripheral area 121 and the second peripheral area 122 of the periphery 120 of the panel 101 to reduce the number of integrated circuits (ICs) used in the panel 101 or to achieve a narrow frame effect. The plurality of driving units may be coupled to a plurality of gate lines in the display area 110 to drive the plurality of display units in the display area 110. It should be noted that the panel 101 of the present invention is not limited to Figure 1 Therefore, in another embodiment, the number and location of the peripheral regions may also be determined according to the shapes of different panels 101 or display regions 110 .

[0033] Figure 2 is a schematic diagram of a portion of a display unit array of an electronic device according to an embodiment of the present invention. Figure 1 as well as Figure 2, Figure 1 The display unit array in the display area 110 shown in the figure may adopt a half data line double gate line (Half Dataline, Double Gate line, HDDG) architecture, so part of the display unit array may be as shown in FIG. Figure 2 The display unit array 210 is shown. Figure 2 In the display unit array 210, the display units R1, R2, R3 of the first column and the display units G1, G2, G3 of the second column are coupled to the same data line DL. The display units R1, R2, R3 of the first column are coupled to the gate lines (or scan lines) GL1, GL3, GL5 respectively. The display units G1, G2, G3 of the second column are coupled to the gate lines GL2, GL4, GL6 respectively. However, if the gate lines GL1-GL6 are driven in sequence, the display units R1-R3 and G1-G3 will have a double coupling problem. For example, when the gate line GL1 first receives a driving signal to drive the display unit R1, if the gate line GL2 then receives a driving signal to drive the display unit G1, since both the gate lines GL1 and GL2 are adjacent to the display unit R1, the display unit R1 will be affected by the coupling capacitance between the display unit R1 and the gate line GL2 before the display unit R1 is driven by the gate line GL1. That is to say, the display result of the display unit R1 will be affected by the driving signal of the gate line GL2. To this end, the present invention can effectively separate the driving timing of the gate lines GL1 to GL6 by the coupling sequence between the driving unit and the gate lines GL1 to GL6. Figures 3 to 6 Several variations of the embodiments are described in detail.

[0034] Figure 3 FIG. 1 is a schematic diagram of an arrangement of a plurality of driving units according to an embodiment of the present invention. Figure 3 , the first peripheral area 321 and the second peripheral area 322 on both sides outside the display area 310 of the electronic device 300 may include multiple driving units respectively. In the present embodiment, the first peripheral area 321 may include multiple driving unit groups 321_1~321_M, and the second peripheral area 322 may include multiple driving unit groups 322_1~322_M, where M is a positive integer greater than 1. For example, the first driving unit group 321_1 of the first peripheral area 321 includes four driving units, and these four driving units correspond to four gate lines of the first eight of the multiple odd-numbered gate lines of the electronic device 300. Figure 3As shown, the four driving units can be sequentially coupled to the first gate line (1), the fifth gate line (5), the ninth gate line (9) and the thirteenth gate line (13) of the electronic device 300. The driving unit groups 321_1 to 321_M and the driving unit groups 322_1 to 322_M respectively drive the plurality of display units in the display area 310 through the corresponding gate lines. The arrangement and coupling method of the display units can be described as above. Figure 2 The coupling method of the partial display unit array is analogous, but this embodiment is not limited to Figure 2 For example, the number of display units coupled to each gate line can be changed according to the actual design. In addition, in this embodiment, the last gate line corresponding to the driving unit is the 3120th gate line (3120), but the total number of gate lines can be changed according to the actual design.

[0035] Furthermore, the number of driving units in the first driving unit group 321_1 of the first peripheral area 321 of the present invention is not limited. Figure 3 In one embodiment, the first driving unit group 321_1 may also include N driving units, and the N driving units correspond to N of the first 2N of the plurality of odd-numbered gate lines or N of the first 2N of the plurality of even-numbered gate lines, where N is a positive integer greater than 1. In another embodiment, N is greater than 2 and less than or equal to 8.

[0036] Furthermore, the second driving unit group 321_2 of the first peripheral area 321 includes eight driving units, and the eight driving units correspond to eight gate lines in the electronic device 300. Figure 3 As shown, the eight driving units are, for example, sequentially coupled to the second gate line (2), the sixth gate line (6), the seventeenth gate line (17), the twenty-first gate line (21), the tenth gate line (10), the fourteenth gate line (14), the twenty-fifth gate line (25) and the twenty-ninth gate line (29) of the electronic device 300. That is, the driving unit group 321_2 includes four odd-numbered gate lines and four even-numbered gate lines.

[0037] It should be noted that the number of drive units included in the second drive unit group is not limited to Figure 3 In one embodiment, the second driving unit group 321_1 may include 2P driving units, and the 2P driving units correspond to P odd-numbered gate lines and P even-numbered gate lines, respectively, where P is a positive integer greater than 1. In another embodiment, P is greater than 2 and less than or equal to 8. In the following description of the present invention, P is taken as an example to illustrate.

[0038] The third driving unit group 321_3 of the first peripheral area 321 is disposed next to the second driving unit group 321_2, so that the second driving unit group 321_2 is located between the first driving unit group 321_1 and the third driving unit group 321_3. Similar to the second driving unit group, the third driving unit group 321_3 also includes eight driving units (P is equal to 4), and these eight driving units correspond to the eight gate lines in the electronic device 300. Figure 3 As shown, the eight driving units are, for example, sequentially coupled to the eighteenth gate line (18), the twenty-second gate line (22), the thirty-third gate line (33), the thirty-seventh gate line (37), the twenty-sixth gate line (26), the thirtieth gate line (30), the forty-first gate line (41) and the forty-fifth gate line (45) of the electronic device 300. That is, the driving unit group 321_3 also includes four odd-numbered gate lines and four even-numbered gate lines. It is worth noting that the gate line corresponding to each driving unit in the driving unit group 321_2 is spaced fifteen gate lines from the gate line corresponding to the driving unit in the corresponding order in the driving unit group 321_3. For example, the second driving unit of the second driving unit group 321_2 corresponds to the sixth gate line (6), and the second driving unit of the third driving unit group 321_3 corresponds to the twenty-second gate line (22), wherein the two are spaced fifteen gate lines (the seventh to the twenty-first gate lines).

[0039] More specifically, when the number of driving units in the second driving unit group 321_2 and the third driving unit group 321_3 is 2P, the gate lines corresponding to each driving unit in the second driving unit group 321_2 and the gate lines corresponding to the corresponding driving units in the third driving unit group 321_3 are spaced by (4P-1) gate lines.

[0040] Similarly, the gate lines corresponding to the driving unit groups 321_4 to 321_(M-1) may have the same coupling rules, which will not be described in detail. In addition, in this embodiment, the number of driving units included in the last driving unit group 321_M is equal to the number of driving units included in the first driving unit group 321_1. Figure 3 As shown, the number of driving units included in the first driving unit group 321_1 and the last driving unit group 321_M is four. In addition, in this embodiment, all driving units in the first driving unit group 321_1 correspond to odd-numbered gate lines, and all driving units in the last driving unit group 321_M correspond to even-numbered gate lines. Conversely, in one embodiment, if all driving units in the first driving unit group 321_1 correspond to even-numbered gate lines, all driving units in the last driving unit group 321_M correspond to odd-numbered gate lines.

[0041] Similarly, the coupling rules of the driving unit groups 322_1 to 322_M of the second peripheral area 322 can be inferred from the driving unit groups 321_1 to 321_M of the first peripheral area 321, and will not be repeated here. The coupling order of the multiple driving units in the first peripheral area 321 and the second peripheral area 322 and the multiple gate lines is staggered. For example, when the first driving unit group 322_1 of the first peripheral area 321 corresponds to N odd gate lines among the first 2N of the multiple odd gate lines, the first driving unit group 322_1 of the second peripheral area 322 will correspond to the other N odd gate lines among the first 2N of the multiple odd gate lines.

[0042] Therefore, based on the coupling sequence of the driving unit groups 321_1 to 322_M and the individual gate lines in the first peripheral area 321 and the second peripheral area 322, the electronic device 300 of the present embodiment can effectively separate the driving timing of each gate line. For example, after the first driving unit (1) drives the first gate line, the fifth driving unit (5) drives the fifth gate line. In other words, since the second gate line is not driven in succession, the display unit coupled to the first gate line will not be affected by the driving signal of the adjacent second gate line. Therefore, the electronic device 300 of the present embodiment can reduce the problem of secondary coupling occurring in each display unit of the electronic device 300.

[0043] Figure 4 FIG. 1 is a schematic diagram of an arrangement of multiple driving units according to another embodiment of the present invention. Figure 4 , the first peripheral area 421 and the second peripheral area 422 on both sides outside the display area 410 of the electronic device 400 may include a plurality of driving units respectively. Figure 3 The difference between the embodiment shown is that the order of the gate lines corresponding to the two first driving unit groups 421_1, 422_1 and the last two driving unit groups 421_M, 422_M in this embodiment is not the same as Figure 3 The same rules as the embodiment shown. Figure 3 , the gate lines corresponding to the driving units of the first driving unit group 321_1 are in order from small to large (the first, fifth, ninth, and thirteenth gate lines, respectively) and have the same intervals (three gate lines are spaced between two corresponding gate lines), but in the first driving unit group 421_1 of the present embodiment, the order of the driving units does not show a similar regular change.

[0044] Although Figure 4 The coupling sequence between the plurality of driving unit groups 421_1 to 421_M in the first peripheral area 421 and the plurality of driving unit groups 422_1 to 422_M in the second peripheral area 422 and the gate lines is the same as described above. Figure 3 The embodiments are different, but can also reduce the problem of secondary coupling occurring in each display unit.

[0045] In detail, Figure 4 As shown, the first driving unit group 421_1 of the first peripheral area 421 includes four driving units, and is sequentially coupled to the first gate line (1), the ninth gate line (9), the third gate line (3), and the eleventh gate line (11) of the electronic device 400. The second driving unit group 421_2 of the first peripheral area 421 includes eight driving units, and is sequentially coupled to the second gate line (2), the tenth gate line (10), the fourth gate line (4), the twelfth gate line (12), the seventeenth gate line (17), the twenty-fifth gate line (25), the nineteenth gate line (19), and the twenty-seventh gate line (27) of the electronic device 400. The third driving unit group 421_3 of the first peripheral area 421 includes eight driving units, and is sequentially coupled to the eighteenth gate line (18), the twenty-sixth gate line (26), the twentieth gate line (20), the twenty-eighth gate line (28), the thirty-third gate line (33), the forty-first gate line (41), the thirty-fifth gate line (35), and the forty-third gate line (43) of the electronic device 400. All driving units in the first driving unit group 421_1 of the first peripheral area 421 correspond to odd-numbered gate lines, and all driving units in the last driving unit group 421_M correspond to even-numbered gate lines. Similarly, the coupling rules of the driving unit groups 422_1 to 422_M of the second peripheral area 422 and the plurality of gate lines can be deduced from the driving unit groups 421_1 to 421_M of the first peripheral area 421.

[0046] That is to say, in the present embodiment, the four driving units of the first driving unit group 421_1 of the first peripheral area 421 also correspond to four gate lines of the first eight of the plurality of odd-numbered gate lines of the electronic device 400. Both the driving unit groups 421_2 and 421_3 also include four odd-numbered gate lines and four even-numbered gate lines. There are also fifteen gate lines between the gate lines corresponding to each driving unit in the driving unit group 421_2 and the gate lines corresponding to the driving units in the corresponding order in the driving unit group 421_3. Moreover, all the driving units in the first driving unit group 421_1 correspond to the odd-numbered gate lines, and all the driving units in the last driving unit group 421_M correspond to the even-numbered gate lines. Therefore, the electronic device 400 of the present embodiment can also reduce the problem of secondary coupling occurring in each display unit of the electronic device 400.

[0047] Figure 5 FIG. 1 is a schematic diagram of an arrangement of multiple driving units according to another embodiment of the present invention. Figure 5, the first peripheral area 521 and the second peripheral area 522 on both sides outside the display area 510 of the electronic device 500 may include a plurality of driving units respectively. It is worth noting that Figure 5 Although the coupling sequence between the plurality of driving unit groups 521_1 to 521_M in the first peripheral area 521 and the plurality of driving unit groups 522_1 to 522_M in the second peripheral area 522 and the gate lines is the same as described above, Figure 3 The embodiments are different, but can also reduce the problem of secondary coupling occurring in each display unit.

[0048] In detail, Figure 5 As shown, the first driving unit group 521_1 of the first peripheral area 521 includes four driving units, and is sequentially coupled to the first gate line (1), the third gate line (3), the ninth gate line (9), and the eleventh gate line (11) of the electronic device 500. The second driving unit group 521_2 of the first peripheral area 521 includes eight driving units, and is sequentially coupled to the second gate line (2), the fourth gate line (4), the seventeenth gate line (17), the nineteenth gate line (19), the tenth gate line (10), the twelfth gate line (12), the twenty-fifth gate line (25), and the twenty-seventh gate line (27) of the electronic device 500. The third driving unit group 521_3 of the first peripheral area 521 includes eight driving units, and is sequentially coupled to the eighteenth gate line (18), the twentieth gate line (20), the thirty-third gate line (33), the thirty-fifth gate line (25), the twenty-sixth gate line (26), the twenty-eighth gate line (28), the forty-first gate line (41), and the forty-third gate line (43) of the electronic device 500. All driving units in the first driving unit group 521_1 of the first peripheral area 521 correspond to odd-numbered gate lines, and all driving units in the last driving unit group 521_M correspond to even-numbered gate lines. Similarly, the rules of the driving unit groups 522_1 to 522_M of the second peripheral area 522 can be deduced from the driving unit groups 521_1 to 521_M of the first peripheral area 521.

[0049] That is to say, in the present embodiment, the four driving units of the first driving unit group 521_1 of the first peripheral area 521 also correspond to four gate lines of the first eight of the plurality of odd-numbered gate lines of the electronic device 500. Both the driving unit groups 521_2 and 521_3 also include four odd-numbered gate lines and four even-numbered gate lines. There are also fifteen gate lines between the gate lines corresponding to each driving unit in the driving unit group 521_2 and the gate lines corresponding to the driving units in the corresponding order in the driving unit group 521_3. Moreover, all the driving units in the first driving unit group 521_1 correspond to the odd-numbered gate lines, and all the driving units in the last driving unit group 521_M correspond to the even-numbered gate lines. Therefore, the electronic device 500 of the present embodiment can also reduce the problem of secondary coupling occurring in each display unit in the electronic device 500.

[0050] However, the coupling sequence of the driving unit and the gate line of the present invention is not limited to the above Figures 3 to 5 The coupling sequence of the driving unit and the gate line of the present invention can also be based on the above Figures 3 to 5 The corresponding same coupling rules are analogous.

[0051] Figure 6 According to the present invention Figure 3 A schematic diagram of another implementation of the first peripheral area and the second peripheral area. Figure 7 is based on Figure 6 The waveform timing diagram of multiple clock signals of multiple driving units in the first peripheral area of ​​the embodiment. Figure 6 , Figure 6 for Figure 3 Another implementation of the first driving unit group 321_1, 322_1 of the first peripheral area 321 and the second peripheral area 322 of the embodiment. In this embodiment, the first driving unit group 621_1 of the first peripheral area 621 may include six driving units, and are sequentially coupled to the first gate line (1), the fifth gate line (5), the dummy gate line (D1), the dummy gate line (D3), the ninth gate line (9) and the thirteenth gate line (13). The first driving unit group 622_1 of the second peripheral area 622 may also include six driving units, and are sequentially coupled to the third gate line (3), the seventh gate line (7), the dummy gate line (D2), the dummy gate line (D4), the ninth gate line (9) and the thirteenth gate line (13). Here, the dummy gate line is a gate line that does not exist. In other words, compared to Figure 3The first driving unit group 321_1 in the embodiment may further include two redundant driving units (D1, D3) that are not coupled to any gate line, and the first driving unit group 622_1 may also include two redundant driving units (D2, D4) that are not coupled to any gate line. It should be noted that in the embodiment, the total number of redundant driving units is not limited to four, and their positions may be located within the first driving unit group 621_1, 622_1, or between the first driving unit group 621_1, 622_1 and the second driving unit group 621_2, 622_2. In addition, the other driving unit groups in the first peripheral area 621 and the second peripheral area 622 are the same as above. Figure 3 The embodiments of the present invention are described in detail herein, so no further details are given.

[0052] Next reference Figure 7 , the driving timing of the multiple driving units in the first peripheral area 621 can be illustrated by eight clock signals CLK1, CLK5, CLK10, CLK14, CLK9, CLK13, CLK2, and CLK6, but is not limited thereto. It should be noted that one driving cycle of each display unit of the electronic device of this embodiment is four unit times 4H, and one unit time H is equivalent to one charging time of the display unit, but the relationship between the driving cycle and the charging time of the display unit is not limited thereto. In this embodiment, the driving unit corresponding to the first gate line (1) in the first driving unit group 621_1 can receive the clock signal CLK1 to turn on the display unit coupled to the first gate line (1), so that the display unit can complete charging. Then, after an interval of two unit times 2H, the driving unit corresponding to the first gate line (1) can provide the clock signal CLK5 to the driving unit corresponding to the fifth gate line (5) of the next level to turn on the display unit coupled to the fifth gate line (1). Then, after an interval of two unit times 2H, the driving unit corresponding to the fifth gate line (5) can provide the clock signal CLK10 to the redundant driving unit (D1) of the next level. Since the redundant driving unit (D1) is not coupled to the gate line, no corresponding display unit is turned on. However, after two unit times 2H, the redundant driving unit (D1) will continue to provide the clock signal CLK14 to the driving unit of the next level. By analogy with the above signal transmission method, the clock signals CLK9 and CLK13 can be sequentially provided to other driving units of the first driving unit group 621_1, and then the clock signals CLK2, CLK6, etc. are sequentially provided to the driving units corresponding to the second gate line (2) and the sixth gate line (6) in the second driving unit group 621_2. In other words, the coupling sequence of the driving units of this embodiment can effectively separate the driving timing of each gate line.

[0053] It should be noted that in the present invention, the transmission method of the clock signal is not limited to the above method. In some variant embodiments, the driving unit corresponding to the first gate line (1) in the first driving unit group 621_1 can receive the clock signal CLK1, and the driving unit corresponding to the fifth gate line (5) can also receive the clock signal CLK5. Then, after an interval of four unit times 4H, the driving unit corresponding to the first gate line (1) can provide the clock signal CLK10 to the redundant driving unit (D1), and after another four unit times 4H, the redundant driving unit (D1) provides the clock signal CLK9 to the driving unit corresponding to the ninth gate line (9). Subsequently, after an interval of four unit times 4H, the driving unit continues to provide the clock signal downward, and completes the transmission of the clock signal in the same way. Similarly, the driving unit corresponding to the fifth gate line (5) can provide a clock signal CLK14 to the redundant driving unit (D3), and after four unit times 4H, the redundant driving unit (D3) provides a clock signal CLK13 to the driving unit corresponding to the thirteenth gate line (13), and after every four unit times 4H, the clock signal continues to be transmitted downward, and the transmission of the clock signal is completed in the same manner. That is to say, in this variant embodiment, the clock signal of the driving unit will be transmitted to the driving units of the next two levels after an interval of four unit times 4H, while ignoring the next level driving unit located in the middle. However, the above transmission method is only a variation example, and any reasonable clock signal transmission method can be within the scope of the present invention.

[0054] Furthermore, in Figure 7 In the embodiment, the time when the driving unit corresponding to the second gate line (2) adjacent to the first gate line (1) receives the clock signal CLK2 is after the charging of the display unit coupled to the first gate line (1) is completed. Therefore, although the reception of the clock signal CLK2 by the second gate line (2) will affect the display unit coupled to the first gate line (1), since the charging of the display unit coupled to the first gate line has been completed, even if it is affected by the rising edge (charging) and falling edge (discharging) of the clock signal CLK2, the influence of the rising edge and falling edge of the clock signal CLK2 will be offset. In other words, the aforementioned secondary coupling phenomenon is less likely to occur. Therefore, the electronic device of this embodiment can provide a good display effect.

[0055] In addition, it is mentioned that, since the clock signals CLK1, CLK5, CLK10, CLK14, CLK9, CLK13, CLK2, and CLK6 of the present embodiment can be sequentially spaced at fixed time lengths (two unit times 2H), the clock signals and charging times obtained by each driving unit of the present embodiment can have substantially the same regularity. Thus, the driving signals output by the driving units to the gate lines are substantially consistent, which can improve the display effect of the electronic device.

[0056] In addition, even if Figure 3 In the embodiment, there is no redundant drive unit. Figure 7 By analogy, the driving timing of each gate line can be effectively separated by adjusting the coupling sequence of the driving units. Figure 3 In the embodiment, the time when the driving unit corresponding to the second gate line (2) receives the clock signal CLK2 is after the charging of the display unit coupled to the first gate line (1) is completed. Figure 3 The coupling sequence of the driving units of the embodiment can also effectively separate the driving timing of each gate line, thereby reducing the poor display quality caused by the secondary coupling phenomenon. Figure 4 as well as Figure 5 Example.

[0057] In summary, the electronic device of the present invention can reduce the secondary coupling problem in the driving process of each display unit of the electronic device by arranging the drive units in a specific order. In addition, since the clock signals and charging times obtained by each drive unit of the present embodiment can have substantially the same regularity, the drive signals output by the drive units to the gate lines can also be substantially consistent. Accordingly, the electronic device of the present invention can provide a good display effect.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify or combine the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These combinations, modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An electronic device, characterized in that: Include: Panel, including: A display area, comprising a plurality of odd-numbered gate lines and a plurality of even-numbered gate lines; A first peripheral area, disposed adjacent to the display area; a redundant driving unit, disposed in the first peripheral area; and A plurality of driving units are disposed in the first peripheral area, and the plurality of driving units include: A first driving unit group includes N driving units, and the N driving units correspond to N of the first 2N of the plurality of odd-numbered gate lines or N of the first 2N of the plurality of even-numbered gate lines, wherein N is a positive integer greater than 1; as well as The second driving unit group is disposed adjacent to the first driving unit group and includes 2P driving units corresponding to P odd-numbered gate lines and P even-numbered gate lines, respectively. The redundant driving unit may be disposed between the first driving unit group and the second driving unit group, or disposed within the first driving unit group.

2. The electronic device according to claim 1, characterized in that: N is greater than 2 and less than or equal to 8, and P is greater than 2 and less than or equal to 8.

3. The electronic device according to claim 1, characterized in that: The plurality of drive units further include: The third driving unit group is disposed adjacent to the second driving unit group and includes 2P driving units corresponding to P odd-numbered gate lines and P even-numbered gate lines, respectively. There are (4P-1) gate lines between the gate line corresponding to each driving unit in the second driving unit group and the gate line corresponding to the driving unit in the corresponding order in the third driving unit group.

4. The electronic device according to claim 3, characterized in that: The second driving unit group is located between the first driving unit group and the third driving unit group.

5. The electronic device according to claim 1, characterized in that: The plurality of drive units further include: A final driving unit group, wherein the number of driving units included in the final driving unit group is equal to the number of driving units included in the first driving unit group.

6. The electronic device according to claim 5, characterized in that: When all driving units in the first driving unit group correspond to odd-numbered gate lines, all driving units in the last driving unit group correspond to even-numbered gate lines.

7. The electronic device according to claim 5, characterized in that: When all driving units in the first driving unit group correspond to even-numbered gate lines, all driving units in the last driving unit group correspond to odd-numbered gate lines.

8. The electronic device according to claim 1, characterized in that: The panel also includes: A substrate, wherein the plurality of driving units are formed on the substrate.

9. The electronic device according to claim 1, characterized in that: The panel also includes: A second peripheral area, located around the display area; and Another plurality of driving units are disposed in the second peripheral area, wherein the another plurality of driving units include: Another first driving unit group includes another N driving units, and the other N driving units correspond to another N of the first 2N of the plurality of odd gate lines or another N of the first 2N of the plurality of even gate lines, where N is a positive integer greater than 1.

Citation Information

Patent Citations

  • Gate driving circuit, display device and driving method of display device

    CN109801577A