Electronic packaging and method of manufacturing the same

Abstract

An electronic package and its manufacturing method form a filling material in the gap between multiple electronic components arranged on a supporting structure to serve as a spacing part, and the spacing part has a groove to serve as a stress buffer to avoid the problem of multiple electronic components being broken due to stress concentration.

Description

Technical Field

[0001] The present invention relates to a semiconductor device, in particular to an electronic package and a manufacturing method thereof. Background Art

[0002] With the development of the electronics industry, today's electronic products have tended to be designed to be thin, light, short and with diversified functions. Semiconductor packaging technology has also developed different packaging types. In order to meet the needs of high integration and miniaturization of semiconductor devices, in addition to the traditional wire bonding semiconductor packaging technology, the industry mainly uses flip chip to improve the wiring density of semiconductor devices.

[0003] Figure 1 FIG. 1 is a cross-sectional schematic diagram of an existing flip-chip packaging structure 1. Figure 1 As shown, a semiconductor chip 11 is first bonded to a package substrate 10 via a plurality of solder bumps 13, and then the solder bumps 13 are reflowed. Next, an underfill 14 is formed between the semiconductor chip 11 and the package substrate 10 to cover the solder bumps 13.

[0004] However, in the existing flip-chip packaging structure 1, during packaging, the base glue 14 may be formed at the corners of the semiconductor chip or the edges of the non-active surface, and the base glue 14 has a relatively large Young's modulus, which increases the internal stress of the semiconductor chip 11, causing stress concentration of the semiconductor chip 11, resulting in cracks, and making the reliability of the flip-chip packaging structure 1 poor.

[0005] Therefore, how to overcome the above-mentioned problems of the prior art has become a topic that needs to be solved urgently. Summary of the invention

[0006] In view of the above-mentioned defects of the prior art, the present invention provides an electronic package and a method for manufacturing the same, which can avoid the problem of multiple electronic components being broken due to stress concentration.

[0007] The electronic package of the present invention comprises: a supporting structure; a first electronic component and a second electronic component, which are spaced apart and arranged on the supporting structure so as to form a gap between the first electronic component and the second electronic component; a filling material formed in the gap to serve as a spacing portion, wherein the spacing portion has a groove; and an active layer formed in the groove.

[0008] The present invention also provides a method for manufacturing an electronic package, comprising: spacing a first electronic component and a second electronic component on a supporting structure so that a gap is formed between the first electronic component and the second electronic component; forming a filling material in the gap so that the filling material serves as a spacing portion, wherein the spacing portion is formed with a groove; and forming an active layer in the groove.

[0009] In the aforementioned electronic package and its manufacturing method, the first electronic component and the second electronic component are electrically connected to the supporting structure.

[0010] In the aforementioned electronic package and its manufacturing method, the first electronic component and the second electronic component are of the same or different types.

[0011] In the aforementioned electronic package and its manufacturing method, the upper surfaces of the first electronic component and the second electronic component are flush with the upper surface of the active layer.

[0012] In the aforementioned electronic package and the manufacturing method thereof, the upper surfaces of the first electronic component and the second electronic component are flush with the upper surface of the spacer.

[0013] In the aforementioned electronic packaging component and its manufacturing method, the width of the groove is consistent from the groove opening to the groove bottom.

[0014] In the aforementioned electronic packaging component and its manufacturing method, the width of the groove is not uniform from the groove opening to the groove bottom.

[0015] In the aforementioned electronic package and its manufacturing method, the filling material is also formed between the supporting structure and the first electronic component and between the supporting structure and the second electronic component.

[0016] In the aforementioned electronic package and its manufacturing method, the Young's modulus of the active layer is smaller than the Young's modulus of the filling material.

[0017] In the aforementioned electronic package and the manufacturing method thereof, the sidewall of the groove extends to the first electronic component and / or the second electronic component.

[0018] As can be seen from the above, in the electronic package and its manufacturing method of the present invention, a groove is mainly formed in the filling material located between the first electronic component and the second electronic component so that the spacing portion serves as a stress buffer zone. Therefore, compared with the prior art, the present invention can effectively avoid the problem of the first electronic component and the second electronic component being cracked due to stress concentration. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a cross-sectional schematic diagram of an existing flip-chip packaging structure;

[0020] FIG. 2A to FIG. 2D is a cross-sectional schematic diagram of a method for manufacturing an electronic package of the present invention;

[0021] Figure 2C-1 for Figure 2C A partial enlarged schematic diagram of

[0022] Figure 2D 'for Figure 2D A schematic diagram of another implementation style;

[0023] Figure 3 for Figure 2D A cross-sectional schematic diagram of another embodiment of the present invention; and

[0024] Figure 3 'for Figure 3 A cross-sectional schematic diagram of another embodiment of the present invention.

[0025] Description of Reference Numerals

[0026] 1 Packaging structure 10 Packaging substrate

[0027] 11 Semiconductor chip 13 Solder bump

[0028] 14 Primer 2,3 Electronic packaging

[0029] 20 Support structure 21 First electronic component

[0030] 21a, 22a Active surface 21b, 22b Non-active surface

[0031] 21c, 22c Side 210, 220 Electrode pads

[0032] 211, 221 conductive bump 22 second electronic component

[0033] 23a Spacer 230, 330 Groove

[0034] 230c, 330c, 330c' side wall 231 first block

[0035] 232 Second block 233 Connection block

[0036] 24,24' Active layer 9 tool

[0037] A Horizontal direction B Stress buffer zone

[0038] L,r Width S Gap

[0039] t1, t2 thickness 23 filling material. DETAILED DESCRIPTION

[0040] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0041] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions under which the present invention can be implemented, so they have no substantial technical significance. Any structural modification, change in proportional relationship, or adjustment in size should still fall within the scope of the technical contents disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "on", "first", "second", and "one" cited in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of the present invention without substantially changing the technical contents.

[0042] See also FIG. 2A to FIG. 2D , which is a cross-sectional schematic diagram of the manufacturing method of the electronic package 2 of the present invention.

[0043] like Figure 2A As shown, at least one first electronic component 21 and at least one second electronic component 22 are spaced apart from each other along a horizontal direction A on a supporting structure 20 , wherein a space (gap) S is formed between the first electronic component 21 and the second electronic component 22 .

[0044] In the present embodiment, the supporting structure 20 is a package substrate (substrate) having a core layer and a circuit structure or a circuit structure without a core layer (coreless), such as a circuit redistribution layer (RDL). However, in other embodiments, the supporting structure 20 may also be a semiconductor substrate having a plurality of conductive through-silicon vias (TSV) as a through silicon interposer (TSI). It should be understood that the supporting structure 20 may also be other supporting units for supporting electronic components such as chips, such as a lead frame, and is not limited to the above.

[0045] In addition, the first electronic component 21 is an active component, a passive component, a packaging structure or a combination thereof, and the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor. For example, the first electronic component 21 is a semiconductor chip, which has an active surface 21a and an inactive surface 21b opposite to each other, and the active surface 21a has a plurality of electrode pads 210, and conductive bumps 211 are formed on the electrode pads 210, so that the first electronic component 21 is combined and electrically connected to the supporting structure 20 through the conductive bumps 211 in a flip chip manner.

[0046] Furthermore, the second electronic component 22 is an active component, a passive component, a packaging structure or a combination thereof, and the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor. For example, the second electronic component 22 is a semiconductor chip, which has an active surface 22a and an inactive surface 22b opposite to each other, and the active surface 22a has a plurality of electrode pads 220, and conductive bumps 221 are formed on the electrode pads 220, so that the second electronic component 22 is combined and electrically connected to the supporting structure 20 through the conductive bumps 221 in a flip chip manner.

[0047] In this embodiment, the first electronic component 21 and the second electronic component 22 are electronic components of the same type (ie, active components), and their internal structures may be the same or different.

[0048] It should be understood that the first electronic component 21 and the second electronic component 22 may also be electronic components of different types. For example, the first electronic component 21 is a package structure, and the second electronic component 22 is an active component.

[0049] like Figure 2B As shown, a filling material 23 is formed between the supporting structure 20 and the first electronic component 21 and between the supporting structure 20 and the second electronic component 22 , so that the filling material 23 covers the conductive bumps 211 , 221 .

[0050] In this embodiment, the filling material 23 is, for example, a primer, which is also formed in the gap S between the first electronic component 21 and the second electronic component 22. Specifically, the filling material 23 extends to the side surface 21c of the first electronic component 21 and the side surface 22c of the second electronic component 22 due to capillary action, so as to form a spacer 23a formed by the filling material 23 between the first electronic component 21 and the second electronic component 22.

[0051] In addition, the spacer 23 a is a block in the gap S, and the smaller the width L of the gap S (ie, the distance between the first electronic component 21 and the second electronic component 22 ) or the distance is, the more obvious the capillary phenomenon of the filling material 23 in the gap S is.

[0052] Furthermore, the inactive surfaces 21 b and 22 b of the first electronic component 21 and the second electronic component 22 are flush with the upper surface of the spacer 23 a .

[0053] like Figure 2C and Figure 2C-1As shown, at least one groove 230 is formed in the spacer 23a, so that the spacer 23a includes a connecting block 233 located at the bottom of the groove and a first block 231 and a second block 232 located on the connecting block 233 and separated from each other (for example, located on different sides of the connecting block 233), wherein the first block 231 is combined with the side surface 21c of the first electronic component 21, and the second block 232 is combined with the side surface 22c of the second electronic component 22.

[0054] In this embodiment, a portion of the filling material 23 is removed by cutting, laser or etching to form the groove 230. For example, the sidewall 230c of the groove 230 is straight. Specifically, the cutting width of the cutting tool 9 is about 110 microns (um), so that the width r of the groove 230 from the groove opening to the groove bottom (the position of the connecting block 233) remains consistent and unchanged, about 110 microns.

[0055] In addition, the thickness t1 of the first block 231 may be the same as or different from the thickness t2 of the second block 232 .

[0056] like Figure 2D As shown, an active layer 24 is formed in the groove 230 .

[0057] In this embodiment, the active layer 24 is formed by lamination or molding to fill the groove 230 .

[0058] In addition, if Figure 2D As shown in FIG. 1 , the active layer 24, 24' can be first formed on the inactive surfaces 21b, 22b of the first electronic component 21 and the second electronic component 22, and then the active layer 24' on the inactive surfaces 21b, 22b is removed through a flattening process or a thinning process, so that the inactive surface 21b of the first electronic component 21 and the inactive surface 22b of the second electronic component 22 are coplanar with the upper surface of the active layer 24 in the groove 230. For example, the active layer 24' is firstly covered with the inactive surface 21b of the first electronic component 21 and the inactive surface 22b of the second electronic component 22, and then part of the material of the active layer 24, 24' is removed by grinding or cutting (part of the material of the inactive surface 21b of the first electronic component 21 and part of the material of the inactive surface 22b of the second electronic component 22 can be removed as needed), so that the inactive surface 21b of the first electronic component 21 and the inactive surface 22b of the second electronic component 22 are flush with the upper surface of the active layer 24 in the groove 230.

[0059] Moreover, the Young's modulus of the active layer 24 is smaller than that of the filler 23, and is, for example, an insulating material such as polyimide (PI), dry film, epoxy, molding compound, photoresist or solder mask.

[0060] In addition, if Figure 3 In the electronic package 3 shown, the width of the groove 330 can be varied from the groove opening to the groove bottom. For example, the groove 330 can be conical or funnel-shaped, and its side wall 330c is inclined, that is, the width of the groove 330 can be gradually reduced from the groove opening to the groove bottom. By changing the width of the groove 330, the first block 231 and the second block 232 of the spacer 23a form a chamfered structure, which can further reduce the stress on the electronic component. Furthermore, the side wall 330c' of the groove 330 can extend to the first electronic component 21 and / or the second electronic component 22, such as Figure 3 ', so that the corners of the first electronic component 21 and / or the second electronic component 22 form a chamfered structure.

[0061] Therefore, the manufacturing method of the present invention forms the grooves 230, 330 in the gap S through the design of the filling material 23, so that the grooves 230, 330 can be used as stress buffer zones B, so that the stress generated by the filling material 23 inside the first electronic component 21 and the second electronic component 22 can be reduced. Therefore, compared with the prior art, the manufacturing method of the present invention can disperse the stress on the first electronic component 21 and the second electronic component 22, so as to avoid the problem of the first electronic component 21 and the second electronic component 22 being broken due to stress concentration.

[0062] The present invention further provides an electronic package 2 , 3 , comprising: a supporting structure 20 , a first electronic component 21 , a second electronic component 22 , a filling material 23 and an active layer 24 .

[0063] The first electronic component 21 and the second electronic component 22 are spaced apart from each other on the supporting structure 20 , so that a gap S is formed between the first electronic component 21 and the second electronic component 22 .

[0064] The filling material 23 is formed in the gap S to serve as a spacer 23 a , wherein the spacer 23 a has grooves 230 , 330 .

[0065] The active layer 24 is formed in the grooves 230 , 330 .

[0066] In one embodiment, the first electronic component 21 and the second electronic component 22 are electrically connected to the supporting structure 20 .

[0067] In one embodiment, the first electronic component 21 and the second electronic component 22 are of the same or different types.

[0068] In one embodiment, the upper surfaces of the first electronic component 21 and the second electronic component 22 are flush with the upper surface of the active layer 24 .

[0069] In one embodiment, the upper surfaces of the first electronic component 21 and the second electronic component 22 are flush with the upper surface of the spacer 23 a .

[0070] In one embodiment, the width r of the groove 230 is uniform from the groove opening to the groove bottom and remains unchanged.

[0071] In one embodiment, the width of the groove 330 gradually decreases from the groove opening to the groove bottom.

[0072] In one embodiment, the filling material 23 is also formed between the supporting structure 20 and the first electronic component 21 and between the supporting structure 20 and the second electronic component 22 .

[0073] In one embodiment, the Young's modulus of the active layer 24 is smaller than the Young's modulus of the filling material 23.

[0074] In summary, the electronic package and its manufacturing method of the present invention form a groove in the filling material located between the first electronic component and the second electronic component, so that the stress generated by the filling material inside the first electronic component and the second electronic component can be reduced. Therefore, the present invention can avoid the first electronic component and the second electronic component from cracking, thereby improving the reliability of the electronic package.

[0075] The above embodiments are only used to illustrate the principles and effects of the present invention, and are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. An electronic package, characterized in that: include: load-bearing structure; A first electronic component and a second electronic component are spaced apart and arranged on the supporting structure so that a gap is formed between the first electronic component and the second electronic component; A filling material is formed in the gap to serve as a spacer, and the spacer has a groove, wherein the spacer includes a connection block located at the bottom of the groove and a first block and a second block located on the connection block and separated from each other, so that the first block is combined with the side surface of the first electronic component, and the second block is combined with the side surface of the second electronic component, and the side wall of the groove is inclined, so that the first block and the second block form a chamfered structure; and An active layer is formed in the groove.

2. The electronic package according to claim 1, characterized in that: The first electronic element and the second electronic element are electrically connected to the supporting structure.

3. The electronic package according to claim 1, characterized in that: The first electronic component and the second electronic component are of the same or different types.

4. The electronic package according to claim 1, characterized in that: The upper surfaces of the first electronic component and the second electronic component are flush with the upper surface of the active layer.

5. The electronic package according to claim 1, characterized in that: The upper surfaces of the first electronic component and the second electronic component are flush with the upper surface of the spacer.

6. The electronic package according to claim 1, characterized in that: The filling material is also formed between the supporting structure and the first electronic component and between the supporting structure and the second electronic component.

7. The electronic package according to claim 1, characterized in that: The Young's modulus of the active layer is smaller than that of the filling material.

8. The electronic package according to claim 1, characterized in that: The sidewall of the groove extends to the first electronic component and / or the second electronic component.

9. A method for manufacturing an electronic package, characterized in that: include: The first electronic component and the second electronic component are spaced apart from each other on the supporting structure, and a gap is formed between the first electronic component and the second electronic component; Forming a filling material in the gap so that the filling material serves as a spacer, and the spacer forms a groove, wherein the spacer includes a connecting block located at the bottom of the groove and a first block and a second block located on the connecting block and separated from each other, so that the first block is combined with the side surface of the first electronic component, and the second block is combined with the side surface of the second electronic component, and the side wall of the groove is inclined, so that the first block and the second block form a chamfered structure; and An active layer is formed in the groove.

10. The method for manufacturing an electronic package according to claim 9, characterized in that: The first electronic element and the second electronic element are electrically connected to the supporting structure.

11. The method for manufacturing an electronic package according to claim 9, characterized in that: The first electronic component and the second electronic component are of the same or different types.

12. The method for manufacturing an electronic package according to claim 9, characterized in that: The upper surfaces of the first electronic component and the second electronic component are flush with the upper surface of the active layer.

13. The method for manufacturing an electronic package according to claim 9, characterized in that: The upper surfaces of the first electronic component and the second electronic component are flush with the upper surface of the spacer.

14. The method for manufacturing an electronic package according to claim 9, characterized in that: The filling material is also formed between the supporting structure and the first electronic component and between the supporting structure and the second electronic component.

15. The method for manufacturing an electronic package according to claim 9, characterized in that: The Young's modulus of the active layer is smaller than that of the filling material.

16. The method for manufacturing an electronic package according to claim 9, characterized in that: The sidewall of the groove extends to the first electronic component and / or the second electronic component.

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