A low parasitic inductance power module

Abstract

The present invention discloses a low parasitic inductance power module, comprising a base plate and a shell arranged above the base plate; a positive terminal, a negative terminal, an output terminal, and a drive terminal pass through the interior of the shell; wherein the positive terminal and the negative terminal are arranged opposite to each other and are bent inward; the output terminal is located on the side of the positive terminal and the negative terminal, and is arranged vertically with the positive terminal and the negative terminal, and is also bent inward; the drive terminal is arranged on the other side opposite to the output terminal. The present application reduces the parasitic inductance of the power module, reduces the oscillation of the switching voltage and current waveform; reduces the parasitic resistance of the power module, and reduces the loss during steady-state operation; is easy to install and has a simple structure; and the module is small in size and has a high power density.

Description

Technical Field

[0001] The present invention relates to the technical field of power semiconductor devices, and in particular to a low parasitic inductance power module. Background Art

[0002] At present, packaging power semiconductor switch chips, such as IGBT or SiC MOSFET chips, inside power modules is a common technical means to achieve high-speed switching control of large currents. However, since the packaging structure introduces parasitic inductance, when the switch chip is in action, the parasitic inductance will cause voltage fluctuations, resulting in voltage overshoot or waveform oscillation, affecting the normal use of the power module. All power module packaging manufacturers are trying to reduce parasitic inductance as much as possible, and end users are also very concerned about this parameter, but there are not many effective ways to reduce parasitic inductance.

[0003] In recent years, as SiC MOSFET devices have become more mature, more stringent requirements have been placed on parasitic inductance. Only by reducing parasitic inductance can the high-frequency and high-efficiency characteristics of SiC devices be fully utilized. The traditional packaging structure has a large parasitic inductance and can no longer meet the needs of applications. It is urgent to develop a new type of power module with low parasitic inductance.

[0004] The information disclosed in this background technology section is only intended to deepen the understanding of the overall background technology of the present invention, and should not be regarded as acknowledging or suggesting in any form that the information constitutes the prior art already known to those skilled in the art. Summary of the invention

[0005] The object of the present invention is to provide a low parasitic inductance power module to solve the problems existing in the prior art.

[0006] In order to achieve the above object, the present invention adopts the following technical solutions:

[0007] The present invention provides a low parasitic inductance power module, comprising a base plate and a shell arranged above the base plate; a positive terminal, a negative terminal, an output terminal, and a drive terminal pass through the interior of the shell; wherein the positive terminal and the negative terminal are arranged opposite to each other and bent inwardly; the output terminal is located on the side of the positive terminal and the negative terminal, and is arranged vertically with the positive terminal and the negative terminal, and is also bent inwardly; the drive terminal is arranged on the other side opposite to the output terminal.

[0008] As a further technical solution, an insulating spacer is provided above the housing between the positive terminal, the negative terminal and the output terminal.

[0009] As a further technical solution, a power insulating substrate is arranged on the bottom plate, and the metal layer on the upper side of the power insulating substrate includes separated positive copper layer, negative copper layer, and output copper layer; the positive terminal, upper bridge switch chip and diode chip are arranged on the positive copper layer; the negative terminal is arranged on the negative copper layer; the output terminal, lower bridge switch chip and diode chip are arranged on the output copper layer; part of the output copper layer is located between the positive copper layer and the negative copper layer, and is in a "T" shape.

[0010] As a further technical solution, a gate insulating substrate is respectively arranged on the positive copper layer and the output copper layer; a driving insulating substrate is arranged above the side of the bottom plate, and a driving terminal is connected to the top of the driving insulating substrate by brazing or ultrasonic metal welding.

[0011] As a further technical solution, the gate resistor insulating substrate is welded or crimped onto the power module insulating substrate, and a plurality of gate resistors are distributed on the gate resistor insulating substrate.

[0012] As a further technical solution, the driving insulating substrate is connected to the corresponding copper layer of the gate insulating substrate through a driving board connecting bonding wire, wherein the gate bonding wire is connected to the gate of the switching chip after passing through the gate resistor, and the source / emitter bonding wire is connected to the source / emitter of the switching chip.

[0013] As a further technical solution, the positive terminal and the negative terminal have the same structure, a busbar connection hole connected to an external power source or a load is provided above the terminal, and a plurality of welding holes are provided below the terminal.

[0014] As a further technical solution, the upper bridge switch chip and the lower bridge switch chip are one or more of an IGBT chip, an FRD chip, a MOSFET chip, and an SBD chip.

[0015] As a further technical solution, the width of the positive electrode copper layer is consistent with that of the negative electrode copper layer, and the width of the output copper layer is greater than that of the positive electrode copper layer and the negative electrode copper layer.

[0016] By adopting the above technical solution, the present invention has the following beneficial effects:

[0017] 1. Reduce the parasitic inductance of the power module and reduce the oscillation of the switching voltage and current waveform.

[0018] 2. Reduce the parasitic resistance of the power module and reduce the loss during steady-state operation.

[0019] 3. Easy to install and simple structure.

[0020] 4. The module is small in size and has high power density. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 is an external structural diagram of the low inductance module of the present invention;

[0023] Figure 2 is the internal structure diagram of the low inductance module of the present invention;

[0024] Figure 3 is a top view of the internal structure of the low inductance module of the present invention;

[0025] Figure 4 is a schematic diagram of the current path of the low inductance module of the present invention;

[0026] Figure 5 It is a schematic diagram of the internal structure of the low inductance module of the present invention;

[0027] Figure 6 It is a schematic diagram of the terminal structure of the low inductance module of the present invention;

[0028] Figure 7 It is a schematic diagram of the gate insulating substrate and gate of the low inductance module of the present invention. DETAILED DESCRIPTION

[0029] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0030] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0031] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0032] The specific implementation of the present invention is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described here is only used to illustrate and explain the present invention, and is not used to limit the present invention.

[0033] Combination Figure 1-7 As shown, this embodiment provides a low parasitic inductance power module, including a base plate 1 and a shell 2 arranged above the base plate 1; a positive terminal 3, a negative terminal 4, an output terminal 5, and a drive terminal 6 pass through the interior of the shell 2; wherein the positive terminal 3 and the negative terminal 4 are arranged opposite to each other and bent inwardly; the output terminal 5 is located on the side of the positive terminal 3 and the negative terminal 4, and is arranged vertically with the positive terminal 3 and the negative terminal 4, and is also bent inwardly; the drive terminal 6 is arranged on the other side opposite to the output terminal 5.

[0034] The material of the base plate 1 can be Cu or AlSi; the positive terminal 3, the negative terminal 4, and the output terminal 5 are generally made of Cu material and have a certain hardness; the housing 2 is generally made of PBT, PPS or PPA, and a sunken groove is provided at a position corresponding to the terminal mounting hole, and a nut is placed inside, which is mainly used for fastening when connected to the external busbar.

[0035] In this embodiment, as a further technical solution, an insulating spacer 7 is provided above the housing between the positive terminal 3, the negative terminal 4 and the output terminal 5. The insulating spacer 7 mainly serves to increase the creepage distance and the electrical clearance.

[0036] In this embodiment, as a further technical solution, a power insulating substrate 8 is arranged on the bottom plate 1, and the metal layer on the upper side of the power insulating substrate 8 includes a separated positive copper layer 9, a negative copper layer 10, and an output copper layer 11; the positive copper layer 9 is provided with the positive terminal 3, an upper bridge switch chip 12 and a diode chip 13; the negative copper layer 10 is provided with the negative terminal 4; the output copper layer 11 is provided with the output terminal 5, a lower bridge switch chip and a diode chip; part of the output copper layer 11 is located between the positive copper layer 9 and the negative copper layer 10, and is in a "T" shape.

[0037] The power insulating substrate 8 is a ceramic plate with metal layers on both sides. The ceramic is usually Al 2 O 3 、AlN、Si 3 N 4 The insulating substrate is often connected to the base plate by welding. The copper layer above the insulating substrate is usually etched with a pattern.

[0038] There are multiple groups of switch chips welded on the power insulating substrate, which can be Si-based IGBT chips and FRD chips, or SiC-based MOSFET chips and SBD chips. The top of the chip is the emitter or source, and there is also a gate. When a certain forward voltage is applied between the gate and emitter of the IGBT chip, the IGBT chip will be turned on, and the current will flow into the collector under the IGBT chip and flow out from the emitter above; when a certain forward voltage is applied between the gate and source of the MOSFET chip, the MOSFET chip will be turned on, and the current will flow into the drain under the MOSFET chip and flow out from the source above. Usually, the IGBT chip will be reversely connected in parallel with the FRD chip, while the MOSFET chip will be connected in parallel with the SBD chip, or there can be only the MOSFET chip. The upper surface of the chip is connected to other copper layers through bonding wires.

[0039] The positive terminal is connected to the high potential of the external power supply, the negative terminal is connected to the low potential of the external power supply, and the output terminal is connected to the load. After the upper bridge chip is turned on, the current flows in from the positive terminal, flows into the output copper layer through the upper bridge switch chip, and flows out from the output terminal. The current path is the upper bridge turn-on current path 21; when the upper bridge switch chip is turned off, the current of the inductive load cannot change suddenly. At this time, the current is continued through the lower bridge diode. The current path is the lower bridge continued current path 22. Figure 4 shown. Figure 4 The positive terminal, negative terminal and output terminal are removed, and the wider positive copper layer and negative copper layer can reduce the parasitic inductance and parasitic resistance of the entire circuit. The reduction of parasitic inductance can reduce the oscillation of the voltage and current waveforms when the module is switched on and off, and the dynamic loss can be further reduced; the reduction of parasitic resistance can reduce the loss of the module in steady-state operation and improve the conversion efficiency.

[0040] In this embodiment, as a further technical solution, a gate insulating substrate 14 is respectively provided on the positive copper layer 9 and the output copper layer 11; a driving insulating substrate 15 is provided above the side of the bottom plate 1, and a driving terminal 6 is connected to the top of the driving insulating substrate 15 by brazing or ultrasonic metal welding.

[0041] In this embodiment, as a further technical solution, the gate resistor insulating substrate 14 is welded or crimped onto the power module insulating substrate, and a plurality of gate resistors 16 are distributed on the gate resistor insulating substrate 14 .

[0042] In this embodiment, as a further technical solution, the driving insulating substrate 15 is connected to the corresponding copper layer of the gate insulating substrate 14 through the driving board connecting bonding wire 17, wherein the gate bonding wire is connected to the gate of the switch chip after passing through the gate resistor, and the source / emitter bonding wire 20 is connected to the source / emitter of the switch chip.

[0043] In this embodiment, as a further technical solution, the positive terminal 3 and the negative terminal 4 have the same structure, a busbar connection hole 18 connected to an external power source or load is provided above the terminal, and a plurality of welding holes 19 are provided below. The welding holes 19 are mainly used to increase the welding area and increase the connection firmness.

[0044] In this embodiment, as a further technical solution, the upper bridge switch chip and the lower bridge switch chip are one or more of an IGBT chip, a FRD chip, a MOSFET chip, and a SBD chip.

[0045] In this embodiment, as a further technical solution, the width of the positive copper layer 9 is consistent with that of the negative copper layer 10 , and the width of the output copper layer 11 is greater than that of the positive copper layer 9 and the negative copper layer 10 .

[0046] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A low parasitic inductance power module, characterized in that: It includes a bottom plate and a shell arranged above the bottom plate; a positive terminal, a negative terminal, an output terminal, and a driving terminal are inserted from the inside of the shell; wherein the positive terminal and the negative terminal are arranged opposite to each other and are bent inward; the output terminal is located on the side of the positive terminal and the negative terminal, and is arranged vertically with the positive terminal and the negative terminal, and is also bent inward; the driving terminal is arranged on the other side opposite to the output terminal; An insulating spacer is provided above the housing between the positive terminal, the negative terminal and the output terminal; A power insulating substrate is arranged on the bottom plate, and the metal layer on the upper side of the power insulating substrate includes a separated positive copper layer, a negative copper layer, and an output copper layer; the positive copper layer is provided with the positive terminal, the upper bridge switch chip, and the diode chip; the negative copper layer is provided with the negative terminal; the output copper layer is provided with the output terminal, the lower bridge switch chip, and the diode chip; part of the output copper layer is located between the positive copper layer and the negative copper layer, and is in a "T" shape.

2. The low parasitic inductance power module according to claim 1, characterized in that: A gate-blocking insulating substrate is also disposed on the positive copper layer and the output copper layer respectively; a driving insulating substrate is disposed above the side of the bottom plate, and a driving terminal is connected above the driving insulating substrate by brazing or ultrasonic metal welding.

3. The low parasitic inductance power module according to claim 2, characterized in that: The gate resistor insulating substrate is welded or pressed onto the power module insulating substrate, and a plurality of gate resistors are distributed on the gate resistor insulating substrate.

4. The low parasitic inductance power module according to claim 2, characterized in that: The driving insulating substrate is connected to the corresponding copper layer of the gate insulating substrate through the driving board connecting bonding wire, wherein the gate bonding wire is connected to the gate of the switch chip after passing through the gate resistor, and the source / emitter bonding wire is connected to the source / emitter of the switch chip.

5. The low parasitic inductance power module according to claim 1, characterized in that: The positive terminal and the negative terminal have the same structure. A busbar connection hole connected to an external power source or a load is arranged above the terminal, and a plurality of welding holes are arranged below the terminal.

6. The low parasitic inductance power module according to claim 1, characterized in that: The upper bridge switch chip and the lower bridge switch chip are one or more of an IGBT chip, an FRD chip, a MOSFET chip, and an SBD chip.

7. The low parasitic inductance power module according to claim 1, characterized in that: The width of the positive electrode copper layer is consistent with that of the negative electrode copper layer, and the width of the output copper layer is greater than that of the positive electrode copper layer and the negative electrode copper layer.

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