Passive current control for power converters

Abstract

The present disclosure relates to a method performed by a control system of a power electronic converter. The method comprises providing a grid-side current controller for controlling the power output from the converter to the grid. A first part (A) of the controller runs a first feedback control algorithm having a first control cycle time and comprising at least using a proportional gain (K p ). A third part (C) of the controller runs a third feedback control algorithm, the third feedback control algorithm having a first control cycle time and acting on an output (Yctri,out) from the first control algorithm after the SOA limit (21) has been applied, and includes a proportional control that cancels out the first feedback control algorithm. A second part (B) of the controller runs a second feedback control algorithm, the second feedback control algorithm having a second control cycle time that is less than the first control cycle time and acting on an output (UCOnv,ref) from the third control algorithm with the same polarity as the first control algorithm, and includes using a proportional gain (K P ) proportional control.

Description

Technical Field

[0001] The present disclosure relates to a current controller for controlling power output from a power electronic converter to an electrical grid. Background Art

[0002] There are many different types and topologies of power electronic converters for different applications. Typically, they are connected to one or more direct current (DC) or alternating current (AC) grids and include multiple valves containing semiconductor switches. Examples of converter types include neutral point clamped (NPC) three-level converters and modular multilevel converters (MMC), which are used in various topologies for corresponding applications such as rail intertie, static compensator (STATCOM) and pumped storage or wind converters.

[0003] Grid-connected power electronic converters with active behavior are not popular with grid operators because in this case, if oscillations / resonances occur in the grid in the frequency range in which the converter is active, the converter will behave as a source delivering energy to support the oscillations / resonances instead of consuming energy to dampen the oscillations. It is therefore desirable that the power electronic converter be passive in the relevant frequency range.

[0004] Active behavior has been observed in power electronic converters with various topologies in various applications. This typically occurs in the frequency range between 300 and 1000 Hz, in particular due to the power electronic converter control, which has a time-discrete current controller. The active behavior is related to the delay introduced by the time-discrete control. For example, in NPC three-level converters and MMCs, active behavior has been observed in various applications such as track turn-to-turn ties, STATCOM and pumped storage or wind converters. In one example, in a track turn-to-turn ties application, active behavior of a power electronic converter was observed on the 50 Hz public grid side in the frequency range between 350 and 850 Hz. Summary of the invention

[0005] The object of the invention is to provide a reduced active behavior on the grid side of a power electronic converter, i.e. in case of oscillation / resonance the converter should already reduce or not inject active power into the grid, at least in the relevant frequency range, to avoid exciting resonance.

[0006] According to one aspect of the invention, there is provided a method performed by a control system of a power electronic converter. The converter comprises a valve arrangement and is connected to a grid. The method comprises providing a grid-side current controller for controlling the power output from the converter to the grid. The method further comprises: as a first part of the controller (or in the first part of the controller), running a first feedback control algorithm using an input based on a difference between a predetermined current reference and a first feedback current measurement result of a current in the converter. The first feedback control algorithm has a first control cycle time and comprises at least a proportional control using a proportional gain. The method further comprises: as a third part of the controller (or in the third part of the controller), running a third feedback control algorithm using an input based on the first feedback current measurement result. The third feedback control algorithm has a first control cycle time and acts on an output from the first control algorithm after an SOA limit has been applied to the output of the first control algorithm, and comprises a proportional control that counteracts the first feedback control algorithm using a proportional gain. The method further comprises: as a second part of the controller (or in the second part of the controller), running a second feedback control algorithm using an input based on a second feedback current measurement result of the current. The second feedback control algorithm has a second control cycle time and acts on the output from the third control algorithm with the same polarity as the first control algorithm and includes proportional control using a proportional gain. The second control cycle time is less than the first control cycle time.

[0007] According to another aspect of the present invention, there is provided a computer program product comprising computer executable components for causing the control system to perform an embodiment of the method of the present disclosure when the computer executable components are run on a processing circuit included in the control system.

[0008] According to another aspect of the invention, there is provided a control system for a power electronic converter, the power electronic converter comprising a valve device and connected to a power grid. The control system comprises a processing circuit, and a data storage device storing instructions executable by the processing circuit, whereby the control system is operable to provide a grid-side current controller for controlling the power output from the converter to the power grid. The control system is also operable to operate as a first part of a controller, using an input based on a difference between a predetermined current reference and a first feedback current measurement result of a current in the converter, a first feedback control algorithm, wherein the first feedback control algorithm has a first control cycle time, and at least includes proportional control using a proportional gain. The control system is also operable to operate as a third part of a controller, using an input based on the first feedback current measurement result, wherein the third feedback control algorithm has a first control cycle time, an input, and acts on an output from the first control algorithm after a SOA limit has been applied to the output of the first control algorithm, and includes offsetting the proportional control of the first feedback control algorithm using a proportional gain. The control system is further operable to operate as a second portion of the controller using an input of a second feedback current measurement based on the current, wherein the second feedback control algorithm has a second control cycle time and acts on an output from the third control algorithm with the same polarity as the first control algorithm and includes proportional control using a proportional gain. The second control cycle time is less than the first control cycle time.

[0009] By applying proportional feedback of the grid-side current controller in a faster task, i.e. with a shorter (herein referred to as the second) control cycle time, the passivity of the converter can be improved. Other parts of the current controller, such as integral or resonant control, can be kept in a slower task, with a longer (herein referred to as the first) control cycle time. Moreover, since the SOA limitation should be applied in the slower task after the entire current control, i.e. including its proportional control, has been applied, the proportional control is also kept in the slower task. In order not to perform the proportional feedback of the faster task on top of the proportional feedback of the slower task, the proportional control is offset in the slower task after the SOA limitation is applied.

[0010] It should be noted that any feature of any aspect may be applied to any other aspect where appropriate. Likewise, any advantage of any aspect may be applied to any other aspect. Other objects, features and advantages of the attached embodiments will become apparent from the following detailed disclosure, the attached dependent claims and the accompanying drawings.

[0011] Generally, all terms used in the claims should be interpreted according to their ordinary meaning in the technical field, unless otherwise explicitly defined herein. All references to "a / an / the element, device, component, tool, step, etc." will be publicly interpreted as referring to at least one instance of the element, device, component, tool, step, etc., unless otherwise explicitly stated. The steps of any method disclosed herein do not have to be performed in the exact order disclosed, unless otherwise explicitly stated. The use of "first", "second", etc. for different features / components of the present disclosure is intended only to distinguish these features / components from other similar features / components, rather than to give any order or hierarchy to the features / components. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Embodiments will be described by way of example with reference to the accompanying drawings, in which:

[0013] Figure 1 is a schematic circuit diagram of an embodiment of a power electronic converter connected to at least one electrical grid.

[0014] Figure 2 is a schematic functional block diagram of feedback current control in a slower task according to an embodiment of the present invention.

[0015] Figure 3 is a more simplified schematic block diagram of an embodiment of a power electronic converter connected to a power grid.

[0016] Figure 4 is a schematic functional block diagram of a first current control portion A in a slower task according to an embodiment of the present invention.

[0017] Figure 5 1 is a schematic functional block diagram of a first current control part A and a second current control part B in a slower task and a faster task respectively according to an embodiment of the present invention.

[0018] Figure 6 is a schematic functional block diagram of a first current control portion A and a third current control portion C in a slower task and a second current control portion B in a faster task according to an embodiment of the present invention.

[0019] Figure 7 is a more detailed schematic functional block diagram of a first current control portion A and a third current control portion C in a slower task and a second current control portion B in a faster task according to an embodiment of the present invention.

[0020] Figure 8 is a schematic block diagram of an embodiment of a control system of a power electronic converter according to an embodiment of the present invention.

[0021] Fig. 9is a schematic flow chart of a method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0022] Embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which certain embodiments are shown. However, within the scope of the present disclosure, other embodiments in many different forms are possible. On the contrary, the following embodiments are provided by way of example so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Throughout this description, like numbers refer to like elements.

[0023] The control cycle time used in this article is the time period for each control cycle, that is, the time interval between two control cycles. In the faster tasks of the control system, a shorter control cycle time is used than the control cycle time in the slower tasks of the control system. With a shorter control cycle time, the control system reacts faster, but with a longer control cycle, the control system is less burdensome on processing resources.

[0024] The proportional control of the second part of the controller, referred to as B in this article, should have the same polarity as the proportional control of the first part, referred to as A in this article, and the proportional control of the third part, referred to as C in this article, should have a different polarity from the proportional control of the first part, that is, if the proportional control of the first part is subtracted from the reference current, the third part is added to the reference current to offset the proportional control of the first part, and the second part is subtracted from the reference current again, and vice versa.

[0025] Figure 1 A power electronic converter 1 is shown which is connected to at least one power grid 2. Figure 1 In the embodiment of the invention, the converter 1 is connected between the first grid 2a and the second grid 2b. The invention is not limited to the topology of the converter 1, nor to the type of the grid(s) 2 to which it is connected. For example, the power electronic converter 1 may be a neutral point clamped (NPC) three-level converter or a modular multilevel converter (MMC).

[0026] The converter 1 has a control system 3 including a current control for controlling the power output (positive or negative) from the converter 1 to the grid 2. If the converter 1 is connected to more than one grid 2, the control system 3 typically provides a separate current control for each grid.

[0027] The power grid 2 or any of the power grids 2a and 2b to which the converter 1 is connected may typically be an alternating current (AC) grid having a nominal frequency of 50 or 60 Hz, having any number of phases, such as a one-phase or three-phase AC grid, for example a three-phase grid. For example, the power electronic converter may be configured as a three-phase to one-phase track turn tie (e.g. Figure 1 ), as a static compensator (STATCOM), or as a three-phase to three-phase converter such as pumped storage, back-to-back or wind converter.

[0028] The converter 1 typically comprises a transformer 5 between its valve arrangement 4 and the grid 2 or each of the grids 2a and 2b. In some embodiments, a reactor may be used instead of the transformer. The converter and the grid are connected together at a point of common connection / coupling (PCC) 6.

[0029] exist Figure 1 In an exemplary embodiment of the invention, the converter 1 is connected at a public (e.g., distribution or transmission) three-phase grid 2a and a single-phase railway grid 2b. The public grid 2a is connected to the converter 1 at a first PCC 6a and is connected to the valve device 4 via a first transformer 5a, while the railway grid 2b is connected to the converter 1 at a second PCC 6b and is connected to the valve device 4 via a second transformer 5b. The control system 3 includes at least one grid-side current controller 20, for example for each of the grids 2a and 2b or one of the grids 2a and 2b.

[0030] In various applications, active behavior has been observed in power electronic converters 1 with various topologies. This typically occurs in a frequency range between 300 and 1000 Hz, in particular due to a power electronic converter control system 3, which has a time-discrete current controller (i.e., operates with a defined cycle time). The active behavior is related to the delay introduced by the time-discrete control. The present disclosure relates to the implementation of the following technical solution: the technical solution improves the passivity of the power electronic converter by applying a faster current feedback path (in addition to the normal current feedback with delay in the closed-loop control) without affecting the safe operating area (SOA) in the control algorithm. The goal of improving the passivity of the power electronic converter can be achieved without introducing other unnecessary structural changes, especially various SOA restrictions in the control software. In addition, the embodiment can be applied in any power electronic converter having a current controller independent of the converter topology.

[0031] A grid-connected power electronic converter 1 with active behavior is not popular with network operators because in this case, in particular if oscillations / resonances occur in the grid 2 in the frequency range in which the converter is active, the converter will behave as a source that delivers energy to support the oscillations / resonances instead of consuming energy to dampen the oscillations. It is therefore preferred that the power electronic converter is passive in the relevant frequency range depending on the application.

[0032] It should also be noted that the current controller of the control system 3 of each power grid 2 typically includes a plurality of sub-controllers, for example one sub-controller per phase if an ABC framework is used. According to the present invention, the current controller 20 is divided into a first, second and third part A, B and C, wherein each part may therefore include a sub-controller depending on the framework used. The different parts A, B, C may use any framework. Conventional frameworks include an ABC framework (with one sinusoidal signal per phase), an αβ framework (with sinusoidal signals in the complex plane) and a direct quadrature (dq) framework (also referred to as an xy framework). For a three-phase power grid 2, the ABC framework means using three sub-controllers, the αβ framework means using two sub-controllers, and the dq framework means using two sub-controllers.

[0033] The same or different any framework may be used in different parts A, B and C of the current controller 20, such as ABC, αβ and / or dq framework. In some embodiments, using the dq framework may be convenient for the slower task parts A and C, for example to reduce the number of sub-controllers, while the dq framework may be inconvenient for the faster task part B, because direct quadrature information about the phase angle is required, which means more effort is required, which may not be desirable in faster tasks.

[0034] In the following content, refer to Figure 2-7 , the current controller 20 uses a dq frame, indicated by the subscript "x", in the slower task, and uses an ABC frame, indicated by the subscript "ABC", in the faster task.

[0035] Figure 2 An embodiment of a feedback loop of a slower task 22 operating at a first (longer) control cycle time of a control system 3 is illustrated, also according to conventional techniques. In the time continuous domain, a current measurement 24 is performed to give a measured current I meas , I meas Here we are in the ABC framework of entering the time discrete domain (I ABC,meas The measured current may then be processed in a conventional manner, for example by applying an anti-aliasing filter 25 (possibly still in the faster task 23) and / or a current transformation or scaling 26 (possibly after entering the slower task 22) as required, to give the slower task measured current I meas,slow , I meas,slow Here in the dq frame (I x,meas,slow ). The current measured by the slower task is divided from the reference current I ref Deducted from the reference current I ref Here in the dq frame (I x,ref) to give an error E which is operated by the current controller 20. The current controller may, for example, include an integral or resonant control in addition to a proportional control. The current controller 20 outputs a control voltage Y ctrl,out However, the controller output Y ctrl,out may be outside the safe operating area (SOA) 21 limit of the converter, which is why an SOA limit is applied to the controller output to ensure that the reference voltage U of the converter resulting from the application of the SOA 21 limit can be safely handled by the valves of the valve arrangement 4. conv,ref , U conv,ref Here in the dq frame (U conv,x,ref ). Reference voltage U conv,ref can be processed conventionally, for example by voltage coordination or transformation 27 and 28 in slower and faster tasks 22 and 23, respectively, as required. Figure 2 In the example, the reference voltage U conv,ref Before being sent to the modulator 28, the reference voltage U conv,ref From the dq framework (U conv,x,ref ) is transformed to the ABC frame (U conv,ABC,ref ). The generated switching signal is then sent to the gate of the semiconductor switch of the converter valve in the valve arrangement in the time continuous domain. As indicated in the figure, other (e.g., conventional) control loops and inputs may act on the feedback loop, but this is generally outside the scope of the present disclosure.

[0036] The grid-connected power electronic converter 1 typically has a current controller 20 on the grid side, enabling it to respond quickly during load steps and / or grid transients (grid faults) and at the same time exchange active / reactive power between the converter and the grid 2 . Figure 2This closed-loop control structure of the current controller 20 is illustrated. The controller can be a proportional integral (PI) controller with or without a differential (D) part, or a proportional resonant (PR) controller. For a three-phase system, the controller can be implemented in a known rotating xy (also called dq) coordinate system (frame) that rotates with the base frequency of the power system, or in some embodiments, in an αβ or ABC frame depending on the type of controller selected. In addition to current measurement, the controller can also have other control loops / inputs that interact with the current controller. In addition to the linear part of the current controller, various limiters can also be implemented at the output of the current controller in the control algorithm for better control performance and / or for protection purposes. These limiters can include a real voltage (or its equivalent) safe operating area (SOA) limiter, and / or anti-windup logic that prevents the integrated saturation of the integral part of the current controller when the actuator is saturated. In this context, all restrictions related to this discussion can be referred to as SOA for short.

[0037] Digital controllers running with fixed step sizes are usually used for the current controller 20. However, delays occur in the closed loop. The delays in the feedback path may correspond to delays caused by sampling and communication delays from the current measurement 24 to the controller 20. The delays that occur in the forward path may consist of the communication delays from the controller 20 to the gates of the power electronic switches of the valve device 4, and the control algorithm task time including control algorithm execution and IO (input / output) read / write. Depending on the control hardware settings and the complexity of the control algorithm, the delays induced may range from one hundred microseconds to several hundred microseconds.

[0038] This delay can usually be compensated for the fundamental frequency, since in most cases the current controller is implemented in a rotating dq coordinate system. However, this cannot be achieved for all frequency components, which leads to the active behavior of the power electronic converter, typically in the range of about 300 Hz to about 1000 Hz.

[0039] Due to causality, we cannot simply multiply by e tds The inverse function of d ), even if we can use e in the frequency domain -tds Therefore, other methods have been used to improve the passivity of the converter, such as reducing the active part and shifting it to a higher frequency range.

[0040] Figure 3A grid-connected converter 1 is illustrated, in which a current I enters the converter from a grid 2 and a voltage U is between the terminals of the power electronic converter 1 or the grid 2. The converter is viewed as an admittance curve Y(jω) in the frequency domain. A measure of passivity is the phase curve of the converter admittance measured at the PCC 6. The converter is passive only if the phase curve of the converter admittance remains within ±90°, i.e. the admittance has a positive real part over the entire frequency range, with reference to the consumer system, i.e. the positive current I direction enters the converter. If this condition is met, the converter will always remain a consumer (active power P>0) for all frequency components. By virtue of this, in the event of a resonance in the grid 2, the converter will not provide energy, but consume energy.

[0041] In addition to reducing closed-loop control speed and increasing the anti-aliasing filter corner frequency, reducing the delay in the current feedback path is an effective and low-cost way to improve the converter passivity.

[0042] However, due to the complex control and protection functions in the control algorithm, it would take a lot of effort to move the entire controller 20 to one of the faster tasks 23, such as by implementing it in a field programmable gate array (FPGA). Even if this could be done, the step size of the control software cannot be made arbitrarily small to meet the passivity requirement due to the amount of calculations to be done in each discrete time step.

[0043] refer to Figure 4 and Figure 5 , using a PI controller as an example, from a linear point of view, it is not a moving Figure 4 Instead of moving the entire current controller 20 of FIG. 1 to the faster task 23, only the current feedback path with the correct gain (dashed box B) is moved and the controller without the current feedback path is left in the slower task (dashed box A), as in FIG. 1 with a PI controller as an example. Figure 5 With this solution, if the same proportional gain K is used in the faster current feedback path P , then the closed-loop system is stable and has no steady-state error. Converter 1 is passive up to the Nyquist frequency. However, since the output Y of the first part A of the current controller 20 ctrl,out Due to various SOA constraints 21 that apply here, this solution may not work in practice.

[0044] like Figure 4 As shown in ctrl,out It consists of two parts, the proportional part Y ctrl,Pout and the integral part Y ctrl,Iout In the steady state, the error E between the current setting value and the measured current tends to zero, and the proportional part Y ctrl,Pouttends to zero, and the controller output Y ctrl,out The integral part of the controller Y ctrl,Iout is defined so that contributions from other control inputs / loops are neglected. Typically this is around nominal voltage (or close to 1.0 pu per unit (pu) system without taking into account e.g. feedforward voltage). However, using Figure 5 In the control structure shown in Figure 1, the error E still tends to zero in the steady state, and the integral part Y of the controller ctrl,Iout However, since the current feedback in this case is done after the SOA 21, the proportional part Y seen by the SOA ctrl,Pout* isKp*I x,ref In other words, depending on the current set point I x,ref , the controller output Y ctrl,Iout The absolute value of may be too high.

[0045] SOA can be a complex function based on several other quantities in the system. Often these limits also interact with other control loops. Figure 6 , in order to achieve faster feedback without changing the SOA implementation, the original current controller ( Figure 6 The dashed box A) and SOA 21 remain the same. By adding Kp×I after SOA 21 x,meas,slow ( Figure 6 The dashed box C in the figure removes the slow current feedback used in the current controller so that the proportional part of the feedback does not appear twice in the control structure. The faster negative feedback path Kp×I ABC,meas,fast ( Figure 6 The dashed box B) in FIG. 1 is constructed after the SOA 21 but before the reference voltage is written into the modulator.

[0046] exist Figure 7 In Figure 6 The solution according to the invention in a typical closed-loop control is shown in more detail in FIG. 1 , which comprises three parts:

[0047] 1) In the slower task 22, a complete conventional current controller is implemented (dashed box A).

[0048] 2) In the slower task 22, the new slow feedback path after the SOA 21 compensates (dashed box C).

[0049] 3) In one of the faster tasks 23, a new faster feedback path is constructed (dashed box B)

[0050] In the case of an embodiment of the invention, at least up to the Nyquist frequency, the converter 1 is passive, or at least more passive than conventional components.

[0051] It should be noted that in this example, the faster current feedback path in the faster task 23 is implemented in the ABC framework without involving accurate ωt generation for ABC to dq conversion.

[0052] Figure 8 An embodiment of a control system 3 of a converter 1 of the present disclosure is schematically illustrated. The control system is configured to provide its different parts A, B and C to the grid-side current controller 20, as discussed herein. The control system is arranged to control the converter by using a reference, and to control the conductive and non-conductive states of the valve switches of the valve device 4 based on the reference. The control system 3 includes a processing circuit 81, such as a central processing unit (CPU). The processing circuit 81 may include one or more processing units in the form of (one or more) microprocessors. However, other suitable devices with computing capabilities, such as application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or complex programmable logic devices (CPLDs) may be included in the processing circuit 81. The processing circuit 81 is configured to run one or more computer programs or software (SW) 83 stored in a data storage device 82 of one or more storage units (e.g., memories). The storage unit is considered to be a computer-readable component as discussed herein, and may, for example, be in the form of a random access memory (RAM), a flash memory or other solid-state memory, or a hard disk, or a combination thereof. The processing circuit 81 may also be configured to store data in the storage device 82 as needed.

[0053] Fig. 9 Some embodiments of the method discussed herein are illustrated. The method is performed by a control system 3 of a power electronic converter 1, which comprises a valve device 4 and is connected to a power grid 2. A grid-side current controller 20 for controlling the power output from the converter 1 to the power grid 2 is provided (M1). As a first part A of the controller 20 provided (M1), a current controller based on a predetermined current reference I ref The first feedback current measurement result I meas,slow The difference E between the input and the output of the first feedback control algorithm (M2) is used to run the first feedback control algorithm, wherein the first feedback control algorithm has a first control cycle time and at least includes using a proportional gain K P As the third part C of the controller 20 providing (M1), the first feedback current measurement result I is used. meas,slow The third feedback control algorithm is run (M3) with the input of the first control algorithm, wherein the third feedback control algorithm has a first control cycle time and acts on the output Y from the first control algorithm after the SOA limit 21 has been applied to the output of the first control algorithm. ctrl,out , and includes offset using proportional gain KP The second part B of the controller 20 providing (M1) uses the second feedback current measurement result I based on the current I. meas,fast The second feedback control algorithm is operated (M4) with the input of the third control algorithm, wherein the second feedback control algorithm has a second control cycle time and acts on the output U from the third control algorithm with the same polarity as the first control algorithm. conv,ref , and includes the use of proportional gain K P The second control cycle time is shorter than the first control cycle time.

[0054] In some embodiments, the second feedback control algorithm acts on the output (U ) from the third control algorithm after its voltage coordination / conversion 27. conv,ref ),like Figure 6 and 7 Like in.

[0055] In some embodiments of the present invention, in addition to proportional control, the first feedback control algorithm also includes using integral gain (K I ) or integral or resonant control of resonant gain.

[0056] In some embodiments of the present invention, the first control cycle time is at least two times, five times or ten times the second control cycle time. A shorter second control cycle time will bring greater pressure to the controller, but sufficient passivity can be better obtained. Therefore, preferably, the first control cycle time is five times, more preferably ten times, the second control cycle time.

[0057] In some embodiments of the present invention, the first control cycle time is at least 50 μs or 100 μs, for example in the range of 100 to 250 μs or 200 μs. Preferably, the first control cycle time is at least 100 μs, for example in the range of 100-200 μs.

[0058] Additionally or alternatively, in some embodiments of the present invention, the second control cycle time is at most 50 μs, such as at most 10 μs, for example in the range of 5 to 50 or 10 μs. As mentioned herein, a shorter second control cycle time may be required to obtain sufficient passivity, which is why it is preferred that the second control cycle time is at most 10 μs, for example in the range of 5-10 μs.

[0059] As mentioned herein, each of the first, second, and third feedback control algorithms may operate in any suitable framework, such as any of ABC, αβ, or dq (also referred to as xy). In some embodiments, dq is less preferred for the second feedback control algorithm, since it requires information about the phase angle, which means more effort that is not desired in the faster task 23. However, in some embodiments, it may be preferred for the first and third feedback control algorithms to operate in the dq framework. Alternatively, the second feedback control algorithm may conveniently operate in the ABC framework, or the αβ framework with a sinusoidal complex plane signal, preferably the ABC framework in some embodiments.

[0060] In some embodiments of the present invention, the first and second feedback current measurement results I meas,slow and I meas,fast It is the current I between the valve device 4 and the grid 2, for example on the valve or grid side of the transformer 5 or the inductor of the converter 1, or the current within the valve device 4, for example by measurement results in two branches (also called branches or arms) of a phase in an MMC with a double star (also called double wye or double Y) topology for track inter-turn tie rods, or in a phase branch of an MMC with a delta (Δ) topology (for example, for STATCOM).

[0061] In some embodiments of the invention, the power electronic converter (1) is a neutral point clamped NPC three-level converter or a modular multilevel converter MMC. NPC and MMC are examples of commonly used converter types. However, embodiments of the invention can be useful in the case of any type of electrical power converter configured for connection to a power grid in any topology.

[0062] In some embodiments of the invention, the power electronic converter is configured for use with the electrical network 2 being a three-phase electrical network. However, embodiments of the invention may be useful with any type of AC electrical network having any number of phases, such as a single-phase electrical network.

[0063] In some embodiments of the invention, the power electronic converter is configured to operate as a three-phase to one-phase track turn-to-turn tie, as a STATCOM, or as a three-phase to three-phase converter such as a pumped storage or wind power converter. However, embodiments of the invention can be useful with any type of power electronic converter and any type of AC grid.

[0064] Embodiments of the method of the present invention may be performed by a control system 3, for example comprising a current controller 20, comprising a processing circuit 81 associated with a data storage device 82. The processing circuit may be provided with one or more processing units CPU in the form of (one or more) microprocessors, which execute appropriate software stored in an associated memory for producing the required functions. However, other suitable devices having computing capabilities may be included in the processor, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a complex programmable logic device (CPLD), etc., in order to control the semiconductor valve switches of the valve device 4 in the converter 1 and perform embodiments of the method of the present disclosure, while executing appropriate software 83, such as software stored in a suitable data storage device 82 such as RAM, flash memory or hard disk, or software stored in the processing circuit itself (for example, in the case of an FPGA).

[0065] Embodiments of the present invention can be conveniently implemented using one or more conventional general or special digital computers, computing devices, machines or microprocessors, which include one or more processors, memories and / or computer-readable storage media programmed according to the teachings of the present disclosure. As is apparent to those skilled in the art of software, skilled programmers can easily prepare appropriate software coding based on the teachings of the present disclosure.

[0066] In some embodiments, the present invention includes a computer program product 82, which is a non-transitory storage medium or computer readable medium (media) on which / in which are stored instructions 83 in the form of computer executable components or software (SW) that can be used to program a computer to perform any method / process of the present invention. Examples of storage media can include, but are not limited to, any type of disk, including floppy disks, optical disks, DVDs, CD-ROMs, microdrives and magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic or optical cards, nanosystems (including molecular memory ICs), or any type of medium or device suitable for storing instructions and / or data.

[0067] In a more general embodiment, the invention relates to a method performed by a control system 3 of a power electronic converter 1. The method comprises providing a grid-side current controller 20 for controlling the power output from the converter to a grid 2. A first part of the controller runs a first feedback control algorithm having a first control cycle time and comprising at least using a proportional gain K P The third part C of the controller runs a third feedback control algorithm having a first control cycle time and acting on the output Y from the first control algorithm after the SOA limit 21 has been applied.ctrl,out , and includes a proportional control that offsets the first feedback control algorithm. The second part B of the controller runs a second feedback control algorithm, the second feedback control algorithm has a second control cycle time that is less than the first control cycle time, and acts on the output U from the third control algorithm with the same polarity as the first control algorithm conv,ref , and includes the use of proportional gain K P Proportional control.

[0068] The present disclosure has mainly been described above with reference to a few embodiments. However, as is readily appreciated by a person skilled in the art, other embodiments than the ones disclosed above are equally possible within the scope of the present disclosure, as defined by the appended claims.

Claims

1. A method performed by a control system (3) of a power electronic converter (1), the power electronic converter (1) comprising a valve device (4) and connected to a power grid (2), the method comprising: Providing a grid-side current controller (20), the grid-side current controller (20) being used to control the power output from the converter (1) to the grid (2); As a first part (A) of the controller (20), a predetermined current reference I is used. x,ref The first feedback current measurement result I of the current (I) in the converter x,meas,slow The difference (E) between the input and the output of the first feedback control algorithm is used to execute the first feedback control algorithm, wherein the first feedback control algorithm has a first control cycle time and at least includes using a proportional gain K P Proportional control; As a third part (C) of the controller (20), using the first feedback current measurement result I x,meas,slow , running a third feedback control algorithm, wherein the third feedback control algorithm has the first control cycle time and acts on the output Y from the first feedback control algorithm after the safe operating area SOA limit (21) has been applied to the output of the first feedback control algorithm ctrl,out , the third feedback control algorithm includes using the proportional gain K P but with a proportional control of a different polarity than the first feedback control algorithm; and As a second part (B) of the controller (20), a second feedback current measurement result I based on the current (I) is used ABC,meas,fast The second feedback control algorithm is operated at the input of the third feedback control algorithm, wherein the second feedback control algorithm has a second control cycle time and acts on the output U from the third feedback control algorithm with the same polarity as the first feedback control algorithm. conv,x,ref , and includes the use of the proportional gain K P Proportional control; Wherein, the second control cycle time is shorter than the first control cycle time.

2. The method according to claim 1, wherein the second feedback control algorithm is based on the output U conv,x,ref The voltage coordination / conversion (27) then acts on the output U conv,x,ref .

3. The method according to claim 1 or 2, wherein: The first feedback control algorithm also includes using an integral gain K I Or integral or resonant control of resonant gain.

4. The method according to claim 1 or 2, wherein: The first control cycle time is at least twice the second control cycle time.

5. The method according to claim 1 or 2, wherein: The first control cycle time is at least 50 μs.

6. The method according to claim 1 or 2, wherein: The first control cycle time is in the range of 100 to 250 μs.

7. The method according to claim 1 or 2, wherein: The second control cycle time is at most 50 μs.

8. The method according to claim 1 or 2, wherein: The second control cycle time is in the range of 5 to 50 μs.

9. The method according to claim 1 or 2, wherein: The first feedback control algorithm and the third feedback control algorithm operate in a direct quadrature dq framework.

10. The method according to claim 1 or 2, wherein: The second feedback control algorithm operates in an ABC framework.

11. The method according to claim 1 or 2, wherein: The first feedback current measurement result and the second feedback current measurement result I x,meas,slow ,I ABC,meas,fast is the current I between the valve device (4) and the power grid (2).

12. A computer program product (82) comprising computer executable components (83) for causing the control system (3) to perform the method of any of the preceding claims when the computer executable components are run on a processing circuit (81) comprised in the control system.

13. A control system (3) for a power electronic converter (1) comprising a valve device (4) and connected to a power grid (2), the control system comprising: Processing circuit (81); as well as a data storage device (82) storing instructions (83) executable by the processing circuitry, whereby the control system is operable to: Providing a grid-side current controller (20) for controlling the power output from the converter (1) to the grid (2); As a first part (A) of the controller (20), a predetermined current reference I is used. x,ref The first feedback current measurement result I of the converter current I x,meas,slow The difference (E) between the input and the output of the first feedback control algorithm is used to execute the first feedback control algorithm, wherein the first feedback control algorithm has a first control cycle time and at least includes using a proportional gain K P Proportional control; As a third part (C) of the controller (20), using the first feedback current measurement result (I x,meas,slow ), running a third feedback control algorithm, wherein the third feedback control algorithm has the first control cycle time and acts on the output Y from the first feedback control algorithm after the safe operating area SOA limit (21) has been applied to the output of the first feedback control algorithm ctrl,out , the third feedback control algorithm includes using the proportional gain K P but with a proportional control of a different polarity than the first feedback control algorithm; and As a second part (B) of the controller (20), a second feedback current measurement result I based on the current I is used ABC,meas,fast The second feedback control algorithm is operated at the input of the third feedback control algorithm, wherein the second feedback control algorithm has a second control cycle time and acts on the output U from the third feedback control algorithm with the same polarity as the first feedback control algorithm. conv,x,ref , and includes the use of the proportional gain K P Proportional control; Wherein, the second control cycle time is shorter than the first control cycle time.

14. A power electronic converter (1) comprising a control system (3) according to claim 13 and the valve device (4).

15. The power electronic converter according to claim 14, wherein: The power electronic converter (1) is a neutral point clamped NPC three-level converter or a modular multi-level converter MMC.

16. A power electronic converter according to claim 14 or 15, wherein: The power electronic converter is configured for the power grid (2) as a single-phase or three-phase power grid.

17. A power electronic converter according to claim 14 or 15, wherein: The power electronic converter is configured to operate as a three-phase to one-phase track turn-to-turn tie rod, as a static compensator STATCOM, or as a three-phase to three-phase converter.

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