Display device

Abstract

A display device is provided. The display device includes a substrate, wherein the substrate includes a display area, a non-display area outside the display area, a pad area in the non-display area, and a bending area between the display area and the pad area. The display device includes a first voltage line, wherein the first voltage line has a first main voltage line arranged between the display area and the bending area, and a first connection portion protruding from the first main voltage line and extending toward the pad area and intersecting the bending area. The display device includes a fan-out portion and a strain gauge, wherein the fan-out portion is arranged between the display area and the pad area on the substrate and includes a wire connecting the display area to the pad area, and the strain gauge is arranged in the bending area. The strain gauge overlaps with the first connection portion of the first voltage line in the bending area.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0131386, filed on October 22, 2019, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] One or more embodiments are directed to a display device capable of more accurately determining stress generated during bending. Background Art

[0004] With the rapid development of the display field for visually expressing various electrical signal information, various flat panel display devices having excellent characteristics such as slimness, light weight and low power consumption have been introduced. Recently, a display device that removes physical buttons and the like from the front surface of the display device and expands the image display area has been introduced.

[0005] A display area of ​​the display device observable from the front side may be expanded by bending at least a portion of the display device.

[0006] The stress generated by bending can cause defects in the display device, and if the stress applied to the bending area can approach a threshold, it is likely that defects will occur in the display device. However, since the display device can still operate normally under such stress, it may be difficult to detect these limitations before such defects occur.

[0007] It will be understood that the present background technology of the present technology section is intended, in part, to provide a useful background for understanding the technology. However, the present background technology of the present technology section may also include ideas, concepts, or cognitions, but these ideas, concepts, or cognitions are not part of what was known or understood by a person skilled in the relevant art before the corresponding effective filing date of the subject matter disclosed herein. Summary of the invention

[0008] One or more embodiments may include a display device capable of more accurately determining stress generated during bending to prevent defects from occurring in the display device.

[0009] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the disclosed embodiments.

[0010] According to one or more embodiments, a display device may include a substrate, a first voltage line, a fan-out portion, and a strain gauge, wherein the substrate includes a display area, a non-display area outside the display area, a pad area in the non-display area, and a bending area between the display area and the pad area, the first voltage line includes a first main voltage line arranged between the display area and the bending area, and a first connection portion protruding from the first main voltage line and extending toward the pad area and intersecting the bending area, the fan-out portion is arranged on the substrate between the display area and the pad area and includes a plurality of wires connecting the display area to the pad area, and the strain gauge is arranged in the bending area, wherein the strain gauge overlaps with the first connection portion of the first voltage line in the bending area.

[0011] The multiple conductive lines may each include a first region, a second region and a connecting conductive layer, wherein the first region is located between the display region and the bending region, the second region is located between the bending region and the pad region, and the connecting conductive layer may electrically connect the first region to the second region and intersect with the bending region, wherein the connecting conductive layer may include a first connecting conductive layer and a second connecting conductive layer that are connected in parallel and overlap with each other.

[0012] The second connection conductive layer may be arranged over the first connection conductive layer, the second connection conductive layer and the first connection portion may be arranged on the same layer, and the first connection conductive layer and the strain gauge may be arranged on the same layer.

[0013] The first region and the second region may be located on the same layer, and the first connection portion may be arranged on a different layer from the first region.

[0014] The plurality of conductive lines may include a first conductive line and a second conductive line adjacent to each other, and a first region of the first conductive line and a second region of the second conductive line may be arranged on different layers.

[0015] The fan-out portion may include a first fan-out portion and a second fan-out portion spaced apart from each other in the bending region, and the first connection portion may be arranged in a spaced region between the first fan-out portion and the second fan-out portion in the bending region.

[0016] The strain gauge may include a resistance wire having a bent portion, and the resistance wire may be electrically connected to a driving circuit disposed in the pad region.

[0017] The display device may further include a second voltage line, wherein the second voltage line may apply a voltage different from the voltage of the first voltage line to the display area, wherein the second voltage line may include a second connection portion extending in a direction parallel to the first connection portion, the second connection portion and the first connection portion may be arranged on the same layer, and the strain gauge may also overlap with the second connection portion in the bending area.

[0018] The first connection portion may be disposed between the plurality of conductive lines.

[0019] The inorganic insulating layer may be arranged on the substrate, wherein the inorganic insulating layer may include a groove located at a position corresponding to the bending area, the organic layer may be arranged in the groove, and the first connection portion and multiple wires may be arranged on the organic layer in the bending area.

[0020] According to one or more embodiments, a display device may include a substrate, a pair of first strain gauges, a fan-out portion, a first voltage line, a second voltage line, and a second strain gauge, wherein the substrate includes a display area, a non-display area outside the display area, a pad area in the non-display area, and a bending area between the display area and the pad area, a pair of first strain gauges are arranged at both ends of the bending area, the fan-out portion is arranged between the display area and the pad area on the substrate and includes a plurality of wires that can connect the display area to the pad area, the first voltage line has a first main voltage line arranged between the display area and the bending area, and a first connection portion protruding from the first main voltage line and extending toward the pad area and intersecting the bending area, the second voltage line can apply a voltage different from the voltage of the first voltage line to the display area, wherein the second voltage line may include a second connection portion extending in a direction parallel to the first connection portion, and the second connection portion and the first connection portion may be arranged on the same layer, and the second strain gauge is arranged in the bending area, wherein the second strain gauge overlaps with at least one of the first connection portion and the second connection portion in the bending area.

[0021] The fan-out portion may include a first fan-out portion and a second fan-out portion spaced apart from each other in the bending region, and the first connection portion may be arranged in a spaced region between the first fan-out portion and the second fan-out portion in the bending region.

[0022] The conductive lines may each include a first region, a second region and a connecting conductive layer, wherein the first region is located between the display region and the bending region, the second region is located between the bending region and the pad region, and the connecting conductive layer may electrically connect the first region to the second region and intersect with the bending region, wherein the connecting conductive layer may include a first connecting conductive layer and a second connecting conductive layer that are connected in parallel and overlap with each other.

[0023] The second connection conductive layer may be arranged above the first connection conductive layer, the first connection portion, the second connection portion, a pair of first strain gauges and the second connection conductive layer may be arranged on the same layer, and the second strain gauge and the first connection conductive layer may be arranged on the same layer.

[0024] A plurality of pixel circuits, a plurality of light-emitting devices electrically connected to the plurality of pixel circuits, and a plurality of data lines electrically connected to the plurality of pixel circuits may be arranged in the display area, a plurality of conductive wires may be electrically connected to the plurality of data lines and transmit electrical signals from a driving circuit arranged in the pad area to the plurality of data lines, and a first connecting conductive layer and the plurality of data lines may be arranged on the same layer.

[0025] The display device may further include a plurality of driving voltage supply lines, wherein the plurality of driving voltage supply lines are arranged in the display area, wherein the plurality of driving voltage supply lines provide driving signals to the plurality of pixel circuits, and the second connecting conductive layer and the plurality of driving voltage supply lines may be arranged on the same layer.

[0026] The plurality of pixel circuits may each include a storage capacitor having a first storage electrode and a second storage electrode, and the first region, the second region, and the first storage electrode or the second storage electrode may be arranged on the same layer.

[0027] The first region and the second region may be disposed on the same layer, and the first connection portion and the second connection portion may be disposed on a layer different from the first region.

[0028] The plurality of conductive lines may include a first conductive line and a second conductive line adjacent to each other, and a first region of the first conductive line and a second region of the second conductive line may be arranged on different layers.

[0029] The inorganic insulating layer may be arranged on the substrate, wherein the inorganic insulating layer may include a groove located at a position corresponding to the bending area, the organic layer may be arranged in the groove, and the first connection portion and multiple wires may be arranged on the organic layer in the bending area. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other aspects, features and advantages of certain embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0031] Figure 1 is a schematic plan view schematically showing a display device according to an embodiment;

[0032] Figure 2 It is schematically shown Figure 1 A schematic perspective view of a bent shape of a display device;

[0033] Figure 3 yes Figure 1 A schematic circuit diagram of a pixel of a display device;

[0034] Figure 4 According to the implementation method Figure 1 A schematic cross-sectional view taken along line II' of FIG.

[0035] Figure 5 It is schematically shown Figure 1 A schematic enlarged plan view of area A;

[0036] Figure 6 It is schematically shown Figure 5 a schematic plan view of a first strain gauge;

[0037] Figure 7 According to the implementation method Figure 6 A schematic cross-sectional view taken along line II-II';

[0038] Figure 8 It is schematically shown Figure 5 A schematic enlarged plan view of region B;

[0039] Fig. 9 According to the implementation method Figure 8 A schematic cross-sectional view taken along line III-III';

[0040] Fig.10 According to the implementation method Figure 8 A schematic cross-sectional view taken along line IV-IV';

[0041] Fig.11 According to the implementation method Figure 8 A schematic cross-sectional view taken along line V-V' of ; and

[0042] Fig.12 According to the implementation method Figure 8 A schematic cross-sectional view taken along line VI-VI'. DETAILED DESCRIPTION

[0043] Now will refer to the embodiment in detail, and the example of the embodiment is shown in the accompanying drawings, wherein similar reference numerals refer to similar elements throughout. In this regard, the present embodiment may have different forms and should not be construed as being limited to the description set forth herein. Accordingly, the embodiments are described below only by reference to the accompanying drawings to explain the various aspects of this description. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items. The terms "and" and "or" can be used in a combined or separate manner and can be understood to be equivalent to "and / or". Throughout the description, the expression "at least one of a, b and c" indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b and c or its variants.

[0044] It will be understood that although the terms "first", "second", etc. can be used to describe various elements in this article, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Similarly, for the convenience of description, spatial relative terms, such as "below", "under", "lower", "rear", "above", "upper" or "front" or similar words, can be used in this article to describe the relationship between an element or component and another element or component as shown in the figure. It will be understood that, in addition to the orientations depicted in the accompanying drawings, spatial relative terms are intended to cover different orientations of the device in use or operation. For example, in the case where the device shown in the figure is turned over, an element located "below" or "rear" of another element can be placed "above" or "front" of another element. Accordingly, the illustrative term "below" can include both lower and upper positions. The device can also be oriented in other directions, and therefore, spatial relative terms can be interpreted differently depending on the orientation.

[0045] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0046] It will be understood that terms used herein, such as “comprising” and “having”, specify the presence of stated features or elements, but do not preclude the presence or addition of one or more other features or elements.

[0047] It will be understood that when a layer, region or element is referred to as being “on” another layer, region or element, it can be “directly on” the other layer, region or element, or can be “indirectly on” the other layer, region or element with one or more intervening layers, regions or elements present therebetween.

[0048] For the convenience of description, the size of the components in the drawings may be exaggerated. In other words, since the size and thickness of the elements in the drawings may be arbitrarily shown for the convenience of description, the following embodiments are not limited thereto.

[0049] Terms such as "overlapping" may include stacking, stacking, facing or facing with, extending over, covering or partially covering, or any other suitable terms as will be appreciated and understood by those of ordinary skill in the art. Expressions such as "non-overlapping" may include "separated from" or "disposed to be separated from", "offset from", and any other suitable equivalent forms as will be appreciated and understood by those of ordinary skill in the art.

[0050] Figure 1 is a schematic plan view schematically showing a display device 1 according to an embodiment, and Figure 2 It is schematically shown Figure 1 Schematic perspective view of the bent shape of the display device 1.

[0051] Reference Figure 1 and Figure 2 , the display device 1 according to the embodiment may include a display area DA in which pixels may be arranged and a non-display area NDA located outside the display area DA. The non-display area NDA may include a pad area PDA, which may be located at one side of the display area DA and to which various electronic devices such as an integrated circuit (IC), a printed circuit board, and the like may be attached. The non-display area NDA may include a bending area BA located between the display area DA and the pad area PDA. The display area DA, the non-display area NDA, the pad area PDA, and the bending area BA may be defined on the substrate 100.

[0052] Figure 1 1 is a plan view showing the shape of the substrate 100 and the like during the manufacturing process of the display device 1, and Figure 2 As shown in , the substrate 100 may be bent in the bending area BA based on the bending axis BAX extending in the first direction D1. If the substrate 100 may be bent in the bending area BA based on the bending axis BAX, the bending direction may be set so that the pad area PDA may be located behind the display area DA. Therefore, the area of ​​the non-display area NDA that can be observed by the user may be minimized.

[0053] To this end, the substrate 100 may include various flexible, bendable or rollable materials. For example, the substrate 100 may include a polymer resin such as polyethersulfone (PES), polyacrylate (PA), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate (PAR), polyimide (PI), polycarbonate (PC), cellulose acetate propionate (CAP), or a combination thereof. The substrate 100 may have a multilayer structure including two layers and a barrier layer, each of which includes the above-mentioned polymer resin, and the barrier layer is arranged between the two layers and includes an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, or the like).

[0054] Referring to the substrate 100, the width of the non-display area NDA including the bending area BA in the first direction D1 may be smaller than the width of the portion of the display area DA in the first direction D1. The corner portion 100c of the edge of the substrate 100 may have a rounded shape. This shape may also be applied to the display area DA.

[0055] For example, the display area DA may have a rounded shape at the corners, wherein the display area DA includes a first edge E1 and a second edge E2 facing each other, and a third edge E3 and a fourth edge E4 facing each other and located between the first edge E1 and the second edge E2, and thus, has a shape similar to a rectangle or a square as a whole. The display area DA may also have a rounded shape at portions other than the edges.

[0056] The pad area PDA may be adjacent to the fourth edge E4 among the first edge E1 to the fourth edge E4, and the fan-out portion 20 where the wire extends may be arranged in the pad area PDA. The wire may be arranged across the bending area BA and connected to the driving circuit 30. One side of the driving circuit 30 may be electrically connected to the pixel circuit of the display area DA, and the driving circuit 30 may include various electronic devices such as an integrated circuit (IC) at the other side.

[0057] Figure 3 yes Figure 1 A schematic circuit diagram of a pixel PX of the display device 1 is shown in FIG. Figure 4 According to the implementation method Figure 1 A schematic cross-sectional view taken along line II'.

[0058] Reference Figure 3 The pixel PX may include a light emitting device connected to the scan line SL and the data line DL and a pixel circuit PC. The light emitting device may be an organic light emitting device OLED.

[0059] The pixel circuit PC may include a driving thin film transistor Td, a switching thin film transistor Ts, and a storage capacitor Cst.

[0060] The switching thin film transistor Ts may be connected to the scan line SL and the data line DL, and may be configured to transfer a data signal input through the data line DL to the driving thin film transistor Td according to a scan signal input through the scan line SL.

[0061] The storage capacitor Cst may be connected to the switching thin film transistor Ts and the driving voltage supply line PL, and may be configured to store a voltage corresponding to a difference between a voltage received from the switching thin film transistor Ts and a driving voltage ELVDD supplied to the driving voltage supply line PL.

[0062] The driving thin film transistor Td may be connected to the driving voltage supply line PL and the storage capacitor Cst, and may be configured to control a driving current flowing from the driving voltage supply line PL to the organic light emitting device OLED according to a voltage value stored in the storage capacitor Cst. The organic light emitting device OLED may emit light having a specific brightness according to the driving current. The organic light emitting device OLED may emit, for example, red light, green light, blue light, or white light.

[0063] Referenced above Figure 3 A case where a pixel PX includes two thin film transistors (e.g., a switching thin film transistor Ts and a driving thin film transistor Td) and a storage capacitor Cst is described, but the embodiment is not limited thereto. In another embodiment, various changes may be made to the pixel circuit PC. For example, the pixel circuit PC may include three or more thin film transistors, or may include two or more storage capacitors.

[0064] In the following, reference will be made to Figure 4 right Figure 1 The structure of the display device 1 is described in more detail.

[0065] Reference Figure 4 , the light emitting device 300 may be electrically connected to the first thin film transistor T1, the second thin film transistor T2 and the storage capacitor Cst. The light emitting device 300, the first thin film transistor T1, the second thin film transistor T2 and the storage capacitor Cst may correspond to Figure 3 Organic light-emitting devices OLED, Figure 3 The driving thin film transistor Td, Figure 3 The switching thin film transistor Ts and Figure 3 The storage capacitor Cst.

[0066] The first thin film transistor T1 may include a first semiconductor layer Act1 and a first gate electrode G1 , and the second thin film transistor T2 may include a second semiconductor layer Act2 and a second gate electrode G2 .

[0067] The first semiconductor layer Act1 and the second semiconductor layer Act2 may each include amorphous silicon, polycrystalline silicon, an oxide semiconductor, or an organic semiconductor. The first semiconductor layer Act1 may include a channel region C1 and a source region S1 and a drain region D1 disposed on both sides of the channel region C1. The second semiconductor layer Act2 may include a channel region C2 and a source region S2 and a drain region D2 disposed on both sides of the channel region C2.

[0068] The source region S1 and the drain region D1 of the first semiconductor layer Act1 and the source region S2 and the drain region D2 of the second semiconductor layer Act2 may be respectively understood as the source electrode and the drain electrode of the first thin film transistor T1 and the source electrode and the drain electrode of the second thin film transistor T2 .

[0069] The first gate electrode G1 and the second gate electrode G2 may be arranged to overlap the channel region C1 of the first semiconductor layer Act1 and the channel region C2 of the second semiconductor layer Act2, respectively, with the gate insulating layer 120 therebetween. The first gate electrode G1 and the second gate electrode G2 may each be a single film or a multilayer film including a conductive material including at least one of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti).

[0070] The first gate electrode G1 and the second gate electrode G2 are Figure 4 In the figure, the first gate electrode G1 and the second gate electrode G2 are shown to be arranged on the same layer, but the embodiment is not limited thereto. In another embodiment, the first gate electrode G1 and the second gate electrode G2 may be arranged on different layers. Figure 4 , the first gate electrode G1 and the second gate electrode G2 are shown as a top gate type in which the first semiconductor layer Act1 and the second semiconductor layer Act2 are disposed respectively, but the embodiment is not limited thereto. In another embodiment, the first gate electrode G1 and the second gate electrode G2 may be a bottom gate type in which the first gate electrode G1 and the second gate electrode G2 may be disposed respectively below the first semiconductor layer Act1 and the second semiconductor layer Act2.

[0071] The storage capacitor Cst may include first and second storage electrodes CE1 and CE2 overlapping each other. The first and second storage electrodes CE1 and CE2 may each include a low resistance conductive material including at least one of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti).

[0072] The storage capacitor Cst may overlap the first thin film transistor T1 , and the first thin film transistor T1 may be a driving thin film transistor. Figure 4 The case where the storage capacitor Cst may be arranged to overlap the first thin film transistor T1 such that the first storage electrode CE1 may be the first gate electrode G1 of the first thin film transistor T1 is shown, but the embodiment is not limited thereto. In another embodiment, the storage capacitor Cst may be arranged not to overlap the first thin film transistor T1.

[0073] A buffer layer 110 may be disposed between the substrate 100 and the first thin film transistor T1 and the second thin film transistor T2. The buffer layer 110 may include an inorganic insulating material. For example, the buffer layer 110 may include silicon oxynitride (SiON), silicon oxide (SiO x ) and silicon nitride (SiN x ) is a single film or a multilayer film of at least one of the above.

[0074] The gate insulating layer 120 may be disposed between the first gate electrode G1 and the second gate electrode G2 and the first semiconductor layer Act1 and the second semiconductor layer Act2. The gate insulating layer 120 may include an inorganic insulating material. For example, the gate insulating layer 120 may include silicon oxynitride (SiON), silicon oxide (SiO x ) and silicon nitride (SiN x ) is a single film or a multilayer film of at least one of the above.

[0075] The first thin film transistor T1 and the second thin film transistor T2 may be covered by the first interlayer insulating layer 131 and the second interlayer insulating layer 132. The first interlayer insulating layer 131 may be disposed (for example, directly) on the first thin film transistor T1 and the second thin film transistor T2 and / or (for example, directly) on the first storage electrode CE1. The second interlayer insulating layer 132 may be disposed on the second storage electrode CE2. The first interlayer insulating layer 131 and the second interlayer insulating layer 132 may each include silicon oxynitride (SiON), silicon oxide (SiO x ) and silicon nitride (SiN x ) is a single film or a multilayer film of at least one of ). In one embodiment, the first interlayer insulating layer 131 may be a single film of silicon nitride (SiNx), and the second interlayer insulating layer 132 may be a single film of silicon nitride (SiN x ) and silicon oxide (SiO x ) multilayer film.

[0076] A data line DL may be disposed on the second interlayer insulating layer 132. The data line DL may be electrically connected to the first thin film transistor T1 and configured to provide a data signal. The data line DL may be a single film or a multi-layer film including at least one of aluminum (Al), copper (Cu), titanium (Ti), and any alloy thereof. In one embodiment, the data line DL may be a three-layer film of Ti / Al / Ti.

[0077] The driving voltage supply line PL may be configured to provide a driving signal to the first thin film transistor T1. The driving voltage supply line PL may be arranged on a layer that may be different from that of the data line DL. As used herein, the expression "A and B may be arranged on different layers" refers to a situation where at least one insulating layer may be arranged between A and B such that one of A and B may be arranged below the at least one insulating layer and the other may be arranged above the at least one insulating layer. A first planarization insulating layer 141 may be arranged between the driving voltage supply line PL and the data line DL.

[0078] The driving voltage supply line PL may be a single film or a multilayer film including at least one of aluminum (Al), copper (Cu), titanium (Ti), and any alloy thereof. In one embodiment, the driving voltage supply line PL may be a three-layer film of Ti / Al / Ti. Figure 4 14 shows a configuration in which the driving voltage supply line PL may be arranged only on the first planarization insulating layer 141, but the embodiment is not limited thereto. In another embodiment, the driving voltage supply line PL may be connected to a lower additional voltage line (not shown) that may be formed together with the data line DL through a through hole (not shown) that may be formed in the first planarization insulating layer 141, thereby reducing resistance.

[0079] The second planarization insulating layer 142 may cover the driving voltage supply line PL. The first planarization insulating layer 141 and the second planarization insulating layer 142 may each include an organic material. The organic material may include a general polymer (imide-based polymer, polymethyl methacrylate (PMMA), polystyrene (PS), or the like), a polymer derivative having a phenol group, an acrylic polymer, an aromatic ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, and any blend thereof.

[0080] The light emitting device 300 may be disposed on the second planarization insulating layer 142. The light emitting device 300 may include a pixel electrode 310, a common electrode 330, and an intermediate layer 320 disposed between the pixel electrode 310 and the common electrode 330, and may include an emission layer.

[0081] A pixel defining layer 150 may be disposed on the pixel electrode 310. Since the pixel defining layer 150 may include an opening corresponding to each pixel (e.g., an opening exposing at least a central portion of the pixel electrode 310), the pixel defining layer 150 may define the pixel. The pixel defining layer 150 may increase the distance between the edge of the pixel electrode 310 and the common electrode 330, thereby preventing arcing or the like from occurring therebetween. The pixel defining layer 150 may include, for example, an organic material such as polyimide (PI) or hexamethyldisiloxane (HMDSO).

[0082] The pixel electrode 310 may be electrically connected to a pixel circuit, for example, a first thin film transistor T1, a second thin film transistor T2 and a storage capacitor Cst, through a first connection metal CM1 and a second connection metal CM2. Figure 3 The pixel circuit PC.

[0083] The intermediate layer 320 may include a low molecular weight material or a high molecular weight material. If the intermediate layer 320 includes a low molecular weight material, the intermediate layer 320 may have a single layer structure or a multilayer structure including a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). The intermediate layer 320 may include various organic materials, for example, copper phthalocyanine (CuPc), N,N'-di(naphthalene-1-yl)-N,N'-diphenylbenzidine (NPB), tris-8-hydroxyquinoline aluminum (Alq 3 ) or a combination thereof. These layers can be formed by using vacuum deposition.

[0084] If the intermediate layer 320 includes a high molecular weight material, the intermediate layer 320 may have a structure including a hole transport layer (HTL) and an emission layer (EML). The HTL may include poly (3,4-ethylenedioxythiophene) (PEDOT), and the EML may include a high molecular weight material such as a polyphenylene vinylene (PPV) polymer and a polyfluorene polymer. The structure of the intermediate layer 320 is not limited thereto, and the intermediate layer 320 may have various structures. For example, the intermediate layer 320 may include an integrated layer located above the pixel electrode 310, or may include a layer patterned corresponding to the corresponding pixel electrode 310.

[0085] The common electrode 330 may be arranged to cover the display area DA. For example, the common electrode 330 may be integrally formed so as to cover the plurality of light emitting devices 300 .

[0086] An encapsulation layer 500 may be disposed on the common electrode 330. The encapsulation layer 500 may protect the organic light-emitting device from external moisture or oxygen. To this end, the encapsulation layer 500 may have a shape extending not only to the display area DA where the light-emitting device 300 may be disposed but also to the non-display area NDA outside the display area DA. The encapsulation layer 500 may include a first inorganic encapsulation layer 510, an organic encapsulation layer 520, and a second inorganic encapsulation layer 530, and the first inorganic encapsulation layer 510, the organic encapsulation layer 520, and the second inorganic encapsulation layer 530 may be stacked sequentially.

[0087] The first inorganic encapsulating layer 510 may be formed on the common electrode 330, and may include silicon oxide, silicon nitride, and / or silicon oxynitride. The first inorganic encapsulating layer 510 may be formed along a structure therebelow.

[0088] Since the organic encapsulation layer 520 may be disposed on the first inorganic encapsulation layer 510 and may have a sufficient thickness, the upper surface of the organic encapsulation layer 520 may be substantially flat. The organic encapsulation layer 520 may include one or more materials selected from polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, and hexamethyldisiloxane.

[0089] The second inorganic encapsulation layer 530 may cover the organic encapsulation layer 520 and may include silicon oxide, silicon nitride and / or silicon oxynitride. The first inorganic encapsulation layer 510 and the second inorganic encapsulation layer 530 may each have an area larger than that of the organic encapsulation layer 520 and may contact each other outside the organic encapsulation layer 520. For example, the first inorganic encapsulation layer 510 and the second inorganic encapsulation layer 530 may prevent the organic encapsulation layer 520 from being exposed to the outside.

[0090] As described above, the encapsulation layer 500 may include a first inorganic encapsulation layer 510, an organic encapsulation layer 520, and a second inorganic encapsulation layer 530. Accordingly, even if cracks may occur in the encapsulation layer 500, such a multi-layer structure may prevent the cracks from being connected to each other between the first inorganic encapsulation layer 510 and the organic encapsulation layer 520 or between the organic encapsulation layer 520 and the second inorganic encapsulation layer 530. Therefore, it is possible to prevent or minimize the penetration of external moisture or oxygen into the encapsulation layer 510. Figure 1 The formation of a channel in the display area DA.

[0091] Figure 5 It is schematically shown Figure 1 A schematic enlarged plan view of area A, Figure 6 It is schematically shown Figure 5 A schematic plan view of a first strain gauge SG1, and Figure 7 According to the implementation method Figure 6 Schematic cross-sectional view taken along line II-II'.

[0092] Reference Figure 5 , the first voltage line 40 , the second voltage line 50 , the fan-out part 20 , and the like may be arranged in the non-display area NDA between the display area DA and the pad area PDA of the substrate 100 .

[0093] The first voltage line 40 may be a first power supply voltage (eg, ELVDD) line, and the second voltage line 50 may be a second power supply voltage (eg, ELVSS) line. The first voltage line 40 may be connected to Figure 4 The driving voltage supply line PL, and the second voltage line 50 can be directly connected or connected to the Figure 4 The common electrode 330 is provided.

[0094] The first voltage line 40 may include a first main voltage line 42 extending along one side of the display area DA (e.g., outside the fourth edge E4) in the first direction D1 and a first connection portion 44 protruding in the second direction D2 from the first main voltage line 42. The first connection portion 44 may be provided in plurality and may be connected to the driving circuit 30 disposed in the pad area PDA across the bending area BA.

[0095] The second voltage line 50 may surround the remaining edges of the display area DA except for one edge of the display area DA adjacent to the first voltage line 40. The second voltage line 50 may include a second main voltage line 52 corresponding to both ends of the first main voltage line 42 and the remaining area of ​​the display area DA and a second connection portion 54 protruding from the end of the second main voltage line 52 in the second direction D2. The second connection portion 54 may be connected to the driving circuit 30.

[0096] The fan-out section 20 includes a conductor CL. The conductor CL may be electrically connected to Figure 4 The data line DL is configured to transmit the data signal applied from the driving circuit 30 to the Figure 3 The pixel circuit PC.

[0097] In the following, for the convenience of description, Figure 5 As shown in , the area between the bending area BA and the display area DA in the non-display area NDA of the substrate 100 may be defined as the first non-display area NDA1, and the area opposite to the first non-display area NDA1 with respect to the bending area BA may be defined as the second non-display area NDA2. For example, if the bending area BA can be bent, the second non-display area NDA2 may be an area that cannot be recognized from the front side, and may be an area between the bending area BA and the driving circuit 30.

[0098] The conductive wire CL may be arranged to sequentially pass through the first non-display area NDA1, the bending area BA, and the second non-display area NDA2. The length of the pad area PDA may be less than the length of the side of the display area DA adjacent to the pad area PDA. Accordingly, the interval between the conductive wires CL may be narrowed from the display area DA to the pad area PDA. The bending area BA may be an area where stress may be concentrated. Therefore, in order to minimize damage to the conductive wire CL during bending, the conductive wire CL may extend in the bending area BA in a direction parallel to the bending direction. Therefore, the conductive wire CL may be bent between the first non-display area NDA1 and the second non-display area NDA2.

[0099] The fan-out portion 20 may be divided into regions spaced apart from each other at least in the bending area BA. Figure 5 As shown in FIG. 1 , the fan-out part 20 may include a first fan-out part 21 disposed in the center and two second fan-out parts 22 respectively disposed at both sides of the first fan-out part 21. However, the embodiment is not limited thereto, and the fan-out part 20 may be divided into four or more areas.

[0100] In the bending area BA, the first connection portion 44 may be arranged in the spacing area SA between the first fan-out portion 21 and the second fan-out portion 22. As will be described below, the first connection portion 44, the second connection portion 54 and the conductive line CL may be arranged on the same layer in the bending area BA to prevent short circuits therebetween. Since the first connection portion 44 may be arranged in the spacing area SA, the current distribution through the first main voltage line 42 may be more uniform throughout the display area DA, and heat generation may be reduced, compared to a case where the first connection portion 44 may be arranged outside the fan-out portion 20. The first connection portion 44 may be arranged in the spacing area SA. Figure 54 and 5. Although shown as being arranged in the spacing area SA, the second connection portion 54 may be arranged in the spacing area SA, or the first connection portion 44 and the second connection portion 54 may be arranged in the spacing area SA.

[0101] A pair of first strain gauges SG1 may be arranged at both ends of the bending area BA, respectively. If the bending area BA may be bent, the first strain gauge SG1 may detect the stress applied to the bending area BA. The first strain gauge SG1 may include a first resistance wire SGL1 that goes back and forth multiple times to form a bending portion, and may be connected to the drive circuit 30. The resistance of the first resistance wire SGL1 may change according to the bending degree of the bending area BA. The first strain gauge SG1 senses the resistance change to detect the stress applied to the bending area BA, and the drive circuit 30 may measure the stress applied to the bending area BA.

[0102] The first resistance line SGL1 may be disposed on the first planarization insulating layer 141 and may be covered with the second planarization insulating layer 142. For example, the first resistance line SGL1 may be Figure 4 The driving voltage supply line PL is formed together to have the same structure as the driving voltage supply line PL.

[0103] Figure 8 It is schematically shown Figure 5 A schematic enlarged plan view of area B, Fig. 9 According to the implementation method Figure 8 A schematic cross-sectional view taken along line III-III' of Fig.10 According to the implementation method Figure 8 A schematic cross-sectional view taken along line IV-IV' of Fig.11 According to the implementation method Figure 8 A schematic cross-sectional view taken along line V-V' of Fig.12 According to the implementation method Figure 8 A schematic cross-sectional view taken along line VI-VI'.

[0104] Reference Figures 8 to 11 , the first fan-out section 21 and the second fan-out section 22 may each include a conductor CL. Figure 1 As the resolution of the display device 1 increases, the number of necessary wires CL may increase to reduce the interval between the wires CL. As a result, the risk of short circuit between the wires CL may increase. Accordingly, the wires CL may solve the above limitation by including a first wire CL1 and a second wire CL2 arranged at different heights. The term "different heights" may mean that the distance from the substrate 100 may be different.

[0105] like Fig. 9As shown in , the first conductive line CL1 may be arranged on the gate insulating layer 120, the second conductive line CL2 may be arranged on the first interlayer insulating layer 131, and the first conductive line CL1 and the second conductive line CL2 may be arranged alternately. Therefore, as seen in a plan view, even if the distance between the first conductive line CL1 and the second conductive line CL2 may be reduced, a short circuit between the first conductive line CL1 and the second conductive line CL2 may be prevented.

[0106] More specifically, the plurality of conductive lines CL may each include a first area CLa arranged in the first non-display area NDA1, a second area CLc arranged in the second non-display area NDA2, and a connecting conductive layer CLb configured to connect the first area CLa to the second area CLc. As described above, the heights of the first conductive line CL1 and the second conductive line CL2 adjacent to each other may be different, which means that the first area CLa of the first conductive line CL1 and the first area CLa of the second conductive line CL2 may be arranged on different layers, and the second area CLc of the first conductive line CL1 and the second area CLc of the second conductive line CL2 may be arranged on different layers. On the contrary, the connecting conductive layer CLb intersecting the bending area BA may be at the same height in the first conductive line CL1 and the second conductive line CL2.

[0107] For example, Fig.10 A first conductive line CL1 having a first region CLa and a second region CLc located on the gate insulating layer 120 and connected through a connecting conductive layer CLb is shown, and Fig.11 A second conductive line CL2 having a first region CLa and a second region CLc located on the first interlayer insulating layer 131 and connected through the connecting conductive layer CLb is shown.

[0108] The connection conductive layer CLb may be formed to be longer than the bending area BA so that contact points thereof with the first and second areas CLa and CLc may be arranged in the first and second non-display areas NDA1 and NDA2 , respectively.

[0109] The connection conductive layers CLb may be connected in parallel to each other and may include a first connection conductive layer CLb1 and a second connection conductive layer CLb2 overlapping each other in a plan view. Therefore, even if stress applied to the bending area BA may damage the first connection conductive layer CLb1 or the second connection conductive layer CLb2, electrical disconnection between the first area CLa and the second area CLc may be prevented.

[0110] The first connection conductive layer CLb1 may be disposed on the second interlayer insulating layer 132, and the second connection conductive layer CLb2 may be disposed on the first planarizing insulating layer 141. For example, the first connection conductive layer CLb1 may be formed together with the data line DL to have the same Figure 4The data line DL has the same structure, and the second connection conductive layer CLb2 can be connected to Figure 4 The second connection conductive layer CLb2 may be disposed at a position adjacent to the driving voltage supply line PL. Figure 5 The first strain gauge SG1 is on the same layer.

[0111] The connecting conductive layer CLb may intersect with the bending area BA. Fig.10 As shown in , the bending area BA may be an area where the buffer layer 110, the gate insulating layer 120, the first interlayer insulating layer 131 and the second interlayer insulating layer 132 on the substrate 100 can be removed (e.g., partially removed). Hereinafter, the buffer layer 110, the gate insulating layer 120, the first interlayer insulating layer 131 and the second interlayer insulating layer 132 may be collectively referred to as "inorganic insulating layer". For example, the inorganic insulating layer stacked on the substrate 100 may be understood to include a groove at a position corresponding to the bending area BA. The inorganic insulating layer may be partially removed in the bending area BA to facilitate bending in the bending area BA and prevent cracks or the like from occurring in the inorganic insulating layer during bending.

[0112] The region where the inorganic insulating layer can be removed may be filled with the organic layer 400. The organic layer 400 may extend from the bending region BA to a non-bending region adjacent to the bending region BA. The organic layer 400 may not only compensate for the height difference of the bending region BA where the inorganic insulating layer may be removed, but also absorb the stress generated by bending. Therefore, in order to transmit an electrical signal from the driving circuit 30 arranged in the pad area PDA to the display area DA, the concentration of stress generated during bending on the connecting conductive layer CLb arranged in the bending region BA can be effectively minimized.

[0113] The organic layer 400 may include at least one material selected from acrolein, methacrolein, polyester, polyethylene, polypropylene, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, and hexamethyldisiloxane.

[0114] Although not shown in the drawings, Figure 4 The pixel defining layer 150 may be arranged on the second planarization insulating layer 142 in the bending area BA. The bending protection layer may also be arranged in Figure 4 The pixel defining layer 150 is formed on the pixel defining layer 150 so that the stress-neutral plane can approach the line in the bending area BA during bending.

[0115] Reference Figure 8 and Fig.12 , the first connection portion 44 may be disposed between the first fan-out portion 21 and the second fan-out portion 22 in the bending area BA. The width of the first connection portion 44 may be greater than the width of the conductive line CL.

[0116] The first connection portion 44 may intersect the bending area BA and may be located on the first planarization insulating layer 141. The first connection portion 44 may also be arranged on the first planarization insulating layer 141 in the first non-display area NDA1 and the second non-display area NDA2. Therefore, since the first connection portion 44 may be arranged on the same layer as the second connection conductive layer CLb2 in the bending area BA, the first connection portion 44 may be spaced apart from the second connection conductive layer CLb2. However, since the first area CLa and the second area CLc may be located on a different layer from the first connection portion 44 in the first non-display area NDA1 and the second non-display area NDA2, the first connection portion 44 may be arranged to overlap with the first area CLa and the second area CLc in the vertical direction.

[0117] Since the connection conductive layer CLb may be broken due to the stress generated in the bending area BA, in order to prevent the electrical disconnection between the first area CLa and the second area CLc, the connection conductive layer CLb may include the first connection conductive layer CLb1 and the second connection conductive layer CLb2 connected in parallel as described above. Since the width of the first connection portion 44 may be greater than the width of the connection conductive layer CLb, the disconnection is less likely to occur in the first connection portion 44 compared to the connection conductive layer CLb. Therefore, the first connection portion 44 may be arranged only on the first planarization insulating layer 141.

[0118] The second strain gauge SG2 may be arranged at a position overlapping with the first connection portion 44. The second strain gauge SG2 may be arranged on the same layer as the first connection conductive layer CLb1. The second strain gauge SG2 may have the same Figure 6 Therefore, the second strain gauge SG2 may include a second resistance wire SGL2 that goes back and forth multiple times to form a bent portion, and may be electrically connected to Figure 5 The driving circuit 30 is provided.

[0119] According to one or more embodiments, the first connection portion 44 may be arranged in the spacing area SA between the first fan-out portion 21 and the second fan-out portion 22. For example, since the first connection portion 44 may be arranged between the conductive lines CL, the first connection portion 44 may be arranged closer to the center portion of the bending area BA than in the prior art. If the second strain gauge SG2 may be arranged to overlap with the first connection portion 44 in the bending area BA, stress applied to the bending area BA even near the center portion of the bending area BA may be measured, and the stress may not be caused by Figure 6 The stress applied to the entire bending area BA can therefore be determined more accurately.

[0120] For example, if you are manufacturing Figure 1During the process of manufacturing the display device 1, the central portion of the bending area BA may be subjected to an impact, and the stress may be locally increased due to the impact in the central portion of the bending area BA. Therefore, it is likely that a disconnection occurs in the connecting conductive layer CLb. However, due to Figure 6 The first strain gauge SG1 may have difficulty detecting such an increase in stress, and thus may have difficulty in pre-determining the stress increase phenomenon before an actual failure occurs. However, according to one or more embodiments, the second strain gauge SG2 overlapping the first connection portion 44 in the bending area BA may more accurately determine the stress applied to the entire bending area BA. Therefore, it may be pre-determined whether damage may occur by determining whether the stress applied to the bending area BA reaches a threshold value of the connecting conductive layer CLb. Figure 1 The display device 1 thus improves Figure 1 The reliability of the display device 1 in FIG.

[0121] Fig.12 4 shows an example in which the second strain gauge SG2 may be arranged at a position overlapping with the first connection portion 44, but the second strain gauge SG2 may be arranged at a position overlapping with the first connection portion 44. Figure 5 For example, the second strain gauge SG2 may be arranged to overlap with the second connecting portion 54. Figure 5 At least one of the first connection portion 44 and the second connection portion 54 overlaps.

[0122] According to one or more embodiments, stress generated in a bending region during bending of a display device may be accurately determined, thereby predetermining whether the bending region may be damaged, thereby improving reliability of the display device.

[0123] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those of ordinary skill in the art that various changes may be made in form and detail without departing from the scope and spirit as defined by the following claims including any equivalents.

Claims

1. A display device, comprising: A substrate, the substrate comprising a display area, a non-display area outside the display area, a pad area in the non-display area, and a bending area between the display area and the pad area; A first voltage line, wherein the first voltage line comprises: a first main voltage line, the first main voltage line being arranged between the display area and the bending area; and a first connection portion, the first connection portion protruding from the first main voltage line, extending toward the pad area and intersecting the bending area; a fan-out portion, the fan-out portion being arranged between the display area and the pad area on the substrate and comprising a plurality of conductive lines connecting the display area to the pad area; and a strain gauge, the strain gauge being arranged in the bending region, Wherein, in the bending region, the strain gauge and the first connecting portion of the first voltage line overlap in a direction perpendicular to the substrate.

2. The display device according to claim 1, wherein: Each of the plurality of conductors comprises: A first area, the first area is located between the display area and the bending area; a second region, the second region being located between the bending region and the pad region; and a connecting conductive layer, the connecting conductive layer electrically connecting the first region to the second region and intersecting the bending region, The connecting conductive layer includes a first connecting conductive layer and a second connecting conductive layer which are connected in parallel and overlap each other.

3. The display device according to claim 2, wherein: The second connecting conductive layer is arranged above the first connecting conductive layer, The second connection conductive layer and the first connection portion are arranged on the same layer, and The first connecting conductive layer and the strain gauge are arranged on the same layer.

4. The display device according to claim 3, wherein: The first region and the second region are located on the same layer, and The first connection portion is arranged on a different layer from the first region.

5. The display device according to claim 2, wherein: The plurality of conductive lines include a first conductive line and a second conductive line adjacent to each other, and The first region of the first conductive line and the second region of the second conductive line are arranged on different layers.

6. The display device according to claim 1, wherein: The fan-out portion includes a first fan-out portion and a second fan-out portion spaced apart from each other in the bending region, and The first connection portion is arranged in a spacing region between the first fan-out portion and the second fan-out portion in the bending region.

7. The display device according to claim 1, wherein: The strain gauge includes a resistance wire having a bent portion, the resistance wire being electrically connected to a driving circuit disposed in the pad region.

8. The display device according to claim 1, further comprising: a second voltage line that applies a voltage different from the voltage of the first voltage line to the display area, wherein the second voltage line includes a second connection portion extending in a direction parallel to the first connection portion, The second connection portion and the first connection portion are arranged on the same layer, and The strain gauge also overlaps with the second connecting portion in the bending region.

9. The display device according to claim 1, wherein: The first connection portion is arranged between the plurality of conductive lines.

10. The display device according to claim 1, further comprising: an inorganic insulating layer, the inorganic insulating layer being arranged on the substrate, The inorganic insulating layer includes a groove located at a position corresponding to the bending area. An organic layer is disposed in the groove, and The first connection portion and the plurality of wires are arranged on the organic layer in the bending region.

11. A display device, comprising: A substrate, the substrate comprising a display area, a non-display area outside the display area, a pad area in the non-display area, and a bending area between the display area and the pad area; a pair of first strain gauges, the pair of first strain gauges being arranged at two ends of the bending region; a fan-out portion, the fan-out portion being arranged between the display area and the pad area on the substrate and comprising a plurality of conductive lines connecting the display area to the pad area; A first voltage line, wherein the first voltage line has: A first main voltage line, wherein the first main voltage line is arranged between the display area and the bending area; as well as a first connection portion, the first connection portion protruding from the first main voltage line, extending toward the pad area and intersecting the bending area; a second voltage line that applies a voltage different from the voltage of the first voltage line to the display area, The second voltage line includes a second connection portion, the second connection portion extends in a direction parallel to the first connection portion, and The second connection portion and the first connection portion are arranged on the same layer; and a second strain gauge, the second strain gauge being arranged in the bending region, Wherein, in the bending region, the second strain gauge overlaps with at least one of the first connecting portion and the second connecting portion in a direction perpendicular to the substrate.

12. The display device according to claim 11, wherein: The fan-out portion includes a first fan-out portion and a second fan-out portion spaced apart from each other in the bending region, and The first connection portion is arranged in a spacing region between the first fan-out portion and the second fan-out portion in the bending region.

13. The display device according to claim 11, wherein: Each of the plurality of conductors comprises: A first area, the first area is located between the display area and the bending area; a second region, the second region being located between the bending region and the pad region; and a connecting conductive layer, the connecting conductive layer electrically connecting the first region to the second region and intersecting the bending region, The connecting conductive layer includes a first connecting conductive layer and a second connecting conductive layer which are connected in parallel and overlap each other.

14. The display device according to claim 13, wherein: The second connecting conductive layer is arranged above the first connecting conductive layer, The first connection portion, the second connection portion, the pair of first strain gauges, and the second connection conductive layer are arranged on the same layer, and The second strain gauge and the first connecting conductive layer are arranged on the same layer.

15. The display device according to claim 14, wherein: The display area is provided with a plurality of pixel circuits, a plurality of light emitting devices electrically connected to the plurality of pixel circuits, and a plurality of data lines electrically connected to the plurality of pixel circuits. The plurality of conductive lines are electrically connected to the plurality of data lines and transmit electrical signals from a driving circuit arranged in the pad region to the plurality of data lines, and The first connection conductive layer and the plurality of data lines are arranged on the same layer.

16. The display device according to claim 15, further comprising: A plurality of driving voltage supply lines are arranged in the display area, wherein: The plurality of driving voltage supply lines supply driving signals to the plurality of pixel circuits, and The second connection conductive layer and the plurality of driving voltage supply lines are arranged on the same layer.

17. The display device according to claim 15, wherein: The plurality of pixel circuits each include a storage capacitor having a first storage electrode and a second storage electrode, and The first region, the second region, and the first storage electrode or the second storage electrode are arranged on the same layer.

18. The display device according to claim 13, wherein: The first region and the second region are arranged on the same layer, and The first connection portion and the second connection portion are arranged on a different layer from the first region.

19. The display device according to claim 18, wherein: The plurality of conductive lines include a first conductive line and a second conductive line adjacent to each other, and The first region of the first conductive line and the second region of the second conductive line are arranged on different layers.

20. The display device according to claim 11, further comprising: an inorganic insulating layer, the inorganic insulating layer being arranged on the substrate, The inorganic insulating layer includes a groove located at a position corresponding to the bending area. An organic layer is disposed in the groove, and The first connection portion and the plurality of wires are arranged on the organic layer in the bending region.

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