Carrier rings used in deposition chambers

Abstract

This invention discloses a carrier ring for use in a deposition chamber, comprising an annular disk, an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region. The annular peripheral region includes an upper carrier ring surface, the annular wafer support region has a lower carrier ring surface that directly contacts a wafer during wafer transport, and the annular transition region includes a ramp between the upper carrier ring surface and the lower carrier ring surface. The ramp slopes downwards from the upper carrier ring surface toward the lower carrier ring surface.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a carrier ring for use in a deposition chamber, which can improve edge local defect problems and increase semiconductor fabrication process yield. Background Technology

[0002] Plasma-enhanced chemical vapor deposition (PECVD) is a thin-film deposition process that allows the deposition of thin films of various materials on wafers at relatively low temperatures (e.g., 400°C). In PECVD, deposition is achieved by introducing reactive gases between parallel electrodes. Capacitive coupling between the electrodes excites the reactive gases into plasma, thereby initiating a chemical reaction and causing the reaction products to be deposited on the wafer.

[0003] It is known that in some PECVD machines (such as Lam Research Co.'s Vector series), a carrier ring is arranged around the wafer pedestal, which, together with the spider fork, allows the wafer to move smoothly between different deposition chambers. However, by-products of the deposition reaction are easily generated on the surface of the carrier ring near the wafer edge, leading to edge local defects on the wafer. Summary of the Invention

[0004] The main objective of this invention is to provide an improved carrier ring for a deposition chamber, which can overcome the shortcomings and disadvantages of the prior art.

[0005] One aspect of the present invention provides a carrier ring for use in a deposition chamber, comprising: an annular disk body including an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region; wherein the annular peripheral region includes an upper carrier ring surface, the annular wafer support region has a lower carrier ring surface that directly contacts a wafer during wafer transport, and the annular transition region includes a ramp between the upper carrier ring surface and the lower carrier ring surface, wherein the ramp slopes downward from the upper carrier ring surface toward the lower carrier ring surface.

[0006] According to an embodiment of the present invention, there is an additional step height between the inclined surface and the lower carrier ring surface.

[0007] According to an embodiment of the present invention, the step height is between 0.3 mm and 0.6 mm.

[0008] According to an embodiment of the present invention, the thickness of the annular transition region increases radially outward along the radius of the annular disk.

[0009] According to an embodiment of the present invention, the inclined surface and the upper surface of the carrier ring are connected at an angle on a first surface.

[0010] According to an embodiment of the present invention, the angle of the corner on the first surface is between 100° and 180°.

[0011] According to an embodiment of the invention, a sidewall surface is further included, located between the inclined surface and the lower carrier ring surface.

[0012] According to an embodiment of the present invention, during processing, a gap exists between the sidewall surface and a peripheral edge of the wafer.

[0013] According to an embodiment of the present invention, the inclined surface and the sidewall surface are connected at a corner on a second surface.

[0014] According to an embodiment of the present invention, the angle of the corner on the second surface is between 95° and 150°.

[0015] According to an embodiment of the present invention, the inclined surface is lower than the upper surface of the wafer during the processing.

[0016] Another aspect of the present invention provides a chamber for performing deposition processing on a wafer, comprising: a wafer holder having a central surface region for placing a wafer, and a carrier ring support surface surrounding the central surface region; and a carrier ring disposed on the carrier ring support surface, wherein the carrier ring includes an annular disk comprising an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region, wherein the annular peripheral region includes an upper carrier ring surface, the annular wafer support region has a lower carrier ring surface that directly contacts a wafer during wafer transport, and the annular transition region includes a ramp between the upper carrier ring surface and the lower carrier ring surface.

[0017] According to an embodiment of the present invention, the inclined surface slopes downward from the upper surface of the carrier ring toward the lower carrier ring surface.

[0018] According to an embodiment of the present invention, the carrier ring support surface is descended one step from the central surface region.

[0019] According to an embodiment of the present invention, there is a step height between the inclined surface and the lower carrier ring surface.

[0020] According to an embodiment of the present invention, the thickness of the annular transition region increases radially outward along the radius of the annular disk.

[0021] According to an embodiment of the present invention, the carrier ring further includes a sidewall surface, located between the inclined surface and the lower carrier ring surface.

[0022] According to an embodiment of the present invention, during processing, a gap exists between the sidewall surface and a peripheral edge of the wafer. Attached Figure Description

[0023] Figure 1 This is a schematic diagram illustrating a chamber for performing deposition on a wafer, as shown in an embodiment of the present invention.

[0024] Figure 2 This is an enlarged schematic diagram of the carrier ring placed on the carrier ring support surface;

[0025] Figure 3 This is an enlarged schematic diagram of the carrier ring;

[0026] Figure 4 This is an enlarged cross-sectional schematic diagram of a carrier ring according to another embodiment of the present invention.

[0027] Explanation of main component symbols

[0028] 1 chamber

[0029] 10 Chip Sockets

[0030] 10a Central surface area

[0031] 10b Carrier ring support surface

[0032] 20 spray heads

[0033] 30 Plasma

[0034] 40 carrier rings

[0035] 100 chips

[0036] 100a upper surface

[0037] 100b outer edge

[0038] 101 Crystal edge region

[0039] 110 Heating Plate

[0040] 400 ring-shaped disk

[0041] 401 Annular wafer support area

[0042] 401a Lower carrier ring surface

[0043] 402 Circular Peripheral Area

[0044] 402a upper surface of the carrier ring

[0045] 403 Annular Transition Zone

[0046] 403a Bevel

[0047] 404a sidewall surface

[0048] 411 Corner on the first surface

[0049] 412 Corner on the second surface

[0050] 420 gap

[0051] d Step height

[0052] T0, T1 thickness

[0053] Angles θ1 and θ2 Detailed Implementation

[0054] In the following description, details will be illustrated with reference to the accompanying drawings, which also form part of the detailed description of the specification, and which are depicted in a manner that describes specific examples in which the embodiments may be practiced. The embodiments described below are given sufficient detail to enable those skilled in the art to implement them.

[0055] Of course, other embodiments may be adopted, or any structural, logical, and electrical changes may be made without departing from the embodiments described herein. Therefore, the following detailed description should not be regarded as limiting; rather, the embodiments included therein will be defined by the appended claims.

[0056] Please see Figure 1 This is a schematic diagram illustrating a chamber for performing deposition on a wafer according to an embodiment of the present invention. Figure 1 As shown, chamber 1 is, for example, a deposition chamber in a plasma-enhanced chemical vapor deposition (PECVD) machine, comprising: a wafer holder 10 having a central surface region 10a for placing a wafer 100, and a carrier ring support surface 10b surrounding the central surface region 10a. According to an embodiment of the present invention, the carrier ring support surface 10b descends one step from the central surface region 10a.

[0057] According to an embodiment of the present invention, the central surface region 10a can be a roughly circular and upwardly convex region, and the area of ​​the central surface region 10a is slightly smaller than the area of ​​the wafer 100, such that when the wafer 100 is placed on the central surface region 10a, its edge region 101 will slightly extend beyond the range of the central surface region 10a. Furthermore, according to an embodiment of the present invention, a heating plate 110 or other components may also be provided within the wafer holder 10. According to an embodiment of the present invention, an index plate may be additionally provided around the wafer holder 10.

[0058] According to an embodiment of the present invention, a shower head 20 may be disposed above the wafer holder 10 within the chamber 1, directly facing the wafer 100. The shower head 20 may be coupled to an intake system or manifold to allow reactive gases to enter the chamber 1. Furthermore, the shower head 20 may be coupled to a power source (not shown) to provide the voltage or bias required to generate plasma 30. Reactive gases, such as silane, oxygen, or ammonia, form plasma 30 between the shower head 20 and the wafer 100, and cause reaction products, such as silicon oxide or silicon nitride, to deposit on the wafer 100.

[0059] For simplicity, peripheral equipment such as the intake system or manifold, gas supply lines, and control modules coupled to chamber 1 are not shown in the figure. Those skilled in the art should understand that the above configuration is merely illustrative, and the present invention can be applied to various different configuration environments.

[0060] According to an embodiment of the present invention, a carrier ring 40 is disposed on the carrier ring support surface 10b, wherein the carrier ring 40 includes an annular disk 400, wherein the annular disk 400 may be made of a material that does not participate in the deposition reaction, such as alumina, but is not limited thereto. According to an embodiment of the present invention, the annular disk 400 may be divided into an annular wafer support region 401, an annular peripheral region 402, and an annular transition region 403, which is located between the annular wafer support region 401 and the annular peripheral region 402.

[0061] According to an embodiment of the present invention, the annular peripheral region 402 includes a carrier ring upper surface 402a, and the annular wafer support region 401 has a lower carrier ring surface 401a, which is in direct contact with the wafer 100 during a process. According to an embodiment of the present invention, the annular transition region 403 includes a slope 403a, which is located between the carrier ring upper surface 402a and the lower carrier ring surface 401a. According to an embodiment of the present invention, the slope 403a may be a flat surface that is not parallel to the carrier ring upper surface 402a.

[0062] Please also refer to Figure 2 and Figure 3 ,in Figure 2 This is an enlarged schematic diagram of the carrier ring placed on the carrier ring support surface 10b. Figure 3 This is an enlarged schematic diagram of the carrier ring. (For example...) Figure 2 and Figure 3 As shown, the carrier ring 40 is placed on the carrier ring support surface 10b, and the wafer 100 is placed on the central surface region 10a. The edge region 101 extends slightly beyond the central surface region 10a, corresponding to the annular wafer support region 401 and the lower carrier ring surface 401a.

[0063] During the deposition reaction, the lower carrier ring surface 401a does not directly contact the crystal edge region 101. At this time, the entire ramp 403a is lower than the upper surface 100a of the wafer 100. When it is necessary to move the wafer 100 to the next workstation, a transport jig (not shown), such as a spider fork, extends under the carrier ring 40 and raises the carrier ring 40 so that the lower carrier ring surface 401a directly contacts the crystal edge region 101 of the wafer 100 and supports the wafer 100. At this time, the ramp 403a may be slightly higher than the upper surface 100a of the wafer 100.

[0064] According to an embodiment of the present invention, the thickness of the wafer 100 is, for example, 0.775 mm. According to an embodiment of the present invention, the inclined surface 403a of the annular transition region 403 slopes downward from the upper surface 402a of the carrier ring towards the lower carrier ring surface 401a. According to an embodiment of the present invention, there is a step height d between the inclined surface 403a and the lower carrier ring surface 401a, wherein the step height d can be between 0.3 mm and 0.6 mm.

[0065] Furthermore, according to embodiments of the present invention, the thickness of the annular transition region 403 increases radially outward along the radius of the annular disk 400; that is, the portion of the annular transition region 403 near the annular peripheral region 402 is relatively thick, while the portion near the annular wafer support region 401 is relatively thin. According to embodiments of the present invention, the thickness T0 of the annular peripheral region 402 can be approximately 4.0 to 6.0 mm, for example, 4.7 mm, but is not limited thereto. According to embodiments of the present invention, the thickness T1 of the annular wafer support region 401 can be approximately 3.0 to 4.0 mm, for example, 3.6 mm, but is not limited thereto.

[0066] According to an embodiment of the present invention, the inclined surface 403a and the upper surface 402a of the carrier ring are connected by a corner 411 on a first surface. According to an embodiment of the present invention, the angle θ1 of the corner 411 on the first surface is between 100° and 180°.

[0067] According to an embodiment of the present invention, the carrier ring 40 further includes a sidewall surface 404a, located between the inclined surface 403a and the lower carrier ring surface 401a. According to an embodiment of the present invention, the inclined surface 403a and the sidewall surface 404a are connected at a corner 412 on a second surface. According to an embodiment of the present invention, the angle θ2 of the corner 412 on the second surface is between 95° and 150°. According to an embodiment of the present invention, during processing, a gap 420 is formed between the sidewall surface 404a and a peripheral edge 100b of the wafer 100.

[0068] The advantage of this invention is that by dividing the annular disk 400 of the carrier ring 40 into an annular wafer support region 401, an annular peripheral region 402, and an annular transition region 403, a slope 403a is formed close to the crystal edge region 101 of the wafer 100. This can avoid the generation of by-products of the deposition reaction on the carrier ring 40 and improve the edge local defect problem.

[0069] Figure 4 This is an enlarged cross-sectional view of the carrier ring 40a according to another embodiment of the present invention, wherein the same elements, layers or regions are still represented by the same symbols. Figure 4 As shown, the corner 411 on the first surface and the corner 412 on the second surface can be relatively rounded corner structures. In addition, the inclined surface 403a of the annular transition region 403 between the corner 411 on the first surface and the corner 412 on the second surface can be a curved surface or a curved surface.

[0070] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.

Claims

1. A chamber for performing deposition processes on a wafer, the chamber comprising: Include: A wafer carrier having a central surface area for placing a wafer, and a ring support surface surrounding the central surface area; and A carrier ring is disposed on the carrier ring support surface, wherein the carrier ring includes an annular disk body comprising an annular wafer support region, an annular peripheral region, and an annular transition region between the annular wafer support region and the annular peripheral region, wherein the annular peripheral region includes an upper surface of the carrier ring, the annular wafer support region has a lower carrier ring surface that directly contacts the wafer during wafer transport, and the annular transition region includes a ramp, wherein the ramp is a curved surface between the upper surface of the carrier ring and the lower carrier ring surface, wherein during the deposition process, the entire ramp is lower than the upper surface of the wafer.

2. The chamber of claim 1, wherein the ramp slopes downward from the upper surface of the carrier ring toward the lower carrier ring surface.

3. The chamber of claim 1, wherein the carrier ring support surface descends one step from the central surface region.

4. The chamber of claim 1, wherein there is a step height between the inclined surface and the lower carrier ring surface.

5. The chamber of claim 1, wherein the thickness of the annular transition region increases radially outward along the radius of the annular disc.

6. The chamber of claim 1, wherein the carrier ring further comprises a sidewall surface between the ramp and the lower carrier ring surface.

7. The chamber of claim 6, wherein during processing, a gap exists between the sidewall surface and the peripheral edge of the wafer.

8. The chamber of claim 1, wherein the inclined surface is a curved surface.

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