Display devices

Abstract

A display device includes: a substrate, the substrate including: a display area including pixels and a light-transmitting area included in a portion of the display area; and signal lines, the signal lines being arranged in the display area and electrically connected to the pixels, wherein the signal lines include: a first signal line on a first side; a second signal line on a second side and arranged with the first signal line in a first direction; and a third signal line on a third side, and the third signal line being arranged with the first signal line and the second signal line in a second direction, the first signal line and the second signal line being insulated from each other in the display area, and a length of the third signal line in the first direction being longer than a length of the second signal line in the first direction.

Description

[0001] This application claims priority to and all benefits of Korean Patent Application No. 10-2019-0135418, filed on October 29, 2019, which is hereby incorporated by reference in its entirety. Technical Field

[0002] Exemplary embodiments of the present invention relate to a display apparatus. Background Art

[0003] Display devices such as liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays include a display panel that includes a plurality of pixels that display an image. Each pixel includes a pixel electrode that receives a data signal, and the pixel electrode is connected to at least one transistor and thus receives the data signal.

[0004] Recently, various display devices having various functions other than image display have been developed. For example, a display device embedded with a camera function has been developed. Summary of the Invention

[0005] Exemplary embodiments of the present invention relate to a display device in which a light-transmitting area is arranged in a display area to minimize the occurrence of brightness deviation in a displayed image while reducing the area of a dead zone at the periphery of the light-transmitting area.

[0006] An exemplary embodiment of a display device according to the present invention includes: a substrate, the substrate including: a display area including a plurality of pixels and a light-transmitting area including a portion arranged in the display area; and a plurality of signal lines, the plurality of signal lines being arranged in the display area and electrically connected to the plurality of pixels, wherein the plurality of signal lines include: a first signal line, the first signal line being arranged on a first side relative to the light-transmitting area; a second signal line, the second signal line being arranged on a second side relative to the light-transmitting area and arranged with the first signal line in a first direction; and a third signal line, the third signal line being arranged on a third side relative to the light-transmitting area, and the third signal line being arranged with the first signal line and the second signal line in a second direction different from the first direction, the first signal line and the second signal line being insulated from each other in the display area, and a length of the third signal line in the first direction being greater than a length of the second signal line in the first direction.

[0007] An exemplary embodiment of a display device according to the present invention includes: a substrate, the substrate including: a display area including a plurality of pixels and a light-transmitting area including a portion arranged in the display area; and a plurality of signal lines, the plurality of signal lines being arranged in the display area and electrically connected to the plurality of pixels, wherein the plurality of signal lines include: a first signal line arranged on a first side relative to the light-transmitting area; a second signal line arranged on a second side relative to the light-transmitting area and arranged with the first signal line in a first direction; and a third signal line arranged on a third side relative to the light-transmitting area, the third signal line being arranged with the first signal line and the second signal line in a second direction different from the first direction, the display area including a disconnected corresponding area overlapping with the light-transmitting area in the second direction, and the third signal line being connected to at least one resistor arranged in the disconnected corresponding area.

[0008] An exemplary embodiment of a display device according to the present invention includes: a substrate, the substrate including: a display area including a plurality of pixels and a light-transmitting area including a portion arranged in the display area; and a plurality of signal lines, the plurality of signal lines being arranged in the display area and electrically connected to the plurality of pixels, wherein the plurality of signal lines include: a first signal line, the first signal line being arranged on a first side relative to the light-transmitting area; a second signal line, the second signal line being arranged on a second side relative to the light-transmitting area and aligned with the first signal line in a first direction; and a third signal line being arranged on a third side relative to the light-transmitting area, wherein the display device includes a resistor connected to an end of the second signal line adjacent to the light-transmitting area.

[0009] In exemplary embodiments of the present invention, a display device in which a light-transmitting area is arranged in a display area may be provided to minimize the occurrence of brightness deviation in a displayed image while reducing the area of a dead zone at the periphery of the light-transmitting area. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other exemplary embodiments, advantages, and features of the present disclosure will become more apparent by describing in further detail exemplary embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0011] Figure 1 is a plan view of an exemplary embodiment of a display device according to the present invention,

[0012] Figure 2 It is taken along line IIa-IIb Figure 1 A cross-sectional view of a display device,

[0013] Figure 3 、 Figure 4 and Figure 5 is a plan view of an exemplary embodiment of a display device according to the present invention,

[0014] Figure 6 、 Figure 7 、 Figure 8 、 Figure 9 and Figure 10 is an enlarged plan view of an exemplary embodiment of the periphery of a light-transmitting area of a display device according to the present invention,

[0015] Figure 11 is a plan view of an exemplary embodiment of two adjacent pixels arranged in a display area of a display device according to the present invention,

[0016] Figure 12 It is taken along line XIIa-XIIb Figure 11 A cross-sectional view of a display device,

[0017] Figure 13 is a plan view of an exemplary embodiment of a display device according to the present invention,

[0018] Figure 14 is a circuit diagram of an exemplary embodiment of a pixel PX of a display device according to the present invention,

[0019] Figure 15 is a plan view of an exemplary embodiment of a resistor connected to a signal line of a display device according to the present invention,

[0020] Figure 16 It is taken along line XVIa-XVIb Figure 15 A cross-sectional view of a display device,

[0021] Figure 17 is a plan view of an exemplary embodiment of a resistor connected to a signal line of a display device according to the present invention,

[0022] Figure 18 It is taken along line XVIIIa-XVIIIb Figure 17 A cross-sectional view of a display device,

[0023] Figure 19 It is taken along line XVIIIa-XVIIIb Figure 17 another cross-sectional view of a display device, and

[0024] Figure 20 A planar shape of an exemplary embodiment of a resistor connected to a signal line of a display device according to the present invention is shown. DETAILED DESCRIPTION

[0025] In the following detailed description, only certain exemplary embodiments of the present invention have been shown and described, simply by way of illustration. As those skilled in the art will recognize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

[0026] Accordingly, the drawings and description are to be regarded as illustrative in nature and not restrictive.Throughout the specification, like reference numerals refer to like elements.

[0027] Because the size and thickness of each configuration shown in the drawings are arbitrarily indicated for better understanding and ease of description, the present invention is not necessarily limited to the drawings. In the drawings, the thickness of layers, films, panels, regions, etc. are exaggerated for clarity. In addition, in the drawings, the thickness of some layers and regions are exaggerated for better understanding and ease of description.

[0028] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements. The terms "on" or "above" mean above or below an object part and do not necessarily mean on the upper side of the object part based on the direction of gravity.

[0029] It will be understood that although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or section from another element, component, region, layer, or section. Thus, a first element, component, region, layer, or section discussed below could be referred to as a second element, component, region, layer, or section without departing from the teachings herein.

[0030] The terminology used herein is for the purpose of describing specific embodiments only and is not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms, including "at least one," unless the context clearly indicates otherwise. "Or" means "and / or." As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0031] In addition, unless explicitly described to the contrary, the word “comprise” and variations such as “comprises” or “comprising” will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.

[0032] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element as illustrated in the figures. It will be understood that relative terms are intended to include different orientations of the device in addition to the orientation illustrated in the figures. In an exemplary embodiment, when the device in one of the figures is turned over, the element described as being on the "lower" side of the other elements will subsequently be oriented on the "upper" side of the other elements. Thus, the exemplary term "lower" can include both "lower" and "upper" orientations depending on the specific orientation of the figure. Similarly, when the device in one of the figures is turned over, the element described as being "below" or "beneath" the other elements will subsequently be oriented "above" the other elements. Thus, the exemplary terms "below" or "below" can include both above and below orientations.

[0033] Throughout the specification, “in a plan view (also referred to as “on a plane”)” indicates an observation view of a plane parallel to two intersecting directions (for example, the first direction DR1 and the second direction DR2), and “in a cross-sectional view” indicates an observation view of a plane cut along a direction perpendicular to the plane parallel to the first direction DR1 and the second direction DR2 (for example, the third direction DR3). In addition, when two constituent elements overlap, unless otherwise specified, it means that the two constituent elements overlap in the third direction DR3 (for example, in a direction perpendicular to the top side of the substrate).

[0034] First, refer to Figures 1 to 3 , an exemplary embodiment of a display device according to the present invention will be described.

[0035] Figure 1 is a plan view of an exemplary embodiment of a display device according to the present invention, and Figure 2 It is taken along line IIa-IIb Figure 1 A cross-sectional view of a display device.

[0036] The display apparatus in an exemplary embodiment of the present invention includes a display panel 1000 including a display area DA, a light-transmitting area CA, and a peripheral area PA.

[0037] The display area DA is an area where multiple pixels PX are arranged and thus can display images. Each pixel PX may include a pixel circuit including at least one transistor and a light-emitting portion where light from the image is displayed. A plurality of signal lines 150, 150a, and 150b are arranged in the display area DA.

[0038] The light-transmitting area CA is an area in which an image is not displayed, and at least a portion of the light-transmitting area CA may be surrounded by the display area DA in a plan view. Figure 1As shown in , the light-transmitting area CA may be completely surrounded by the display area DA, or may be recessed from and thus attached to an edge of the display area DA. Such a light-transmitting area CA may be referred to as including a portion disposed within the display area DA.

[0039] The light-transmitting area CA has a higher light transmittance than the display area DA and the peripheral area PA.

[0040] Reference Figure 2 , the display device in an exemplary embodiment of the present invention may further include at least one optical device OD disposed under the display panel 1000. The light-transmitting area CA is an area in which light can enter the optical device OD disposed under the light-transmitting area CA along the third direction DR3 of the display panel 1000 or light can be emitted from the optical device OD.

[0041] In an exemplary embodiment, for example, the optical device OD may be provided as a camera, a flash, a sensor, etc. In an exemplary embodiment, for example, the optical device OD may emit light of a predetermined wavelength range toward an object arranged on the display panel 1000 or may receive light reflected from the object. The light of the predetermined wavelength may be light of a wavelength that can be processed by the optical device OD, for example, visible light (such as light of an image displayed in the display area DA) or light of a wavelength other than visible light.

[0042] Such an optical device OD may overlap the light-transmitting area CA in the third direction DR3, and light emitted from or entering the optical device OD may pass through the light-transmitting area CA of the display panel 1000. In a plan view, the optical device may have an area entirely or partially corresponding to the light-transmitting area CA.

[0043] like Figure 1 As shown in , the light-transmitting area CA may be disposed substantially at the center of the display area DA in the first direction DR1 while being disposed close to the upper end of the display area DA, but the position of the light-transmitting area CA is not limited thereto.

[0044] The signal lines 150, 150a, and 150b may be connected to transistors of corresponding pixel circuits.The plurality of signal lines 150, 150a, and 150b may extend substantially in the first direction DR1, respectively.

[0045] The signal lines 150 , 150 a , and 150 b respectively extending in the first direction DR1 may not overlap with the light-transmitting area CA in a plan view.

[0046] In a plan view, the signal line 150a may be arranged at one side (e.g., the left side) relative to the light-transmitting area CA, the signal line 150b may be arranged at the other side (e.g., the right side) relative to the light-transmitting area CA, and the signal line 150 may be arranged at yet another side (e.g., the lower side or the upper side) relative to the light-transmitting area CA.

[0047] The length of the signal line 150 in the first direction DR1 is longer than the length of each of the signal lines 150 a and 150 b in the first direction DR1 .

[0048] The plurality of signal lines 150a and 150b may be arranged in one-to-one correspondence with a pair of signal lines 150a and 150b aligned in the first direction DR1. The pair of signal lines 150a and 150b arranged in the first direction DR1 may be insulated from each other in the display area DA instead of being electrically connected to each other.

[0049] Virtual extension lines of the signal lines 150 a and 150 b in the first direction DR1 may pass through the light-transmitting area CA.

[0050] The signal lines 150 a and 150 b and the signal line 150 may be arranged in the second direction DR2 .

[0051] The signal line 150 extends from the left edge to the right edge of the display area DA, the signal line 150a extends only from the left edge to the inside of the display area DA, and the signal line 150b extends only from the right edge to the inside of the display area DA.

[0052] The peripheral area PA is an area where an image is not displayed and is adjacent to the periphery of the display area DA. In an exemplary embodiment, for example, the peripheral area PA may surround the display area DA. However, in some cases, at least some of the peripheral area PA may display an image.

[0053] The peripheral area PA may include a first driver 400 a and a second driver 400 b that are connected to the plurality of signal lines 150 , 150 a , and 150 b and apply driving signals. Figure 1 The first driver 400a is exemplarily shown as being arranged outside the left edge of the display area DA, and the second driver 400b is arranged outside the right edge of the display area DA. In an exemplary embodiment, for example, the first driver 400a and the second driver 400b may be gate drivers that generate gate signals including a gate-on voltage and a gate-off voltage and apply the gate signals to the signal lines 150, 150a, and 150b. The first driver 400a and the second driver 400b may sequentially apply the gate signals to the plurality of signal lines 150, 150a, and 150b in a direction parallel to the second direction DR2.

[0054] The signal line 150 is connected to the first and second drivers 400 a and 400 b without passing through the light-transmitting area CA, and thus may receive driving signals from the first and second drivers 400 a and 400 b .

[0055] The signal lines 150 a and 150 b may be connected to only one of the first driver 400 a and the second driver 400 b and thus may receive a driving signal therefrom.

[0056] The pair of signal lines 150a and 150b arranged in the first direction DR1 can be provided in a disconnected form because the signal lines extending horizontally, like signal line 150, are removed in the light-transmitting area CA and at the periphery of the light-transmitting area CA. Specifically, signal line 150a is connected to the first driver 400a on the left side and extends substantially in the first direction DR1 to a portion close to the light-transmitting area CA, while signal line 150b is connected to the second driver 400b on the right side and extends substantially in the first direction to a portion close to the light-transmitting area CA. In other words, each of signal lines 150a and 150b has an end portion arranged at the periphery of the light-transmitting area CA in the display area DA. Each of the ends of signal lines 150a and 150b in the display area DA may be adjacent to the light-transmitting area CA in the display area DA.

[0057] When the pixel circuit of the pixel PX is provided, the first driver 400 a and the second driver 400 b may be integrated on the substrate 110 of the display panel 1000 through the same process.

[0058] Reference Figure 2 , the opening HL may be defined in the substrate 110 included in the display panel 1000 by removing a portion corresponding to (or overlapping with) the light-transmitting area CA. The optical device OD may be arranged to correspond to the opening HL of the substrate 110. In a plan view, the opening HL of the substrate 110 may be arranged within the display area DA.

[0059] At least one insulating layer 180 and at least one conductive layer are disposed on the substrate 110, and the pixel electrode 191, the emission layer 370, and the common electrode 270 may be disposed on the at least one insulating layer 180 and the at least one conductive layer. The pixel electrode 191, the emission layer 370, and the common electrode 270 disposed in one pixel PX may form a light emitting diode ED.

[0060] An encapsulation layer 380, including at least one inorganic layer and at least one organic layer, may be disposed on the light-emitting diode ED. The encapsulation layer 380 may include, for example, a plurality of inorganic layers 381 and 383 and an organic layer 382 disposed between adjacent inorganic layers 381 and 383. The organic layer 382 may have an end or edge spaced apart from the opening HL of the substrate 110, and the inorganic layers 381 and 383 may further extend from the organic layer 382 toward the opening HL and thus may have edges adjacent to the edges of the opening HL of the substrate 110. The inorganic layers 381 and 383 may define the opening HL together with the substrate 110 by removing portions corresponding to the light-transmitting area CA. The encapsulation layer 380 encapsulates the periphery of the opening HL to prevent foreign matter, such as moisture, from entering the display panel 1000 from the outside through the opening HL.

[0061] Figure 3 is a plan view of an exemplary embodiment of a display device according to the present invention.

[0062] Reference Figure 3 , except that the light-transmitting area CA is arranged close to the upper end of the display area DA while being arranged close to the left edge or the right edge of the display area DA, the display panel 1000a included in the display device in the illustrated exemplary embodiment is similar to Figure 1 That is, the distance from the left edge of the display area DA to the light-transmitting area CA and the distance from the right edge of the display area DA to the light-transmitting area CA may be different from each other.

[0063] The length of the signal line 150 a arranged on the left side with respect to the light-transmitting area CA may be different from the length of the signal line 150 b arranged on the right side with respect to the light-transmitting area CA. Figure 3 An example is illustrated in which the light-transmitting area CA is adjacent to the right edge of the display area DA and the length of the signal line 150 a is longer than the length of the signal line 150 b .

[0064] In an exemplary embodiment of the present invention, the light-transmitting area CA in which the optical device OD is arranged is arranged in the display area DA in the display device in which the optical device OD such as a camera is arranged behind the display panels 1000 and 1000a, and therefore, the area of the peripheral area PA can be reduced compared to the display device in which the optical device OD is arranged outside the display area DA.

[0065] In an exemplary embodiment of the present invention, signal lines 150a and 150b, which can only extend through the light-transmitting area CA, terminate at the periphery of the light-transmitting area CA. Therefore, because no signal lines are provided that extend while circumnavigating the light-transmitting area CA, there is no need to form additional wiring areas at the periphery of the light-transmitting area CA. Consequently, the area of the dead zone, where no image can be displayed at the periphery of the light-transmitting area CA, can be significantly reduced. Specifically, in the case of a high-resolution display device, the number of signal lines that need to pass through the light-transmitting area by circumnavigating the periphery of the light-transmitting area CA may increase. However, in an exemplary embodiment of the present invention, when the display device has a high resolution at the periphery of the light-transmitting area CA, there is no need to form a detour area for the increased signal lines, thereby further reducing the dead zone around the light-transmitting area CA.

[0066] Next, refer to Figure 4 and Figure 5 With the above Figure 1 An exemplary embodiment of a display device according to the present invention will now be described.

[0067] Figure 4 and Figure 5 is a plan view of an exemplary embodiment of a display device according to the present invention.

[0068] First, refer to Figure 4 The display panel 1000b included in the display device according to the illustrated exemplary embodiment is substantially the same as the display panel of the above-described exemplary embodiment, except that the signal line 150 is connected to at least one resistor R disposed in the display area DA. The resistor R may be a portion having lower conductivity than other portions of the signal line 150.

[0069] The virtual area provided by extending the light-transmitting area CA in the display area DA parallel to and perpendicular to the second direction DR2 is referred to as the disconnection corresponding area CAL. That is, the disconnection corresponding area CAL may be a portion of the display area DA that overlaps with the light-transmitting area CA in the second direction DR2. The disconnection corresponding area CAL may extend from the upper end of the display area DA to the lower end of the display area DA. The width of the disconnection corresponding area CAL in the first direction DR1 may be substantially equal to the width of the light-transmitting area CA in the first direction DR1.

[0070] The resistor R connected to the signal line 150 may correspond to the disconnected corresponding area CAL. Therefore, one signal line 150 may be divided into a signal line portion arranged on the left side relative to the resistor R and connected to the first driver 400a, and a signal line portion arranged on the right side relative to the resistor R and connected to the second driver 400b. The signal line portion on the left side of the signal line 150 may be aligned with the signal line 150a in the second direction DR2 and thus overlap with each other, and the signal line portion on the right side of the signal line 150 may be aligned with the signal line 150b in the second direction DR2 and thus overlap with each other.

[0071] All signal lines 150 may be connected to the resistor R.

[0072] Reference Figure 5 , the display panel 1000c included in the display device according to the illustrated exemplary embodiment and Figure 4 The display panel 1000b of the exemplary embodiment illustrated in is substantially the same, and like the display panel 1000a of the above exemplary embodiment, the light-transmitting area CA may be arranged close to the left or right edge while being close to the upper end of the display area DA.

[0073] Therefore, the disconnection corresponding area CAL may be arranged closer to the left or right side in the display area DA. The width of a portion of the display area DA on the right side relative to the disconnection corresponding area CAL in the first direction DR1 may be different from the width of a portion of the display area DA on the left side relative to the disconnection corresponding area CAL in the first direction DR1. Figure 5 An example is illustrated in which the disconnection corresponding area CAL is arranged close to the right edge of the display area DA.

[0074] According to the illustrated exemplary embodiment, the signal lines 150a and 150b adjacent to the light-transmitting area CA in the first direction DR1 include ends disposed at the periphery of the light-transmitting area CA and connected to one of the first and second drivers 400a and 400b and receiving a driving signal.

[0075] Therefore, the RC delay of the drive signal transmitted from signal line 150, which is connected to first and second drivers 400a and 400b and receives the drive signal, and the RC delay of the drive signal transmitted from signal lines 150a and 150b may be different from each other. Specifically, the drive signal applied to pixels PX arranged in the outer periphery of the light-transmitting area CA, where the ends of signal lines 150a and 150b are arranged, may have a longer RC delay than the RC delay of the drive signal applied to pixels PX arranged in the disconnected corresponding area CAL and connected to signal line 150. As a result, brightness deviation may occur between the left side of the display area DA relative to the light-transmitting area CA and the right side of the display area DA relative to the light-transmitting area CA, or brightness deviation may occur between a plurality of pixels PX arranged in the first direction DR1 relative to the light-transmitting area CA and the pixels PX in the remaining display area DA.

[0076] However, in an exemplary embodiment of the present invention, the signal line 150 arranged in the disconnected corresponding area CAL corresponding to the light-transmitting area CA is connected to the resistor R, and thus the driving signal of the signal line 150 can have an RC delay similar to the RC delay of the driving signals of the signal lines 150a and 150b, and the occurrence of brightness deviation between the above-mentioned positions of the display area DA can be minimized.

[0077] Next, refer to Figures 6 to 10 With the above Figure 1 An exemplary embodiment of a display device according to the present invention will now be described.

[0078] Figure 6 、 Figure 7 、 Figure 8 、 Figure 9 and Figure 10 is an enlarged plan view of an exemplary embodiment of the periphery of a light-transmitting area of a display device according to the present invention.

[0079] First, refer to Figure 6 , except that the signal line 150 is connected to the plurality of resistors R1 arranged in the disconnection corresponding area CAL, the display panel of the display device according to the illustrated exemplary embodiment is connected to the display panel of the display device according to the illustrated exemplary embodiment. Figure 4 The display panel 1000b in the display device of the exemplary embodiment shown in FIG is substantially the same. The plurality of resistors R1 may have the same resistance value.

[0080] In the illustrated exemplary embodiment, a distance D1 between the first driver 400 a on the left and the disconnection corresponding area CAL may be substantially the same as or similar to a distance D2 between the second driver 400 b on the right and the disconnection corresponding area CAL.

[0081] Next, refer to Figure 7 , except that the signal line 150 is connected to the plurality of resistors R2 arranged in the disconnection corresponding area CAL, the display panel of the display device according to the illustrated exemplary embodiment is connected to the display panel of the display device according to the illustrated exemplary embodiment. Figure 5 The display panel 1000c in the display device of the exemplary embodiment shown in FIG is substantially the same. The plurality of resistors R2 may have the same resistance value.

[0082] In the illustrated exemplary embodiment, a distance D3 between the first driver 400a on the left and the disconnection corresponding area CAL may be different from a distance D4 between the second driver 400b on the right and the disconnection corresponding area CAL. Figure 7 , distance D3 is longer than distance D4.

[0083] Next, refer to Figure 8 , except that the signal line 150 is connected to the plurality of resistors R3, R4, R5 and R6 arranged in the disconnection corresponding area CAL, the display device according to the illustrated exemplary embodiment is Figure 7 The display devices of the exemplary embodiments shown in are substantially the same.

[0084] At least two resistors among the plurality of resistors R3 , R4 , R5 , and R6 may have different resistance values.

[0085] The end portion of the signal line 150b, which is arranged on the right side relative to the light-transmitting area CA, is arranged relatively close to the second driver 400b that receives the drive signal. Therefore, the RC delay at the end portion of the signal line 150b can be significantly shorter than the RC delay at the end portion of the signal line 150a. Therefore, among the plurality of resistors R3, R4, R5, and R6 arranged in the disconnection corresponding area CAL, the resistance value of the resistor R6 arranged closest to the second driver 400b or the right edge of the display area DA can be set to the smallest, and the resistance value of the resistor R3 arranged closest to the first driver 400a or the left edge of the display area DA can be set to the largest.

[0086] Figure 8 exemplarily illustrates that the resistance values of the plurality of resistors R3, R4, R5 and R6 gradually increase or decrease along the first direction D1. Figure 8 As shown in FIG, when the light-transmitting area CA is disposed closer to the second driver 400 b on the right side, the plurality of resistors R3, R4, R5, and R6 may have resistance values gradually decreasing toward the second driver 400 b on the right side.

[0087] According to the illustrated exemplary embodiments, degradation of signal delay can be more accurately compensated, thereby further reducing image degradation.

[0088] Next, refer to Figure 9 , except that the signal line 150 is connected to the plurality of resistors R7 and R8 arranged in the disconnection corresponding area CAL, the display device according to the illustrated exemplary embodiment is Figure 7 The display devices of the exemplary embodiments shown in are substantially the same.

[0089] The resistance value of the resistor R7 arranged on the far left among the plurality of resistors R7 and R8 has the largest resistance value, and the other resistor R8 may have a resistance value lower than the resistance value of the resistor R7. The resistor R8 connected to the single signal line 150 may be provided in plural as shown in the drawings, or may be provided in single. The plurality of resistors R8 connected to the single signal line 150 may have the same or similar resistance value.

[0090] As described, when the light-transmitting area CA is arranged to one side of the display area DA (e.g., near the right edge of the display area DA), the signal line 150a arranged on the left side of the light-transmitting area CA may experience the longest RC signal delay at the end adjacent to the light-transmitting area CA. When the resistance value of the leftmost resistor R7, which is arranged closest to the left edge of the disconnection correspondence area CAL, is set to the maximum value among the plurality of resistors R7 and R8, the area aligned with the area corresponding to the end of the signal line 150a in the second direction DR2 may experience an RC signal delay similar to the RC signal delay at the end of the signal line 150a. Therefore, the luminance deviation between the luminance at the periphery of the light-transmitting area CA and the luminance at the periphery of the disconnection correspondence area CAL can be reduced.

[0091] Next, refer to Figure 10 , except that the resistors R9, R10, R11, R12, and R13 may be connected to the end of the signal line 150a or the signal line 150b adjacent to the light-transmitting area CA, the display device according to the illustrated exemplary embodiment is Figure 5 、 Figure 7 、 Figure 8 or Figure 9 The display devices of the exemplary embodiments shown in FIG. 1 are substantially the same. Figure 10 As shown in FIG, when the light-transmitting area CA is arranged close to the right edge of the display area DA, the resistors R9, R10, R11, R12, and R13 may be connected to the end portion of the signal line 150b arranged on the right side of the light-transmitting area CA. Conversely, when the light-transmitting area CA is arranged close to the left edge of the display area DA, the resistors may be connected to the end portion of the signal line 150a.

[0092] When a plurality of signal lines 150b are arranged at the periphery of the light-transmitting area CA, resistors R9, R10, R11, R12, and R13 may be connected to ends of all signal lines 150b, respectively. An area where resistors R9, R10, R11, R12, and R13 are arranged may be included in the dead zone.

[0093] When the light-transmitting area CA is positioned close to the right edge of the display area DA, the length of the signal line 150a positioned on the left side of the light-transmitting area CA is longer than the length of the signal line 150b positioned on the right side of the light-transmitting area CA. Therefore, the distance from the first driver 400a to the end of the signal line 150a is longer than the distance from the second driver 400b to the signal line 150b. Consequently, the RC signal delay at the end of the signal line 150a may be longer than the RC signal delay at the end of the signal line 150b, and a brightness deviation may occur in the images on the left and right sides of the light-transmitting area CA.

[0094] In an exemplary embodiment of the present invention, resistors R9, R10, R11, R12, and R13 are connected to the end portion of the signal line 150 b arranged on the right side of the light-transmitting area CA to compensate for the long RC signal delay at the left periphery of the light-transmitting area CA, so that the brightness deviation in the left and right images relative to the light-transmitting area CA can be reduced.

[0095] The resistors R9, R10, R11, R12, and R13 may have the same or similar resistance values, or at least two resistors may have different resistance values depending on the position. Figure 10 In the exemplary embodiment shown in FIG, resistor R11 connected to the shortest signal line 150b may have the largest resistance value, and resistors farther away from resistor R11 may have gradually decreasing resistance values. That is, the resistance values of resistors R10 and R12 are lower than the resistance value of resistor R11, and the resistance values of resistors R9 and R13 may be lower than the resistance values of resistors R10 and R12. Accordingly, brightness deviation at the periphery of the light-transmitting area CA can be more accurately compensated.

[0096] Will refer to Figures 11 to 14 With the above Figure 1 Next, a detailed structure of a display device according to the present invention will be described.

[0097] Figure 11 is a plan view of an exemplary embodiment of two adjacent pixels arranged in a display area of a display device according to the present invention, Figure 12 It is taken along line XIIa-XIIb Figure 11 a cross-sectional view of a display device, and Figure 13is a plan view of an exemplary embodiment of a display device according to the present invention.

[0098] Figure 11 Two pixels PX that are adjacent to each other in the first direction DR1 and have the same structure are illustrated.

[0099] Reference Figure 11 and Figure 12 , a barrier layer 111 as an insulating layer may be disposed on the substrate 110, and a buffer layer 120 as an insulating layer may be disposed on the barrier layer 111. In another exemplary embodiment, at least one of the barrier layer 111 and the buffer layer 120 may be omitted.

[0100] The active layer 130 is disposed on the buffer layer 120. The active layer 130 may include channel regions 131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, and 131g, and a conductive region. The channel regions 131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, and 131g define channels of a plurality of transistors T1, T2, T3_1, T3_2, T4_1, T4_2, T5, T6, and T7 included in pixel circuits of a plurality of pixels PX. The conductive region of the active layer 130 may include source regions 136a, 136b, 136c_1, 136c_2, 136d_1, 136d_2, 136e, 136f, and 136g and drain regions 137a, 137b, 137c_1, 137c_2, 137d_1, 137d_2, 137e, 137f, and 137g of the corresponding transistors T1, T2, T3_1, T3_2, T4_1, T4_2, T5, T6, and T7. The source region and the drain region are terms used to distinguish the conductive regions arranged on both sides with respect to the corresponding channel regions 131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, and 131g, and the terms source region and drain region may be interchanged with each other. The conductive region of the active layer 130 may have a higher carrier concentration than each of the channel regions 131 a , 131 b , 131 c_1 , 131 c_2 , 131 d_1 , 131 d_2 , 131 e , 131 f , and 131 g .

[0101] The active layer 130 may include amorphous silicon, polycrystalline silicon, or an oxide semiconductor.

[0102] The first insulating layer 121 is disposed on the active layer 130, and a first conductive layer including a plurality of scan lines 151, 152, and 154, a control line 153, and a driving gate electrode 155a may be disposed on the first insulating layer 121. Figure 11, the plurality of scan lines 151 , 152 , and 154 and the control line 153 may substantially extend in the first direction DR1 .

[0103] The signal lines 150 , 150 a and 150 b may be at least one of the scan lines 151 , 152 and 154 and the control line 153 .

[0104] A second insulating layer 122 may be disposed on the first conductive layer and the first insulating layer 121, and a second conductive layer including a storage line 166 and an initialization voltage line 169 may be disposed on the second insulating layer 122. The storage line 166 may include an expansion portion 166a overlapping the driving gate electrode 155a.

[0105] The second conductive layer may further include a shielding pattern 165. The shielding pattern 165 may be disposed between the scan line 151 and the scan line 152.

[0106] The third insulating layer 123 may be disposed on the second conductive layer and the second insulating layer 122 .

[0107] In exemplary embodiments, for example, at least one of the barrier layer 111, the buffer layer 120, the first insulating layer 121, the second insulating layer 122 and the third insulating layer 123 may include an inorganic insulating material and / or an organic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, etc.

[0108] A plurality of openings 41 , 61 , 62 , 63 , 64 , 65 , 67 , 68 , and 69 may be defined in some or all of the first, second, and third insulating layers 121 , 122 , and 123 .

[0109] A third conductive layer including a plurality of connection members 74, 75, and 79, a data line 171, and a driving voltage line 172 may be disposed on the third insulating layer 123. The plurality of connection members 74, 75, and 79 are connected to the source regions 136a, 136b, 136c_1, 136c_2, 136d_1, 136d_2, 136e, 136f, and 136g or the drain regions 137a, 137b, 137c_1, 137c_2, 137d_1, 137d_2, 137e, 137f, and 137g of the active layer 130.

[0110] The data line 171 and the driving voltage line 172 extend substantially in the second direction DR2 and thus may cross the plurality of scan lines 151, 152, and 154. The expansion portion 166a of the storage line 166 is connected to the driving voltage line 172 through the opening 68 and thus may receive a driving voltage.

[0111] The driving voltage line 172 is electrically connected to the shielding pattern 165 through the opening 41 and may transmit the driving voltage to the shielding pattern 165. In another exemplary embodiment, the shielding pattern 165 may be omitted.

[0112] The first transistor T1 includes a channel region 131a, a source region 136a, a drain region 137a, and a driving gate electrode 155a. The driving gate electrode 155a may be connected to the connection member 74 through the opening 61. The opening 61 may be defined in the opening 51 included in the expansion portion 166a.

[0113] The second transistor T2 includes a channel region 131b, a source region 136b, a drain region 137b, and a gate electrode 155b as a portion of the scan line 151. The source region 136b is connected to the data line 171 through the opening 62, and the drain region 137b is connected to the source region 136a of the first transistor T1.

[0114] The third transistors T3_1 and T3_2 may include an upper third transistor T3_1 and a lower third transistor T3_2 connected to each other. The upper third transistor T3_1 includes a channel region 131c_1, a source region 136c_1, a drain region 137c_1, and a gate electrode 155c_1 that is part of the scan line 151. The drain region 137c_1 is connected to the connection member 74 through the opening 63. The lower third transistor T3_2 includes a channel region 131c_2, a source region 136c_2, a drain region 137c_2, and a gate electrode 155c_2 that is part of the scan line 151.

[0115] The fourth transistors T4_1 and T4_2 may include a left fourth transistor T4_1 and a right fourth transistor T4_2, which are connected to each other. The left fourth transistor T4_1 includes a channel region 131d_1, a source region 136d_1, a drain region 137d_1, and a gate electrode 155d_1, which is part of the scan line 152. The drain region 137d_1 is connected to the drain region 137c_1 of the upper third transistor T3_1 and is connected to the connection member 74 through the opening 63. The right fourth transistor T4_2 includes a channel region 131d_2, a source region 136d_2, a drain region 137d_2, and a gate electrode 155d_2, which is part of the scan line 152. The drain region 137d_2 is connected to the source region 136d_1 of the left fourth transistor T4_1, and the source region 136d_2 is connected to the connection member 75 through the opening 65. The connection member 75 may be electrically connected to the initialization voltage line 169 through the opening 64 .

[0116] The fifth transistor T5 includes a channel region 131e, a source region 136e, a drain region 137e, and a gate electrode 155e as part of the control line 153. The source region 136e is electrically connected to the driving voltage line 172 through the opening 67, and the drain region 137e is connected to the source region 136a of the first transistor T1.

[0117] The sixth transistor T6 includes a channel region 131f, a source region 136f, a drain region 137f, and a gate electrode 155f as part of the control line 153. The source region 136f is connected to the drain region 137a of the first transistor T1, and the drain region 137f is connected to the connection member 79 through the opening 69.

[0118] The seventh transistor T7 includes a channel region 131g, a source region 136g, a drain region 137g, and a gate electrode 155g as a portion of the scan line 154. The source region 136g is connected to the drain region 137f of the sixth transistor T6, and the drain region 137g is connected to the connection member 75 through the opening 65 and thus can receive an initialization voltage.

[0119] The capacitor Cst included in a single pixel PX may include the driving gate electrode 155a and the expansion portion 166a of the storage line 166 overlapping each other as two terminals while the second insulating layer 122 is disposed therebetween.

[0120] A plurality of transistors T1 , T2 , T3_1 , T3_2 , T4_1 , T4_2 , T5 , T6 , and T7 and a capacitor Cst included in each pixel PX may form a pixel circuit.

[0121] In an exemplary embodiment, for example, at least one of the first conductive layer, the second conductive layer, and the third conductive layer may include a metal of copper (Cu), aluminum (Al), magnesium (Mg), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), nickel (Ni), neodymium (Nd), iridium (Ir), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), tantalum (Ta), and alloys thereof.

[0122] The fourth insulating layer 141 may be disposed on the third conductive layer. In exemplary embodiments, the fourth insulating layer 141 may include an inorganic insulating material and / or an organic insulating material such as polyimide, an acryl-based polymer, a siloxane-based polymer, or the like.

[0123] As a fourth conductive layer, a pixel electrode layer may be disposed on the fourth insulating layer 141. The pixel electrode layer may include a pixel electrode 191 disposed in each pixel PX. The pixel electrode 191 may be connected to the connection member 79 through the opening 89 of the fourth insulating layer 141 and thus receive a data voltage.

[0124] A fifth insulating layer 350 (also referred to as a pixel defining layer) may be disposed on the fourth insulating layer 141. An opening 351 disposed on the pixel electrode 191 may be defined in the fifth insulating layer 350. In an exemplary embodiment, the fifth insulating layer 350 may include an organic insulating material such as a polypropylene-based resin, a polyimide-based resin, or the like.

[0125] The emission layer 370 is disposed on the pixel electrode 191. The emission layer 370 may include a portion disposed on the opening 351 of the fifth insulating layer 350. The emission layer 370 may include an organic light emitting material or an inorganic light emitting material.

[0126] The common electrode 270 may be disposed on the emission layer 370. The common electrode 270 is also disposed on the fifth insulating layer 350 and thus may be continuously provided throughout the plurality of pixels PX. The common electrode 270 may include a transparent conductive material.

[0127] The pixel electrode 191, the emission layer 370, and the common electrode 270 of each pixel PX form a light emitting diode ED, and one of the pixel electrode 191 and the common electrode 270 becomes a cathode and the other becomes an anode. The light emitting diode ED may form a light emitting portion of a pixel circuit connected to each pixel PX.

[0128] Reference Figure 13 , the pixel panel 1000d included in the display device according to the exemplary embodiment of the present invention may be the same as the display panels 1000, 1000a, 1000b, and 1000c according to the above exemplary embodiments, and the light-emitting portions LE of the plurality of pixels PX may be arranged in a regular pattern in the display area DA. In the exemplary embodiment, for example, each light-emitting portion LE may display one of red, green, and blue. Such light-emitting portions LE are not provided in the light-transmitting area CA and the dead zone surrounding the light-transmitting area CA.

[0129] Figure 14 yes Figure 11 and Figure 12 8 is an equivalent circuit diagram of each pixel PX of the display device in the exemplary embodiment illustrated in FIG.

[0130] Each pixel PX may include a plurality of transistors T1 , T2 , T3 , T4 , T5 , T6 , and T7 connected to a plurality of signal lines 151 , 152 , 153 , 154 , 171 , and 172 , a capacitor Cst, and at least one light emitting diode ED.

[0131] The plurality of scan lines 151, 152 and 154 may transmit scan signals GWn, GIn and GI(n+1) as gate signals, respectively, where n is a natural number, and the control line 153 may transmit a control signal, which is a gate signal that may control light emission of the light emitting diode ED.

[0132] The scan line 151 can transmit the scan signal GWn to the second transistor T2 and the third transistor T3, the scan line 152 can transmit the scan signal GIn to the fourth transistor T4, the scan line 154 can transmit the scan signal GI(n+1) to the seventh transistor T7, and the control line 153 can transmit the control signal EM to the fifth transistor T5 and the sixth transistor T6.

[0133] The data line 171 may transmit a data signal Dm, and the driving voltage line 172 may transmit a driving voltage ELVDD. The data signal Dm may have a voltage level that varies according to an image signal input to the display device, and the driving voltage ELVDD may have a substantially constant level.

[0134] The source electrodes, drain electrodes, and gate electrodes of the transistors T1 , T2 , T3 , T4 , T5 , T6 , and T7 may correspond to the above-described source region, drain region, and gate electrode.

[0135] One end of the capacitor Cst is connected to the gate electrode of the first transistor T1, and the other end is connected to the driving voltage line 172. A cathode of the light emitting diode ED is connected to a common voltage terminal transmitting the common voltage ELVSS and thus receives the common voltage ELVSS.

[0136] The initialization voltage Vint may be applied to the node GN when the fourth transistor T4 is turned on, and may be applied to the anode of the light emitting diode ED when the seventh transistor T7 is turned on.

[0137] The structure of the pixel PX of the present invention is not limited to Figures 11 to 14 The structure shown in the illustrated exemplary embodiment of the present invention, and the number of transistors and the number of capacitors included in each pixel PX and the connection relationship may be variously modified.

[0138] Reference Figure 11, the signal lines 150, 150a, and 150b of the display device in the exemplary embodiment of the present invention are, for example, scan lines 152, and the respective resistors included in the scan lines 152 may be arranged in respective portions that do not overlap with the active layer 130. In the exemplary embodiment, for example, the resistors R, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, and R13 of the above exemplary embodiment may be provided in respective resistor areas RA of the scan lines 152. Detailed structures of these resistors R, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, and R13 will be described later.

[0139] Will refer to Figure 15 and Figure 16 With the above Figure 1 The structure of a resistor included in a signal line of a display device in an exemplary embodiment of the present invention will be described below.

[0140] Figure 15 is a plan view of an exemplary embodiment of a resistor connected to a signal line of a display device according to the present invention, and Figure 16 It is taken along line XVIa-XVIb Figure 15 A cross-sectional view of a display device.

[0141] Reference Figure 15 and Figure 16 The signal line 150 included in the display device according to the exemplary embodiment of the present invention is substantially the same as the above-mentioned signal line 150 and may include conductive portions 150c and 150d connected to the above-mentioned resistor R. Here, the resistor R represents the resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, and R13 included in the display device according to the above-mentioned exemplary embodiment. In addition, the signal line 150 represents the signal lines 150, 150a, and 150b connected to the resistor among the plurality of the above-mentioned signal lines.

[0142] In a plan view, the two conductive portions 150c and 150d may face each other with the resistor R disposed therebetween. The conductive portions 150c and 150d of the signal line 150 may be disposed in the same layer as the first conductive layer described above and may include the same material as that of the first conductive layer.

[0143] The resistor R may include a material having a higher resistance value than the resistance value of the conductive portions 150c and 150d. In an exemplary embodiment, for example, the resistor R may include an active pattern 132 arranged in the same layer as the active layer 130 described above and including the same material as the active layer 130. The active pattern 132 may include a material having a carrier concentration similar to that of the channel regions 131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, and 131g of the active layer 130 described above, or a carrier concentration similar to that of the conductive region of the active layer 130.

[0144] Reference Figure 15 and Figure 16 , a first insulating layer 121 may be disposed on the active pattern 132, and conductive portions 150c and 150d may be disposed on the first insulating layer 121. The conductive portions 150c and 150d may be electrically connected to the active pattern 132 through the opening 21 defined in the first insulating layer 121. Portions 132a and 132b of the active pattern 132 that contact the conductive portions 150c and 150d through the opening 21 may have a higher carrier concentration than other portions of the active pattern 132.

[0145] The length L and / or the width W of the active pattern 132 may be adjusted to variously adjust the resistance value of the resistor R to which the signal line 150 is connected.

[0146] Next, refer to Figures 17 to 19 With the above Figure 1 The structure of a resistor included in a signal line of a display device in an exemplary embodiment of the present invention will be described below.

[0147] Figure 17 is a plan view of an exemplary embodiment of a resistor connected to a signal line of a display device according to the present invention, and Figure 18 It is taken along line XVIIIa-XVIIIb Figure 17 A cross-sectional view of a display device.

[0148] Reference Figure 17 and Figure 18, the signal line 150 included in the display device according to the exemplary embodiment of the present invention is substantially the same as the above-described signal line, except that the signal line 150 includes conductive portions 150c and 150d, conductive portions 160a and 160b electrically connected to the conductive portions 150c and 150d, and a resistor R connected to the conductive portions 160a and 160b. Also in this exemplary embodiment, the resistor R may represent the resistors R, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, and R13 included in the display device according to the above-described exemplary embodiment, and the signal line 150 may represent the signal lines 150, 150a, and 150b connected to the resistors among the above-described signal lines.

[0149] The conductive portions 150 c and 150 d of the signal line 150 may be disposed in the same layer as the above-described first conductive layer and may include the same material as that of the first conductive layer.

[0150] The two conductive portions 160a and 160b may face each other with the resistor R disposed therebetween. The conductive portions 160a and 160b of the signal line 150 may be disposed in the same layer as the second conductive layer or the third conductive layer described above and may include the same material as the second conductive layer or the third conductive layer.

[0151] The resistor R may include a material having a higher resistance value than those of the conductive portions 150 c , 150 d , 160 a , and 160 b . In an exemplary embodiment, for example, the resistor R may include an active pattern 133 including a semiconductor material.

[0152] Reference Figure 17 and Figure 18 , conductive portions 150c and 150d are arranged on first insulating layer 121, and second insulating layer 122 in which openings 22 are defined may be arranged on conductive portions 150c and 150d. Conductive portions 160a and 160b are, for example, arranged on the above-mentioned second insulating layer 122. Conductive portions 160a and 160b may be electrically connected to conductive portions 150c and 150d while being in contact with conductive portions 150c and 150d through openings 22.

[0153] The insulating layer 124 may be disposed on the conductive portions 160 a and 160 b . The opening 23 disposed on the conductive portion 160 b may be defined in the insulating layer 124 .

[0154] The active pattern 133 may be disposed on the insulating layer 124. The active pattern 133 may include amorphous silicon, polycrystalline silicon, or an oxide semiconductor. The active pattern 133 may be disposed on a layer different from the active layer 130 and, for example, may include an oxide semiconductor material. In this case, the active layer 130 may include a polycrystalline silicon material.

[0155] The active pattern 133 may be electrically connected to the conductive portions 160 a and 160 b through the opening 23 of the insulating layer 124 .

[0156] The third insulating layer 123 as described above may be disposed on the active pattern 133. The subsequent stacked structure may be similar to that of the reference Figure 11 and Figure 12 The structures in the described exemplary embodiments are the same.

[0157] exist Figure 18 In the exemplary embodiment shown in , the insulating layer 124 and the active pattern 133 are exemplarily disposed between the above-mentioned second conductive layer and the third insulating layer 123, and the conductive portions 160a and 160b are exemplarily disposed in the second conductive layer.

[0158] Figure 19 It is taken along line XVIIIa-XVIIIb Figure 17 Another cross-sectional view of a display device.

[0159] Reference Figure 19 , a display device according to the illustrated exemplary embodiment and Figure 17 and Figure 18 The display device of the above exemplary embodiment is substantially the same, but the conductive portions 160a and 160b may be arranged in the same layer as the third conductive layer arranged on the third insulating layer 123 and may include the same material as the third conductive layer. The insulating layer 124 and the active pattern 133 are arranged on the conductive portions 160a and 160b, and the active pattern 133 may be electrically connected to the conductive portions 160a and 160b through the opening 23 of the insulating layer 124. The fourth insulating layer 141 may be arranged on the active pattern 133, and the subsequent stacked structure on the fourth insulating layer 141 may be the same as that according to Figure 11 and Figure 12 The structures of the above exemplary embodiments are the same.

[0160] Next, refer to Figure 20 With the above Figure 1 The structure of the resistors included in the signal lines 150, 150a, and 150b of the display device in the exemplary embodiment of the present invention will be described below.

[0161] Figure 20A planar shape of a resistor connected to a signal line of a display device in an exemplary embodiment of the present invention is shown.

[0162] Reference Figure 20 The active patterns 132 and 133 included in the plurality of resistors R may be wavy or sawtooth-shaped in a plan view. As described, the resistance value of the resistor R may be variously adjusted by adjusting the degree and amount of bending of the active pattern 132 .

[0163] While the present invention has been described in conjunction with what are presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A display device, comprising: a substrate comprising: a display area including a plurality of pixels and a light-transmitting area including a portion arranged in the display area, wherein the display area includes a first edge provided on a first side in a first direction and a second edge provided on a second side; and a plurality of signal lines arranged in the display area and electrically connected to the plurality of pixels, the plurality of signal lines comprising: a first signal line arranged on a first side relative to the light-transmitting area; a second signal line disposed on a second side relative to the light-transmitting area and aligned with the first signal line in the first direction; and a third signal line, the third signal line being arranged on a third side relative to the light-transmitting area, wherein the third signal line is arranged with the first signal line and the second signal line in a second direction different from the first direction, The first signal line and the second signal line are insulated from each other in the display area, and The length of the third signal line in the first direction is longer than the length of the second signal line in the first direction, The display device further includes a resistor connected to an end of the second signal line, both ends of the resistor are between the second signal line and the light-transmitting area, and the end of the second signal line is adjacent to the light-transmitting area. wherein the display area further includes a disconnection corresponding area overlapping with the light-transmitting area in the second direction and a resistor arranged in the disconnection corresponding area, A first portion of the third signal line at the first side of the display area is connected to a first end portion of the resistor arranged in the disconnection corresponding area, A second portion of the third signal line at the second side of the display area is connected to a second end portion of the resistor arranged in the disconnection corresponding area, The length of the first portion of the third signal line in the first direction is longer than the length of the second portion of the third signal line in the first direction, and The resistor arranged in the disconnection corresponding region is provided in plurality, and among the plurality of resistors, a resistance value of the resistor arranged closest to the first edge is greater than a resistance value of the resistor arranged closest to the second edge.

2. The display device according to claim 1, wherein The third signal line extends from the first edge of the display area to the second edge of the display area, The first signal line extends from the first edge and terminates inside the display area, and The second signal line extends from the second edge and terminates at an interior of the display area.

3. The display device according to claim 2, further comprising: a first driver disposed outside the first edge of the display area; as well as a second driver arranged outside the second edge of the display area, Wherein, the first signal line is electrically connected to the first driver, The second signal line is electrically connected to the second driver, and The third signal line is electrically connected to the first driver and the second driver.

4. The display device according to claim 3, wherein Each of the first signal line and the second signal line includes an end portion adjacent to the light-transmitting area, and the end portion is adjacent to the light-transmitting area in the first direction.

5. The display device according to claim 4, wherein An opening overlapping the light-transmitting region is defined in the substrate. The display device according to claim 2 , wherein: The length of the first signal line is longer than the length of the second signal line.

7. The display device according to claim 2, wherein The third signal line includes a conductive portion disposed on the substrate, and The resistor includes an active pattern electrically connected to the conductive portion and including a semiconductor material.

8. The display device according to claim 7, wherein The active pattern is curved.

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