Method in the process of manufacturing a device, non-transitory computer readable medium, and system configured to perform the method

Abstract

A method for determining image indicators of features on a substrate is disclosed herein, the method comprising: acquiring a first image of multiple features on the substrate; acquiring one or more additional images of multiple corresponding features on the substrate, wherein at least one of the one or more additional images belongs to a different layer of the substrate than the first image; generating aligned versions of the first image and the one or more additional images by performing an alignment process on the first image and the one or more additional images; and calculating image indicators based on a comparison of features in the aligned version of the first image with corresponding features in the aligned versions of the one or more additional images.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to EP application 18205329.8 filed on November 9, 2018 and U.S. application 62 / 851,727 filed on May 23, 2019, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The description herein relates to manufacturing, testing, measurement, and other processes that may be performed on semiconductor structures fabricated on substrates, and more particularly to methods, non-transitory computer-readable media, and systems for improving any of these processes based on images of features of the structures. Background Art

[0004] Lithographic projection equipment can be used, for example, in the manufacture of integrated circuits (ICs). In this case, a patterning device (e.g., a mask) can contain or provide a circuit pattern (a "design layout") corresponding to an individual layer of the IC, and the circuit pattern can be transferred to a target portion (e.g., including one or more dies) on a substrate (e.g., a silicon wafer) that has been coated with a layer of radiation-sensitive material ("resist") by methods such as irradiating the target portion with the circuit pattern on the patterning device. Typically, a single substrate contains multiple adjacent target portions, and the circuit pattern is sequentially transferred to the multiple adjacent target portions, one target portion at a time, by the lithographic projection equipment. In one type of lithographic projection equipment, the circuit pattern on the entire patterning device is transferred to one target portion at a time; such equipment is generally referred to as a stepper. In an alternative device, generally referred to as a step-and-scan device, the projection beam is scanned over the patterning device along a given reference direction (the "scanning" direction) while offsetting the substrate parallel to or antiparallel to the reference direction. Different portions of the circuit pattern on the patterning device are gradually transferred to one target portion. Typically, since the lithographic projection apparatus will have a magnification M (typically <1), the speed F of the substrate deflection will be M times the speed at which the projection beam scans the patterning device. Further information on the lithographic apparatus described herein can be gleaned, for example, from US 6,046,792, which is incorporated herein by reference.

[0005] Before the circuit pattern is transferred from the patterning device to the substrate, the substrate may be subjected to various treatments such as primer, resist coating, and soft baking. After exposure, the substrate may be subjected to other treatments such as post-exposure baking (PEB), development, hard baking, and measurement / inspection of the transferred circuit pattern. This series of treatments is used as the basis for manufacturing individual layers of devices such as ICs. The substrate may then undergo various processes such as etching, ion implantation (doping), metallization, oxidation, chemical mechanical polishing, etc., all of which are intended to complete the individual layers of the device. If several layers are required in the device, the entire process or a variation thereof is repeated for each layer. Ultimately, the device will appear in each target portion on the substrate. These devices are then separated from each other by techniques such as cutting or sawing, so that the individual devices can be mounted on a carrier, connected to pins, and so on.

[0006] As noted, photolithography is a central step in IC fabrication, where patterns formed on a substrate define the functional elements of the IC, such as microprocessors, memory chips, etc. Similar photolithography techniques are also used to form flat panel displays, microelectromechanical systems (MEMS), and other devices.

[0007] As semiconductor manufacturing processes continue to advance, the size of functional elements continues to decrease, while the number of functional elements (such as transistors) per device has been steadily increasing over the past few decades in a trend generally referred to as "Moore's Law." At the current state of the art, the layers of a device are manufactured using a lithography projection apparatus that projects a design layout onto a substrate using illumination from a deep ultraviolet illumination source, resulting in individual functional elements with sizes well below 100 nm, i.e., less than half the wavelength of the radiation from the illumination source (e.g., a 193 nm illumination source).

[0008] According to the resolution formula CD = k1 × λ / NA, the process of printing features with a size smaller than the classical resolution limit of the lithographic projection equipment is usually called low k1 lithography, where λ is the wavelength of the radiation used (currently 248nm or 193nm in most cases), NA is the numerical aperture of the projection optics in the lithographic projection equipment, CD is the "critical dimension", usually the minimum print feature size, and k1 is the empirical resolution. In general, the smaller the k1, the more difficult it is to reproduce on the substrate a pattern similar to the shape and size planned by the circuit designer to achieve specific electrical functions and performance. In order to overcome these difficulties, it is necessary to accurately determine the control parameters of all processes in device manufacturing. Summary of the invention

[0009] According to a first aspect of the present invention, a method for determining image indicators of features on a substrate is provided, the method comprising: acquiring a first image of multiple features on the substrate; acquiring one or more additional images of multiple corresponding features on the substrate, wherein at least one of the one or more additional images belongs to a different layer of the substrate than the first image; generating aligned versions of the first image and the one or more additional images by performing an alignment process on the first image and the one or more additional images, wherein the alignment process substantially eliminates the effects of any overlay errors between features in the first image and corresponding features in each of the one or more additional images; and calculating image indicators based on a comparison of the features in the aligned version of the first image with the corresponding features in the aligned version of the one or more additional images.

[0010] Preferably, each feature of the plurality of features is created according to a target structure of the feature; and the alignment of the images comprises substantially aligning the images according to the target structure of the features.

[0011] Preferably, the process of registering the images comprises substantially aligning the images according to one or more reference positions in or superimposed on each of the images.

[0012] Preferably, each image belongs to a different layer of the substrate than the other images.

[0013] Preferably, there are a plurality of further images and at least one of the further images belongs to the same layer of the substrate as the first image.

[0014] Preferably, each image is an image of only a portion of the substrate.

[0015] Preferably, the method further comprises: acquiring, for each of the multiple layers of the substrate, multiple images of multiple different portions of the layer of the substrate; and calculating image indicators based on the image of each of the multiple different portions of the substrate in the multiple layers of the substrate.

[0016] Preferably, the method comprises calculating a local image indicator from a plurality of images of the same portion of the substrate, wherein the image indicator comprises a local image indicator.

[0017] Preferably, the method comprises calculating a plurality of local image indicators; wherein each of the local image indicators is calculated based on an image of a different portion of the substrate than the other local image indicators; and wherein the image indicator comprises a plurality of local image indicators.

[0018] Preferably, the method comprises calculating a global image indicator based on a plurality of local image indicators; wherein the image indicator comprises a global image indicator.

[0019] Preferably, each image of the portion of the substrate has an area of ​​10 μm x 10 μm on the substrate.

[0020] Preferably, the image indicator is determined based on the outline of a feature in an aligned version of the first image and the outline of a corresponding feature in an aligned version of one or more further images; and / or for one or more of the images, the image indicator is determined based on a comparison between the feature in the image and a target of the feature.

[0021] Preferably, the image metric is determined based on one or more of critical dimension uniformity, line width roughness, critical dimension amplitude and placement error of features in the aligned version of the first image and corresponding features in the aligned versions of the one or more further images.

[0022] Preferably, the method further comprises: calculating an image index for each of a plurality of values ​​of the one or more parameters; and determining a dependency of the image index on the one or more parameters based on the calculated image index.

[0023] Preferably, the one or more parameters include: focus, dose, illumination pupil shape, aberrations, etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow, and RF power distribution.

[0024] Preferably, the image-related indicator is an overlay margin, an overlap overlay margin, an overlay margin map or an overlap overlay margin map.

[0025] According to a second aspect of the present invention, a method for manufacturing, inspecting and / or testing a device on a substrate is provided, the method comprising: acquiring image indicators according to the first aspect; and determining one or more control parameters of the manufacturing, inspecting and / or testing process of the device on the substrate based on the image indicators.

[0026] Preferably, the one or more control parameters are determined based on a dependency of the image metric on the one or more control parameters.

[0027] Preferably, the method further comprises controlling the device in accordance with the determined one or more control parameters.

[0028] Preferably, one or more control parameters are used for one or more of the following: photolithography process, primer coating process, resist coating process, soft baking process, post-exposure baking process, development process, hard baking process, measurement / inspection process, etching process, ion implantation process, metallization process, oxidation process and chemical mechanical polishing process.

[0029] Preferably, the one or more controlled parameters include: focus, dose, illumination pupil shape, aberration, etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow and RF power distribution.

[0030] Preferably, the method also includes further determining one or more control parameters based on manufacturing specifications; wherein the manufacturing specifications depend on one or more of the following: the maximum probability of erroneous manufacturing features; the determined maximum allowable amplitude of edge placement error; the determined maximum allowable overlay error; and the expected yield of semiconductor devices.

[0031] Preferably, a plurality of control parameters are determined jointly.

[0032] Preferably, the joint determination of at least two control parameters comprises determining an applied value of one control parameter as a function of an applied value of another control parameter.

[0033] Preferably, the joint determination of the at least two control parameters depends on: a combined effect of the at least two control parameters; and / or a mutual dependency of the at least two control parameters.

[0034] Preferably: the overlay error depends on at least one of the jointly determined control parameters; and the size of a feature manufactured on the semiconductor device depends on at least another of the jointly determined control parameters.

[0035] Preferably, the commonly determined control parameters are: focus, dose, illumination pupil shape, aberrations, etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow and RF power distribution.

[0036] According to a third aspect of the present invention, there is provided a system configured to perform the method of the first and / or second aspect.

[0037] Preferably, the system comprises a computing system and an electron beam device, wherein: the electron beam device is arranged to acquire an image of the substrate; and the computing system is arranged to receive the acquired image of the substrate and perform the method of the first and / or second aspect.

[0038] Preferably, the system comprises a lithographic apparatus and / or a metrology apparatus.

[0039] According to a fourth aspect of the present invention, there is provided a non-transitory computer readable medium comprising instructions which, when executed, cause a method according to any one of the first and / or second aspects to control a manufacturing process of a device on a substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is a block diagram of the various subsystems of the lithography system.

[0041] Figure 2 is with Figure 1 Block diagram of the simulation model corresponding to the subsystem in .

[0042] Figure 3A The LER is schematically depicted.

[0043] Figure 3B The LWR is schematically depicted.

[0044] Figure 3C Schematic showing how random variations affect lithography.

[0045] Figure 4A and Figure 4B A method of determining a relationship between random variations in characteristics of an aerial image or a resist image and one or more design variables is schematically illustrated.

[0046] Figure 5A and Figure 5B The fitting results using this relationship are shown.

[0047] Figure 6 An exemplary flow chart for calculating and illustrating random variation is shown.

[0048] Figure 7 Hot spots identified using random variation are shown.

[0049] Figure 8 A non-transitory computer-readable medium containing randomly varying values ​​under multiple conditions and at multiple design variable values ​​is shown.

[0050] Fig. 9A and Fig. 9B Each shows the intensity of the image (space or resist) across the edge of the pattern in a direction (x) perpendicular to the edge of the pattern.

[0051] Fig.10 Schematic diagram of the EPE ILS The curve of the item.

[0052] Fig.11 is a flow chart illustrating aspects of an example method of joint optimization / co-optimization.

[0053] Fig.12 An example of another optimization method is shown.

[0054] Fig.13A , Fig. 13B and Fig.14 Example flow charts of various optimization processes are shown.

[0055] Fig.15A A flow chart of a method for identifying hot spots on an aerial image or a resist image based on random variations in a characteristic (eg, LER) or a function thereof (eg, bl_ILS, ILS, or NILS) is shown.

[0056] Fig. 15B A flow chart of another method for identifying hot spots on an aerial image or a resist image based on random variations (e.g., LER) or a function thereof (e.g., bl_ILS, ILS, or NILS) of a characteristic (e.g., edge location) of the aerial image or resist image is shown.

[0057] Fig.16 A flow chart of a method for reducing random variations (eg, LER) of one or more characteristics (eg, edge location) of an aerial image or a resist image is shown.

[0058] Fig.17 is a block diagram of an example computer system.

[0059] Fig.18 It is a schematic diagram of a lithography projection apparatus.

[0060] Fig.19 is a schematic diagram of another type of lithography projection equipment.

[0061] Fig. 20 yes Fig.19 A more detailed view of the devices in the

[0062] Fig.21 yes Fig.19 and Fig. 20 A more detailed view of the source collector module of the device SO.

[0063] Fig. 22 Several relationships between yield and measures of random variation are shown.

[0064] Fig.23 A flowchart of a method for optimizing a set of values ​​for one or more design variables and presenting various characteristics of a process, an aerial image, and / or a resist image to a user so that the user can select a set of values ​​for one or more design variables based on the characteristics desired by the user is schematically shown.

[0065] Fig.24 An image of a feature on a substrate is shown.

[0066] Fig.25 A plurality of aligned stacked images are shown according to one embodiment.

[0067] Fig.26 is a flow chart of a method according to one embodiment. DETAILED DESCRIPTION

[0068] Although specific reference may be made herein to the manufacture of ICs, it should be clearly understood that the description herein has many other possible applications. For example, it may be used to manufacture guidance and detection patterns for integrated optical systems, magnetic domain memories, liquid crystal display panels, thin film magnetic heads, etc. Those skilled in the art will understand that in the context of such alternative applications, any use of the terms "reticle", "wafer" or "die" herein should be considered interchangeable with the more general terms "mask", "substrate" and "target portion", respectively.

[0069] In this document, the terms "radiation" and "beam" are used to cover all types of electromagnetic radiation, including UV radiation (e.g., having a wavelength of 365, 248, 193, 157 or 126 nm) and EUV (extreme ultraviolet radiation, e.g., having a wavelength in the range of 5-20 nm).

[0070] As used herein, the term "optimize" refers to or indicates adjusting the lithography projection equipment, lithography process, etc. so that the results and / or processes of the lithography have more desired characteristics, such as higher accuracy of projection of the design layout on the substrate, a larger process window, etc. Therefore, the term "optimize" used herein refers to or indicates identifying one or more values ​​of one or more parameters that provide an improvement (e.g., a local optimum) in at least one related indicator compared to an initial set of one or more values ​​for one or more parameters. "Optimal" and other related terms should be interpreted accordingly. In one embodiment, the optimization step can be iteratively applied to provide further improvement in one or more indicators.

[0071] Furthermore, the lithographic projection apparatus may be of a type having two or more stages (e.g., two or more substrate stages, a substrate stage and a measurement stage, two or more patterning device stages, etc.). In such a "multi-stage" device, a plurality of stages may be used in parallel, or preparatory steps may be performed on one or more stages while one or more other stages are being used for exposure. A dual-stage lithographic projection apparatus is described, for example, in U.S. Pat. No. 5,969,441, which is incorporated herein by reference.

[0072] The patterning device mentioned above includes or can form one or more design layouts. The design layout can be generated using a CAD (computer-aided design) program, which is generally referred to as EDA (electronic design automation). Most CAD programs follow a set of predetermined design rules to create a functional design layout / patterning device. These rules are set by processing and design constraints. For example, the design rule defines the spatial tolerance between circuit devices (such as gates, capacitors, etc.) or interconnects to ensure that the circuit devices or lines do not interact with each other in an undesirable manner. One or more design rule restrictions in the design rule restrictions can be referred to as "critical dimensions" (CD). The critical dimension of a circuit can be defined as the minimum width of a line or a hole or the minimum spacing between two lines or two holes. Therefore, CD determines the overall size and density of the designed circuit. Of course, one of the goals of integrated circuit manufacturing is to faithfully reproduce the original circuit design (via patterning device) on a substrate.

[0073] The term "mask" or "patterning device" as used herein may be broadly interpreted as referring to a general patterning device that can be used to impart an incident radiation beam with a patterned cross-section corresponding to the pattern to be created in a target portion of the substrate; the term "light valve" may also be used in this context. In addition to classical masks (transmissive or reflective; binary, phase-shifting, hybrid, etc.), examples of other such patterning devices include:

[0074] -Programmable mirror arrays. An example of such a device is a matrix-addressable surface having a viscoelastic control layer and a reflective surface. The basic principle behind such a device is that (for example) addressed areas of the reflective surface reflect incident radiation as diffracted radiation, while unaddressed areas reflect incident radiation as undiffracted radiation. Using appropriate filters, the above-mentioned undiffracted radiation can be filtered out of the reflected light beam, leaving only the diffracted radiation; in this way, the light beam is patterned according to the addressing pattern of the matrix-addressable surface. The required matrix addressing can be performed using suitable electronic devices. More information about such mirror arrays can be gleaned from, for example, U.S. Patents No. 5,296,891 and No. 5,523,193, which are incorporated herein by reference.

[0075] - A programmable LCD array. An example of such a structure is given in US Pat. No. 5,229,872, which is incorporated herein by reference.

[0076] As a brief introduction, Figure 1An exemplary lithographic projection apparatus 10A is shown. The main components are a radiation source 12A, which may be a deep ultraviolet excimer laser source or other type of source, including: an extreme ultraviolet (EUV) source (as described above, the lithographic projection apparatus itself need not have a radiation source), illumination optics (which define the partial coherence (expressed as sigma) and may include optics 14A, 16Aa, and 16Ab that shape the radiation from source 12A); a patterning device 14A; and transmission optics 16Ac, which projects an image of the patterning device pattern onto a substrate plane 22A. An adjustable filter or aperture 20A at the pupil plane of the projection optics may limit the range of beam angles incident on the substrate plane 22A, where the maximum possible angle defines the numerical aperture NA of the projection optics = n sin (Θ max ), n is the refractive index of the medium between the last element of the projection optics and the substrate.

[0077] In the optimization process of the system, the quality factor of the system can be expressed as a cost function. The optimization process is reduced to the process of finding a set of parameters (design variables) of the system that optimizes (e.g., minimizes or maximizes) the cost function. The cost function can have any suitable form, depending on the goal of the optimization. For example, the cost function can be the weighted root mean square (RMS) of the deviation of certain characteristics (evaluation points) of the system relative to the expected values ​​(e.g., ideal values) of these characteristics; the cost function can also be the maximum value (i.e., the worst deviation) of these deviations. The term "evaluation point" in this article should be broadly interpreted as including any characteristic of the system. Due to the practicality of the system implementation, the design variables of the system can be limited to a limited range and / or interdependent. In the case of lithographic projection equipment, constraints are usually associated with physical properties and characteristics of the hardware (such as adjustable range and / or patterning device manufacturability design rules), and evaluation points can include physical points on the resist image on the substrate, as well as non-physical characteristics, such as dose and focus.

[0078] In a lithographic projection apparatus, a light source provides illumination (i.e., radiation) to a patterning device, and projection optics guides and shapes the illumination onto a substrate via a patterning device. The term "projection optics" is broadly defined here as any optical component that can change the wavefront of a radiation beam. For example, projection optics may include at least some of components 14A, 16Aa, 16Ab, and 16Ac. An aerial image (AI) is a distribution of radiation intensity at the substrate level. A resist layer on a substrate is exposed, and an aerial image is transferred to the resist layer as a potential "resist image" (RI) therein. A resist image (RI) may be defined as the spatial distribution of the solubility of the resist in the resist layer. A resist model may be used to calculate a resist image from an aerial image, an example of which may be found in U.S. Patent Application Publication No. US 2009-0157360, the entire contents of which are incorporated herein by reference. The resist model is only related to the properties of the resist layer (e.g., the effects of chemical treatments occurring during exposure, PEB, and development). The optical properties of a lithographic projection apparatus (e.g., properties of a source, a patterning device, and projection optics) determine the aerial image. Since the patterning device used in a lithographic projection apparatus can be varied, it is desirable to separate the optical properties of the patterning device from the optical properties of the rest of the lithographic projection apparatus, including at least the source and the projection optics.

[0079] exist Figure 2 An exemplary flow chart for simulating lithography in a lithography projection apparatus is shown in FIG. A source model 31 represents the optical properties of a source (including radiation intensity distribution and / or phase distribution). A projection optical model 32 represents the optical properties of the projection optical device (including changes in the radiation intensity distribution and / or phase distribution caused by the projection optical device). A design layout model 35 represents the optical properties of the design layout (including changes in the radiation intensity distribution and / or phase distribution caused by a given design layout 33), which is a representation of the arrangement of features on or formed by a patterning device. An aerial image 36 can be simulated from the design layout model 35, the projection optical model 32, and the design layout model 35. A resist image 38 can be simulated from the aerial image 36 using a resist model 37. For example, the simulation of lithography can predict the profile and CD in the resist image.

[0080] More specifically, it should be noted that the source model 31 can represent the optical properties of the source, including but not limited to the NA setting, the sigma (σ) setting, and any specific illumination shape (e.g., off-axis radiation sources such as toroidal, quadrupole, dipole, etc.). The projection optical model 32 can represent the optical properties of the projection optical device, including: aberrations, distortions, one or more refractive indices, one or more physical sizes, one or more physical dimensions, etc. The design layout model 35 can represent the physical properties of one or more physical patterning devices, such as described in U.S. Patent No. 7,587,704, which is incorporated herein by reference in its entirety. The purpose of the simulation is to accurately predict, for example, edge position, spatial imaging intensity slope, and / or CD, which can then be compared to the expected design. The expected design is typically defined as the design layout before OPC, which can be provided in a standardized digital file format (such as GDSII or OASIS) or other file format.

[0081] From the design layout, one or more portions referred to as "snippets" may be identified. In one example, a set of snippets are extracted that represent complex patterns in the design layout (typically about 50 to 1000 snippets may be used, although any number of snippets may be used). These patterns or snippets represent small portions of the design (i.e., circuits, cells, or patterns), and more specifically, snippets typically represent small portions that require special attention and / or verification. In other words, a snippet may be a portion of the design layout, may be similar to a portion of the design layout, or may have similar behavior to a portion of the design layout, where one or more key features may be identified empirically (including snippets provided by customers), identified by trial and error, or identified by running a full-chip simulation. A snippet may contain one or more test patterns or gauge patterns.

[0082] The customer may provide a larger set of initial fragments in advance based on one or more known key feature areas in the design layout that require specific image optimization. Alternatively, in another example, a larger set of initial fragments may be extracted from the entire design layout using some automation (such as machine vision) or manual algorithm that identifies one or more key feature areas.

[0083] In lithographic projection equipment, for example, using EUV (extreme ultraviolet radiation, e.g., wavelengths in the range of 5-20 nm) sources or non-EUV sources, reduced radiation intensity can cause strong random variations, such as significant line width roughness and / or local CD variations in small two-dimensional features (such as holes). In lithographic projection equipment using EUV sources, the reduced radiation intensity can be attributed to low total radiation emitted from the source, radiation losses in the optics that shape the radiation from the source, transmission losses through the projection optics, high photon energy resulting in a reduction of photons at a constant dose, etc. Random variations can be attributed to factors such as photon shot noise in the resist, secondary electrons generated by the photons, variations in photon absorption, and / or acid generated by the photons. Small size features further exacerbate this random variation. Random variations in smaller features are an important factor in production yield and justify their inclusion in various optimization processes for lithographic processes and / or lithographic projection equipment.

[0084] At the same radiation intensity, shorter exposure times per substrate result in higher throughput of the lithographic projection equipment, but result in stronger random variations. The photon shot noise in a given feature at a given radiation intensity is proportional to the square root of the exposure time. In lithography using EUV and other radiation sources, it is desirable to shorten the exposure time to increase throughput. Therefore, the methods and apparatus described herein for accounting for random variations in the optimization process are not limited to EUV lithography.

[0085] The yield may also be affected by the total amount of radiation directed towards the substrate.In some lithographic projection apparatuses, a portion of the radiation from the source is sacrificed in order to achieve a desired illumination shape.

[0086] Figure 3A Line edge roughness (LER) is schematically depicted. Assuming that all conditions in three exposures or exposure simulations of the edge 903 of the feature on the design layout are the same, the resist images 903A, 903B and 903C of the edge 903 may have slightly different shapes and positions. The positions 904A, 904B and 904C of the resist images 903A, 903B and 903C may be measured by averaging the resist images 903A, 903B and 903C, respectively. Random variations such as line edge roughness are usually represented by the parameters of the distribution of the basic characteristics. In this example, assuming that the distribution is a normal distribution, the LER of the edge 903 may be represented by 3σ of the spatial distribution of the edge 903. 3σ may be derived from the position (e.g., position 904A, 904B and 904C) of the edge 903 in many exposures or simulations of the edge 903. The LER represents the range in which the edge 903 may fall due to random effects. Therefore, LER may also be referred to as random edge placement error (SEPE). LER may be larger than the variation in edge 903 position caused by non-random effects.

[0087] Figure 3B Line width roughness (LWR) is schematically depicted. Assuming that all conditions in three exposures or exposure simulations of a long rectangular feature 910 with width 911 on the design layout are the same, the widths 911A, 911B, and 911C of the resist images 910A, 910B, and 910C of the rectangular feature 910 may be slightly different, respectively. The LWR of the rectangular feature 910 may be a measurement of the distribution of widths 911A, 911B, and 911C. For example, assuming that the distribution is a normal distribution, the LWR may be 3σ of the distribution of width 911. The LWR may be derived from many exposures or simulations of the width 911 (e.g., widths 911A, 911B, and 911C) of the rectangular feature 910. In the case of short features (e.g., contact holes), the width of their images cannot be well defined because long edges are not available for averaging their positions. A similar number of LCDUs may be used to characterize random variations. LCDU is 3σ of the distribution of the measured CDs of the image of short features (assuming the distribution is normal).

[0088] Figure 3C Schematic showing how random variations can affect lithography. Figure 3C In the example of , the expected position of the edge of the feature in the aerial image or resist image is represented by the dotted line 982. The actual edge is represented by a curve 995, which includes random variations (LER in this example) and errors unrelated to random effects (e.g., caused by other factors such as dose variations, focus variations, source shapes, patterning device (e.g., mask) errors, etc.). The average position of the actual edge is represented by a solid line 981. The difference 980 between the average position (solid line 981) and the expected position (dashed line 982) is an error unrelated to random effects, which can be referred to as an edge placement error (EPE). The variation of the actual edge relative to the average position is a random variation. The band 990 around the average position (solid line 981) of the random variation can be referred to as a random variation band, which indicates the extent to which the actual local edge placement may be achieved due to random effects. The width of the random variation band can be greater than the EPE. Therefore, the total probability deviation from the expected position of the edge (dashed line 982) can be the sum of the EPE and the random variation band. If there were no random variation, the actual position of the edge in this example would be at the position indicated by solid line 981, which would not merge with adjacent feature 983 and thus would not create a defect. However, when there is random variation and the random variation band is large enough (e.g., band 990), the actual edge may merge with adjacent feature 983 (marked by a dashed circle) and thereby create a defect. Therefore, it is desirable to evaluate, simulate, or reduce random variation.

[0089] exist Figure 4A Flowchart and Figure 4BA method for determining a relationship between random variations of a characteristic of an aerial image or resist image and one or more design variables is depicted in the schematic diagram of FIG. In step 1301, a value 1503 of a characteristic is measured from a plurality of aerial images or resist images 1502 formed (by actual exposure or simulation) for each of a plurality of sets 1501 of values ​​of one or more design variables. In step 1302, a value 1505 of the random variation is determined for each set 1501 of values ​​of one or more design variables from a distribution 1504 of the values ​​1503 of the characteristic measured from the aerial images or resist images formed for the set 1501 of values ​​of one or more design variables. In step 1303, a relationship 1506 is determined by fitting one or more parameters of a model based on the value 1504 of the random variation and the set 1501 of values ​​of one or more design variables.

[0090] In one example, the random variation is LER, and the one or more design variables are blurred image ILS (bl_ILS), dose, and imaging intensity. The model can be:

[0091] LER=a×bl_ILS b ×(dose × image intensity) c (Equation 30)

[0092] The parameters a, b and c can be determined by fitting. Blurred image ILS (bl_ILS) is the image logarithmic slope ILS with spatial blur applied. Spatial blur can represent the blurring of the resist image due to diffusion of chemical species generated in the resist layer by exposure to radiation.

[0093] Figure 5A The results of fitting using the model in Equation 30 are shown. At constant imaging intensity and constant dose, the values ​​of LER 1400 (as an example of random variation) for more than 900 different features including long grooves 1401, long lines 1402, short lines 1403, short grooves 1404, short line ends 1405, and short groove ends 1406 are calculated according to Figure 4A and Figure 4B The parameters a and b in equation 30 (the parameter c is rolled into the parameter a because the dose-weighted blurred imaging intensity is constant) are determined by fitting the value of LER with the value of the design variable bl_ILS. The fitting result is shown in curve 1410.

[0094] Figure 5B The results of fitting 1510 using the model in Equation 30 are shown. The values ​​of LCDU 1500 (as an example of random variation) for CD in the width direction and CD in the length direction of a 20×40 nm trench 1505 at various doses and various imaging intensities are used Figure 4A and Figure 4B The parameters a, b, and c in Equation 30 are determined by fitting the value of LWR with the values ​​of the design variables bl_ILS, dose, and imaging intensity.

[0095] Once through such Figure 4A and Figure 4B Methods such as the method in determine a relationship between random variations in a characteristic of an aerial image or a resist image and one or more design variables, which relationship can then be used to calculate a value for the random variation in the characteristic. Figure 6 An exemplary flow chart for this calculation is shown. In step 1610, a set of conditions is selected (e.g., NA, σ, dose, focus, resist chemistry, one or more projection optics parameters, one or more irradiation parameters, etc.). In step 1620, the values ​​of one or more design variables are calculated under these conditions. For example, the values ​​of the edge position of the resist image and bl_ILS along the edge. In step 1630, the value of the random variation is calculated based on the relationship between the random variation and one or more design variables. For example, in the example, the random variation is the LER of the edge. In optional step 1640, a noise vector can be defined whose frequency distribution approximately matches the actual substrate measurement. In optional step 1650, the noise vector is overlaid on the result (e.g., a random edge of an aerial image or a resist image).

[0096] like Figure 7 As shown, the relationship between the random variation of the characteristics of the aerial image or resist image and one or more design variables can also be used to identify one or more "hot spots" of the aerial image or resist image. A "hot spot" can be defined as a location on the image where the random variation exceeds a certain amplitude. For example, if the LER values ​​of two locations on two adjacent edges are large, there is a high probability that the two locations are connected to each other.

[0097] In an example, the values ​​of random variations (and / or functions thereof) at multiple conditions and at multiple values ​​of one or more design variables may be as follows: Figure 8 The non-transitory computer readable medium 1800 shown, such as a database stored on a hard drive, is calculated and compiled. A computer can query the medium 1800 and calculate randomly varying values ​​based on the contents of the medium 1800.

[0098] Determination of random variations in properties of a space / resist image can be useful in a number of ways in a lithography process. In one example, random variations can be accounted for in optical proximity correction (OPC).

[0099] As an example, OPC addresses the fact that the final size and placement of the image of the design layout projected on the substrate will not be the same as, or simply depend on, the size and placement of the design layout on the patterning device. Note that the terms "mask", "reticle", "patterning device" are used interchangeably herein. Similarly, those skilled in the art will recognize that the terms "mask" / "patterning device" and "design layout" can be used interchangeably, especially in the context of lithography simulation / optimization, as in lithography simulation / optimization, a physical patterning device is not necessarily used, but a design layout can be used to represent the physical patterning device. For small feature sizes and high feature densities present on some design layouts, the location of a particular edge of a given feature will be affected to some extent by the presence or absence of other adjacent features. These proximity effects are caused by trace amounts of radiation coupled from one feature to another and / or non-geometric optical effects such as diffraction and interference. Similarly, diffusion and other chemical effects may cause proximity effects during, for example, post-exposure baking (PEB), resist development, and etching, which is usually performed after lithography.

[0100] To help ensure that the projected image of the design layout meets the requirements of a given target circuit design, a sophisticated numerical model should be used to predict and compensate for proximity effects for correction or pre-distortion of the design layout. An overview of the "model-based" optical proximity correction process is provided in the article "Full-Chip Lithography Simulation and Design Analysis-How OPC Is Changing IC Design" by C. Spence, Proc. SPIE, pp. 5751, 1-14 (2005). In a typical high-end design, almost every feature of the design layout has some modifications to achieve a higher fidelity of the projected image to the target design. These modifications can include an offset or bias of edge position or line width, as well as the application of "auxiliary" features intended to assist the projection of other features.

[0101] Given the millions of features typically present in a chip design, the application of model-based OPC to a target design involves good process models and significant computational resources. However, applying OPC is typically not an “exact science” but rather an empirical, iterative process that is not always able to compensate for all possible proximity effects. Therefore, the impact of OPC (e.g., design layout after applying OPC and / or any other RET) should be verified through design checks, i.e., intensive full-chip simulations using calibrated numerical process models to reduce or minimize the likelihood of design defects built into the pattern of the patterned device. This is driven by the huge cost of manufacturing high-end patterned devices (running in the millions of dollars range) and the impact on turnaround time of reworking or repairing the actual patterned device once manufactured.

[0102] Both OPC and full-chip RET verification can be based on numerical modeling systems and methods described, for example, in U.S. Patent Application Publication No. US 2005-0076322 and Y. Cao et al., entitled “Optimized Hardware and Software For Fast, Full Chip Simulation” in Proc. SPIE, Vol. 5754, 405 (2005).

[0103] One type of RET is related to the adjustment of the global deviation of the design layout (also called "mask deviation"). The global deviation is the difference between the pattern in the design layout and the pattern intended to be printed on the substrate. For example, ignoring the (de-)magnification of the projection optics, a circular pattern with a diameter of 25 nm can be printed on the substrate by a pattern with a diameter of 50 nm in the design layout or by a pattern with a diameter of 20 nm in the design layout at a higher dose.

[0104] In addition to optimizing the design layout or patterning device (e.g., OPC), the illumination can also be optimized together with or separately from the patterning device optimization in an effort to improve the overall lithography fidelity. The terms "illumination source" and "source" are used interchangeably in this document. Many off-axis illuminations, such as annular, quadrupole, and dipole illumination, have been introduced, and these off-axis illuminations provide greater freedom for OPC design, thereby improving imaging results. Off-axis illumination is a method to address fine structures (i.e., target features) contained in patterning devices. However, off-axis illumination typically provides less radiation intensity for aerial images (AI) than traditional illumination. Therefore, it is desirable to try to optimize the illumination to achieve the best balance between finer resolution and reduced radiation intensity.

[0105] Many illumination optimization methods can be found, for example, in the article "Optimum Mask and Source Patterns to Print a Given Shape" by Rosenbluth et al., Microsystems 1(1), Journal of Microlithography, Microfabrication, pp. 13-20 (2002). The source is divided into several regions, each corresponding to a certain region of the pupil spectrum. Then, it is assumed that the light source distribution is uniform in each source region, and the brightness of each region is optimized for the process window. However, such an assumption of uniform source distribution in each source region is not always valid, and as a result, the effectiveness of this method is affected. In another example presented in the article "Source Optimization for Image Fidelity and Throughput" by Granik, Microsystems 3(4), Journal of Microlithography, pp. 509-522 (2004), several existing source optimization methods are summarized, and a method based on irradiated pixels is proposed, which converts the source optimization problem into a series of non-negative least squares optimizations. Although these methods show some success, they usually require multiple complex iterations to converge. In addition, it may be difficult to determine the appropriate / optimal values ​​of some additional parameters, such as γ in Granik's method, which determines the trade-off between the source and the smoothness requirement of the source to optimize the substrate image fidelity.

[0106] For low-k1 lithography, optimization of both the source and the patterning device is useful to help ensure a feasible process window for projecting critical circuit patterns. Some algorithms (e.g., Socha et al., 2005, Proc. SPIE vol. 5853, p. 180) discretize the illumination into independent source points and the patterning device into diffraction orders in the spatial frequency domain, and formulate a cost function (defined as a function of one or more selected design variables) based solely on a process window metric (such as exposure latitude) that can be predicted by an optical imaging model from the source point intensities and the patterning device diffraction orders.

[0107] The term "design variables" as used herein includes a set of parameters of a lithographic projection device or a lithographic process, for example, parameters that a user of the lithographic projection device can adjust, or image characteristics that a user can adjust by adjusting these parameters. It should be understood that any one or more characteristics of the lithographic projection process (including one or more characteristics of the irradiation, patterning device, projection optics and / or resist) can be represented by the design variables in the optimization. The cost function is typically a nonlinear function of the design variables. The cost function is then optimized using standard optimization techniques.

[0108] Relatedly, the pressure of ever-reducing design rules drives semiconductor chip manufacturers to move deeper into the era of low-k1 lithography using existing 193nm ArF lithography. The move toward lower k1 lithography places high demands on RET, exposure tools, and lithography-friendly designs. 1.35ArF ultra-numerical aperture (NA) exposure tools may be used in the future. To help ensure that circuit designs can be made on substrates within a feasible process window, illumination patterning device optimization (referred to herein as source mask optimization or SMO) is becoming an important RET for the 2×nm node.

[0109] In U.S. Patent Application Publication No. 2011-0230999 (the entire contents of which are incorporated herein by reference), an illumination and patterning device (design layout) optimization method and system are described that allow simultaneous optimization of illumination and patterning devices without restriction and within a feasible time using a cost function. Another SMO method and system involving optimizing a source by adjusting the pixels of the source is described in U.S. Patent Application Publication No. 2010 / 0315614 (the entire contents of which are incorporated herein by reference).

[0110] In a lithographic projection apparatus, as an example, the cost function can be expressed as

[0111]

[0112] where (z1, z2, …, z N ) are N design variables or their values. p (z1,z2,…,z N ) can be the design variables (z1, z2, …, z N ), such as for the design variables (z1, z2, ..., z N ) is the difference between the actual and expected values ​​of a characteristic at the evaluation point. p is with f p (z1,z2,…,z N ) is associated with a weight constant. A higher w may be assigned to an evaluation point or pattern that is more critical than other evaluation points or patterns. pValues. Patterns and / or evaluation points that occur more often can also be assigned higher w p Examples of evaluation points may be any physical point or pattern on a substrate, a virtual design layout, or any point on a resist image or aerial image, or a combination thereof. p (z1,z2,…,z N ) can also be a function of one or more random variables (such as LWR, LER and / or LCDU), which in turn are the design variables (z1, z2, ..., z N ). p (z1,z2,…,z N ) can be an explicit function of random variation, such as f p (LER)=LER2(z1,z2,…,z N ). p (z1,z2,…,z N ) can be an explicit function of a variable that is a function of a random variable such as LER. For example, bl_ILS can be a function of LER as indicated by Equation 30 and f p (z1,z2,…,z N ) can be variables that affect random changes such as LER.

[0113] Therefore, using f including random variations p (z1,z2,…,z N ) can produce values ​​of one or more design variables that reduce or minimize random variation. The cost function can represent any one or more suitable characteristics of the lithographic projection apparatus, the lithographic process, or the substrate, such as focus, CD, image offset, image distortion, image rotation, random variation, yield, LCDU, or a combination thereof. LCDU is the local CD variation (e.g., three times the standard deviation of the local CD distribution). In one example, the cost function represents (i.e., is a function of) LCDU, yield, and random variation. In one example, the cost function represents (e.g., includes f as a function of p (z1,z2,…,z N )) EPE, yield, and random variation. In one example, the cost function includes f as a function of EPE p (z1,z2,…,z N ) and f as a function of random variations such as LER p (z1,z2,…,z N In one example, the design variables (z1, z2, ..., z N) includes one or more of the following: dose, overall bias of the patterning device, shape of the irradiation, or a combination thereof. Since it is usually the resist image that determines the pattern on the substrate, the cost function may include a function representing one or more characteristics of the resist image. For example, such an evaluation point f p (z1,z2,…,z N ) can simply be the distance between a point in the resist image and the expected position of that point (i.e., the edge placement error EPF p (z1,z2,…,z N )). Design variables can include any adjustable parameters, such as adjustable parameters of the source, patterning device, projection optics, dose, focus, etc.

[0114] The lithographic apparatus may include components collectively referred to as "wavefront manipulators," which may be used to adjust the shape of the wavefront and the intensity distribution and / or phase shift of the radiation beam. In an example, the lithographic apparatus may adjust the wavefront and intensity distribution at any location along the optical path of the lithographic projection apparatus, such as: before the patterning device, near the pupil plane, near the image plane, and / or near the focal plane. The wavefront manipulator may be used to correct or compensate for certain distortions of the wavefront and the intensity distribution and / or phase shift caused by, for example, temperature changes in the source, the patterning device, the lithographic projection apparatus, thermal expansion of components of the lithographic projection apparatus, and the like. Adjusting the wavefront and the intensity distribution and / or phase shift may change the values ​​of the evaluation points and the cost function. Such changes may be simulated from a model or actually measured. Of course, CF(z1, z2, ..., z N ) is not limited to the form in equation 1. CF(z1, z2, ..., z N ) may take any other suitable form.

[0115] According to an example, the cost function representing both EPE and LER may have the following form:

[0116]

[0117] This is because both EPE and LER have length dimensions. Therefore, they can be added directly. Other cost functions can be used, including a cost function that includes LER in EPE.

[0118] Equation 30 links bl_ILS with LER. Therefore, the optimization using the cost function representing bl_ILS is similar to the optimization using the cost function representing LER. The larger the bl_ILS, the smaller the LER, and vice versa. According to the example, the cost function can represent both EPE and bl_ILS (or normalized ILS (NILS)). However, EPE and bl_ILS (or NILS) may not be added directly because bl_ILS cannot measure length while EPE can, or NILS is dimensionless while EPE has a length dimension. Therefore, representing bl_ILS (or NILS) by a function representing length can add the representation directly to EPE.

[0119] ILS is defined as bl_ILS is the spatially blurred ILS. NILS is defined as =CD×ILS. These definitions suggest a function that can represent ILS, bl_ILS or NILS and represents the length, and can therefore be directly added to the EPE. Fig. 9A and Fig. 9B Each shows the intensity of the image (space or resist) across the edge of the pattern in a direction (x) perpendicular to the edge of the pattern. A higher slope of intensity with respect to x indicates a higher ILS, bl_ILS, and NILS. Therefore, Fig. 9A The example has a Fig. 9B Example of higher ILS, bl_ILS and NILS. Edge position X e The intensity sufficient to expose the resist I is shifted. When the exposure duration is fixed, the intensity sufficient to expose the resist I varies with the dose. Therefore, the edge position X caused by a given change in dose (e.g., ±δ relative to the nominal dose, which can be a user-selected parameter) e The offset (hereinafter referred to as "EPE ILS ”, such as 2911 and 2912) are determined by ILS, bl_ILS or NILS. Fig. 9A EPE in the example ILS Less than Fig. 9B EPE in the example ILS ,because Fig. 9A The example thus has a Fig. 9B The example of higher ILS, bl_ILS and NILS. Therefore, EPE ILS is an example of a function that can represent ILS, bl_ILS or NILS and represents the length, allowing it to be directly added to the EPE in the cost function. ILS Can be written as

[0120]

[0121] Where ILS(xe (0)) are the design variables (z1, z2, …, z N According to one example, the cost function representing both EPE and ILS, bl_ILS or NILS may have the following form:

[0122]

[0123] EPF p (z1,z2,…,z N )| δ＝0 is the EPE value at the nominal dose, p is the pth evaluation point, and S p Yes EPE ILS The weight of the term. Therefore, for example, by minimizing this cost function, the optimization makes ILS(x e (0)) is maximized and thus LER is minimized.

[0124] According to one example, when an EPE item increases, the EPE item (e.g., ) weight to reduce EPE ILS item The weight of EPE ILS item Does not control EPE items If EPE ILS term dominates, the EPE term cannot be sufficiently reduced by optimization. For example, when |EPE p |Above the user-selected offset, when |EPE p |>OF, s p = 0 (so optimization ignores EPE ILS term and only reduce the EPE term), and when |EPE p |>OF, s p ≠0, where OF is the offset.

[0125] For example, A higher weight of the EPE term will make the use of the cost function in the optimization favor reducing the EPE term.

[0126] Fig.10 Schematic diagram showing the cost function and EPE p The relationship curve, where the weight like Fig.10 As shown, when |EPE p |>OF, the EPE term accounts for a larger proportion in the cost function because the weight w p Has a larger value.

[0127] The design variables can have constraints, which can be expressed as (z1, z2, ..., z N )∈Z, where Z is a set of possible values ​​of the design variables. One possible constraint on the design variables may be imposed by the desired yield of the lithography projection equipment. The lower limit of the desired yield leads to an upper limit on the dose and therefore has an impact on the random variation (e.g., imposes a lower limit on the random variation). Shorter exposure times and / or lower doses typically lead to higher yields, but larger random variations. Since random variations are functions of the design variables, considering substrate yield and minimizing random variations can limit the possible values ​​of the design variables. If there is no such constraint imposed by the desired yield, the optimization may produce a set of unrealistic design variable values. For example, if the dose is a design variable, in the absence of such a constraint, the optimization may produce a dose value that makes the yield economically unfeasible. However, the usefulness of the constraint should not be interpreted as necessity. For example, the yield may be affected by the pupil filling rate. For some irradiation designs, a low pupil filling rate can discard radiation, resulting in reduced yield. The yield may also be affected by the chemical composition of the resist. Slower resists (e.g., resists that require a lot of radiation to be properly exposed) result in lower yields.

[0128] Therefore, the optimization process is performed under the constraints (z1, z2, ..., z N )∈Z to find a set of values ​​of one or more design variables that optimize the cost function, such as:

[0129]

[0130] According to an example, the general optimization method is Fig.11. The method includes a step 302 of defining a multivariate cost function for a plurality of design variables. The design variables may include any suitable combination selected from: a design variable representing one or more characteristics of the illumination (300A) (e.g., pupil fill rate, i.e., the percentage of the irradiated radiation that passes through the pupil or aperture), one or more characteristics of the projection optics (300B), and / or one or more characteristics of the design layout (300C). For example, the design variables may include one or more characteristics representing the illumination (300A) and the design layout (300C) (e.g., overall deviation) but not including a design variable representing one or more characteristics of the projection optics (300B), which results in SMO. Alternatively, the design variables may include design variables representing one or more characteristics of the illumination (300A) (optionally polarization), the projection optics (300B), and the design layout (300C), which results in illumination patterning device (e.g., mask) projection system (e.g., lens) optimization (SMLO). In step 304, the design variables are adjusted simultaneously to converge the cost function. In step 306, it is determined whether a predefined termination condition is met. The predetermined termination condition may include various possibilities, for example, one or more selected from the following: the cost function can be minimized or maximized according to the requirements of the numerical technique used, the value of the cost function is equal to a threshold or crosses a threshold, the value of the cost function reaches a preset error limit, and / or a preset number of iterations is reached. If the conditions in step 306 are met, the method ends. If one or more conditions in step 306 are not met, steps 304 and 306 are iteratively repeated until the desired result is obtained. Optimization does not necessarily result in a set of values ​​for one or more design variables, as there may be physical limitations caused by factors such as pupil filling factor, resist chemical composition, yield, etc. Optimization can provide multiple sets of values ​​for one or more design variables and associated performance characteristics (e.g., yield), and allow a user of the lithographic apparatus to select one or more sets. Fig. 22Several relationships are shown between throughput (in substrates per hour) on the horizontal axis and a measure of random variation (e.g., the average of worst corner CDU and LER on the vertical axis) and resist chemistry (which can be represented by the dose required to expose the resist), pupil fill rate (also called "pupil fill factor"), illumination efficiency (e.g., the ratio of mirrors that direct radiation to the patterning device to the total available mirrors in the illuminator), and mask bias. Trace 1811 shows these relationships with a 100% pupil fill factor and a fast resist. Trace 1812 shows these relationships with a 100% pupil fill factor and a slow resist. Trace 1821 shows these relationships with a 60% pupil fill factor and a fast resist. Trace 1822 shows these relationships with a 60% pupil fill factor and a slow resist. Trace 1831 shows these relationships with a 29% pupil fill factor and a fast resist. Trace 1832 shows these relationships with a pupil fill factor of 29% and a slow resist. The optimization can present all of these possibilities to the user so the user can select pupil factors, resist chemistries based on his specific requirements for random variation and / or yield. The optimization can also include calculating the relationship between yield and pupil fill factor, resist chemistry, and mask bias. The optimization can also include calculating the relationship between an indicator of random variation and pupil fill factor, resist chemistry, and mask bias.

[0131] According to an example, Fig.23 As schematically illustrated in the flowchart of , optimization (step 1910) can be performed at each value in a set of values ​​of one or more design variables (e.g., an array, matrix, or list of values ​​of global biases and mask anchor biases). In one example, the optimized cost function is a function of one or more indicators (e.g., LCDU) that vary randomly. Then, in step 1920, various characteristics of the process, aerial images and / or resist images (e.g., critical dimension uniformity (CDU), depth of field (DOF), exposure range (EL), mask error enhancement factor (MEEF), LCDU, yield, etc.) can be presented to the user of the optimization (e.g., in the form of a 3D graph) for each set of values ​​of one or more design variables. In optional step 1930, the user selects a set of values ​​of one or more design variables based on his or her desired characteristics. The process can be implemented via an XML file or any scripting language.

[0132] The illumination, patterning device and projection optics can be optimized alternately (referred to as alternative optimization) or simultaneously (referred to as simultaneous optimization). The terms "simultaneously", "simultaneously", "together" and "together" as used herein refer to allowing one or more design variables representing one or more characteristics of the illumination, patterning device, projection optics and / or any other design variable to be changed simultaneously. The terms "alternatively" and "alternatively" as used herein refer to not allowing all design variables to be changed simultaneously.

[0133] exist Fig.11 In the process, the optimization of all design variables is performed simultaneously. Such a process can be called a simultaneous process or a joint optimization process. Alternatively, the optimization of all design variables can also be performed alternately, such as Fig.12 As shown in . In this process, in each step, some design variables are fixed while other design variables are optimized to optimize the cost function; then in the next step, a different set of variables are fixed while other variables are optimized to minimize or maximize the cost function. These steps are performed alternately until convergence or some termination condition is met. Fig.12 As shown in the non-limiting example flow chart of , first, a design layout is obtained (step 402), and then an illumination optimization step is performed in step 404, wherein one or more design variables of the illumination are optimized (SO) to minimize or maximize the cost function, while other design variables are fixed. Then in the next step 406, a patterning device (e.g., mask) optimization (MO) is performed, wherein the design variables of the patterning device are optimized to minimize or maximize the cost function, while other design variables are fixed. These two steps are performed alternately until a certain termination condition is met in step 408. One or more various termination conditions can be used, such as: the value of the cost function becomes equal to a threshold, the value of the cost function crosses a threshold, the value of the cost function reaches a preset error range, a preset number of iterations is reached, etc. Note that SO-MO-alternative-optimization is used as an example of an alternating process. The alternating process can take many different forms, such as SO-LO-MO-alternative-optimization, wherein SO, LO (projection optics optimization), and MO are performed alternately and iteratively; or SMO is performed once, and then LO and MO are performed alternately and iteratively, etc. Another option is SO-PO-MO (illumination optimization, polarization optimization and patterning device optimization). Finally, an output of the optimization results is obtained in step 410 and the process stops.

[0134] As previously described, the mode selection algorithm can be integrated with simultaneous or alternative optimization. For example, when alternative optimization is employed, full chip SO can be performed first, then one or more "hot spots" and / or "warm spots" can be identified, and then MO can be performed. In view of the present disclosure, many permutations and combinations of sub-optimizations are possible in order to obtain the desired optimization results.

[0135] Fig.13A An exemplary optimization method is shown in which a cost function is minimized or maximized. In step S502, initial values ​​of one or more design variables are obtained, including one or more associated tuning ranges (if any). In step S504, a multivariate cost function is established. In step S506, the cost function is expanded in a sufficiently small neighborhood around the starting value of one or more design variables of the first iteration step (i=0). In step S508, standard multivariate optimization techniques are applied to the cost function. Note that the optimization problem can impose constraints, such as one or more tuning ranges, during the optimization process in S508 or at a later stage in the optimization process. Step S520 indicates that each iteration is performed for one or more given test patterns (also referred to as "gauges") for the identified evaluation points that have been selected for optimizing the lithography process. In step S510, the lithography response is predicted. In step S512, the results of step S510 are compared with the expected or ideal lithography response values ​​obtained in step S522. If the termination condition is met in step S514, that is, the optimization generates a lithographic response value that is close enough to the expected value, then the final value of the design variable is output in step S518. The output step may also include outputting one or more other functions using the final value of the design variable, such as: outputting a wavefront aberration adjustment map at the pupil plane (or other plane), an optimized illumination map and / or an optimized design layout, etc. If the termination condition is not met, then in step S516, the value of one or more design variables is updated using the result of the i-th iteration, and the process returns to step S506. The following describes in detail Fig.13A process.

[0136] In the exemplary optimization process, no assumption or approximation is made about the design variables (z1, z2, ..., z N ) and f p (z1,z2,…,z N ) unless f p (z1,z2,…,z N ) is sufficiently smooth (e.g., there is a first-order derivative (n=1, 2, ... N)), which is usually effective in lithography projection equipment. Algorithms such as Gauss-Newton algorithm, Levenberg-Marquardt algorithm, Broyden-Fletcher-Goldfarb-Shanno algorithm, gradient descent algorithm, simulated annealing algorithm, interior point algorithm and genetic algorithm can be applied to find

[0137] Here, the Gauss-Newton algorithm is taken as an example. The Gauss-Newton algorithm is an iterative method that is applicable to general nonlinear multivariable optimization problems. N ) takes the value of (z 1i , z 2i , …, z Ni ) in the i-th iteration, the Gauss-Newton algorithm makes f p (z1,z2,…,z N ) in (z 1i , z 2i , …, z Ni ) and then calculates the CF(z1, z2, ..., z N ) of the minimum value, in (z 1i , z 2i , …, z Ni ) near the value (z 1(i+1) , z 2(i+1) , …, z N(i+1) ). Design variables (z1, z2, …, z N ) takes the value of (z 1(i+1) , z 2(i+1) , …, z N(i+1) The iteration continues until convergence (i.e., CF(z1, z2, …, z N ) no longer decreases) or until the preset number of iterations is reached.

[0138] Specifically, in the i-th iteration, in (z 1i , z 2i , …, z Ni )nearby,

[0139]

[0140] Under the approximation of Equation 3, the cost function becomes:

[0141]

[0142] It is the design variable (z1, z2, ..., z N ). In addition to the design variables (z1, z2, …, z N ), each term is a constant.

[0143] If the design variables (z1, z2, ..., z N ) is not subject to any constraints, then (z 1(i+1) , z 2(i+1) , …, z N(i+1) ) can be obtained by solving N linear equations: Where n=1, 2,…,N.

[0144] If the design variables (z1, z2, ..., z N ) is under the constraints of the J inequality form (e.g., (z1, z2, …, z N ) tuning range), then where j = 1, 2, ..., J; and K equations (e.g., interdependencies between design variables) Where k = 1, 2, ..., K, the optimization process becomes a classic quadratic programming problem, where A nj , B j , C nk , D k is a constant. Other constraints can be added to each iteration. For example, a “damping factor” Δ D To limit to (z 1(i+1) , z 2(i+1) , …, z N(i+1) ) and (z 1i , z 2i , …, z Ni ), so that the approximation of Equation 3 holds. Such a constraint can be expressed as z ni -Δ D ≤z n ≤z ni +Δ D For example, (z 1(i+1) , z 2(i+1) , …, z N(i+1) ) can be derived using the method described in Numerical Optimization (2nd edition) by Jorge Nocedal and Stephen J. Wright (Berlin New York: Van den Berg Cambridge University Press).

[0145] In addition to minimizing f p (z1,z2,…,z N ), the optimization process can also minimize the magnitude of the maximum deviation (most serious defect) between the evaluation points to its expected value. In this approach, the cost function can be expressed as

[0146]

[0147] Among them, CL p Yes p (z1,z2,…,z N ). The cost function represents the most severe defect between the evaluation points. Optimization using this cost function can minimize the degree of the most severe defect. An iterative greedy algorithm can be used for this optimization.

[0148] The cost function of Equation 5 can be approximated as:

[0149]

[0150] Where q is an even positive integer, such as at least 4 or at least 10. Equation 6 mimics the behavior of Equation 5 while allowing the optimization to be performed analytically and accelerated using methods such as the deepest descent method, the conjugate gradient method, and the like.

[0151] Minimizing the worst defect size can also be related to f p (z1,z2,…,z N ) is linearized. Specifically, as in Equation 3, the approximate f p (z1,z2,…,z N ). Then, the constraint on the most severe defect size is written as inequality E Lp ≤f p (z1,z2,…,z N )≤E Up , where E Lp and E Up are two constants that specify f p (z1,z2,…,z N ). Inserting into Equation 3, for p=1,...P, these constraints are transformed into

[0152]

[0153] as well as

[0154]

[0155] Since Equation 3 is usually only valid for (z1, z2, …, z N ) is valid near this location. If the desired constraint E cannot be achieved near this location, Lp ≤f p (z1,z2,…,z N )≤E Up (this can be determined by any conflicts between inequalities), then the constraint E can be relaxed Lp and E Up Until the constraints can be achieved. This optimization process makes (z1, z2, ..., z N ), the worst defect size near i is minimized. Each step then gradually reduces the worst defect size, and each step is performed iteratively until some termination condition is met. This will lead to an optimal reduction in the worst defect size.

[0156] Another approach to minimizing the worst defect is to adjust the weight w at each iteration pFor example, after the i-th iteration, if the r-th evaluation point is the most severe defect, then w can be increased in the (i+1)-th iteration. r The reduction of defect size enabling this evaluation point is given higher priority.

[0157] In addition, the cost functions in Equations 4 and 5 can be modified by introducing Lagrange multipliers to achieve a compromise between the optimization of the RMS of defect sizes and the optimization of the worst defect size (i.e.,

[0158]

[0159] Wherein λ is a preset constant used to specify the trade-off between the optimization of the RMS of defect sizes and the optimization of the most severe defect size. In particular, if λ=0, then Equation 6″′ becomes Equation 4 and only the RMS of defect sizes is minimized; while if λ=1, then Equation 6″′ becomes Equation 5 and only the most severe defect size is minimized; if 0<λ<1, both are taken into account in the optimization. Such an optimization problem can be solved using a variety of methods. For example, similar to what was previously described, the weighting in each iteration can be adjusted. Alternatively, similar to minimizing the most severe defect size caused by the inequality, when solving the quadratic programming problem, the inequalities of Equation 6′ and Equation 6″ can be regarded as constraints on the design variables. Then, the bounds on the most severe defect size can be gradually relaxed, or the weights of the most severe defect size can be gradually increased, the cost function values ​​are calculated for each achievable most severe defect size, and the design variable values ​​that minimize the total cost function are selected as the starting point for the next step. By performing this operation iteratively, the minimization of this new cost function can be achieved.

[0160] Optimizing the lithography projection equipment can expand the process window. A larger process window provides greater flexibility for process design and chip design. The process window can be defined as a set of focus and dose values ​​for which the resist image is within specific limits of the design target of the resist image. Note that all methods discussed herein can also be extended to a general process window definition, which can also be established by different or additional basic parameters in addition to exposure dose and defocus. These may include, but are not limited to, optical settings such as NA, σ, aberrations, polarization, or optical constants of the resist layer. For example, as previously described, if the process window (PW) also includes different mask biases, the optimization includes minimizing MEEF, which is defined as the ratio between the substrate EPE and the mask edge bias caused. The process window defined on the focus and dose values ​​is used only as an example in this disclosure. A method for maximizing the process window according to an example is described below.

[0161] In the first step, starting from the known conditions (f0, ε0) in the process window, where f0 is the nominal focus and ε0 is the nominal dose, one of the following cost functions is minimized around (f0±Δf, ε0±ε):

[0162]

[0163] or

[0164]

[0165] or

[0166]

[0167] If the nominal focus f0 and the nominal dose ε0 are allowed to shift, they can be compared with the design variables (z1, z2, …, z N ) are optimized together. In the next step, if (z1, z2, …, z N If a set of values ​​of (f0±Δf, ε0±ε) makes the cost function within preset limits, then (f0±Δf, ε0±ε) is accepted as part of the process window.

[0168] If focus and dose drift are not allowed, the design variables (z1, z2, …, z N ). In an alternative example, if a set of values ​​can be found such that the cost function is within preset limits, then (f0±Δf, ε0±ε) is accepted as part of the process window.

[0169] The methods described earlier in this disclosure can be used to minimize the corresponding cost function of Equation 7, Equation 7', or Equation 7". If the design variables represent one or more characteristics of the projection optics (such as Zernike coefficients), then minimizing the cost function of Equation 7, Equation 7', or Equation 7" results in maximizing the process window based on projection optics optimization (i.e., LO). If, in addition to the characteristics of the projection optics, the design variables also represent one or more characteristics of the illumination and patterning devices, then minimizing the cost function of Equation 7, Equation 7', or Equation 7" results in maximizing the process window based on SMLO, such as Fig.11 If the design variables represent one or more characteristics of the source and the patterning device, minimizing the cost function of Equation 7, Equation 7', or Equation 7" results in maximizing the SMO-based process window. The cost function of Equation 7, Equation 7', or Equation 7" may also include at least one f such as described herein. p (z1,z2,…,z N ), which is a function of one or more random variations such as LWR, local CD variations of 2D features, and / or yield.

[0170] Fig.14 A specific example of how a simultaneous SMLO process can be optimized using the Gauss-Newton algorithm is shown. In step S702, starting values ​​for one or more design variables are identified. The tuning range for each variable can also be identified. In step S704, a cost function is defined using one or more design variables. In step S706, the cost function is extended to the vicinity of the starting values ​​for all evaluation points in the design layout. In optional step S710, a full-chip simulation is performed to cover all key patterns in the full-chip design layout. In step S714, the expected lithography response metrics (such as CD or EPE) are obtained and compared to the predicted values ​​of these quantities in step S712. In step S716, the process window is determined. Steps S718, S720, and S722 are similar to those described with respect to Fig.13A The corresponding steps S514, S516 and S518 described above. As mentioned above, the final output may be, for example, a wavefront aberration map in the pupil plane optimized to produce the desired imaging performance. The final output may be, for example, an optimized illumination map and / or an optimized design layout.

[0171] Fig. 13B An exemplary method for optimizing a cost function is shown, where the design variables (z1, z2, ..., z N ) includes design variables that can assume only discrete values.

[0172] The method begins by defining pixel groups for illumination and patterned device tiles for patterned devices (step 802). In general, pixel groups or patterned device tiles may also be referred to as partitions of a lithography process assembly. In an exemplary method, illumination is partitioned into 117 pixel groups, and 94 patterned device tiles are defined for the patterned device, resulting in a total of 211 partitions, substantially as described above.

[0173] In step 804, a lithography model is selected as a basis for lithography simulation. The results generated by the lithography simulation are used to calculate one or more lithography indicators or responses. Specific lithography indicators are defined as performance indicators to be optimized (step 806). In step 808, initial (pre-optimization) conditions for irradiation and patterning devices are set. The initial conditions include the initial state of the irradiated pixel group and the patterned tile of the patterning device, so that the initial irradiation shape and the initial patterning device pattern can be referenced. The initial conditions may also include mask bias, NA and / or focus slope range. Although steps 802, 804, 806 and 808 are described as sequential steps, it should be understood that in other examples, these steps may be performed in other orders.

[0174] In step 810, the pixel groups and patterned device tiles are sorted. The pixel groups and patterned device tiles may be interleaved in the sorting. Various sorting methods may be used, including: sorting sequentially (e.g., from pixel group 1 to pixel group 117 and from patterned device tile 1 to patterned device tile 94), sorting randomly, sorting based on the physical location of the pixel groups and patterned device tiles (e.g., sorting pixel groups closer to the center of the illumination higher), and / or sorting based on how changes to the pixel groups or patterned device tiles affect performance indicators.

[0175] Once the pixel groups and patterned device tiles are sorted, the illumination and patterned device are adjusted to improve the performance index (step 812). In step 812, each pixel group and patterned device tile is analyzed in the sorted order to determine whether the change of the pixel group or patterned device tile will result in an improvement in the performance index. If it is determined that the performance index will be improved, the pixel group or patterned device tile is changed accordingly, and then the improved performance index and the modified illumination shape or the modified patterned device pattern obtained form a baseline for comparison to perform subsequent analysis of the pixel group and patterned device tile with a lower sorting. In other words, the change of the improved performance index is retained. Since the change of the state of the pixel group and the patterned device tile is performed and retained, the initial illumination shape and the initial patterned device pattern are changed accordingly, so that the modified illumination shape and the modified patterned device pattern are obtained from the optimization process in step 812.

[0176] In other approaches, patterning device polygon shape adjustments and paired polling of pixel groups and / or patterning device tiles are also performed during the optimization process of step 812 .

[0177] In one example, the staggered simultaneous optimization process can include changing the set of pixels that are illuminated, and if an improvement in the performance metric is found, then gradually increasing and / or decreasing the dose or intensity to look for further improvement. In another example, the gradual increase and / or decrease in dose or intensity can be replaced with a deviation change in the patterning device pattern to look for further improvement in the simultaneous optimization process.

[0178] In step 814, a determination is made as to whether the performance metric has converged. For example, if little or no improvement to the performance metric is seen in the last few iterations of steps 810 and 812, the performance metric may be considered to have converged. If the performance metric has not converged, steps 810 and 812 are repeated in the next iteration, with the modified illumination shape and modified patterning device from the current iteration used as the initial illumination shape and initial patterning device for the next iteration (step 816).

[0179] The above optimization method can be used to increase the throughput of a lithographic projection apparatus. For example, the cost function may include f as a function of the exposure time. p (z1,z2,…,z N ). In one example, the optimization of such a cost function is constrained or influenced by a randomly varying metric or other metric. Specifically, a computer-implemented method for increasing the yield of a lithography process may include optimizing a cost function that is a function of one or more randomly varying lithography processes and a function of an exposure time of a substrate to reduce or minimize the exposure time.

[0180] In one example, the cost function includes at least one f as a function of one or more random variations. p (z1,z2,…,z N ). The one or more random variations may include LWR and / or local CD variations of the 2D feature. In one example, the one or more random variations include one or more random variations of one or more characteristics of the aerial image or the resist image. For example, such random variations may include line edge roughness (LER), line width roughness (LWR), and / or local critical dimension uniformity (LCDU). Including one or more random variations in the cost function allows finding values ​​of one or more design variables that minimize the one or more random variations, thereby reducing the risk of defects due to random variations.

[0181] Fig.15A A flow chart of a method for identifying hot spots of an aerial image or resist image based on a random variation of a feature (e.g., LER) or based on a variable (e.g., bl_ILS, ILS, or NILS) that is a function of the random variation or that affects the random variation is shown according to an example. In optional step 2510, a value of a variable (e.g., bl_ILS, ILS, or NILS) that is a function of a random variation (e.g., LER) of a feature (e.g., edge position) of an aerial image or resist image or that affects such a random variation is obtained. In step 2520, a value of a random variation (e.g., LER) of a feature is obtained (e.g., according to the value of the variable). In step 2530, a range of the feature is obtained. The range may be limited by any suitable restriction. For example, when the random variation is LER, the range may be determined by the geometry of the pattern of the design layout. For example, the maximum value of LER may not exceed the width of the gap from the edge to its adjacent edge. In step 2540, the value of the random variation is compared with the range. If the random variation is outside the range, the feature is identified as a hot spot in step 2550. Features identified as hot spots may be further processed, such as optimized to reduce random variation.

[0182] Fig. 15BA flow chart of a method for identifying hot spots of an aerial image or resist image based on a random variation (e.g., LER) of a characteristic (e.g., edge position) of the aerial image or resist image or based on a variable (e.g., bl_ILS, ILS, or NILS) that is a function of or affects the random variation is shown according to an example. In step 2610, a range of the characteristic is obtained. In step 2620, a range of the random variation (e.g., LER) or a range of the variable (e.g., bl_ILS, ILS, or NILS) is obtained based on the range of the characteristic. In step 2630, a value of the random variation or a value of the variable is obtained. In step 2640, the value of the random variation or the value of the variable is compared with its corresponding range. If the value of the random variation or the value of the variable exceeds its corresponding range, the characteristic is identified as a hot spot in step 2650. The characteristic identified as a hot spot can be further processed, such as optimization for reducing random variation.

[0183] Fig.16 A flow chart of a method for reducing random variations (e.g., LER) of one or more characteristics (e.g., edge locations) of an aerial image or a resist image according to an example is shown. In step 2710, for example, by using Fig.15A or Fig. 15B The method obtains one or more characteristics by identifying one or more characteristics as hot spots from a portion of a design layout. In step 2720, the random variation of one or more characteristics is reduced, for example, by using a cost function that at least represents the random variation, or using a variable that is a function of the random variation or affects the random variation (e.g., bl_ILS, ILS, or NILS). In step 2730, the hot spot is re-identified from a portion of the design layout. In step 2740, it is determined whether the hot spot is identified. If the hot spot is identified, step 2750 is entered; if the hot spot is not identified, the method ends. In step 2750, one or more parameters of the optimization are changed (e.g., δ and / or a user-selected offset), and the method repeats to step 2720 and the optimization is performed using the changed one or more parameters. Alternatively, one or more parameters may be part of the design layout, and steps 2740 and 2750 may be omitted.

[0184] Fig.171 is a block diagram illustrating a computer system 100 that can help implement the optimization methods and processes disclosed herein. The computer system 100 includes a bus 102 or other communication mechanism for communicating information, and a processor 104 (or multiple processors 104 and 105) coupled to the bus 102 for processing information. The computer system 100 also includes a main memory 106, such as a random access memory (RAM) or other dynamic storage device, coupled to the bus 102 to store information and instructions to be executed by the processor 104. The main memory 106 can also be used to store temporary variables or other intermediate information during the execution of instructions to be executed by the processor 104. The computer system 100 also includes a read-only memory (ROM) 108 or other static storage device coupled to the bus 102 to store static information and instructions for the processor 104. A storage device 110, such as a magnetic disk or optical disk, is provided and coupled to the bus 102 to store information and instructions.

[0185] The computer system 100 may be coupled via the bus 102 to a display 112, such as a cathode ray tube (CRT) or a flat panel or touch panel display, for displaying information to a computer user. An input device 114, including alphanumeric and other keys, is coupled to the bus 102 to communicate information and command selections to the processor 104. Another type of user input device is a cursor control 116, such as a mouse, trackball, or cursor direction keys, for communicating directional information and command selections to the processor 104 and for controlling cursor offsets on the display 112. The input device typically has two degrees of freedom in two axes, a first axis (e.g., x) and a second axis (e.g., y), to allow the device to specify a position in a plane. A touch panel (screen) display may also be used as an input device.

[0186] According to one example, a portion of the optimization process may be performed by computer system 100 in response to processor 104 executing one or more sequences of one or more instructions contained in main memory 106. Such instructions may be read into main memory 106 from another computer-readable medium such as storage device 110. Execution of the sequence of instructions contained in main memory 106 causes processor 104 to perform the processing steps described herein. One or more processors of a multi-processing arrangement may also be employed to execute the sequence of instructions contained in main memory 106. In an alternative example, hard-wired circuitry may be used in place of or in combination with software instructions. Therefore, the description herein is not limited to any specific combination of hardware circuitry and software.

[0187] As used herein, the term "computer-readable medium" refers to any medium that participates in providing instructions to the processor 104 for execution. Such media can take many forms, including but not limited to non-volatile media, volatile media, and transmission media. Non-volatile media include, for example, optical or magnetic disks, such as storage device 110. Volatile media include dynamic memory, such as main memory 106. Transmission media include coaxial cables, copper wires, and optical fibers, including wires that make up bus 102. Transmission media can also take the form of sound waves or light waves, such as those generated during radio frequency (RF) and infrared (IR) data communications. Common forms of computer-readable media include, for example: floppy disks, flexible disks, hard disks, magnetic tapes, any other magnetic media, CD-ROMs, DVDs, any other optical media, punch cards, paper tapes, any other physical media with hole patterns, RAM, PROMs and EPROMs, FLASH-EPROMs, any other storage chips or boxes, carrier waves described below, or any other media from which a computer can read.

[0188] Various forms of computer readable media may be involved in carrying one or more sequences of one or more instructions to processor 104 for execution. For example, the instructions may initially be carried on a disk of a remote computer. The remote computer may load the instructions into its dynamic memory and then send the instructions over a telephone line using a modem. A modem local to computer system 100 may receive the data on the telephone line and use an infrared transmitter to convert the data to an infrared signal. An infrared detector coupled to bus 102 may receive the data carried in the infrared signal and place the data on bus 102. Bus 102 carries the data to main memory 106, from which processor 104 retrieves and executes the instructions. The instructions received by main memory 106 may optionally be stored on storage device 110 before or after execution by processor 104.

[0189] The computer system 100 may also include a communication interface 118 coupled to the bus 102. The communication interface 118 provides bidirectional data communications to couple to a network link 120 connected to a local area network 122. For example, the communication interface 118 may be an integrated services digital network (ISDN) card or a modem for providing a data communication connection to a corresponding type of telephone line. As another example, the communication interface 118 may be a local area network (LAN) card for providing a data communication connection to a compatible LAN. Wireless links may also be implemented. In any such implementation, the communication interface 118 sends and receives electrical, electromagnetic, or optical signals carrying digital data streams representing various types of information.

[0190] The network link 120 generally provides data communication through one or more networks to other data devices. For example, the network link 120 can provide a connection through a local network 122 to a host computer 124, or to data equipment operated by an Internet Service Provider (ISP) 126. The ISP 126 in turn provides data communication services through a global packet data communication network, now commonly referred to as the "Internet" 128. Both the local network 122 and the Internet 128 use electrical, electromagnetic or optical signals that carry digital data streams. The signals through the various networks and the signals on the network link 120 and through the communication interface 118, which carry the digital data to and from the computer system 100, are exemplary forms of carrier waves that transport the information.

[0191] The computer system 100 may send messages and receive data, including program code, through the network(s), network link 120, and communication interface 118. In the Internet example, server 130 may send the requested code for an application through Internet 128, ISP 126, local network 122, and communication interface 118. For example, one such downloaded application may provide an example irradiation optimization. The received code may be executed by processor 104 as it is received, and / or stored in storage device 110 or other non-volatile storage for later execution. In this manner, computer system 100 may acquire application code in the form of a carrier wave.

[0192] Fig.18 An exemplary lithographic projection apparatus whose illumination can be optimized using the method described herein is schematically shown. The apparatus comprises:

[0193] - an illumination system IL for conditioning the radiation beam B. In this particular case, the illumination system also comprises a radiation source SO;

[0194] a first stage (e.g., patterning device table) MT provided with a patterning device holder for holding a patterning device MA (e.g., a reticle) and connected to a first positioner for accurately positioning the patterning device relative to the article PS;

[0195] - A second stage (substrate table) WT provided with a substrate holder for holding a substrate W (eg a silicon wafer coated with resist) and connected to a second positioner for accurately positioning the substrate relative to the article PS.

[0196] - A projection system ("lens") PS (eg, a refractive, catadioptric or catadioptric optical system) for imaging an illuminated portion of the patterning device MA onto a target portion C of the substrate W (eg, comprising one or more dies).

[0197] As described herein, the apparatus is transmissive (i.e., has a transmissive patterning device). However, for example, in general, it may also be reflective (have a reflective patterning device). The apparatus may employ a patterning device different from a conventional mask; for example, including a programmable mirror array or an LCD matrix.

[0198] A source SO (e.g., a mercury lamp or an excimer laser, an LPP (laser produced plasma) EUV source) generates a radiation beam. This beam is fed directly or after a conditioning device such as a beam expander Ex into an illumination system (illuminator) IL. The illuminator IL may include an adjustment device AD ​​for setting the outer and / or inner radial extent (usually referred to as outer σ and inner σ, respectively) of the intensity distribution in the beam. In addition, it will typically include various other components, such as an integrator IN and a condenser CO. In this way, the beam B incident on the patterning device MA has a desired uniformity and intensity distribution in its cross section.

[0199] about Fig.18 It should be noted that the source SO can be within the housing of the lithographic projection device (for example, this is usually the case when the source SO is a mercury lamp), but can also be remote from the lithographic projection device, into which the radiation beam it generates is introduced (for example, with the aid of suitable guide mirrors); when the source SO is an excimer laser (for example, based on KrF, ArF or F2 lasers), the latter is usually the case.

[0200] The light beam PB then intercepts the patterning device MA held on the patterning device table MT. After passing through the patterning device MA, the light beam B passes through a lens PL which focuses the light beam B onto a target portion C of the substrate W. With the aid of the second positioning device (and the interferometric measurement device IF), the substrate table WT can be accurately moved, for example so as to position a different target portion C in the path of the light beam PB. Similarly, the first positioning device can be used to accurately position the patterning device MA relative to the path of the light beam B, for example after mechanically retrieving the patterning device MA from a patterning device library or during a scan. Typically, with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning) (in Fig.18 Movement of the stage MT, WT is achieved by means of a stepper (not explicitly shown in the figure). However, in the case of a stepper (as opposed to a step and scan tool), the patterning device table MT may be connected to a short-stroke actuator only, or may be fixed.

[0201] The depicted tool can be used in two different modes:

[0202] - in step mode, the patterning device table MT is kept essentially stationary, and the entire patterning device image is projected at once (i.e. a single "flash") onto a target portion C. The substrate table WT is then shifted in the x and / or y direction so that the beam PB can illuminate a different target portion C;

[0203] - In scan mode, essentially the same situation applies, except that a given target portion C is not exposed in one "flash". Instead, the patterning device table MT may be displaced in a given direction (the so-called "scanning direction", e.g. the y-direction) at a speed v, so that the projection beam B is caused to scan over the patterning device image; at the same time, the substrate table WT is displaced in the same or opposite direction at a speed V=Mv, where M is the magnification of the lens PL (typically M=1 / 4 or 1 / 5). In this way, a relatively large target portion C can be exposed without having to sacrifice resolution.

[0204] Fig.19 Another exemplary lithographic projection apparatus 1000 , the illumination of which may be optimized using the methods described herein, is schematically depicted.

[0205] The lithography projection apparatus 1000 comprises:

[0206] -Source Collector Module SO

[0207] - an illumination system (illuminator) IL configured to condition a radiation beam B (eg EUV radiation).

[0208] a support structure (e.g., patterning device table) MT configured to support a patterning device (e.g., mask or reticle) MA and connected to a first positioner PM configured to accurately position the patterning device;

[0209] a substrate table (e.g., wafer stage) WT configured to hold a substrate (e.g., a resist-coated wafer) W and connected to a second positioner PW configured to accurately position the substrate; and

[0210] - a projection system (eg, a reflective projection system) PS configured to project the pattern imparted to the radiation beam B by the patterning device MA onto a target portion C of the substrate W (eg, comprising one or more dies).

[0211] As depicted here, the apparatus 1000 is reflective (e.g., employing a reflective patterning device). It should be noted that because most materials are absorptive in the EUV wavelength range, the patterning device can have a multilayer reflector comprising, for example, a multi-stack of molybdenum and silicon. In one example, the multi-stack reflector has 40 pairs of molybdenum and silicon layers, each of which is a quarter wavelength thick. X-ray lithography can produce even smaller wavelengths. Since most materials are absorptive at both EUV and X-ray wavelengths, a thin piece of patterned absorbing material (e.g., a TaN absorber on a multilayer reflector) on the topography of the patterning device defines where features are printed (positive resist) or where features are not printed (negative resist).

[0212] refer to Fig.19 , the illuminator IL receives the extreme ultraviolet radiation beam from the source collector module SO. Methods for generating EUV radiation include, but are not limited to, converting a material into a plasma state of at least one element having one or more emission lines in the EUV range (e.g., xenon, lithium, or tin). In one such method, a plasma can be generated by irradiating a fuel (such as a droplet, stream, or cluster of material having a line-emitting element) with a laser beam, commonly referred to as laser produced plasma ("LPP"). The source collector module SO can be part of an EUV radiation system that includes Fig.19 A laser not shown in the figure is used to provide a laser beam for exciting the fuel. The resulting plasma emits output radiation, such as EUV radiation, which is collected using a radiation collector disposed in a source collector module. The laser and source collector module may be separate entities, for example, when a CO2 laser is used to provide the laser beam for fuel excitation.

[0213] In this case, the laser is not considered to form part of the lithographic apparatus, and the radiation beam is delivered from the laser to the source collector module with the aid of a beam delivery system including, for example, suitable guide mirrors and / or a beam expander. In other cases, the source may be an integral part of the source collector module, for example, when the source is a discharge produced plasma EUV generator (commonly referred to as a DPP source).

[0214] The illuminator IL may include an adjuster for adjusting the angular intensity distribution of the radiation beam. Typically, at least the outer and / or inner radial extent of the intensity distribution in a pupil plane of the illuminator (commonly referred to as outer σ and inner σ, respectively) may be adjusted. In addition, the illuminator IL may include various other components, such as a multi-faceted field and pupil mirror devices. The illuminator may be used to adjust the radiation beam to have a desired uniformity and intensity distribution in its cross-section.

[0215] The radiation beam B is incident on a patterning device (e.g., a mask) MA, which is held on a support structure (e.g., a patterning device table) MT, and is patterned by the patterning device. After reflection from the patterning device (e.g., a mask) MA, the radiation beam B passes through a projection system PS, which focuses the beam onto a target portion C of a substrate W. With the aid of a second positioner PW and a position sensor PS2 (e.g., an interferometric device, a linear encoder, or a capacitive sensor), the substrate table WT can be accurately moved, for example, in order to position a different target portion C in the path of the radiation beam B. Similarly, a first positioner PM and a further position sensor PS1 can be used to accurately position the patterning device (e.g., a mask) MA relative to the path of the radiation beam B. The patterning device (e.g., mask) MA and the substrate W can be aligned using patterning device alignment marks M1, M2 and substrate alignment marks P1, P2.

[0216] The depicted apparatus 1000 may be used in at least one of the following modes:

[0217] 1. In step mode, the support structure (e.g., patterning device table) MT and the substrate table WT remain substantially stationary, and an entire pattern imparted to the radiation beam is projected onto a target portion C at one time (i.e., a single static exposure). The substrate table WT is then shifted in the X and / or Y direction so that a different target portion C can be exposed.

[0218] 2. In scan mode, the support structure (e.g. patterning device table) MT and the substrate table WT are scanned synchronously while projecting a pattern imparted to the radiation beam onto a target portion C (i.e. a single dynamic exposure). The speed and direction of the substrate table WT relative to the support structure (e.g. patterning device table) MT may be determined by the (de-)magnification and image reversal characteristics of the projection system PS.

[0219] 3. In another mode, the support structure (e.g., patterning device table) MT remains substantially stationary to hold the programmable patterning device, and the substrate table WT is moved or scanned while a pattern imparted to the radiation beam is projected onto a target portion C. In this mode, typically a pulsed radiation source is employed, and the programmable patterning device is updated as required after each movement of the substrate table WT or between consecutive radiation pulses during scanning. This mode of operation can be readily applied to maskless lithography using a programmable patterning device, such as a programmable mirror array of the type described above.

[0220] Fig. 20The apparatus 1000 including a source collector module SO, an irradiation system IL and a projection system PS is shown in more detail. The source collector module SO is constructed and arranged so that a vacuum environment can be maintained in the closed structure 220 of the source collector module SO. The EUV radiation emitting plasma 210 can be formed by generating a plasma source by discharge. EUV radiation can be generated by a gas or vapor (e.g., xenon, lithium vapor, or tin vapor), wherein a very hot plasma 210 is generated to emit radiation in the EUV range of the electromagnetic spectrum. The very hot plasma 210 is generated, for example, by a discharge that causes a plasma that is at least partially ionized. In order to effectively generate radiation, a partial pressure of, for example, 10Pa of Xe, Li, Sn vapor, or any other suitable gas or vapor may be required. In one example, a plasma that excites tin (Sn) is provided to generate EUV radiation.

[0221] The radiation emitted by the hot plasma 210 enters the collector chamber 212 from the source chamber 211 via an optional gas barrier or contaminant trap 230 (also referred to as a contaminant barrier or foil collector in some cases) located in or below an opening in the source chamber 211. The contaminant trap 230 may include a channel structure. The contaminant trap 230 may also include a gas barrier or a combination of a gas barrier and a channel structure. As is known in the art, the contaminant trap or contaminant barrier 230 further referred to herein includes at least a channel structure.

[0222] The collector chamber 211 may include a radiation collector CO, which may be a so-called grazing incidence collector. The radiation collector CO has an upstream radiation collector side 251 and a downstream radiation collector side 252. Radiation passing through the collector CO may be reflected from the grating spectral filter 240 to be focused in a virtual source point IF along the optical axis indicated by the dash-dot line "O". The virtual source point IF is often referred to as an intermediate focus, and the source collector module is arranged so that the intermediate focus IF is located at or near an opening 221 in the enclosure 220. The virtual source point IF is an image of the radiation emitting plasma 210.

[0223] The radiation then passes through an illumination system IL which may comprise a multifaceted field mirror arrangement 22 and a multifaceted pupil mirror arrangement 24 arranged to provide a desired angular distribution of the radiation beam 21 at the patterning device MA and to provide a desired uniformity of radiation intensity at the patterning device MA. When the radiation beam 21 held by the support structure MT is reflected at the patterning device MA, a patterned beam 26 is formed and the patterned beam 26 is imaged by the projection system PS via reflective elements 28, 30 onto a substrate W held by a substrate table WT.

[0224] There may typically be more elements than shown in the illumination optics unit IL and the projection system PS. Depending on the type of lithographic apparatus, a grating spectral filter 240 may optionally be present. Furthermore, there may be more mirrors than shown in the figures, for example with Fig. 20 Compared to the shown, there may be 1 to 6 more reflective elements in the projection system PS.

[0225] like Fig. 20 As shown, the collector optics CO is depicted as a nested collector with grazing incidence reflectors 253, 254 and 255, just as an example of a collector (or collector mirror). The grazing incidence reflectors 253, 254 and 255 are arranged axially symmetrically around the optical axis O, and this type of collector optics CO can be used in conjunction with a discharge produced plasma source, generally referred to as a DPP source.

[0226] Alternatively, the source collector module SO may be as follows Fig.21 Part of the LPP radiation system shown. The laser LA is arranged to deposit laser energy into a fuel such as xenon (Xe), tin (Sn) or lithium (Li) to produce a highly ionized plasma 210 with an electron temperature of tens of eV. The high-energy radiation generated during the de-excitation and recombination of these ions is emitted from the plasma, collected by the collector optics CO at near normal incidence and focused onto an opening 221 in the closed structure 220.

[0227] The entire contents of U.S. Patent Application Publication No. US 2013-0179847 are incorporated herein by reference.

[0228] The concepts disclosed herein can simulate or mathematically model any general imaging system for imaging sub-wavelength features, and are particularly useful for emerging imaging technologies that can produce shorter and shorter wavelengths. Emerging technologies that have been used include EUV (extreme ultraviolet), DUV lithography (capable of producing wavelengths of 193nm when using ArF lasers, and even 157nm when using fluorine lasers). Moreover, EUV lithography can produce wavelengths in the 20-5nm range by using a synchrotron or by bombarding materials (solid or plasma) with high-energy electrons to produce photons in this range.

[0229] Although the concepts disclosed herein may be used for imaging on substrates such as silicon wafers, it should be understood that the disclosed concepts may be used with any type of lithography imaging system, for example, a system for imaging on substrates other than silicon wafers.

[0230] The above techniques have been described for a specific application for improving a particular lithography process of imaging a portion of a design layout onto a substrate using a lithography apparatus.

[0231] Embodiments generally provide techniques for using image-related metrics to improve any manufacturing, testing, measurement, and other processes of semiconductor structures on substrates. In particular, new image-related metrics are generated. Throughout this document, the new image-related metrics are referred to as overlay margins. Overlay margins provide an indication of tolerance to overlay errors in features being manufactured.

[0232] Embodiments also provide techniques for improving determination of control parameters in any process performed during manufacturing, testing, measurement, and other processes that may be performed on semiconductor structures on a substrate based on overlay margin.

[0233] Overlay margins can be determined from multiple images of different layers and different portions of the substrate. Each image can be acquired by an imaging device such as an electron beam based metrology device or any type of scanning electron microscope. An electron beam device (e.g., manufactured by HMI) can have a field of view of 10 μm x 10 μm.

[0234] The processes that can be improved by the techniques of the embodiments include any of the following: photolithography, scanning, primer, resist coating, soft baking, post-exposure baking, development, hard baking, measurement / inspection, etching, ion implantation, metallization, oxidation, and chemical mechanical polishing. Overlay margin can be used to determine control parameters for any of these processes and any combination of these processes.

[0235] Embodiments may include performing a computational measurement and control process. The computational process includes acquiring one or more images of a portion of a substrate on each of a plurality of layers of the substrate. Each acquired image includes features contained by a structure fabricated on the substrate. An overlay margin is calculated based on characteristics of the features, such as a profile of the features. Control parameters for processes and other processes in controlling the fabrication of the features may then be determined based on the overlay margin.

[0236] Fig.24 An image of a feature on a portion of a substrate is shown. The image may represent, for example, a 10 μm x 10 μm area on the substrate. The thick line in the image is the target outline of one of the features. The thin lines in the image are the actual outline of the manufactured feature. Although the ideal shape of the feature may be a rectangle, the target outline is curved / rounded because this is the closest possible shape to a rectangle that can be manufactured and is therefore the best outline that can be achieved in practice. The ideal shape may alternatively be used as the target shape.

[0237] Fig.25A plurality of stacked images are shown. The images that may be stacked may each be acquired from one or more of: corresponding images of the same feature in different layers of a substrate and / or images of multiple features on the same layer of a substrate. Alternatively or additionally, the images may be images of features on multiple different substrates and / or images of the same feature on the same layer of a substrate but taken by different imaging devices.

[0238] When stacking images, an alignment process has been performed. The alignment process can be based on aligning the images according to one or more reference positions in each image or superimposed on each image, so that there is no overlay error between the images. For example, the alignment process can include aligning the target design of features in the images so that there is no overlay error between the target designs. The alignment process can be based on image alignment that relies on GDS data. The effect of performing the alignment process is to eliminate the effects of any overlay error between different images.

[0239] Overlay margin is a measure of the random variation of a feature in a stack of aligned images. Overlay margin can be calculated based on the difference between the profiles of corresponding features in the aligned versions of the images. Overlay margin can also be calculated based on a target profile for the feature. For example, for each image, overlay margin can be calculated based on a comparison of the feature in the image with a target for the feature. The difference between the profile of a feature in an image and the profiles of features in other images and the target profile of the feature can be determined by a number of well-known specific image-related metrics such as: critical dimension uniformity (CDU), line width roughness (LWR), critical dimension amplitude, and placement error.

[0240] The overlay margin is related to the image metric known as edge placement error (EPE). EPE is an image metric that can provide an overall representation of the difference between the outline of one or more images of a feature and the target outline of the feature. EPE includes the overlay error between the image of the feature and the target outline of the feature.

[0241] The overlay margin differs from the EPE in that it does not include overlay errors between images of the features since the overlay errors have been eliminated by the alignment process described above.

[0242] One method of determining the overlay margin is shown in Equation 8.

[0243] Overlay margin = EPE - overlay error (Equation 8)

[0244] Therefore, the overlay margin can be calculated by calculating the EPE and the overlay error. The overlay error can be calculated based on the alignment performed on the image. The overlay margin can then be calculated by subtracting the overlay error from the calculation of the EPE.

[0245] It should be noted that the overlay error in Equation 8 can be calculated as a combination of the actual overlay amount and the design specification. This is because a failure condition can occur when it is desired to have overlap between features in different layers of a structure, but even if overlap occurs, the required overlay area cannot be achieved. Similarly, a failure condition can occur when it is desired to separate features in different layers of a structure, but even if the features are separated, the required amount of separation cannot be achieved. The design specification includes the required feature overlay area and / or the required amount of feature separation. Therefore, it is appropriate to calculate the overlay error based on a combination of the actual overlay amount and the design specification.

[0246] Alternatively, the overlay margin may be determined based on a combination of contributions to the overlay margin in the alignment images.

[0247]

[0248] In equation 9:

[0249] HR OPC Depends on the error caused by the optical proximity correction;

[0250] σ PBA Depends on the error caused by the proximity deviation average;

[0251] σ LWR Depends on the error caused by line width roughness; and

[0252] σ CDU Depends on the error caused by critical dimension uniformity.

[0253] In Equation 9, the contributions to the determined overlay margin are OPC, PBA, LWR, and CDU. Embodiments include alternative constructions of the equation for determining the overlay margin that include one or more other contributions to the overlay margin and / or do not include one or more contributions to the overlay margin included in Equation 9. In addition to the overlay error, the overlay margin is calculated based on all contributions to the EPE calculation.

[0254] Each image typically represents only a small portion of the substrate. For example, each image may represent a 10 μm x 10 μm area on the substrate. The overlay margin may be calculated from multiple images of different layers of the same portion of the substrate. This is the local overlay margin for that portion of the substrate.

[0255] Multiple local overlay margins may be calculated for each of multiple different portions of a substrate, and each local overlay margin may be calculated from multiple images of different layers of the same portion of the substrate. Local overlay margins may be obtained at all locations on the substrate, or at only some locations on the substrate. When local overlay margins are obtained at only some locations on the substrate, these locations may be selected so as to provide a feature identification of the substrate.

[0256] Each image may additionally or alternatively be considered to comprise a plurality of parts.A local overlay margin may be calculated for each part of an image, such that there are a plurality of local overlay margins for each image.

[0257] The overlay margin of the substrate may include a plurality of local overlay margins, wherein each local overlay margin is calculated based on an image of a different portion of the substrate and / or portions of an image.

[0258] The overlap margin may be defined as the minimum overlay margin of features within an image and / or a portion of an image.

[0259] The overlay margin may be represented as an overlay margin map, which shows the local variation of the overlay margin across the substrate.

[0260] The overlay margin may alternatively be represented as an overlay margin map showing the local variation of the overlay margin across the substrate.

[0261] A global overlay margin may be calculated as an average of local overlay margins and / or overlap overlay margins of the substrate.

[0262] An overlay margin and a representation of the overlay margin may be calculated for each of a plurality of values ​​of each parameter that may contribute to the overlay margin. A dependency of the overlay margin on each parameter may be calculated or inferred from the overlay margin calculated for the value of that parameter. The dependency of the overlay margin on a plurality of parameters may also be determined.

[0263] For example, an overlay margin map can be generated that shows the variation of overlay margin across the surface of a substrate between two or more layers of the substrate. The overlay margin map can be determined based on a critical dimension (CD). Thus, a multi-dimensional metric is generated that can be used for joint optimization of overlay and CD.

[0264] Parameters that may contribute to overlay margin may include focus, dose, illumination pupil shape (e.g., ellipticity), aberrations (e.g., coma, sphericity, astigmatism), etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow, and RF power distribution. The dependence of overlay margin on one or more of these parameters may be determined.

[0265] The productivity of semiconductor manufacturing process depends on the occurrence of manufacturing error.When the required overlay region does not appear between the features in the different layers of the structure, manufacturing error will occur.When the required minimum separation of the features in the different layers of the structure is not realized, manufacturing error will also occur.EPE is a measure of the positional variation of features and feature profiles, and can be used to determine the expected yield of the structure of correct manufacturing and / or the probability of the structure of wrong manufacturing.Due to the relationship between overlay margin and EPE, as shown in equation 8, overlay margin can be used to determine the allowed overlay error amount of the expected yield of the structure of correct manufacturing and / or the probability of the structure of wrong manufacturing.

[0266] The overlay error depends on the number of controllable parameters. Therefore, the values ​​and possible ranges of values ​​of the parameters that affect the overlay error can be determined based on the overlay margin so that the overlay error is within the range expected to achieve the expected yield. The expected yield can be the expected yield according to the manufacturing specification.

[0267] Embodiments include determining parameters for controlling a manufacturing, inspection, and / or testing process of a structure on a substrate based on the overlay margin. Parameters that can be controlled based on the overlay margin include: focus, dose, illumination pupil shape (e.g., ellipticity), aberrations (e.g., coma, sphericity, astigmatism), etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow, and RF power distribution. The process controlled by the parameters can be a photolithography process, a primer coating process, a resist coating process, a soft bake process, a post-exposure bake process, a development process, a hard bake process, a measurement / inspection process, an etching process, an ion implantation process, a metallization process, an oxidation process, and a chemical mechanical polishing process.

[0268] The permissible level of EPE depends on manufacturing specifications. The manufacturing specifications may depend on one or more of: the desired yield, the maximum probability of erroneously manufactured features, the determined maximum permissible magnitude of EPE, the determined maximum permissible overlay error; and the desired yield of semiconductor devices.

[0269] As mentioned above, the EPE depends on the overlay margin and the overlay error. Therefore, the overlay margin allows to determine the limit on the overlay error so that the EPE is at a certain level. The dependency of the overlay error on each parameter can be determined. Therefore, the value and value range of each parameter can be determined based on the overlay margin.

[0270] Each parameter may be determined based on one or more of an overlay margin map, one or more local overlay margins, and a global overlay margin.

[0271] Parameters influencing the overlay error may also be jointly determined such that the applied value of one of the control parameters depends on the applied value of the other control parameter. The joint determination of at least two control parameters may depend on the combined effect of the at least two control parameters and / or the mutual dependence of the at least two control parameters. By jointly determining the control parameters, the combined effect of the control parameters and / or the mutual dependence of the effects of the control parameters may be used to advantageously improve the determination of the control parameters to increase yield or to optimize with respect to any other objective.

[0272] Limits on the rate of change and range of control parameters during the process can be determined. For example, during the manufacture of the device, the extent to which the focus changes between two different positions on the substrate will be limited due to the rate of focus change and the speed of offset. An embodiment includes using the constraints on the determined control parameters to perform an optimization process on the control parameters given a permitted overlay error. For example, given a limit on the value of the parameter that can be applied, the parameter can be set at a level that causes an increased contribution to the overlay error. By controlling another parameter to reduce its effect on the overlay error, the total overlay error can be kept within an acceptable range, thereby making the above situation possible.

[0273] The overlay error may depend on at least one of the commonly determined control parameters, and a size of a feature fabricated on the semiconductor device may depend on at least another of the commonly determined control parameters.

[0274] Commonly determined control parameters may include: focus, dose, illumination pupil shape, aberrations, etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow, and RF power distribution.

[0275] As described above, the relationship between the overlay margin and the applied parameters can be determined. The applied values ​​and applicable ranges of the parameters can be determined based on how the parameters affect the overlay margin.

[0276] The applicable value and the applicable range of the parameter can be determined according to the influence of the parameter on the overlay margin and the overlay error.

[0277] The application values ​​and applicable ranges of the multiple parameters may be jointly determined according to the influence of the multiple parameters on the overlay margin and the overlay error.

[0278] For example, one or more parameters may be determined to minimize the overlay margin and thereby reduce the constraints on the overlay error. This may allow other parameters to be set to values ​​that increase their contribution to the overlay error. In particular, an overlap overlay margin map may be determined based on the critical dimension (CD). This may then be used for overlay and CD co-optimization.

[0279] Fig.26is a flow chart of a process for determining image metrics of features on a substrate according to one embodiment.

[0280] In step 2601, the process begins.

[0281] In step 2603, a first image of a plurality of features on a substrate is acquired.

[0282] In step 2605, one or more additional images of a plurality of corresponding features on the substrate are acquired, wherein at least one of the one or more additional images belongs to a different layer of the substrate than the first image.

[0283] In step 2607, aligned versions of the first image and one or more additional images are generated by performing an alignment process on the first image and one or more additional images, wherein the alignment process substantially eliminates the effects of any overlay errors between features in the first image and corresponding features in each of the one or more additional images.

[0284] In step 2609, image metrics are calculated based on comparison of features in the aligned version of the first image with corresponding features in the aligned versions of one or more further images.

[0285] In step 2611, the process ends.

[0286] Embodiments include many modifications and variations of known procedures.

[0287] Any of the techniques described throughout this document may be used to determine and optimize image-related metrics of an embodiment.

[0288] Embodiments determine control parameters for controlling a process in the manufacture of a semiconductor device. The process includes any process, including a measurement process, and can be performed by any known device. The process according to the embodiment can be controlled by a computing system executing instructions for performing the process stored on a non-transitory computer readable medium.

[0289] Other embodiments of the invention are disclosed in the following numbered list of clauses:

[0290] 1. A method for determining an image indicator of a feature on a substrate, the method comprising:

[0291] acquiring a first image of a plurality of features on a substrate;

[0292] acquiring one or more additional images of a plurality of corresponding features on the substrate, wherein at least one additional image of the one or more additional images is of a different layer of the substrate than the first image;

[0293] generating aligned versions of the first image and the one or more further images by performing an alignment process on the first image and the one or more further images, wherein the alignment process substantially eliminates the effects of any overlay error between the feature in the first image and the corresponding feature in each of the one or more further images; and

[0294] An image metric is calculated based on a comparison of the feature in the aligned version of the first image with the corresponding feature in the aligned versions of the one or more further images.

[0295] 2. The method of clause 1, wherein each of the plurality of features is created according to a target structure for the feature; and

[0296] The alignment process of the images includes substantially aligning the images according to the target structure of the features.

[0297] 3. A method according to clause 1 or 2, wherein the alignment process of the images includes substantially aligning the images based on one or more reference positions in each of the images or superimposed on each of the images.

[0298] 4. A method according to any of the preceding clauses, wherein each image belongs to a different layer of the substrate than the other images.

[0299] 5. A method according to any of the preceding clauses, wherein there are a plurality of further images and at least one of the further images belongs to the same layer of the substrate as the first image.

[0300] 6. A method according to any of the preceding clauses, wherein each image is an image of only a portion of the substrate.

[0301] 7. The method according to clause 6, further comprising:

[0302] For each of a plurality of layers of the substrate, acquiring a plurality of images of a plurality of different portions of the layer of the substrate; and

[0303] The image metric is calculated based on an image of each of the plurality of different portions of the substrate in the plurality of layers of the substrate.

[0304] 8. A method according to clause 6 or 7, the method comprising: calculating a local image indicator from a plurality of images of the same portion of the substrate; and

[0305] The image index includes the local image index.

[0306] 9. The method according to clause 8, comprising: calculating a plurality of local image indicators; and

[0307] wherein each of the local image indicators is calculated based on an image of a portion of the substrate that is different from the other local image indicators; and

[0308] The image index includes the plurality of local image indexes.

[0309] 10. The method according to clause 9, comprising calculating a global image indicator based on the plurality of local image indicators;

[0310] The image index includes the global image index.

[0311] 11. A method according to any of the preceding clauses, wherein each image of a portion of the substrate has an area of ​​10 μm x 10 μm on the substrate.

[0312] 12. A method according to any of the preceding clauses, wherein the image indicator is determined based on the contour of the feature in the aligned version of the first image and the contour of the corresponding feature in the aligned version of the one or more further images; and / or

[0313] For one or more of the images, the image metric is determined based on a comparison between the feature in the image and a target for the feature.

[0314] 13. A method according to any of the preceding clauses, wherein the image metrics are determined based on one or more of critical dimension uniformity, line width roughness, critical dimension amplitude and placement error of the features in the aligned version of the first image and the corresponding features in the aligned versions of the one or more additional images.

[0315] 14. A method according to any of the preceding clauses, further comprising:

[0316] calculating the image metric for each of a plurality of values ​​of one or more parameters; and

[0317] A dependency of the image metric on the one or more parameters is determined based on the calculated image metric.

[0318] 15. The method of clause 14, wherein the one or more parameters include: focus, dose, illumination pupil shape, aberrations, etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow, and RF power distribution.

[0319] 16. A method according to any of the preceding clauses, wherein the image-related indicator is an overlay margin, an overlap margin, an overlay margin map or an overlap margin map.

[0320] 17. A method during the manufacture, inspection and / or testing of a device on a substrate, the method comprising:

[0321] Obtaining image metrics according to any of the preceding clauses; and

[0322] One or more control parameters of a manufacturing, inspection and / or testing process of a device on a substrate are determined based on the image indicators.

[0323] 18. A method according to clause 17 when dependent on clause 14, wherein the one or more control parameters are determined based on a dependency of the image metric on the one or more control parameters.

[0324] 19. A method according to clause 17 or 18, further comprising controlling a device in accordance with the determined one or more control parameters.

[0325] 20. A method according to clause 17, 18 or 19, wherein the one or more control parameters are used for one or more of the following: a photolithography process, a primer coating process, a resist coating process, a soft bake process, a post-exposure bake process, a development process, a hard bake process, a measurement / inspection process, an etching process, an ion implantation process, a metallization process, an oxidation process and a chemical mechanical polishing process.

[0326] 21. A method according to any of clauses 17 to 20, wherein the one or more control parameters include: focus, dose, illumination pupil shape, aberrations, etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow and RF power distribution.

[0327] 22. A method according to any one of clauses 17 to 21, comprising: further determining the one or more control parameters according to manufacturing specifications;

[0328] Wherein said manufacturing specifications depend on one or more of the following:

[0329] The maximum probability of incorrectly manufacturing the features described;

[0330] The determined maximum permissible magnitude of edge placement error;

[0331] the determined maximum allowable overlay error; and

[0332] The desired yield of semiconductor devices.

[0333] 23. The method according to any of clauses 17 to 22, wherein a plurality of control parameters are determined jointly.

[0334] 24. A method according to clause 23, wherein the joint determination of at least two of the control parameters comprises determining an applied value for one control parameter as a function of an applied value for another control parameter.

[0335] 25. A method according to clause 23 or 24, wherein the joint determination of at least two of the control parameters depends on:

[0336] The combined effect of the at least two control parameters; and / or

[0337] Interdependence of the at least two control parameters.

[0338] 26. A method according to any one of clauses 23 to 25, wherein:

[0339] The overlay error depends on at least one of the commonly determined control parameters; and

[0340] A size of the feature fabricated on the semiconductor device is dependent on at least another of the commonly determined control parameters.

[0341] 27. A method according to any of clauses 22 to 26, wherein the commonly determined control parameters are focus, dose, illumination pupil shape, aberrations, etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow and RF power distribution.

[0342] 28. A system configured to perform a method according to any of the preceding clauses.

[0343] 29. The system of clause 27, wherein the system comprises a computing system and an electron beam device, wherein:

[0344] The electron beam device is arranged to acquire an image of a substrate; and

[0345] The computing system is arranged to receive the acquired image of the substrate and to perform the method according to clauses 1 to 27.

[0346] 30. A system according to clause 28 or 29, wherein the system comprises a lithographic apparatus and / or a metrology apparatus.

[0347] 31. A non-transitory computer readable medium comprising instructions which, when executed, cause the method according to any one of clauses 1 to 27 to control a manufacturing process of a device on a substrate.

[0348] A system according to an embodiment may comprise a computing system and an electron beam apparatus, wherein the electron beam apparatus is arranged to acquire an image of one or more substrates.The system may comprise a lithographic apparatus and / or a metrology apparatus.

[0349] By considering the description and practice of the embodiments disclosed herein, other embodiments of the present invention will be clear to those skilled in the art. The description and embodiments are considered to be exemplary only, and the true scope and spirit of the present invention are indicated by the appended claims. In addition, where the steps of a method or process are listed in a particular order in the present application, the order of performing certain steps can even be conveniently changed in some cases, and it is intended that the specific steps of the method or process claims set forth below should not be interpreted as being sequence-specific, unless such sequence specificity is explicitly stated in the claims.

Claims

1. A method for determining an image indicator of a feature on a substrate, the method comprising: acquiring a first image of a plurality of features on a substrate; acquiring one or more additional images of a plurality of corresponding features on the substrate, wherein at least one additional image of the one or more additional images is of a different layer of the substrate than the first image; generating aligned versions of the first image and the one or more additional images by performing an alignment process on the first image and the one or more additional images, wherein the alignment process substantially eliminates the effects of any overlay error between the feature in the first image and the corresponding feature in each of the one or more additional images; as well as An image metric is calculated based on a comparison of the feature in the aligned version of the first image with the corresponding feature in the aligned versions of the one or more further images.

2. The method of claim 1 , wherein each of the plurality of features is created according to a target structure of the feature; and The alignment process of the images comprises: The images are substantially aligned according to the target structure of the features.

3. The method of claim 1, wherein the alignment process of the images comprises: The images are substantially aligned based on one or more reference locations in, or superimposed on, each of the images. The method of claim 1 , wherein each image belongs to a different layer of the substrate than the other images.

5. The method of claim 1 , wherein each image is an image of only a portion of the substrate, the method further comprising: for each of a plurality of layers of a substrate, acquiring a plurality of images of a plurality of different portions of the layer of the substrate; as well as The image metric is calculated based on an image of each of the plurality of different portions of the substrate in the plurality of layers of the substrate.

6. The method according to claim 5, further comprising: A local image index is calculated from a plurality of images of a same portion of the substrate, wherein the image index comprises the local image index.

7. The method according to claim 6, further comprising: Calculate multiple local image metrics, wherein each of the local image indicators is calculated based on an image of a portion of the substrate that is different from the other local image indicators; and The image index includes the plurality of local image indexes.

8. The method according to claim 7, further comprising: Calculating a global image index based on the multiple local image indexes, The image index includes the global image index. 9 . The method of claim 1 , wherein each image of a portion of the substrate covers an area on the substrate having a size of 10 μm×10 μm.

10. The method of claim 1, wherein the image indicator is determined based on the outline of the feature in the aligned version of the first image and the outline of the corresponding feature in the aligned versions of the one or more further images; and / or For one or more of the images, the image metric is determined based on a comparison between the feature in the image and a target for the feature.

11. The method of claim 1 , wherein the image metrics are determined based on one or more of critical dimension uniformity, line width roughness, critical dimension magnitude, and placement error of the features in the aligned version of the first image and the corresponding features in the aligned versions of the one or more additional images.

12. The method according to claim 1, further comprising: For each of a plurality of values ​​of one or more parameters, calculating the image metric; as well as A dependency of the image metric on the one or more parameters is determined based on the calculated image metric.

13. The method of claim 12, wherein the one or more parameters include: Focus, dose, illumination pupil shape, aberrations, etch rate, overlay, contrast, critical dimension, chuck temperature, gas flow, and RF power distribution.

14. The method according to claim 1, wherein the image-related indicator is: an overlay margin, an overlap overlay margin, an overlay margin map or an overlap overlay margin map.

15. A method during the manufacture, inspection and / or testing of a device on a substrate, the method comprising: Acquire image indicators according to the method of claim 1; as well as One or more control parameters of a manufacturing, inspection and / or testing process of a device on a substrate are determined based on the image indicators.

16. A system comprising a computing system and an electron beam device, wherein: The electron beam device is arranged to acquire an image of a substrate; as well as The computing system is arranged to receive the acquired image of the substrate and to perform the method according to claim 1 .

17. A computer program product comprising computer readable instructions for determining an image metric of a feature on a substrate, the instructions being configured to: acquiring a first image of a plurality of features on a substrate; acquiring one or more additional images of a plurality of corresponding features on the substrate, wherein at least one additional image of the one or more additional images is of a different layer of the substrate than the first image; generating aligned versions of the first image and the one or more further images by performing an alignment process on the first image and the one or more further images, wherein the alignment process substantially eliminates the effects of any overlay error between the feature in the first image and the corresponding feature in each of the one or more further images; and An image metric is calculated based on a comparison of the feature in the aligned version of the first image with the corresponding feature in the aligned versions of the one or more further images.

18. The computer program product of claim 17, wherein each of the plurality of features is created according to a target structure for the feature, and the instructions for generating the aligned version are configured to align the images according to the target structure for the features.

19. The computer program product of claim 17, wherein the instructions configured to perform the alignment process of the images comprise: Instructions for substantially aligning the images based on one or more reference locations in or superimposed on each of the images.

20. The computer program product of claim 17, wherein the image-related metric is: an overlay margin, an overlap margin, an overlay margin map, or an overlap margin map.

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