Switch control circuit, power supply circuit

Abstract

This invention provides a switching control circuit that protects a power supply circuit from overcurrent and ensures its proper operation. The switching control circuit controls the switching of a transistor to generate a target output voltage on the secondary side of the power supply circuit. The power supply circuit includes: a transformer comprising a primary coil on the primary side and a secondary coil on the secondary side; a transistor controlling the current of the primary coil; and the switching control circuit further includes: an overload detection circuit that detects an overload state when the voltage corresponding to the output voltage reaches a predetermined level; an overcurrent detection circuit that detects an overcurrent when the current corresponding to the load current is a predetermined value; an adjustment circuit that reduces the predetermined value after a first period has elapsed since the load was in an overload state; a drive circuit that drives the transistor to reach the target output voltage level; and a control circuit that stops the drive circuit from driving the transistor after the load is in an overload state or the load current is overcurrent.

Description

Technical Field

[0001] This invention relates to a switch control circuit and a power supply circuit. Background Technology

[0002] Power supply circuits typically include an overcurrent detection circuit. When the current corresponding to the load current exceeds a specified current value, the load current is detected as an overcurrent. Furthermore, when the load current becomes an overcurrent, the power supply circuit may sometimes be stopped to protect it (e.g., Patent Documents 1 and 2).

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 9-246931

[0006] Patent Document 2: Japanese Patent Application Publication No. 2005-287248 Summary of the Invention

[0007] The technical problem that the invention aims to solve

[0008] However, when the power supply circuit is under overload, the output voltage drops and the load current increases. Therefore, when the output voltage drops and an overload condition is detected, for example, the control circuit used to control the power supply circuit may sometimes reduce the specified current value used to detect overcurrent, so that the overcurrent detection circuit can detect overcurrent more reliably.

[0009] However, when power is supplied to the power circuit described above and the circuit is started, the output voltage is low during startup, so the specified current value for detecting overcurrent is also small. As a result, the startup of the power circuit sometimes stops.

[0010] The present invention was made in view of the above-mentioned problems, and its object is to provide a switch control circuit that can operate properly while protecting the power supply circuit from overcurrent.

[0011] Technical solutions adopted to solve technical problems

[0012] A first embodiment of the present invention that solves the above-mentioned technical problems is a switch control circuit that controls the switching of a transistor so that a power supply circuit generates an output voltage of a target level on the secondary side. The power supply circuit includes: a transformer comprising a primary coil disposed on the primary side and a secondary coil disposed on the secondary side; and the transistor controlling the current of the primary coil. The switch control circuit includes: an overload detection circuit that detects that the load state of the power supply circuit is overloaded when the voltage corresponding to the output voltage reaches a predetermined level; an overcurrent detection circuit that detects that the load current is overcurrent when the current corresponding to the load current flowing through the load is a predetermined value; an adjustment circuit that reduces the predetermined value after a first period has elapsed since the load state became overloaded; a drive circuit that drives the transistor so that the output voltage level reaches the target level; and a control circuit that stops the drive circuit from driving the transistor after the load state becomes overloaded or the load current becomes overcurrent.

[0013] A second aspect of the present invention is a power supply circuit, comprising: a transformer including a primary coil disposed on a primary side and a secondary coil disposed on a secondary side; a transistor controlling the current of the primary coil; and a switch control circuit controlling the switching of the transistor. The power supply circuit generates a target level output voltage on the secondary side. The switch control circuit includes: an overload detection circuit that detects an overload state of the power supply circuit when the voltage corresponding to the output voltage reaches a predetermined level; an overcurrent detection circuit that detects an overcurrent when the current corresponding to the load current flowing through the load reaches a predetermined value; an adjustment circuit that reduces the predetermined value after a first period has elapsed since the load state became the overload state; a drive circuit that drives the transistor such that the output voltage level reaches the target level; and a control circuit that stops the drive circuit from driving the transistor after the load state becomes the overload state or the load current becomes the overcurrent.

[0014] Invention Effects

[0015] According to the present invention, a switch control circuit can be provided that can operate appropriately while protecting the power supply circuit from overcurrent. Attached Figure Description

[0016] Figure 1 This is a diagram showing an example of a switching power supply circuit 10.

[0017] Figure 2 This is a diagram showing an example of the control IC40.

[0018] Figure 3 This is a diagram used to illustrate the path of the current Is.

[0019] Figure 4 This is a diagram showing an example of an overcurrent protection circuit 63.

[0020] Figure 5 This is a diagram illustrating an example of the operation of the switching power supply circuit 10 under overload conditions.

[0021] Figure 6 This is a diagram used to illustrate the startup of the switching power supply circuit 10.

[0022] Figure 7 This is a diagram illustrating an example of the operation of the switching power supply circuit 10 during startup. Detailed Implementation

[0023] Based on the description in this specification and the accompanying drawings, at least the following are clear.

[0024] ======This implementation method======

[0025] <<<Overview of Switching Power Supply Circuit 10>>>

[0026] Figure 1 This diagram illustrates the configuration of a switching power supply circuit 10 according to one embodiment of the present invention. The switching power supply circuit 10 is an LLC current resonant converter that applies a target level output voltage Vout to the load 11 using a predetermined input voltage Vin.

[0027] The switching power supply circuit 10 includes capacitors 20, 21, and 32, NMOS transistors 22 and 23, a transformer 24, a control block 25, diodes 30 and 31, a constant voltage circuit 33, and a light-emitting diode 34.

[0028] Capacitor 20 stabilizes the voltage between the power supply line to which the input voltage Vin is applied and the ground line on the ground side, and removes noise, etc. The input voltage Vin is a DC voltage of a specified level. Capacitor 21 is a so-called resonant capacitor that forms a resonant circuit with the leakage inductance between the primary coil L1 and the secondary coils L2 and L3.

[0029] NMOS transistor 22 is a high-side power transistor, and NMOS transistor 23 is a low-side power transistor. In this embodiment, NMOS transistors 22 and 23 are used as switching elements, but they could also be PMOS transistors or bipolar transistors, for example.

[0030] Transformer 24 includes a primary coil L1, secondary coils L2 and L3, and an auxiliary coil L4, all insulated from each other. In transformer 24, a voltage is generated in the secondary coils L2 and L3 on the secondary side based on the voltage change across the primary coil L1 on the primary side. Similarly, a voltage is generated in the auxiliary coil L4 on the primary side based on the voltage change across the primary coil L1 and the voltage changes in the secondary coils L2 and L3.

[0031] One end of the primary coil L1 is connected to the source of NMOS transistor 22 and the drain of NMOS transistor 23, and the other end is connected to the source of NMOS transistor 23 through capacitor 21.

[0032] Therefore, when NMOS transistors 22 and 23 begin switching, the voltages of the secondary coils L2 and L3 and the auxiliary coil L4 change respectively. The primary coil L1 and the secondary coils L2 and L3 are electromagnetically coupled with the same polarity, and the secondary coils L2 and L3 and the auxiliary coil L4 are also electromagnetically coupled with the same polarity.

[0033] Control block 25 is a circuit block used to control the switching of NMOS transistors 22 and 23, which will be described in detail later.

[0034] Diodes 30 and 31 rectify the voltage of the secondary coils L2 and L3, and capacitor 32 filters the rectified voltage. As a result, a filtered output voltage Vout is generated in capacitor 32. The output voltage Vout is the target DC voltage level.

[0035] The constant voltage circuit 33 is a circuit for generating a constant DC voltage, and is configured, for example, by using a shunt regulator.

[0036] The light-emitting diode 34 is a device that emits light with an intensity corresponding to the difference between the output voltage Vout and the output of the constant voltage circuit 33, and together with the phototransistor 55 described later, forms an optocoupler. In this embodiment, when the level of the output voltage Vout increases, the intensity of the light from the light-emitting diode 34 increases.

[0037] <<<Control Block 25>>>

[0038] The control block 25 includes a control IC 40, capacitors 50-52, a resistor 53, a diode 54, and a phototransistor 55.

[0039] Control IC40 is an integrated circuit used to control the switching of NMOS transistors 22 and 23, and has terminals VCC, GND, FB, IS, HO, and LO. Furthermore, control IC40 is equivalent to a "switch control circuit".

[0040] Terminal VCC is the terminal to which the power supply voltage Vcc is applied to activate control IC 40. A capacitor 50 with one end grounded and the cathode of diode 54 are connected to terminal VCC. Therefore, capacitor 50 is charged by the current from diode 54, and the charging voltage of capacitor 50 becomes the power supply voltage Vcc used to activate control IC 40. Additionally, control IC 40 is activated by applying a voltage divider of input voltage Vin via a terminal not shown, and operates based on the power supply voltage Vcc when it is higher than a specified level.

[0041] The GND terminal is a terminal to which a ground voltage is applied, and is connected, for example, to the housing of a device equipped with the switching power supply circuit 10.

[0042] Terminal FB is the terminal that generates a feedback voltage Vfb corresponding to the output voltage Vout, and is connected to capacitor 52 and phototransistor 55. Capacitor 52 is provided to remove noise between terminal FB and ground, and phototransistor 55 causes a bias current Ib of magnitude corresponding to the intensity of light from light-emitting diode 34 to flow from terminal FB to ground. Therefore, phototransistor 55 operates as a transistor that generates sink current.

[0043] Terminal IS is used to detect the resonant current (hereinafter referred to as current Is) of the primary coil L1. At terminal IS, which is connected to the connection node of capacitor 51 and resistor 53, a voltage Vr corresponding to the current value of current Is is generated.

[0044] Here, the current value Is varies depending on the input power of the switching power supply circuit 10. The input power of the switching power supply circuit 10 varies depending on the power consumed by the load 11, i.e., the current flowing through the load 11 when the output voltage Vout is at the target level (hereinafter referred to as the "load current"). Therefore, the current Is and the voltage Vr vary according to the "load current".

[0045] Terminal HO is the terminal for outputting the signal Vo1 that drives NMOS transistor 22, and is connected to the gate of NMOS transistor 22.

[0046] Terminal LO is the terminal for outputting the signal Vo2 that drives NMOS transistor 23, and is connected to the gate of NMOS transistor 23.

[0047] <<<Detailed information about control IC40>>>

[0048] Figure 2This diagram illustrates an example of the structure of control IC 40. Control IC 40 includes resistor 60, overload protection circuit 61, current detection circuit 62, overcurrent protection circuit 63, control circuit 64, and drive circuit 65. Terminals VCC and GND are omitted here.

[0049] Resistor 60 generates a feedback voltage Vfb based on the bias current Ib from phototransistor 55. A specified voltage Vdd is applied to one end of resistor 60, and the other end is connected to terminal FB. Therefore, when the resistance value of resistor 60 is set to "R", the feedback voltage Vfb generated at terminal FB is expressed by equation (1).

[0050] Vfb=Vdd-R×Ib…(1)

[0051] In this embodiment, when the output voltage Vout increases, the intensity of light from the LED 34 increases, thus increasing the bias current Ib. Conversely, when the output voltage Vout decreases, the intensity of light from the LED 34 decreases, thus decreasing the bias current Ib. Therefore, for example, when the load 11 is in an overload state and the output voltage Vout decreases, the bias current Ib decreases, thus increasing the feedback voltage Vfb.

[0052] The overload protection circuit 61 stops the control circuit 64 from generating drive signals Vdr1 and Vdr2 after a specified period Ta has elapsed since the load 11 becomes overloaded. The overload protection circuit 61 includes an overload detection circuit 70 and a timer 71.

[0053] The overload detection circuit 70 is a comparator used to compare the feedback voltage Vfb, which varies according to the output voltage Vout, with a reference voltage Vref0 of a specified level. When the feedback voltage Vfb is higher than the reference voltage Vref0, the overload detection circuit 70 outputs a voltage Vol of the "H" level, indicating that the load 11 is in an overload state.

[0054] Timer 71 outputs an "H" level voltage Vol after timing to a specified period Ta, and then outputs an "H" level voltage Vt1 to stop the generation of drive signals Vdr1 and Vdr2. When the overload detection circuit 70 outputs an "L" level voltage Vol indicating that the load 11 is not in an overload state, timer 71 outputs an "L" level voltage Vt1. Timer 71 is equivalent to the "third timing circuit", and the specified period Ta is equivalent to the "third period".

[0055] Furthermore, although this will be explained in detail later, when the generation of drive signals Vdr1 and Vdr2 is stopped, the switching of NMOS transistors 22 and 23 will cease. As a result, when the overload condition persists for a specified period Ta, the operation of the switching power supply circuit 10 is stopped, thus properly protecting the switching power supply circuit 10.

[0056] The current detection circuit 62 outputs a voltage Vs that corresponds to the magnitude of the current Is based on the voltage Vr. Figure 3 This diagram illustrates the path of current Is when NMOS transistors 22 and 23 are switched (tethered) complementaryly. When NMOS transistor 22 is on and NMOS transistor 23 is off, the path of current Is is shown by the dashed line. Conversely, when NMOS transistor 22 is off and NMOS transistor 23 is on, the path of current Is is shown by the dotted line. Therefore, the voltage Vr corresponding to current Is can take either a positive or negative value.

[0057] In this embodiment, the current detection circuit 62 removes and filters noise from the voltage Vr, which is, for example, a "positive" or "negative" value, and then outputs the peak value of the voltage Vr, which represents "positive" or "negative," as a "positive" voltage Vs. Therefore, the level of the voltage Vs represents the magnitude of the current Is, i.e., the magnitude of the "load current." The current detection circuit 62 includes, for example, a low-pass filter and a peak hold circuit.

[0058] In addition, in this embodiment, the peak value of the voltage Vr after noise removal and filtering is output as voltage Vs. However, any circuit can be used as long as it can output voltage Vs corresponding to the magnitude of current Is.

[0059] The overcurrent protection circuit 63, after a specified period Tb has elapsed since the "load current" becomes an overcurrent, causes the control circuit 64 to stop outputting drive signals Vdr1 and Vdr2. Figure 4 As shown, the overcurrent protection circuit 63 includes an overcurrent detection circuit 80, a memory 81, an adjustment circuit 82, and a timer 83.

[0060] The overcurrent detection circuit 80 detects whether the "load current" is an overcurrent by comparing a voltage Vs representing the magnitude of the current Is corresponding to the "load current" with a reference voltage (described later) corresponding to a specified current value (hereinafter referred to as the "specified value"). Specifically, the overcurrent detection circuit 80 is a comparator used to compare the voltage Vs with the reference voltage, and when the voltage Vs is higher than the reference voltage, it outputs a voltage Voc of "H" level indicating that the "load current" is an overcurrent.

[0061] Memory 81 is a storage circuit that stores setting information SET. This setting information SET is used to set whether to decrease or maintain the "predetermined value" when the load 11 becomes overloaded after a specified period Tb. In this embodiment, when the "predetermined value" is decreased, the "H level" data is stored in memory 81 as "setting information SET", and when the "predetermined value" is maintained, the "L level" data is stored in memory 81 as "setting information SET".

[0062] The adjustment circuit 82 is a circuit that can adjust the "prescribed value" when detecting overcurrent based on the "H" level voltage Vol indicating that the load 11 is in an overload state and the "set information SET", and includes a timer 100 and an output circuit 101.

[0063] Timer 100, based on a voltage Vol at an "H" level, changes voltage Vt2 from an "L" level to an "H" level when the load 11 reaches a specified period Tb after the load 11 becomes overloaded. When the overload detection circuit 70 outputs a voltage Vol at an "L" level indicating that the load 11 is not overloaded, timer 100 outputs a voltage Vt2 at an "L" level. Timer 100 is equivalent to the "first timing circuit," and the specified period Tb is equivalent to the "first period."

[0064] The output circuit 101 is a circuit that outputs either the voltage Vt2 or the reference voltage Vref1 or Vref2, which will become the overcurrent reference, as a "specified value" based on the voltage Vt2 and the "setting information SET". It also includes selectors (SEL) 110 and 111.

[0065] Furthermore, in this embodiment, the reference voltage Vref1 is the voltage corresponding to the current value I1, and the reference voltage Vref2 is the voltage corresponding to the current value I2, which is smaller than the current value I1. In addition, the reference voltage Vref1 is equivalent to the "first voltage", the current value I1 is equivalent to the "first value", the reference voltage Vref2 is equivalent to the "second voltage", and the current value I2 is equivalent to the "second value".

[0066] Selector 110 selects voltage Vt2 based on "setting information" for reducing the "specified value" of the "H" level, which serves as an overcurrent reference, and outputs it to selector 111. Furthermore, selector 110 selects a ground voltage at the "L" level based on "setting information" for maintaining the "specified value" of the "L" level, and outputs it to selector 111.

[0067] Selector 111 is a circuit that selects either reference voltage Vref1 or Vref2 based on the voltage level from selector 110 and outputs it to overcurrent detection circuit 80. Selector 111 includes inverters 120 and 121 and NMOS transistors 122 and 123.

[0068] For example, when a voltage of level "L" is output from selector 110, NMOS transistor 122 is turned off and NMOS transistor 123 is turned on. As a result, selector 111 outputs a reference voltage Vref1.

[0069] On the other hand, when a voltage of level "H" is output from selector 110, NMOS transistor 122 is turned on and NMOS transistor 123 is turned off. As a result, selector 111 outputs a reference voltage Vref1.

[0070] Therefore, when the "setting information" for maintaining the "L level" of the "specified value" is stored in the memory 81, the ground voltage of the "L" level is input to the selector 111, thus continuously outputting the "reference voltage Vref1". As a result, the "specified value" used to detect overcurrent becomes the "current value I1".

[0071] On the other hand, when the "setting information" for reducing the "specified value" at the "H" level is stored in the memory 81, the voltage Vt2 is input to the selector 111. When the load 11 is not in an overload state, the selector 111 outputs the "reference voltage Vref1" because of the output voltage Vt2 at the "L" level.

[0072] When the load state changes to the overload state after a period Tb, a voltage Vt2 of "H" level is output, and thus selector 111 outputs "reference voltage Vref2". As a result, when the load state changes to the overload state after a period Tb, the adjustment circuit 82 can reduce the "prescribed value" used to detect overcurrent from "current value I1" to "current value I2". <I1)”。

[0073] Timer 83 outputs an "H" level voltage Voc and, after timing to the specified period Tc, outputs an "H" level voltage Vt2 to stop the generation of drive signals Vdr1 and Vdr2. When the overload detection circuit 80 outputs an "L" level voltage Voc indicating that the current of load 11 is not an overcurrent, timer 83 outputs an "L" level voltage Vt3. Timer 83 is equivalent to a "second timing circuit," and the specified period Tc is equivalent to the "second period."

[0074] Figure 2The control circuit 64 outputs drive signals Vdr1 and Vdr2 based on the feedback voltage Vfb to set the level of the output voltage Vout to the target level. In this embodiment, the drive signals Vdr1 and Vdr2 are both high-level (hereinafter referred to as "H" level) signals with a duty cycle of 50%.

[0075] Furthermore, when the load 11 is in an overload state for a period of time Ta, thus outputting a voltage Vt1 at the "H" level, or when the "load current" becomes an overcurrent state for a period of time Tc, thus outputting a voltage Vt3 at the "H" level, the control circuit 64 stops generating drive signals Vdr1 and Vdr2.

[0076] The driving circuit 65 is a buffer that switches NMOS transistors 22 and 23 complementaryly based on the input driving signals Vdr1 and Vdr2. Specifically, the driving circuit 65 drives NMOS transistor 22 with a signal Vo1 that has the same logic level as the driving signal Vdr1, and drives NMOS transistor 23 with a signal Vo2 that has the same logic level as the driving signal Vdr2.

[0077] When the output voltage Vout level starts to change from the target level, the control circuit 64 changes the frequency of the drive signals Vdr1 and Vdr2 so that the output voltage Vout becomes the target level. Therefore, the switching power supply circuit 10 can generate the output voltage Vout at the target level.

[0078] <<<An example of the operation of switching power supply circuit 10 under overload conditions>>>

[0079] Figure 5 This diagram illustrates an example of the operation of the switching power supply circuit 10 under overload conditions. Before time t0, NMOS transistors 22 and 23 switch and generate an output voltage Vout of a target level in the specified load 11. Here, the "current value I1" used to detect overcurrent is set to a relatively large value (e.g., the current value of "current Is" when the nodes generating the output voltage Vout are almost in a short-circuit state). Furthermore, in this embodiment, "setting information SET" of the "H" level is stored in memory 81.

[0080] For example, at time t0, if the load 11 of the switching power supply circuit 10 is slightly overloaded, the output voltage Vout decreases, and the feedback voltage Vfb increases. Then, at time t1, if the feedback voltage Vfb becomes higher than the reference voltage Vref0, the overload detection circuit 70 outputs a voltage Vol at the "H" level indicating that the load 11 is in an overload state.

[0081] As described above, the "current value I1" used to detect overcurrent is set to a relatively large value. Therefore, at time t1, the voltage Vs corresponding to the current Is is lower than the reference voltage Vref1 representing the "current value I1", and no overcurrent is detected.

[0082] When the output voltage Vol is at the "H" level at time t1, Figure 4 The timer 100 in the circuit counts the time during which the load 11 is in an overload state. When the timer 100 reaches time t2 after a specified period Tb from time t1, the voltage Vt2 is changed to the "H" level. As a result, since the output circuit 101 outputs the reference voltage Vref2, the "specified value" used to detect the overcurrent decreases from "current value I1" to "current value I2".

[0083] At time t2, since the voltage Vs corresponding to the current Is is higher than the reference voltage Vref2 representing the "current value I2", the overcurrent detection circuit 80 outputs a voltage Voc at the "H" level indicating that the "load current" is an overcurrent.

[0084] Timer 83 counts the time when the load current is an overcurrent based on the "H" level voltage Voc. When timer 83 reaches time t3 after a predetermined period Tc has elapsed from time t2, it changes the voltage Vt3 to the "H" level. As a result, since control circuit 64 stops generating drive signals Vdr1 and Vdr2, NMOS transistors 22 and 23 stop switching. Therefore, in this embodiment, for example, when the load 11 exceeds its rated load and an overcurrent occurs, the operation of the switching power supply circuit 10 stops, thus protecting the switching power supply circuit 10 from the effects of overcurrent.

[0085] <<<An example of the operation of switching power supply circuit 10 during startup>>>

[0086] Figure 6 This diagram illustrates the startup of the switching power supply circuit 10. Here, "startup" refers, for example, to the situation where, after switch 12 is turned on and the input voltage Vin (supply voltage) for operating the switching power supply circuit 10 is provided to the switching power supply circuit 10, the output voltage Vout to the load 11 reaches the target level. Figure 6 In one example, the rated load is used as load 11, but load 11 can be a lighter load than the rated load. In this case, the "Settings Information SET" at the "H" level is also stored in memory 81.

[0087] Figure 7This diagram illustrates an example of the operation of the switching power supply circuit 10 during startup. First, when switch 12 is turned on at time t10, the startup circuit (not shown) of control IC 40 charges capacitor 50 via a terminal (not shown) based on the voltage divider of the input voltage Vin. For example, when the power supply voltage Vcc of capacitor 50 becomes higher than a predetermined level at time t11, control circuit 64 generates drive signals Vdr1 and Vdr2, thus initiating the switching operation of NMOS transistors 22 and 23.

[0088] When the switching action begins at time t11, the output voltage Vout gradually rises from "0V". However, at this time, the output voltage Vout is very low, almost "0V", so the feedback voltage Vfb rises sharply.

[0089] Then, when the feedback voltage Vfb becomes higher than the reference voltage Vref0 at time t12, the overload detection circuit 70 outputs an "H" level voltage Vol. In this embodiment, the overload detection circuit 70 detects whether the load 11 is in an overload state based solely on the output voltage Vout. Therefore, even if the load 11 is not actually in an overload state, the overload detection circuit 70 outputs an "H" level voltage Vol when the feedback voltage Vfb becomes higher than the reference voltage Vref0.

[0090] At time t13, after a specified period Tb has elapsed since the output voltage Vol at "H" level at time t12, timer 100 changes voltage Vt2 to "H" level. As a result, since the output circuit 101 outputs reference voltage Vref2, the "specified value" used to detect overcurrent decreases from "current value I1" to "current value I2".

[0091] At time t13, since the voltage Vs corresponding to the current Is is higher than the reference voltage Vref2 representing the current value I2, the overcurrent detection circuit 80 outputs a voltage Voc at the "H" level indicating that the load current is an overcurrent.

[0092] Additionally, the switching operation begins at time t11. As the output voltage Vout rises and approaches the target level, the feedback voltage Vfb gradually decreases. For example, when the feedback voltage Vfb becomes lower than the reference voltage Vref0 at time t14, the overload detection circuit 70 outputs a voltage Vol at the "L" level. As a result, since the timer 100 changes the voltage Vt2 to the "L" level, the "prescribed value" used to detect overcurrent increases from "current value I2" to "current value I1".

[0093] Therefore, at time t14, the overcurrent detection circuit 80 outputs a voltage Voc at the "L" level indicating that the "load current" is not an overcurrent. When the output voltage Vout rises to the target level at time t15, the startup of the switching power supply circuit 10 is complete.

[0094] In this embodiment, periods Tb and Tc are determined such that the period Tx required for the "start-up" of the switching power supply circuit 10 is shorter than the sum of the period Tb from the detection of overload to the reduction of the "predetermined value" used to detect overcurrent and the period Tc from the detection of overcurrent to the cessation of switching operation. Therefore, when the switching power supply circuit 10 is started, erroneous start-up can be prevented. Furthermore, in Figure 7 In the diagram, the startup period Tx of the switching power supply circuit 10 is the period from time t10 to time t15.

[0095] ===Summary===

[0096] The switching power supply circuit 10 of this embodiment has been described above. The adjustment circuit 82 of this embodiment can reduce the "prescribed value" used to detect overcurrent from "current value I1" to "current value I2" after a period Tb has elapsed since the load 11 became overloaded. That is, the user of the switching power supply circuit 10 can determine whether to reduce from "current value I1" to "current value I2" based on the load 11. Therefore, for example, even when the switching power supply circuit 10 is starting up, the overcurrent period can be adjusted. As a result, since the switching power supply circuit 10 can be prevented from erroneously stopping during startup, it can be properly operated while protecting the switching power supply circuit 10 from overcurrent.

[0097] When the "setting information" is at level "H", after a period Tb has elapsed following the detection of an overload, the adjustment circuit 82 reduces the "prescribed value" from "current value I1" to "current value I2". If the "prescribed value" is changed to "current value I2" immediately without setting a period Tb, the overcurrent state will persist for a period Tc, and the startup of the switching power supply circuit 10 will stop. However, for example, as... Figure 7 As shown, since the "specified value" is set to "current value I2" after a period Tb has elapsed since the state of load 11 becomes overloaded, the switching power supply circuit 10 can start reliably.

[0098] Furthermore, for example, when the "current value I1" used for overcurrent detection is set to a small value, if the "current value I1" changes to an even smaller "current value I2", it may sometimes be affected by noise in the current Is. In this embodiment, when the "setting information" stored in the memory 81 is at the "L" level, the adjustment circuit 82 maintains the "prescribed value" used for overcurrent detection regardless of the state of the load 11, and is therefore less susceptible to noise in the current Is.

[0099] Furthermore, when the “setting information” is at the “H” level, the voltage output by the output circuit 101 to the overcurrent detection circuit 80 changes from the reference voltage Vref1 for the “current value I1” to Vref2 for the “current value I2”, thereby reducing the “specified value” used to detect overcurrent.

[0100] When the "setting information" is at the "L" level, the output circuit 101 continuously outputs a reference voltage Vref1 for the "current value I1" to the overcurrent detection circuit 80, thereby maintaining the "specified value".

[0101] In this embodiment, when the overcurrent detection circuit 80 detects an overcurrent and a period Tc has elapsed, the control circuit 64 stops the switching operation of the switching power supply circuit 10. Therefore, even if the overcurrent detection circuit 80 erroneously detects an overcurrent due to noise or other reasons, the operation of the switching power supply circuit 10 will not stop immediately.

[0102] In this embodiment, periods Tb and Tc are determined such that the period Tx required for the "start-up" of the switching power supply circuit 10 is shorter than 1 / 2. Figure 7 The period shown is the sum of the periods Tb and Tc. Therefore, when the switching power supply circuit 10 is started, it can prevent erroneous startup stop.

[0103] In this embodiment, when the overload detection circuit 70 detects an overload and a period Ta has elapsed, the control circuit 64 stops the switching operation of the switching power supply circuit 10. This prevents the overload state from persisting for an extended period while the switching power supply circuit 10 is operating.

[0104] Furthermore, the switching power supply circuit 10 is frequently damaged by overcurrent when both overload and overcurrent occur. In this embodiment, since the period Tc is designed to be shorter than the period Ta, damage to the switching power supply circuit 10 can be reliably prevented.

[0105] ===Others===

[0106] For example, in the switching power supply circuit 10, tests are sometimes performed that change between "heavy load" and "light load" at "prescribed periods". In this case, periods Tb and Tc can be determined such that the period during which the load changes to "heavy load" under the prescribed period is shorter than the sum of periods Tb and Tc. By setting such periods, the operation of the switching power supply circuit 10 can be prevented from being erroneously stopped when the test is performed on the switching power supply circuit 10.

[0107] In this embodiment, the control IC 40 is used for the LLC current resonant converter, i.e., the switching power supply circuit 10, but it is not limited thereto. For example, the same effect can be achieved when this embodiment is used for flyback and forward switching power supply circuits instead of the LLC current resonant converter.

[0108] Furthermore, for example, when only the period Tc is longer than the period Tx without setting a period Tb, the startup of the switching power supply circuit 10 will not stop. However, in this case, the period Tc from the detection of overcurrent to the cessation of operation of the switching power supply circuit 10 becomes longer. Therefore, as in this embodiment, by making both periods Tb and Tc longer than the period Tx, the switching power supply circuit 10 can be properly protected from the effects of overcurrent.

[0109] The above-described embodiments are provided for ease of understanding of the present invention and are not intended to limit or explain the present invention. Furthermore, the present invention can be modified or improved without departing from its spirit, and its equivalents are naturally included within the present invention.

[0110] Label Explanation

[0111] 10 Switching power supply circuit

[0112] 11 Load

[0113] 12 switches

[0114] 20, 21, 32, 50~52 Capacitors

[0115] 22,23,122,123 NMOS transistors

[0116] 24 Transformers

[0117] 25 Control Block

[0118] 30, 31, 54 diodes

[0119] 33 Constant Voltage Circuit

[0120] 34 Light Emitting Diode

[0121] 40 Control IC

[0122] 53, 60 resistors

[0123] 55 phototransistors

[0124] 61 Overload Protection Circuit

[0125] 62 Current Detection Circuit

[0126] 63 Overcurrent Protection Circuit

[0127] 64 Control Circuit

[0128] 65 Drive Circuit

[0129] 70 Overload Detection Circuit

[0130] 71, 83, 100 Timers

[0131] 80 Overcurrent Detection Circuit

[0132] 81 Memory

[0133] 82 Adjustment Circuit

[0134] 101 Output Circuit

[0135] 110,111 Selector

[0136] 120, 121 Inverters.

Claims

1. A switching control circuit that controls the switching of a transistor to generate a target level output voltage on the secondary side of a power supply circuit, the power supply circuit comprising: a transformer including a primary coil disposed on the primary side and a secondary coil disposed on the secondary side; and the transistor for controlling the current of the primary coil. The switch control circuit is characterized by comprising: An overload detection circuit detects that the load state of the power supply circuit is overloaded when the output voltage is lower than a specified level. An overcurrent detection circuit detects that the transistor current is an overcurrent when the current flowing through the transistor corresponds to the load current flowing through the load and the transistor current flowing through the transistor is a predetermined value. An adjustment circuit is provided that, after a first period has elapsed following the load becoming overloaded, the predetermined value is reduced. A driving circuit that drives the transistor to make the output voltage level reach the target level; A control circuit that, after the load state is the overload state or the load current is the overcurrent, causes the drive circuit to stop driving the transistor; as well as A storage circuit stores setting information for determining whether to decrease or maintain the specified value. When the setting information for reducing the specified value is stored in the storage circuit, if the first period has elapsed after the load state becomes the overload state, the adjustment circuit reduces the specified value.

2. The switch control circuit as described in claim 1, characterized in that, When the setting information for maintaining the specified value is stored in the storage circuit, the adjustment circuit maintains the specified value regardless of the state of the load.

3. The switch control circuit as described in claim 1, characterized in that, The adjustment circuit includes: A first timing circuit that times the first period after the load state changes to the overload state; and The output circuit, when the setting information for reducing the specified value is stored in the storage circuit, outputs a first voltage representing the first value as the specified value after the first period has elapsed following the state of the load becoming the overload state, and outputs a second voltage representing a second value smaller than the first value as the specified value after the first period has elapsed following the state of the load becoming the overload state.

4. The switch control circuit as described in claim 3, characterized in that, When the setting information used to maintain the specified value is stored in the storage circuit, the output circuit outputs the first voltage as the specified value, regardless of the state of the load.

5. A switching control circuit that controls the switching of a transistor to cause a power supply circuit to generate a target level output voltage on the secondary side, the power supply circuit comprising: a transformer including a primary coil disposed on the primary side and a secondary coil disposed on the secondary side; and the transistor for controlling the current of the primary coil. The switch control circuit is characterized by comprising: An overload detection circuit detects that the load state of the power supply circuit is overloaded when the output voltage is lower than a specified level. An overcurrent detection circuit detects that the transistor current is an overcurrent when the current flowing through the transistor corresponds to the load current flowing through the load and the transistor current flowing through the transistor is a predetermined value. An adjustment circuit is provided that, after a first period has elapsed following the load becoming overloaded, the predetermined value is reduced. A driving circuit that drives the transistor to make the output voltage level reach the target level; A second timing circuit that times the second period after the load current becomes the overcurrent; as well as A control circuit, which, upon the load state being described as an overload state or the load current being described as an overcurrent, causes the drive circuit to stop driving the transistor. When the load current becomes the overcurrent and the second period has passed, the control circuit causes the drive circuit to stop driving the transistor.

6. The switch control circuit as described in claim 5, characterized in that, The period from the provision of power for operating the switch control circuit until the output voltage reaches the target level is shorter than the sum of the first period and the second period.

7. The switch control circuit as described in claim 5 or 6, characterized in that, It also includes a third timing circuit that times the third period after the load state changes to the overload state. When the load state becomes the overload state and the third period has elapsed, the control circuit causes the drive circuit to stop driving the transistor.

8. The switch control circuit as described in claim 7, characterized in that, The second period is shorter than the third period.

9. A switching control circuit that controls the switching of a transistor to cause a power supply circuit to generate a target level output voltage on the secondary side, the power supply circuit comprising: a transformer including a primary coil disposed on the primary side and a secondary coil disposed on the secondary side; and the transistor for controlling the current of the primary coil. The switch control circuit is characterized by comprising: An overload detection circuit detects that the load state of the power supply circuit is overloaded when the output voltage is lower than a specified level. An overcurrent detection circuit detects that the transistor current is an overcurrent when the current flowing through the transistor corresponds to the load current flowing through the load and the transistor current flowing through the transistor is a predetermined value. An adjustment circuit is provided that, after a first period has elapsed following the load becoming overloaded, the predetermined value is reduced. A driving circuit that drives the transistor to make the output voltage level reach the target level; A control circuit, after the load state is in the overload state, causes the drive circuit to stop driving the transistor according to a first stop command signal from the overload detection circuit. After the transistor current reaches the overcurrent, the control circuit causes the drive circuit to stop driving the transistor according to the second stop command signal from the overcurrent detection circuit.

10. The switch control circuit as described in claim 9, characterized in that, It includes a storage circuit that stores setting information for determining whether to decrease the predetermined value or maintain the predetermined value. When the setting information for reducing the specified value is stored in the storage circuit, if the first period has elapsed after the load state becomes the overload state, the adjustment circuit reduces the specified value.

11. The switch control circuit as described in claim 10, characterized in that, When the setting information for maintaining the specified value is stored in the storage circuit, the adjustment circuit maintains the specified value regardless of the state of the load.

12. The switch control circuit as described in claim 10, characterized in that, The adjustment circuit includes: A first timing circuit that times the first period after the load state changes to the overload state; and The output circuit, when the setting information for reducing the specified value is stored in the storage circuit, outputs a first voltage representing the first value as the specified value after the first period has elapsed following the state of the load becoming the overload state, and outputs a second voltage representing a second value smaller than the first value as the specified value after the first period has elapsed following the state of the load becoming the overload state.

13. The switch control circuit as described in claim 12, characterized in that, When the setting information used to maintain the specified value is stored in the storage circuit, the output circuit outputs the first voltage as the specified value, regardless of the state of the load.

14. The switch control circuit as described in claim 9, characterized in that, It also includes a second timing circuit that times the second period after the load current becomes the overcurrent. When the load current becomes the overcurrent and the second period has passed, the control circuit causes the drive circuit to stop driving the transistor.

15. The switch control circuit as described in claim 14, characterized in that, The period from the provision of power for operating the switch control circuit until the output voltage reaches the target level is shorter than the sum of the first period and the second period.

16. The switch control circuit as described in claim 14, characterized in that, It also includes a third timing circuit that times the third period after the load state changes to the overload state. When the load state becomes the overload state and the third period has elapsed, the control circuit causes the drive circuit to stop driving the transistor.

17. The switch control circuit as described in claim 16, characterized in that, The second period is shorter than the third period.

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