A method for self-checking data in information area of ​​memory upon power-on

Abstract

The invention relates to the technical field of integrated circuit design, and discloses a method for power-on self-checking of data in a memory information area, comprising the following steps: S1: selecting M storage units in the information area of ​​the memory, and respectively setting decoding bits in the M storage units; S2: writing one bit of binary check data into the decoding bits of the M storage units when configuring data in the information area of ​​the memory; S3: powering on an MCU chip; S4: an operating system of the MCU chip first automatically loads the configuration data of the information area of ​​the memory, and then extracts the check data of the decoding bits of the M storage units for decoding, if the decoding is successful, the operating system of the MCU chip continues to run, otherwise, step S4 is re-executed until the decoding is successful, and when in use, the data of the memory is self-checked, and after the data is abnormal, the operating system of the MCU chip is reloaded with the configuration information for decoding, so as to avoid the MCU chip configuring function parameters with wrong data, and ensure that the MCU chip will not freeze when running.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design, and in particular to a power-on self-check method for data in an information area of ​​a memory. Background Art

[0002] Microcontroller unit (MCU), also known as microcomputer or single chip microcomputer, is a chip-level computer that appropriately reduces the frequency and specifications of the central processing unit, and integrates peripheral interfaces such as memory, counter, USB, A / D conversion, UART, PLC, DMA, and even LCD driver circuits on a single chip to form a chip-level computer, which can be used for different application scenarios. At present, after the MCU chip is powered on, it is necessary to initialize the hardware environment first, that is, initialize the core clock, main clock and clocks of various peripherals, then turn off the watchdog, establish the interrupt vector table and initialize the stack register, and then initialize the software environment, that is, the operating system of the MCU chip automatically loads the data in the information area of ​​the memory to configure the specific parameters or optional functions of the MCU. However, if there is interference or abnormality in the original stored data during the data loading process of the information area, it will cause configuration information errors, which will lead to abnormal functions of the MCU chip or system crashes. Summary of the invention

[0003] In view of the shortcomings of the background technology, the present invention provides a power-on self-check method for data in the information area of ​​a memory. The technical problem to be solved is that when the operating system of the current MCU chip loads data in the information area of ​​the memory to configure functions, configuration information errors may occur due to data anomalies, which in turn leads to problems such as MCU chip function anomalies or system crashes.

[0004] In order to solve the above technical problems, the present invention provides the following technical solutions: a method for power-on self-checking of data in the information area of ​​a memory, comprising the following steps:

[0005] S1: Select M storage units in the information area of ​​the memory, where M is a positive integer, and set decoding bits in the M storage units respectively;

[0006] S2: When configuring data in the information area of ​​the memory, write one bit of binary check data into the decoding bit of each of the M storage units;

[0007] S3: MCU chip is powered on;

[0008] S4: The operating system of the MCU chip first automatically loads the configuration data of the information area of ​​the memory, and then extracts the verification data of the decoding bits of the M storage units for decoding. If the decoding is successful, the operating system of the MCU chip continues to run, otherwise step S4 is re-executed until the decoding is successful.

[0009] As a further technical solution, M storage units are continuously distributed, M is not greater than the number of bits of the storage unit, and positions of the decoding bits of the M storage units are different from each other.

[0010] As a further technical solution, the decoding success in step S4 means that the check data of the decoding bits of the M storage units after decoding are the same as the preset value.

[0011] Furthermore, in step S2, the check data of the decoding bits of the M storage units are stored in the M bits of the storage unit A in the information area of ​​the memory in the order of increasing storage addresses. Successful decoding means that the check data of the decoding bits of the M storage units extracted by the running system of the MCU chip is the same as the data in the M bits of the storage unit A.

[0012] Compared with the prior art, the present invention has the following beneficial effects: the method of the present invention can perform self-check on the data in the information area of ​​the memory after power-on, and after an abnormality or error occurs in the data in the information area of ​​the memory, the operating system of the MCU chip reloads the data in the information area of ​​the memory for self-check until the decoding is successful, thereby preventing the MCU chip from configuring functional parameters with erroneous data in the memory, and ensuring that the MCU chip will not have functional abnormalities or freezes due to configuration parameter errors during operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The present invention has the following accompanying drawings:

[0014] Figure 1 A flow chart of the present invention performing self-checking;

[0015] Figure 2 is a schematic diagram of the structure of a memory in an embodiment;

[0016] Figure 3 is a circuit diagram of a first decoding circuit in the embodiment;

[0017] Figure 4 is a circuit diagram of a second decoding circuit in the embodiment;

[0018] Figure 5 This is a storage schematic diagram after the verification data is written into the decoding bits of the first eight storage units in the information area of ​​the memory in the embodiment. DETAILED DESCRIPTION

[0019] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, and therefore only show the components related to the present invention.

[0020] like Figure 1As shown, a method for powering on self-checking data in the information area of ​​a memory comprises the following steps:

[0021] S1: Select M storage units in the information area of ​​the memory, where M is a positive integer, and set decoding bits in the M storage units respectively;

[0022] S2: When configuring data in the information area of ​​the memory, write one bit of binary check data into the decoding bit of each of the M storage units;

[0023] S3: MCU chip is powered on;

[0024] S4: The operating system of the MCU chip first automatically loads the configuration data of the information area of ​​the memory, and then extracts the verification data of the decoding bits of the M storage units for decoding. If the decoding is successful, the operating system of the MCU chip continues to run, otherwise step S4 is re-executed until the decoding is successful.

[0025] like Figure 2 As shown in the figure, the memory can be divided into a program area and an information area. The program area is used to store the running program of the MCU chip, and the information area is used to store the configuration information of the MCU chip. The addresses of the storage units in the information area increase from top to bottom, where the storage unit addresses of the information area are 0X00~0X0F, and each address stores a group of data. In each group of data, one bit is randomly selected as the decoding data, and the decoding data bit can be set to 0~16 bits.

[0026] As a further technical solution, M storage units are continuously distributed, M is not greater than the number of bits of the storage unit, and the positions of the decoding bits of the M storage units are different. In this embodiment, the first eight storage units of the information area are selected, that is, M is equal to 8, and the addresses of the eight storage units are 0X00 to 0X07 respectively. In step S2, when configuring the memory information area, the burner writes 01011010 to the reserved decoding bits of the eight storage units, as shown in the following figure. Figure 5 After the MCU chip is powered on, the operating system of the MCU chip will automatically load the data in the memory information area, read the data content of each storage unit, and extract the check data of the decoding bits of the first eight storage units to the following Figure 3 The decoding circuit shown in the figure performs identification decoding. After the decoding clock CLK arrives, the decoding result is passed to the subsequent reset circuit and the clock control circuit through the D flip-flop. The system reset signal is high and the clock is switched to the system clock. The program continues to run. Otherwise, the MCU's operating system reloads the data in the memory information area for decoding until the decoding is successful. Therefore, the decoding success in this embodiment refers to Figure 3 The decoding circuit shown outputs a high-level reset signal after inputting the data of the decoding bits reserved in the first eight storage units of the memory information area.

[0027] In a certain implementation, in order to improve the flexibility of decoding, when configuring the memory information area data in step S2, the check data of the addresses 0X00 to 0X07 are stored in 0X08 bit<7:0> at the same time. After the MCU chip is powered on, the operating system of the MCU chip automatically loads the memory information area data, and then Figure 4 The decoding circuit shown compares the decoded data in the storage unit with storage address 0X00~0X07 and the bit<7:0> data of the storage unit with storage address 0X08 to see if they are consistent. If they are consistent, the data in the memory information area is correct. If they are inconsistent, the data in the memory information area is abnormal. This method can still verify the accuracy of the MCU chip when automatically loading the memory information area data at power-on. In addition, this method can adjust the verification data each time the information area is configured, and no longer relies on the hardware circuit.

[0028] On the basis of the above method, the chip encryption function can be realized by adding a burner and software to ensure that the memory data cannot be read out. The details are as follows: the burning software automatically generates a random 8-bit key according to the fixed user ID, and the burner burns the 8-bit random key into the decoding bit of the storage unit with storage address 0X00~0X07 in the memory information area and the bit<7:0> of the storage unit with storage address 0X08. When the MCU chip is powered on, the information area data is automatically loaded first, and then the decoded data is identified and compared by the hardware decoding circuit. The software setting needs to verify the information area decoded data when reading the chip storage program. Due to the randomness of the decoded data, it is difficult to read the storage program after selecting the encryption chip, which not only ensures the reliability of loading the information area data, but also ensures the privacy of the chip data.

[0029] The above is based on the present invention as an inspiration. Through the above description, relevant staff can make various changes and modifications without departing from the technical idea of ​​this invention. The technical scope of this invention is not limited to the content in the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. A method for self-checking data in the information area of ​​a memory upon power-on, characterized in that: The following steps are involved: S1: Select M storage units in the information area of ​​the memory, where M is a positive integer, and set decoding bits in the M storage units respectively; S2: When configuring data in the information area of ​​the memory, write one bit of binary check data into the decoding bit of each of the M storage units; S3: MCU chip is powered on; S4: The operating system of the MCU chip automatically loads the configuration data of the information area of ​​the memory, and then extracts the check data of the decoding bits of the M storage units for decoding. If the decoding is successful, the operating system of the MCU chip continues to run, otherwise, step S4 is re-executed until the decoding is successful; The M storage units are continuously distributed, M is not greater than the number of bits of the storage unit, and the positions of the decoding bits of the M storage units are different from each other; The decoding success in step S4 means that the check data of the decoding bits of the M storage units are the same as the preset value after decoding; when M is 8, the decoding method in step S4 is as follows: the data of the first decoding bit is input to the input end of the first inverter, the data of the second decoding bit is input to the input end of the first buffer, the data of the third decoding bit is input to the input end of the second buffer, the data of the fourth decoding bit is input to the input end of the second inverter, the data of the fifth decoding bit is input to the input end of the third buffer, the data of the sixth decoding bit is input to the input end of the third inverter, the data of the seventh decoding bit is input to the input end of the fourth buffer, and the data of the eighth decoding bit is input to the input end of the fourth inverter; the output end of the first inverter and the output end of the unit buffer are connected to the first AND gate The two input ends of the AND gate are electrically connected, the output end of the second buffer and the output end of the second inverter are electrically connected to the two input ends of the second AND gate, the output end of the third buffer and the output end of the third inverter are electrically connected to the two input ends of the third AND gate, and the output end of the fourth buffer and the output end of the fourth inverter are electrically connected to the two input ends of the fourth AND gate; the output end of the first AND gate and the output end of the second AND gate are electrically connected to the two input ends of the fifth AND gate, respectively, and the output end of the third AND gate and the output end of the fourth AND gate are electrically connected to the two input ends of the sixth AND gate, respectively; the output end of the fifth AND gate and the output end of the sixth AND gate are electrically connected to the two input ends of the seventh AND gate, respectively, the output end of the seventh AND gate is electrically connected to the D input end of the D flip-flop, and the Q non-output end of the D flip-flop is electrically connected to the input end of the fifth inverter; Or in step S2, the check data of the decoding bits of the M storage units are stored in the M bits of the storage unit A in the information area of ​​the memory in the order of increasing storage addresses, and the successful decoding means that the check data of the decoding bits of the M storage units extracted by the running system of the MCU chip is the same as the data in the M bits of the storage unit A.

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