Low-power driving system and timing controller for a display device

Abstract

A low-power driving system and a timing controller for a display device are disclosed. The low-power driving system for a display device may include: a timing controller configured to transmit a packet to which one of first option information and second option information is applied, where the first option information corresponds to a static pattern and the second option information corresponds to a dynamic pattern; and a source driver configured to receive the packet and perform a low-power mode corresponding to the static pattern based on the first option information, or perform adaptive charge sharing corresponding to the dynamic pattern based on the second option information.

Description

Technical Field

[0001] The present disclosure relates to a low-power driving technology, and more particularly, to a low-power driving system and a timing controller for a display device. Background Art

[0002] A display device includes a timing controller, a source driver, and a display panel.

[0003] The timing controller may be designed to provide display data, control data, and a clock for display to the source driver in a grouped form. The source driver receives the display data and provides a source signal corresponding to the display data to the display panel. The display panel displays a screen corresponding to the source signal.

[0004] The display device needs to adopt a technology to reduce the power consumption of various components. To this end, technologies for reducing the power consumption of the timing controller and the source driver are actively studied.

[0005] In addition, the source driver of the display device may have a structure for unique charge sharing connection or full charge sharing connection to output a source signal.

[0006] Therefore, the display device needs to be designed to provide options for reducing power consumption to the source driver according to various packet types or charge sharing structures (such as full charge sharing). Summary of the Invention

[0007] Each embodiment aims to provide a low-power driving system and a timing controller for a display device, which can support a source driver using a charge sharing method including a full charge sharing connection.

[0008] In addition, various embodiments aim to provide a low-power driving system and a timing controller, which can freely provide an option for reducing power consumption regarding polarity and perform a power consumption operation according to the option.

[0009] Each embodiment aims to provide a low-power driving system and method and a timing controller for a display device, which can reduce the power consumption of the source driver by having the timing controller recognize a display pattern and send option information corresponding to the recognized display pattern to the source driver.

[0010] In addition, various embodiments aim to provide a low-power driving system for a display device, which can reduce power consumption through the following steps: providing a packet according to a display pattern, the packet including option information capable of reducing power consumption; and performing charge sharing control on an output or current control on at least one of an output buffer, a gamma buffer, and an intermediate driving voltage (HVDD) buffer based on the option information.

[0011] In an embodiment, a low-power driving system for a display device may include: a timing controller configured to receive packet data for correcting the polarity of line data based on a packet type of a source driver, correct the polarities of the previous line data and the current line data based on the packet data, divide a display pattern into a static pattern and a dynamic pattern based on the difference between the previous line data and the current line data, and transmit a packet to which one of first option information and second option information is applied, where the first option information corresponds to the static pattern and the second option information corresponds to the dynamic pattern; and a source driver configured to receive the packet and perform a low-power mode corresponding to the static pattern based on the first option information, or perform adaptive charge sharing corresponding to the dynamic pattern based on the second option information.

[0012] In an embodiment, a timing controller for a display device may include: a pixel value storage device configured to store the previous line data and the current line data and provide the previous line data and the current line data for mapping; a packet receiver configured to receive the packet type of the source driver and packet data for correcting the polarity of the line data based on the packet type; a packet mapper configured to map information about the polarity of the line data based on the packet type and the packet data; a pixel value correction unit configured to correct information about the polarities of the previous line data and the current line data based on the information about the polarity; an arithmetic unit configured to receive the previous line data and the current line data from the pixel value correction unit and calculate a power gain amount and a power loss amount caused by charge sharing of the current line data, or calculate a first maximum change in the output of the source driver that applies charge sharing to the current line data and a second maximum change in the output of the source driver that does not apply charge sharing to the current line data based on a comparison result between the previous line data and the current line data; and an option information providing unit configured to provide, if the display pattern is a dynamic pattern, second option information about whether to apply charge sharing to the current line data based on a comparison result between the power gain amount and the power loss amount, and provide, if the display pattern is a static pattern, one change selected from the first maximum change and the second maximum change as the first option information according to whether charge sharing is applied to the previous line data. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a block diagram showing a low-power driving system for a display device according to an embodiment of the present disclosure.

[0014] Figure 2 is a flowchart showing Figure 1 a low-power driving method according to an embodiment of

[0015] Figure 3 is Figure 1 a block diagram of the timing controller shown.

[0016] Figure 4 is a flowchart showing Figure 3 the operation of the grouping mapper shown.

[0017] Figure 5 is a flowchart showing the adaptive charge sharing control operation.

[0018] Figure 6 and Figure 7 is an exemplary illustration of a panel structure.

[0019] Figure 8 is a block diagram describing the full charge sharing connection applied to an embodiment of the present disclosure.

[0020] Figure 9 is a flowchart showing the operation of controlling the low power mode.

[0021] Figure 10 is a waveform diagram describing the operation of controlling the low power mode according to the output level of the source driver.

[0022] Figure 11 is a graph showing the output change slope of the source driver over time corresponding to option information. Detailed Description of the Embodiments

[0023] Exemplary embodiments will be described in more detail below with reference to the accompanying drawings. However, the present disclosure may be implemented in different forms and should not be construed as limited to the embodiments described herein. On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Throughout the disclosure, in the various drawings and embodiments of the present disclosure, the same reference numerals denote the same components.

[0024] A low power driving system for a display device according to an embodiment of the present disclosure may be as shown Figure 1 in

[0025] Referring to Figure 1 , a timing controller 10, a source driver 20, a display panel 30, and a memory 40 are shown.

[0026] The timing controller 10 receives display data, a grouping type, and grouping data, where the display data is received from the outside. The grouping type may be received together with the display data. The timing controller 10 may receive grouping data corresponding to the grouping type from a look-up table stored in the memory 40.

[0027] In this case, the memory 40 may be configured to store and provide grouping data using, for example, an EEPROM. The grouping data includes information about the polarity of the row data.

[0028] The timing controller 10 is configured to configure externally received display data in the form of a packet PKT and provide the packet PKT to the source driver 20.

[0029] In this case, the timing controller 10 may configure the packet PKT including display data and control data. The control data may include various types of option information for distinguishing power control modes.

[0030] The timing controller 10 may use the packet data to correct the polarity of the pixel values of the row data and may generate option information based on a comparison result between the previous row data whose polarity has been corrected and the current row data.

[0031] The power control mode may be classified into a low power mode control operation and an adaptive charge sharing control operation. The option information may indicate low power mode control or adaptive charge sharing control, may have a value according to a predetermined protocol, and may be applied to the packet PKT by being included in the control data.

[0032] The source driver 20 receives the packet PKT from the timing controller 10 and outputs a source signal (Sout) corresponding to the display data to the display panel 30. In this case, the source driver 20 may be configured to perform a power control mode corresponding to the option information of the control data during the process of converting the display data into the source signal (Sout) and the process of outputting the source signal (Sout).

[0033] The source driver 20 may include a latch, a shift register, a digital-to-analog converter, and an output buffer for converting display data. In addition, the source driver 20 may include a gamma buffer for providing a gamma voltage to the digital-to-analog converter and an intermediate drive voltage (HVDD) buffer for providing a drive voltage to the output buffer.

[0034] Since the latch, the shift register, the digital-to-analog converter, the output buffer, the gamma buffer, and the intermediate drive voltage buffer are common components in the source driver 20, their detailed descriptions are omitted.

[0035] The display panel 30 may be configured as a flat display panel. Exemplarily, a display panel including pixels using an organic light emitting diode (OLED), a light emitting diode (LED), or a liquid crystal display (LCD) may be used as the display panel 30.

[0036] In Figure 1 this configuration, a low power driving system for a display device according to an embodiment of the present disclosure is configured to include a timing controller 10 and a source driver 20.

[0037] Referring to Figure 2Describe the operation of a low-power driving system for a display device.

[0038] First, the timing controller 10 is configured to divide a display pattern into a static pattern and a dynamic pattern based on the difference between the previous line data and the current line data, and transmit a packet PKT to which one of first option information and second option information is applied, where the first option information corresponds to the static pattern and the second option information corresponds to the dynamic pattern.

[0039] The timing controller 10 performs a control process. The control process may include step S10 of identifying a pattern and providing a packet PKT based on the identified pattern, where the packet PKT includes control data having the first option information or the second option information.

[0040] The source driver 20 may receive the packet PKT and may identify a power control mode based on the first option information or the second option information. More specifically, the source driver 20 is configured to perform a low-power mode control operation corresponding to the static pattern based on the first option information, or perform an adaptive charge sharing control operation corresponding to the dynamic pattern based on the second option information.

[0041] That is, the source driver 20 performs a driving process based on the identified power control mode. The driving process includes step S20 of identifying a power control mode based on the display pattern, step S22 of performing a low-power mode if the display pattern is a static pattern, and step S23 of performing adaptive charge sharing if the display pattern is a dynamic pattern.

[0042] By comparing the previous line data with the current line data, the display pattern can be determined as one of a static pattern and a dynamic pattern.

[0043] In addition, the determination criterion for distinguishing between the static pattern and the dynamic pattern can be set as the data change between the previous line data and the current line data. The criterion for the data change for distinguishing between the static pattern and the dynamic pattern can be set differently according to the intention of the manufacturer.

[0044] Among the static pattern and the dynamic pattern, the static pattern can be defined as a case where the source signal (Sout) (i.e., the output of the source driver 20) remains constant due to a small data change between the previous line data and the current line data.

[0045] In addition, the dynamic pattern can be defined as a case where the source signal (Sout) (i.e., the output of the source driver 20) swings due to a large data change between the previous line data and the current line data.

[0046] In an embodiment of the present disclosure, if the display pattern is a static pattern, the timing controller 10 is configured to provide first option information for determining the power control mode as a low power mode control operation. The source driver 20 is configured to perform the low power mode based on the first option information to reduce the power consumption by reducing the amount of current for maintaining the output of the current row data.

[0047] In addition, in an embodiment of the present disclosure, if the display pattern is a dynamic pattern, the timing controller 10 is configured to provide second option information for determining the power control mode as an adaptive charge sharing control operation. The source driver 20 is configured to perform the adaptive charge sharing by performing charge sharing on the output of the current row data based on the second option information, so as to reduce the power consumption by supplying the current for discharging the load capacitor of the display panel to the position that needs to be charged.

[0048] The timing controller 10 provides a packet PKT that includes the first option information or the second option information in the control data in order to reduce the power consumption of the source driver 20. To this end, the timing controller 10 may be configured as Figure 3 shown.

[0049] The second option information may be determined and provided by Figure 4 and Figure 5 's adaptive shared charge control operation. The first option information may be determined and provided by Figure 4 and Figure 9 's low power mode control operation. The adaptive charge sharing control operation and the low power mode control operation may be understood as being included in Figure 2 step S10 of identifying the pattern and providing the packet PKT based on the identified pattern, and the packet PKT includes control data having the first option information or the second option information.

[0050] First, referring to Figure 3 , the timing controller 10 includes a data receiver 11, a packet configuration unit 12, a packet output unit 13, and an option information configuration unit 15.

[0051] The data receiver 11 sends the externally received display data to the packet configuration unit 12. The packet configuration unit 12 provides the display data, the control data, and a clock for configuring the packet PKT as parallel data to the packet output unit 13. The packet output unit 13 converts the parallel data into serial data according to a predetermined protocol and sends the serial data as the packet PKT to the source driver 20.

[0052] In the above configuration, the packet configuration unit 12 receives the first option information or the second option information provided by the option information configuration unit 15, and operates such that the first option information or the second option information is included in the control data.

[0053] The option information configuration unit 15 is configured to correct the polarity of the row data based on the packet type, and provide first option information or second option information based on the comparison result between the previous row data and the current row data. To this end, the option information configuration unit 15 includes a packet receiver 2, a packet mapper 4, a pixel value storage device 5, a pixel value correction unit 6, an arithmetic unit 7, and an option information providing unit 9.

[0054] The packet receiver 2 receives the packet type of the source driver 20 and packet data for correcting the polarity of the row data based on the packet type.

[0055] The packet type may be received together with the display data, or may be preset in an internal memory (not shown).

[0056] The packet receiver 2 may receive packet data corresponding to the packet type from a look-up table stored in the memory 40.

[0057] The packet mapper 4 maps information about the polarity of the row data based on the packet type and the packet data. That is, the packet data may be determined based on the packet type. Information about the polarity of the row data for each channel is mapped based on the packet data. Therefore, the packet data can be understood as data for mapping information about the polarity of each row.

[0058] The pixel value storage device 5 may be configured as a memory for storing the display data sent from the data receiver 11 in units of rows. The pixel value storage device 5 is configured to have a capacity capable of storing at least the previous row data and the current row data and providing the previous row data and the current row data for mapping. In addition, the pixel value storage device 5 may be configured to store the display data in units of rows, and provide the previous row data and the current row data stored therein for mapping in synchronization with the control and operation of the option information providing unit 9.

[0059] The pixel value correction unit 6 corrects the information about the polarity of the previous row data and the current row data based on the information about the polarity of the row data for each channel provided by the packet mapper 4, and provides the previous row data and the current row data with the corrected polarity to the arithmetic unit 7.

[0060] The operation unit 7 receives the previous row data and the current row data from the pixel value correction unit 6. The operation unit 7 can perform the following operations: an operation of calculating the data change by mapping the previous row data and the current row data, an operation of determining the display pattern in response to the data change, an operation of calculating the power gain amount (Ps) and the power loss amount (Pw) generated by the charge sharing of the current row data, an operation of comparing the power gain amount (Ps) with the power loss amount (Pw), and an operation of detecting the maximum changes (Lpeak_cs and Lpeak_ncs) in the output of the source driver when charge sharing is applied to the current row data and when charge sharing is not applied to the current row data, respectively. The operation unit 7 can perform some of the operations selected from the operations based on the display pattern and provide the results of the operations to the option information providing unit 9.

[0061] The operation unit 7 can receive information about the polarity of the row data for each channel from the grouping mapper 4 for operation, and can perform operations based on the positive polarity and the negative polarity.

[0062] The option information providing unit 9 can control the operation unit 7 to select the operations to be performed according to the display pattern, receive the results of the operations, determine the option information corresponding to the display pattern, and provide the determined option information to the grouping configuration unit 12.

[0063] That is to say, the option information configuration unit 15 can determine the second option information obtained by performing the Figure 4 and Figure 5 adaptive charge sharing control operation or the first option information obtained by performing the Figure 4 and Figure 9 low power mode control operation, and can provide the determined first option information or second option information to the grouping configuration unit 12.

[0064] Figure 4 The low power mode control operation of Figure 3 is performed by the grouping mapper 4 of Figure 4 shows mapping the information about the polarity of the row data for each channel based on the grouped data (S11) determined according to the group type, and performing the polarity mapping for each channel of the grouped data (S12) after performing the mapping based on the group type (S11).

[0065] Figure 4 The operation of the grouping mapper 4 in Figure 5 is incorporated into the row data correction step S34 of the polarity of the channel in the adaptive charge sharing control operation based on Figure 9 and the row data correction step S73 of the polarity of the channel in the low power mode control operation based on

[0066] If the display pattern is a dynamic pattern, perform Figure 5 the adaptive charge sharing control operation.

[0067] Briefly describe the adaptive charge sharing control operation. The adaptive charge sharing control operation includes: correcting the previous line data and the current line data based on the packet data to each have a polarity mapped for each channel; calculating the amount of power gain (Ps) and the amount of power loss (Pw) generated by the charge sharing of the current line data by mapping and comparing the previous line data with the current line data; and determining whether to apply charge sharing to the current line data by comparing the amount of power gain (Ps) with the amount of power loss (Pw).

[0068] That is, the second option information according to the adaptive charge sharing control process can be understood as information indicating whether to apply charge sharing to the source signal corresponding to the current line data.

[0069] In addition, if the display pattern is a static pattern, perform Figure 9 the low power mode control operation.

[0070] Briefly describe the low power mode control operation. The low power mode control operation includes: correcting the previous line data and the current line data based on the packet data to each have a polarity mapped for each channel; mapping and comparing the previous line data with the current line data; detecting the first maximum change in the output of the source driver 20 that applies charge sharing to the current line data; and selecting the first maximum change as the first option level. In addition, the low power mode control operation includes: mapping and comparing the previous line data with the current line data; detecting the second maximum change in the output of the source driver 20 that does not apply charge sharing to the current line data; and selecting the second maximum change as the second option level.

[0071] Thereafter, according to whether charge sharing is applied to the previous line data, one of the first option level and the second option level is selected as the first option information to be applied to the packet.

[0072] Refer to Figure 5 for a specific description of the adaptive charge sharing control operation.

[0073] First, if the display pattern is a dynamic pattern, in order to determine whether to apply charge sharing, the timing controller 10 stores the previous line data (N - 1 line) and the current line data (N line) in the pixel value storage device 5 (S30), and maps the previous line data (N - 1 line) and the current line data (N line) (S32).

[0074] The display panel 30 is configured with pixels having different formats according to its type. Exemplarily, Figure 6 is a diagram showing the pixel arrangement of the normal type display panel 30. Figure 7This is a diagram showing the pixel arrangement of the Z - type inversion display panel 30. In Figure 6 and Figure 7 , the Rx series of pixels represent red pixels, the Bx series of pixels represent blue pixels, the Gx series of pixels represent green pixels, and the Du pixels represent dummy pixels.

[0075] The timing controller 10 configures the grouped PKT by sorting the display data according to the type of the display panel 30, so as to arrange the red pixels, blue pixels, and green pixels differently in units of rows.

[0076] Therefore, the timing controller 10 calls the information for confirming the specifications of the display panel 30 to compare the previous - line data (N - 1 line) with the current - line data (N line), and controls the pixel - value storage device 5 to perform a mapping for re - sorting the previous - line data (N - 1 line) and the current - line data (N line) based on the specifications of the display panel 30.

[0077] Thereafter, the pixel - value correction unit 6 corrects the previous - line data (N - 1 line) and the current - line data (N line) based on the grouped data to each have the polarity mapped for each channel (S34), based on the information about the polarity of the line data for each channel provided by the grouped mapper 4.

[0078] Thereafter, the timing controller 10 controls the arithmetic unit 7 to calculate the power - gain amount (Ps) and the power - loss amount (Pw) generated by the charge sharing of the current - line data by comparing the previous - line data with the current - line data (S36). The power - gain amount (Ps) and the power - loss amount (Pw) can be calculated using the calculation equations preset in the timing controller 10.

[0079] The arithmetic unit 7 can receive the information about the polarity of the line data for each channel from the grouped mapper 4 for arithmetic operations, and can perform operations based on the positive and negative polarities.

[0080] As Figure 8 shown, the source driver 20 according to an embodiment of the present invention can be configured to perform charge sharing for all channels based on a full - charge - sharing connection. The source driver 20 includes a plurality of channels BF for outputting source signals (Sout). Full - charge sharing means that all channels BF are commonly connected to perform charge sharing.

[0081] In Figure 8 , the switching of the channels BF for charge sharing can be implemented using a plurality of MOS transistors. Since the plurality of MOS transistors can be configured differently according to the intention of the manufacturer, detailed examples thereof are omitted.

[0082] In the full - charge - sharing connection structure, the charge - sharing voltage can be determined to have a level that is the average value of the voltages applied to the connected channels.

[0083] Each channel BF can be configured to output a voltage with a positive polarity within a voltage range of the intermediate driving voltage (HVDD) or greater, or to output a voltage with a negative polarity within a voltage range less than the intermediate driving voltage (HVDD). In addition, each channel BF performs charge sharing while being driven in units of rows. That is, each channel repeats driving and charge sharing based on pixel data that changes in units of rows.

[0084] The channel BF that outputs a voltage with a positive polarity can drive an output within a range from the intermediate driving voltage (HVDD) to the driving voltage (VDD). The channel BF that outputs a voltage with a negative polarity can drive an output within a range from the ground voltage (VSS) to the intermediate driving voltage (HVDD). In this case, the intermediate driving voltage (HVDD) can be set to a voltage having a level between the driving voltage (VDD) and the ground voltage (VSS).

[0085] The charge sharing voltages with positive and negative polarities applied to all channels BF change in units of rows and are determined to have a level that is the average value of the voltages applied to all channels BF that are subjected to full charge sharing connection. Therefore, the level of the charge sharing voltage can correspond to a positive polarity of the intermediate driving voltage (HVDD) or greater or a negative polarity less than the intermediate driving voltage (HVDD).

[0086] During the process of repeating driving and charge sharing, power saving and power consumption can be performed according to the voltage change of the channel BF.

[0087] If the voltage of the channel BF is charged by the discharging current when the voltage changes from the driving voltage of the previous row to the charge sharing level or from the charge sharing level to the driving voltage of the next row, it can be understood that power saving is performed on the channel BF. In this case, the power saving can be used to calculate the amount of power gain (Ps) generated due to charge sharing.

[0088] In addition, if power consumption occurs when the voltage of the channel BF changes from the driving voltage of the previous row to the charge sharing voltage or from the charge sharing voltage to the driving voltage of the next row, the power consumption can be used to calculate the amount of power loss (Pw) generated due to charge sharing.

[0089] As described above, the timing controller 10 controls the arithmetic unit 7 to calculate the amount of power gain (Ps) and the amount of power loss (Pw) generated due to the charge sharing of the current row data by comparing the data of the previous row and the current row data of all channels BF that are subjected to full charge sharing connection (S36).

[0090] When calculating the power gain amount (Ps) and the power loss amount (Pw), the option information providing unit 9 of the timing controller 10 compares the power gain amount (Ps) calculated by the arithmetic unit 7 with the power loss amount (Pw), and checks whether the power gain amount (Ps) is greater than the power loss amount (Pw) (S38).

[0091] Schematically, the step S38 of checking whether the power gain amount (Ps) is greater than the power loss amount (Pw) can be configured to determine whether the power gain amount (Ps) is greater than the power loss amount (Pw) by a preset offset level or more.

[0092] When the power gain amount (Ps) is equal to or less than the power loss amount (Pw), the option information providing unit 9 of the timing controller 10 determines not to apply charge sharing to the current row data, determines that charge sharing is off (S42), defines the corresponding second option information, and provides the defined second option information to the packet configuration unit 12. Accordingly, the packet configuration unit 12 configures a packet PKT to which the second option information (S44) is applied, and the second option information indicates not to apply charge sharing to the current row data.

[0093] On the contrary, when the power gain amount (Ps) is greater than the power loss amount (Pw), the option information providing unit 9 of the timing controller 10 determines to apply charge sharing to the current row data, determines that charge sharing is on (S40), defines the corresponding second option information, and provides the second option information to the packet configuration unit 12. Accordingly, the packet configuration unit 12 configures a packet PKT to which the second option information (S44) is applied, and the second option information indicates that charge sharing will be applied to the current row data.

[0094] As described above, if the display pattern is a dynamic pattern, the timing controller 10 can generate second option information indicating whether charge sharing is applied to the source signal corresponding to the current row data through, for example, Figure 5 such an adaptive charge sharing control process, and can provide a packet PKT to which the second option information is applied to the source driver 20.

[0095] The source driver 20 performs adaptive charge sharing on the source signal based on the second option information indicating that charge sharing is to be performed in order to reduce power consumption, and normally outputs the source signal without performing adaptive charge sharing based on the second option information indicating that charge sharing is not to be performed.

[0096] Refer to Figure 9 for a specific description of the low power mode control operation.

[0097] As Figure 9As shown, if the display pattern is a static pattern, the timing controller 10 can perform a low-power mode control operation to reduce power consumption by controlling the amount of current output by the source driver 20.

[0098] If the display pattern is a static pattern, the timing controller 10 stores the previous line data (line N-1) and the current line data (line N) in the pixel value storage device 5 (S70), and maps the previous line data (line N-1) and the current line data (line N) (S72).

[0099] The timing controller 10 configures a grouped PKT by sorting the display data according to the type of the display panel 30, so as to arrange red pixels, blue pixels, and green pixels differently in units of rows.

[0100] Therefore, the timing controller 10 calls information for confirming the specifications of the display panel 30 in order to compare the previous line data (line N-1) with the current line data (line N), and controls the pixel value storage device 5 to perform mapping for re-sorting the previous line data (line N-1) and the current line data (line N) based on the specifications of the display panel 30.

[0101] Thereafter, the pixel value correction unit 6 corrects the previous line data (line N-1) and the current line data (line N) based on the grouped data to each have a polarity mapped for each channel based on the information about the polarity of the line data of each channel provided by the grouped mapper 4 (S73).

[0102] If the display pattern is a static pattern, the timing controller 10 checks the change in the output of the source driver 20 for the current line data, and performs a low-power mode control process for determining first option information suitable for the maximum change.

[0103] Refer to Figure 10 , the first option information is indicated as PWRC, and can be changed to "HHH", "LHH", or "LLL".

[0104] The first option information can be determined based on the line data with a static pattern to control the amount of current within a range that can maintain the output of the source driver 20.

[0105] As Figure 11 shown, the first option information PWRC can be determined to be included within a range that satisfies the time required to drive the screen and the minimum level (min level), and can be set in units of line data to reduce the amount of current. That is, the first option information can be determined based on the current line data so as to reduce the amount of current within a range that maintains the output voltage based on the previous line data.

[0106] For this purpose, the timing controller 10 controls the arithmetic unit 7 to compare the previous line data with the current line data.

[0107] The arithmetic unit 7 of the timing controller 10 detects the first maximum change (Lpeak_cs) as an absolute value in the output of the source driver 20 that applies charge sharing to the current row data by comparing the previous row data with the current row data, and detects the second maximum change (Lpeak_ncs) as an absolute value in the output of the source driver 20 that does not apply charge sharing to the current row data by comparing the previous row data with the current row data (S74).

[0108] The arithmetic unit 7 of the timing controller 10 selects the first maximum change (Lpeak_cs) and the second maximum change (Lpeak_ncs) detected as described above as the first option level and the second option level, respectively, and determines the control options (PWRCcs and PWRCncs) corresponding to the first option level and the second option level, respectively (S76).

[0109] Thereafter, the option information providing unit 9 of the timing controller 10 checks whether charge sharing has been applied to the previous row data (S78).

[0110] If charge sharing has been applied to the previous row data, the option information providing unit 9 of the timing controller 10 selects the control option (PWRCcs) as the first option information (PWRC) (S80), and provides the first option information (PWRC) to the packet configuration unit 12. The packet PKT can be configured by applying the first option information (PWRC) to the packet PKT (S84).

[0111] On the contrary, if charge sharing has not been applied to the previous row data, the option information providing unit 9 of the timing controller 10 selects the control option (PWRCncs) as the first option information (PWRC) (S82), and provides the first option information (PWRC) to the packet configuration unit 12. The packet PKT can be configured by applying the first option information (PWRC) to the packet PKT (S84).

[0112] If the display pattern is a static pattern, the timing controller 10 controls the amount of current flowing through the output of the source driver 20 through a low power mode control operation, thereby performing control for reducing power consumption.

[0113] The timing controller 10 can perform Figure 4 the adaptive charge sharing control operation on a per row data unit and Figure 9 the low power mode control operation to reduce the power consumption of the source driver 20.

[0114] The timing controller 10 can execute a low-power mode control process by considering each of the output buffer, the gamma buffer, and the intermediate driving voltage buffer, can generate separate option information for controlling the output buffer, the gamma buffer, and the intermediate driving voltage buffer, and can apply the separate option information to the packet PKT.

[0115] Therefore, since the output buffer, the gamma buffer, and the intermediate driving voltage buffer are controlled based on the corresponding option information, the source driver 20 can be controlled to reduce the total current consumption.

[0116] With the above configuration and operation of the embodiment, the present disclosure can support a source driver using various charge sharing methods (e.g., full charge sharing connection), and can provide an option for freely reducing the power consumption regarding polarity by correcting the polarity of the row data based on the packet type and the packet data.

[0117] With the above configuration and operation, the present disclosure can reduce the power consumption of the source driver 20 by the timing controller 10 identifying the display pattern and sending the option information corresponding to the identified display pattern to the source driver 20.

[0118] In addition, the present disclosure can reduce the power consumption by performing charge sharing control on the output of the source driver 20 or performing current control on at least one of the output buffer, the gamma buffer, and the intermediate driving voltage (HVDD) buffer based on the option information corresponding to the display pattern.

[0119] The effect of the present disclosure is that it can support a source driver using various charge sharing methods (e.g., full charge sharing connection), and can provide an option for freely reducing the power consumption regarding polarity by correcting the polarity of the row data based on the packet type and the packet data.

[0120] The effect of the present disclosure is that it can reduce the power consumption of the source driver by the timing controller identifying the display pattern and sending the option information corresponding to the identified display pattern to the source driver.

[0121] In addition, the effect of the present disclosure is that the power consumption can be reduced by performing charge sharing control on the output of the source driver or performing current control on at least one of the output buffer, the gamma buffer, and the intermediate driving voltage (HVDD) buffer based on the option information corresponding to the display pattern.

[0122] Although various embodiments have been described above, those skilled in the art will understand that the described embodiments are merely exemplary. Therefore, the disclosure described herein should not be limited based on the described embodiments.

Claims

1. A low-power driving system for a display device, comprising: A timing controller configured to receive packet data for correcting the polarity of row data based on the packet type of a source driver, correct the polarities of the previous row data and the current row data based on the packet data, divide a display pattern into a static pattern and a dynamic pattern based on the difference between the previous row data and the current row data, and send a packet to which one of first option information and second option information is applied, wherein the first option information corresponds to the static pattern and the second option information corresponds to the dynamic pattern; And A source driver configured to receive the packet and perform a low-power mode corresponding to the static pattern based on the first option information, or perform adaptive charge sharing corresponding to the dynamic pattern based on the second option information, Wherein, the timing controller: Calculates a power gain amount and a power loss amount generated by the charge sharing of the current row data based on a comparison result between the previous row data and the current row data, and Provides the second option information regarding whether to apply charge sharing to the current row data based on a comparison result between the power gain amount and the power loss amount.

2. The low-power drive system according to claim 1, wherein The timing controller: When the power gain amount is equal to or less than the power loss amount, provides the second option information for turning off charge sharing for the current row data, and When the power gain amount is greater than the power loss amount, provides the second option information for turning on charge sharing for the current row data.

3. The low-power drive system according to claim 1, wherein, The timing controller calculates the power gain amount and the power loss amount generated by the charge sharing of the current row data by comparing the previous row data and the current row data for all channels of the source driver that are subject to full charge sharing connection.

4. The low-power drive system according to claim 1, wherein The source driver performs the adaptive charge sharing based on the second option information to selectively perform charge sharing on a source signal corresponding to the current row data.

5. A low-power driving system for a display device, comprising: A timing controller configured to receive packet data for correcting the polarity of row data based on the packet type of a source driver, correct the polarities of the previous row data and the current row data based on the packet data, divide a display pattern into a static pattern and a dynamic pattern based on the difference between the previous row data and the current row data, and send a packet to which one of first option information and second option information is applied, wherein the first option information corresponds to the static pattern and the second option information corresponds to the dynamic pattern; And A source driver configured to receive the packet and perform a low-power mode corresponding to the static pattern based on the first option information, or perform adaptive charge sharing corresponding to the dynamic pattern based on the second option information, Wherein, the timing controller: Based on a comparison result between the previous line data and the current line data, calculate a first maximum change in an output of the source driver that applies charge sharing to the current line data and a second maximum change in the output of the source driver that does not apply charge sharing to the current line data, and Provide, as the first option information, one change selected from the first maximum change and the second maximum change according to whether charge sharing is applied to the previous line data.

6. The low-power drive system according to claim 5, wherein, The timing controller: If charge sharing is applied to the previous line data, provide the first maximum change as the first option information, and If charge sharing is not applied to the previous line data, provide the second maximum change as the second option information.

7. The low-power drive system according to claim 5, wherein, The source driver executes the low power mode, in which the amount of current for maintaining the output of the current line data is reduced based on one of the first maximum change and the second maximum change provided as the first option information.

8. A low power driving system for a display device, comprising: A timing controller configured to receive packet data for correcting the polarity of line data based on a packet type of a source driver, correct the polarities of the previous line data and the current line data based on the packet data, divide a display pattern into a static pattern and a dynamic pattern based on a difference between the previous line data and the current line data, and send a packet to which one of first option information and second option information is applied, wherein the first option information corresponds to the static pattern and the second option information corresponds to the dynamic pattern; And A source driver configured to receive the packet and execute a low power mode corresponding to the static pattern based on the first option information, or execute adaptive charge sharing corresponding to the dynamic pattern based on the second option information, Wherein: The timing controller provides the first option information including information for differentiating an output buffer, a gamma buffer, and an intermediate driving voltage buffer, and The source driver executes a low power mode on one buffer selected from the output buffer, the gamma buffer, and the intermediate driving voltage buffer based on the first option information.

9. A timing controller for a display device, comprising: A pixel value storage device configured to store the previous line data and the current line data and provide the previous line data and the current line data for mapping; A packet receiver configured to receive a packet type of a source driver and packet data for correcting the polarity of line data based on the packet type; A packet mapper configured to map information about the polarity of the line data based on the packet type and the packet data; A pixel value correction unit configured to correct information about the polarities of the previous line data and the current line data based on the information about the polarity; An operation unit configured to receive the previous line data and the current line data from the pixel value correction unit, and calculate a power gain amount and a power loss amount generated due to charge sharing of the current line data, or calculate a first maximum change in the output of the source driver that applies charge sharing to the current line data and a second maximum change in the output of the source driver that does not apply charge sharing to the current line data, based on a comparison result between the previous line data and the current line data; An option information providing unit configured to provide second option information regarding whether to apply the charge sharing to the current line data based on a comparison result between the power gain amount and the power loss amount if the display pattern is a dynamic pattern, and provide, as first option information, one change selected from the first maximum change and the second maximum change according to whether the charge sharing is applied to the previous line data if the display pattern is a static pattern; And A packet configuration unit configured to configure a packet including display data and control data, wherein the packet configuration unit applies the first option information for the low power mode or the second option information for the adaptive charge sharing to the control data, in the low power mode, the amount of current flowing through the output of the source driver for maintaining the current line data is reduced, and in the adaptive charge sharing, charge sharing is selected for the current line data.

10. A timing controller for a display device, comprising: A pixel value storage device configured to store previous line data and current line data, and provide the previous line data and the current line data for mapping; A packet receiver configured to receive a packet type of a source driver and packet data for correcting a polarity of line data based on the packet type; A packet mapper configured to map information regarding the polarity of the line data based on the packet type and the packet data; A pixel value correction unit configured to correct information regarding the polarities of the previous line data and the current line data based on the information regarding the polarity; An operation unit configured to receive the previous line data and the current line data from the pixel value correction unit, and calculate a power gain amount and a power loss amount generated due to charge sharing of the current line data, or calculate a first maximum change in the output of the source driver that applies charge sharing to the current line data and a second maximum change in the output of the source driver that does not apply charge sharing to the current line data, based on a comparison result between the previous line data and the current line data; An option information providing unit, configured to provide second option information regarding whether to apply the charge sharing to the current row data based on a comparison result between the power gain amount and the power loss amount if the display pattern is a dynamic pattern, and to provide, if the display pattern is a static pattern, one change selected from the first maximum change and the second maximum change as first option information according to whether the charge sharing is applied to the previous row data Wherein, the operation unit: Selectively performs the following operations: a first operation for calculating a data change between the previous row data and the current row data, a second operation for calculating a power gain amount and a power loss amount generated due to the charge sharing of the current row data, a third operation for comparing the power gain amount and the power loss amount, and a fourth operation for detecting a first maximum change in the output of the source driver if the charge sharing is applied to the current row data and detecting a second maximum change in the output of the source driver if the charge sharing is not applied to the source driver Sequentially performs the first operation, the second operation, and the third operation according to the dynamic pattern, and Sequentially performs the first operation and the fourth operation according to the static pattern 11. A timing controller for a display device, comprising: A pixel value storage device, configured to store previous row data and current row data, and provide the previous row data and the current row data for mapping; A packet receiver, configured to receive a packet type of a source driver and packet data for correcting a polarity of row data based on the packet type; A packet mapper, configured to map information regarding the polarity of the row data based on the packet type and the packet data; A pixel value correction unit, configured to correct information regarding the polarities of the previous row data and the current row data based on the information regarding the polarity; An operation unit, configured to receive the previous row data and the current row data from the pixel value correction unit, and calculate a power gain amount and a power loss amount generated due to the charge sharing of the current row data based on a comparison result between the previous row data and the current row data, or calculate a first maximum change in the output of the source driver to which the charge sharing is applied to the current row data and a second maximum change in the output of the source driver to which the charge sharing is not applied to the current row data; An option information providing unit, configured to provide second option information regarding whether to apply the charge sharing to the current row data based on a comparison result between the power gain amount and the power loss amount if the display pattern is a dynamic pattern, and to provide, if the display pattern is a static pattern, one change selected from the first maximum change and the second maximum change as first option information according to whether the charge sharing is applied to the previous row data Wherein, if the display pattern is the dynamic pattern, when the power gain amount is equal to or less than the power loss amount, the option information providing unit provides the second option information for turning off charge sharing for the current line data, and when the power gain amount is greater than the power loss amount, the option information providing unit provides the second option information for turning on charge sharing for the current line data.

12. A timing controller for a display device, comprising: A pixel value storage device configured to store previous line data and current line data, and provide the previous line data and the current line data for mapping; A packet receiver configured to receive a packet type of a source driver and packet data for correcting a polarity of line data based on the packet type; A packet mapper configured to map information about the polarity of the line data based on the packet type and the packet data; A pixel value correction unit configured to correct information about the polarities of the previous line data and the current line data based on the information about the polarity; An arithmetic unit configured to receive the previous line data and the current line data from the pixel value correction unit, and calculate a power gain amount and a power loss amount caused by charge sharing of the current line data, or calculate a first maximum change in an output of the source driver that applies charge sharing to the current line data and a second maximum change in the output of the source driver that does not apply charge sharing to the current line data, based on a comparison result between the previous line data and the current line data; An option information providing unit configured to, if the display pattern is a dynamic pattern, provide second option information about whether to apply the charge sharing to the current line data based on a comparison result between the power gain amount and the power loss amount, and if the display pattern is a static pattern, provide, as first option information, one change selected from the first maximum change and the second maximum change according to whether the charge sharing is applied to the previous line data; Wherein, the option information providing unit: If the charge sharing is applied to the previous line data, provides the first maximum change as the first option information, and If the charge sharing is not applied to the previous line data, provides the second maximum change as the second option information.

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