A heterojunction solar cell and a preparation method thereof
By adopting a P-type doped layer design with a stacked structure in a heterojunction solar cell and using a combination of trimethylboron and diborane, the thermal stability and optical band gap width problems of the P-type doped layer are solved, and the conversion efficiency of the battery is improved.
Patent Information
- Application Number
- CN202110510690.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-05-11
- Publication Date
- 2025-07-29
- Estimated Expiration
- 2041-05-11
AI Technical Summary
The P-type doped layer of existing heterojunction solar cells has poor thermal stability, B atoms are prone to diffusion, low optical band gap width, and high concentration diborane gas doping leads to an increase in defect state density and emitter recombination current density, resulting in low conversion efficiency.
The P-type doped layer design adopts a laminated structure, including a first P-type doped layer containing trimethylboron gas and an overall layered structure with increasing boron doping concentrations of diborane gas. Combined with the doping of trimethylboron and diborane, a low-concentration first P-type doped layer is formed. The intermediate layer is mainly trimethylboron, and the third layer is mainly heavy doped with diborane.
The thermal stability of the P-type doped layer is improved, the optical band gap width is increased, the defect state density is reduced, the optical parasitic absorption is reduced, and the photoelectric conversion efficiency of solar cells is improved by 0.05-0.2%.
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Figure CN113113502B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of solar cells, and in particular to a heterojunction solar cell and a preparation method thereof. Background Art
[0002] Heterojunction cells, also known as HJT cells (Hetero-junction with Intrinsic Thin-layer), are a hybrid solar cell made of a crystalline silicon substrate and an amorphous silicon thin film. They are characterized by low preparation process temperature, high conversion efficiency, and good high-temperature characteristics. Figure 1 This is a schematic diagram of the HJT solar cell structure. It uses an N-type single-crystalline silicon wafer as the substrate. On the cleaned and textured front side of the N-type c-Si wafer, a 5-10 nm thick intrinsic amorphous silicon film (ia-Si:H) and a P-type amorphous silicon film (pa-Si:H) are sequentially deposited, forming a PN heterojunction. On the back side of the wafer, a 5-10 nm thick ia-Si:H film and an N-type amorphous silicon film (na-Si:H) are sequentially deposited to form the back surface field. A transparent conductive oxide (TCO) film is deposited on both sides of the doped a-Si:H film, and finally, a metal collector electrode is formed on the top layer of both sides using screen printing. This is the typical structure of a heterojunction solar cell. During fabrication, the single-crystalline silicon substrate is typically textured and cleaned. Then, an intrinsic amorphous silicon layer and an N-type amorphous silicon layer are deposited on the front side of the single-crystalline silicon substrate. On the back side, an intrinsic amorphous silicon layer and a P-type amorphous silicon layer are deposited. A transparent conductive film is then deposited on the N / P-type amorphous silicon layer, and finally, a metal electrode is formed on the transparent conductive film. The structure of existing heterojunction solar cells consists of an amorphous silicon intrinsic layer and a doped layer formed on both sides of an N-type monocrystalline silicon wafer. The amorphous silicon intrinsic layer primarily passivates surface defects in the crystalline silicon, reducing surface defect states and, therefore, carrier recombination. The P-type amorphous silicon doped layer primarily forms a PN junction with the N-type crystalline silicon, while the N-type amorphous silicon doped layer acts as a passivation layer for the field effect. The P-type amorphous silicon doped layer is primarily achieved using diborane (B2H6) gas doping and is typically a single doped layer.
[0003] As for Chinese Patent Application Publication No. CN112466977A, with an application date of August 2, 2018 and a title of: A Silicon Heterojunction Battery and Its Manufacturing Method; it discloses that the method is to reduce the Schottky barrier between the P-type doped silicon layer and the transparent conductive layer, reduce the depletion layer width of the P-type doped silicon layer, thereby increasing the hole collection ability and improving the battery performance. The silicon heterojunction battery includes a silicon substrate interface inversion layer and a first transparent conductive layer. The silicon substrate includes a doped silicon substrate, a P-type doped silicon layer, and a first intrinsic silicon layer formed between the doped silicon substrate and the P-type doped silicon layer. The interface inversion layer is formed on the P-type doped silicon layer. The first transparent conductive layer is formed on the interface inversion layer. The interface inversion layer contains polar organic molecules. The polar organic molecules bond with silicon atoms in the P-type doped silicon layer. The interface inversion layer has a dipole moment pointing from the transparent conductive layer to the P-type doped silicon layer. However, there are the following disadvantages: (1) The amorphous silicon doped layer P layer formed by diborane gas doping has poor thermal stability, and B atoms are likely to diffuse into the amorphous silicon intrinsic layer, affecting the passivation effect of the intrinsic layer, resulting in a low open-circuit voltage of the solar cell and a low conversion efficiency of the solar cell; (2) The optical bandgap of the amorphous silicon doped layer P layer formed by diborane gas doping is low, enhancing the parasitic absorption of photons in the short-wave and long-wave regions, increasing the optical loss, resulting in a low short-circuit current of the solar cell and a low conversion efficiency of the solar cell; (3) The increase in the doping concentration of diborane gas during the process will lead to an increase in the defect state density and emitter recombination current density of boron-doped amorphous silicon, reducing the open-circuit voltage of the battery. Summary of the Invention
[0004] 1. Technical Problems to be Solved by the Invention
[0005] Aiming at the technical problems of imperfect design of the P-type doping layer in the prior art, such as poor thermal stability of the P-type doping layer in heterojunction solar cells, which leads to easy diffusion of B atoms into the amorphous silicon intrinsic layer, low optical bandgap of the P-type doping layer formed by pure diborane gas doping, and increase in the defect state density and emitter recombination current density of boron-doped amorphous silicon due to high-concentration diborane gas doping. This solution provides a heterojunction solar cell and a preparation method. By designing the P-type doping layer into a laminated structure, including a first P-type doping layer deposited with trimethylboron gas in contact with the intrinsic amorphous silicon layer, and at least two overall layered structures with increasing boron doping concentration deposited with trimethylboron and diborane gas, the preparation steps are simple, the cost is low, and the obtained heterojunction solar cell has excellent performance.
[0006] 2. Technical Solution
[0007] To achieve the above object, the technical solution provided is:
[0008] A heterojunction solar cell of the present invention, the heterojunction solar cell comprising a substrate sheet, electrodes provided on the top surface and the bottom surface of the substrate sheet, and the substrate sheet comprising:
[0009] A single-crystalline silicon substrate layer;
[0010] Two groups of intrinsic amorphous silicon layers, the two groups of intrinsic amorphous silicon layers including a first group of intrinsic amorphous silicon layers provided on the top side of the single-crystalline silicon substrate layer and a second group of intrinsic amorphous silicon layers provided on the bottom side of the single-crystalline silicon substrate layer;
[0011] A P-type doping layer, the P-type doping layer being provided on the top side of the first group of intrinsic amorphous silicon layers;
[0012] An N-type doping layer, the N-type doping layer being provided on the bottom side of the second group of intrinsic amorphous silicon layers;
[0013] A transparent conductive layer, the transparent conductive layer being respectively provided on the top side of the P-type doping layer and the bottom side of the N-type doping layer, and the electrodes being provided on the surface of the transparent conductive layer;
[0014] The P-type doping layer is a laminated structure pointing from the top side of the first group of intrinsic amorphous silicon layers towards the electrode direction, including a first P-type doping layer, the first P-type doping layer being in contact with the first group of intrinsic amorphous silicon layers, the first P-type doping layer being an integral layer structure formed by depositing trimethylboron gas, and at least two integral layer structures with increasing boron doping concentration formed by depositing trimethylboron and diborane gases are provided on the first P-type doping layer.
[0015] Further, the P-type doping layer includes the following three-layer structures arranged in sequence from the top side of the first group of intrinsic amorphous silicon layers towards the electrode direction:
[0016] A first P-type doping layer, the first P-type doping layer being a boron lightly doped integral layer structure formed by depositing trimethylboron gas;
[0017] A second P-type doping layer, the second P-type doping layer being a boron lightly doped integral layer structure formed by depositing trimethylboron and diborane gases;
[0018] A third P-type doping layer, the third P-type doping layer being a boron heavily doped integral layer structure formed by depositing trimethylboron and diborane gases.
[0019] Further, the thicknesses of the first P-type doping layer, the second P-type doping layer, and the third P-type doping layer are respectively 2-10 nm; the thickness of the P-type doping layer is 10-20 nm.
[0020] Further, the first group of intrinsic amorphous silicon layers includes the following three-layer structures arranged in sequence from the top side of the single-crystalline silicon substrate layer towards the electrode direction:
[0021] The first intrinsic amorphous silicon layer,
[0022] The second intrinsic amorphous silicon layer, both the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer are integral layered passivation structures formed by depositing silane gas, and the second intrinsic amorphous silicon layer has higher density than the first intrinsic amorphous silicon layer,
[0023] The third intrinsic amorphous silicon layer, and the third intrinsic amorphous silicon layer is a laminated passivation layer formed by depositing silane and hydrogen gas.
[0024] Further, the third intrinsic amorphous silicon layer is at least three integral layered passivation structures including those with sequentially increasing density from the top side of the second intrinsic amorphous silicon layer towards the electrode direction.
[0025] Further, the second group of intrinsic amorphous silicon layers includes the following two-layer structures arranged in sequence from the bottom side of the single-crystalline silicon substrate layer towards the electrode direction:
[0026] The fourth intrinsic amorphous silicon layer,
[0027] The fifth intrinsic amorphous silicon layer, both the fourth intrinsic amorphous silicon layer and the fifth intrinsic amorphous silicon layer are integral layered passivation structures formed by depositing silane gas, and the fifth intrinsic amorphous silicon layer has higher density than the fourth intrinsic amorphous silicon layer.
[0028] Further, the thicknesses of the first intrinsic amorphous silicon layer, the second intrinsic amorphous silicon layer, the third intrinsic amorphous silicon layer, the fourth intrinsic amorphous silicon layer, and the fifth intrinsic amorphous silicon layer are respectively 0.5 - 5 nm.
[0029] Further, the thickness of the N-type doped layer is 5 - 10 nm; the thickness of the transparent conductive layer is 90 - 110 nm.
[0030] Further, the single-crystalline silicon substrate layer is an N-type single-crystalline silicon substrate layer.
[0031] A method for manufacturing a heterojunction solar cell, comprising the following steps:
[0032] Providing a single-crystalline silicon substrate layer;
[0033] Providing a first group of intrinsic amorphous silicon layers on the top side of the single-crystalline silicon substrate layer, and providing a second group of intrinsic amorphous silicon layers on the bottom side of the single-crystalline silicon substrate layer;
[0034] Providing an N-type doped layer on the bottom side of the second group of intrinsic amorphous silicon layers;
[0035] Providing a P-type doped layer on the top side of the first group of intrinsic amorphous silicon layers;
[0036] A transparent conductive layer is provided on the top side of the P-type doped layer and the bottom side of the N-type doped layer;
[0037] An electrode is applied on the exposed surface of the transparent conductive layer;
[0038] The preparation of the P-type doped layer includes: depositing a first P-type doped layer on the first group of intrinsic amorphous silicon layers by using trimethylboron-containing gas, and depositing at least two overall layer-like structures with increasing boron doping concentration on the first P-type doped layer by using trimethylboron and diborane gases.
[0039] Further, setting the P-type doped layer includes the following steps:
[0040] Depositing a first lightly boron-doped P-type doped layer by using a hydrogen-containing atmosphere, silane and trimethylboron gas;
[0041] Depositing a second lightly boron-doped P-type doped layer by using a hydrogen-containing atmosphere, silane, trimethylboron and diborane gas;
[0042] Depositing a third heavily boron-doped P-type doped layer by using a hydrogen-containing atmosphere, silane, trimethylboron and diborane gas.
[0043] Further, in the preparation of the first P-type doped layer, the gas flow ratio of trimethylboron to silane is 1 to 5; in the preparation of the second P-type doped layer, the gas flow ratio of trimethylboron to diborane is 1 to 5; when preparing the third P-type doped layer, the volume ratio of trimethylboron to diborane gas is 0.2 to 1.
[0044] Further, setting the first group of intrinsic amorphous silicon layers includes the following steps:
[0045] Depositing a first intrinsic amorphous silicon layer on the top side of the single-crystalline silicon substrate layer at a high speed by using silane-containing gas;
[0046] Depositing a second intrinsic amorphous silicon layer on the first intrinsic amorphous silicon layer at a low speed by using silane-containing gas;
[0047] Depositing a third intrinsic amorphous silicon layer with a stacked passivation structure on the second intrinsic amorphous silicon layer by using different hydrogen and silane gas flow ratios.
[0048] By adopting three layers of intrinsic amorphous silicon layers on the P side of the battery, sufficient passivation effect can be ensured on the surface of the silicon wafer on the P side, and it can also prevent B ions from diffusing to the surface of the single-crystalline silicon substrate layer, resulting in a decline in the passivation performance of the battery. The key point in the structural design of the first group of intrinsic amorphous silicon layers is that the first intrinsic amorphous silicon layer is an amorphous silicon layer deposited at a high speed with pure silane, and the deposition rate is 0.6 - 1.2 nm / s. The first intrinsic amorphous silicon layer can play a good role in inhibiting the growth of epitaxial silicon; the second intrinsic amorphous silicon layer is an amorphous silicon layer deposited at a low speed with pure silane, and the deposition rate is 0.2 - 0.6 nm / s, which can form a relatively dense amorphous silicon passivation layer compared with the first intrinsic amorphous silicon layer, playing the main passivation effect on the surface of the silicon wafer. At the same time, the dense film structure can prevent the diffusion of doping atoms and affect the passivation performance of the silicon wafer surface.
[0049] Further, the third intrinsic amorphous silicon layer includes the following three-layer structure arranged in sequence from the top side of the second intrinsic amorphous silicon layer to the electrode direction:
[0050] The first passivation layer, and the hydrogen and silane gas flow ratio of the first passivation layer is 1 - 5;
[0051] The second passivation layer, and the hydrogen and silane gas flow ratio of the second passivation layer is 5 - 10;
[0052] The third passivation layer, and the hydrogen and silane gas flow ratio of the third passivation layer is 10 - 15.
[0053] The third intrinsic amorphous silicon layer adopts a stacked structure, and its functions include passivating the surface of the silicon wafer and preventing doping from diffusing into the inner structure. This stacked structure adopts different ratios of silane and hydrogen gas flow rates respectively. When the same gas flow rate of silane is passed in the chamber, the relative proportion of the hydrogen gas flow rate in the same chamber is larger, the deposition rate of the passivation layer is lower, and the lower the deposition rate of the passivation layer, the denser the deposited amorphous silicon film. Therefore, from the inside to the outside of this stacked structure, the denseness increases in turn, and it can well prevent the diffusion of B ions. This stacked structure is not limited to layers and can be more layers, as long as the gradually increasing denseness is maintained, and as long as it can provide partial passivation performance.
[0054] Further, the steps for setting the second group of intrinsic amorphous silicon layers are as follows:
[0055] Deposit a fourth intrinsic amorphous silicon layer on the bottom side of the single-crystalline silicon substrate layer by high-speed deposition with silane gas;
[0056] Deposit a fifth intrinsic amorphous silicon layer on the fourth intrinsic amorphous silicon layer by low-speed deposition with hydrogen and silane gas.
[0057] 3. Beneficial effects
[0058] Adopting the technical solution provided by the present invention, compared with the existing well-known technologies, it has the following beneficial effects:
[0059] (1) For a heterojunction solar cell and a preparation method thereof according to the present invention, through a low-concentration first P-type doping layer formed by trimethylboron doping, after trimethylboron is bombarded by plasma, many active groups will be generated, such as CH2B - and CHB - . These groups can bond B ions with SiH 2- / SiH - bonds together, increasing thermal stability. In addition, the doping concentration is relatively low, and the probability of B ions diffusing into the first group of intrinsic amorphous silicon layers is small, and the passivation performance of the first group of intrinsic amorphous silicon layers is hardly affected by B ions.
[0060] (2) For a heterojunction solar cell and a preparation method thereof according to the present invention, taking into account the need for a suitable B doping concentration, doping is carried out by adding a small amount of diborane to trimethylboron gas in the second P-type doping layer, mainly using trimethylboron to ensure that the built-in electric field formed has a sufficient width, and the band gap width of the film layer will not be too narrow to absorb too much light. It not only maintains a sufficient doping concentration but also adjusts the band gap width of the second P-type doping layer through the active groups decomposed from trimethylboron, without the problem of narrow band gap width caused by simply using diborane doping. The third P-type doping layer has a relatively high doping concentration, ensuring the conductivity of the thin film and maintaining good electrical contact with the subsequent deposited TCO thin film, which is heavily doped. And the doping effect of diborane is better than that of trimethylboron, so the third layer is heavily doped by adding a small amount of trimethylboron to diborane gas, mainly using diborane. A high concentration of diborane will significantly increase the density of defect states in the thin film. After adding trimethylboron, the C atoms decomposed from trimethylboron can increase the Fermi level, increase the free energy of defect formation, and also affect the band gap width, increasing it by 0.1 - 0.3 eV.
[0061] (3) For a heterojunction solar cell according to the present invention, for the entire P-type doping layer, since trimethylboron introduces CH 3- 、CH 2-The group reduces the refractive index of the boron-doped amorphous silicon film, reduces the optical parasitic absorption loss of the film, and further reduces the recombination of the film contact interface. At the same time, a stacked structure with increasing boron doping concentration containing diborane and trimethylboron is prepared on the first P-type doping layer formed by pure trimethylboron. This solves the technical problems of imperfect P-type doping layer design, such as poor thermal stability of the P-type doping layer, which makes it easy for B atoms to diffuse into the amorphous silicon intrinsic layer, low optical bandgap width of the P-type doping layer formed by pure diborane gas doping, and high concentration diborane gas doping leading to increased defect state density and emitter recombination current density of boron-doped amorphous silicon. Based on the above optimization, an emitter structure with low defect state density and high optical bandgap is finally achieved, further improving the photoelectric conversion efficiency of HIT solar cells by 0.05-0.2%. BRIEF DESCRIPTION OF THE DRAWINGS
[0062] Figure 1 Schematic diagram of the structure of a heterojunction solar cell in the prior art;
[0063] Figure 2 Schematic diagram of the structure of the heterojunction solar cell in Example 1.
[0064] In the picture:
[0065] 1. Single crystal silicon substrate layer; 2-1. First intrinsic amorphous silicon layer; 2-2. Second intrinsic amorphous silicon layer; 2-3. Third intrinsic amorphous silicon layer; 2-4. Fourth intrinsic amorphous silicon layer; 2-5. Fifth intrinsic amorphous silicon layer; 3-1. First P-type doped layer; 3-2. Second P-type doped layer; 3-3. Third P-type doped layer; 4. N-type doped layer; 5. Light-transmitting conductive layer; 6. Electrode. DETAILED DESCRIPTION
[0066] The present invention will be further described below with reference to specific embodiments.
[0067] The following is combined with Figure 2 The technical solutions in the embodiments of the present invention are described clearly and completely. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments; based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0068] Example 1
[0069] A heterojunction solar cell according to this embodiment includes a substrate sheet and electrodes 6 provided on the top and bottom surfaces of the substrate sheet. The substrate sheet includes:
[0070] The single crystal silicon substrate layer 1 in this embodiment is an N-type single crystal silicon substrate layer, with a size of 156.75 mm and a thickness of 180 μm.
[0071] Two groups of intrinsic amorphous silicon layers, including a first group of intrinsic amorphous silicon layers disposed on the top side of the single-crystalline silicon substrate layer 1 and a second group of intrinsic amorphous silicon layers disposed on the bottom side of the single-crystalline silicon substrate layer.
[0072] The first group of intrinsic amorphous silicon layers includes the following three-layer structure arranged in sequence from the top side of the single-crystalline silicon substrate layer towards the electrode direction:
[0073] The first intrinsic amorphous silicon layer 2-1, with a thickness of 1 nm. In this embodiment, 1 nm is the optimal value. In practice, the technical effects of this application can be achieved within the range of 0.5 - 5 nm.
[0074] The second intrinsic amorphous silicon layer 2-2. Both the first intrinsic amorphous silicon layer 2-1 and the second intrinsic amorphous silicon layer 2-2 are integral layer-like passivation structures formed by depositing silane gas. The second intrinsic amorphous silicon layer 2-2 has a higher density than the first intrinsic amorphous silicon layer 2-1, with a thickness of 1 nm. In this embodiment, 1 nm is the optimal value. In practice, the technical effects of this application can be achieved within the range of 0.5 - 5 nm.
[0075] The third intrinsic amorphous silicon layer 2-3, which is a laminated passivation layer formed by depositing silane and hydrogen gas, with a thickness of 6 nm.
[0076] In this embodiment, the third intrinsic amorphous silicon layer 2-3 includes the following three-layer structure arranged in sequence from the top side of the second intrinsic amorphous silicon layer 2-2 towards the electrode direction:
[0077] The first passivation layer, with a hydrogen and silane gas flow ratio of 3; the second passivation layer, with a hydrogen and silane gas flow ratio of 5; the third passivation layer, with a hydrogen and silane gas flow ratio of 10, and the thickness of each is 2 nm.
[0078] The thickness of the N-type doped layer 4 is 5 nm. The thickness of the transparent conductive layer 5 is 90 nm.
[0079] The second group of intrinsic amorphous silicon layers includes the following two-layer structure arranged in sequence from the bottom side of the single-crystalline silicon substrate layer towards the electrode direction:
[0080] The fourth intrinsic amorphous silicon layer 2-4, with a thickness of 5 nm.
[0081] The fifth intrinsic amorphous silicon layer 2-5. Both the fourth intrinsic amorphous silicon layer 2-4 and the fifth intrinsic amorphous silicon layer 2-5 are integral layer-like passivation structures formed by depositing silane gas. The fifth intrinsic amorphous silicon layer 2-5 has a higher density than the fourth intrinsic amorphous silicon layer 2-4, with a thickness of 5 nm.
[0082] P-type doped layer, and the P-type doped layer is disposed on the top side of the first group of intrinsic amorphous silicon layers.
[0083] The P-type doped layer is a laminated structure pointing from the top side of the first group of intrinsic amorphous silicon layers towards the electrode direction, including a first P-type doped layer 3-1 which is in contact with the first group of intrinsic amorphous silicon layers. The first P-type doped layer 3-1 is an integral layered structure formed by depositing trimethylboron gas, and at least two integral layered structures with increasing boron doping concentration formed by depositing trimethylboron and diborane gases are disposed on the first P-type doped layer 3-1. In this embodiment, the first P-type doped layer 3-1 is a boron lightly doped integral layered structure formed by depositing trimethylboron gas. It further includes: a second P-type doped layer 3-2 which is a boron lightly doped integral layered structure formed by depositing trimethylboron and diborane gases; a third P-type doped layer 3-3 which is a boron heavily doped integral layered structure formed by depositing trimethylboron and diborane gases. The thicknesses of the first P-type doped layer 3-1, the second P-type doped layer 3-2, and the third P-type doped layer 3-3 are all 5 nm; the thickness of the P-type doped layer is 15 nm.
[0084] N-type doped layer 4, and the N-type doped layer 4 is disposed on the bottom side of the second group of intrinsic amorphous silicon layers; the thickness of the N-type doped layer 4 is 10 nm.
[0085] Transparent conductive layer 5, and the transparent conductive layer 5 is respectively disposed on the top side of the P-type doped layer and the bottom side of the N-type doped layer 4, and the electrode 6 is disposed on the surface of the transparent conductive layer 5; the thickness of the transparent conductive layer 5 is 100 nm.
[0086] A heterojunction solar cell of this embodiment has an emitter structure with low defect state density and high optical bandgap, improving the photoelectric conversion performance of the heterojunction solar cell.
[0087] Embodiment 2
[0088] An efficient silicon heterojunction solar cell of this embodiment is basically the same as that of Embodiment 1, and the differences are as follows:
[0089] Third intrinsic amorphous silicon layer 2-3, and the third intrinsic amorphous silicon layer 2-3 is a laminated passivation layer formed by depositing silane and hydrogen gases, with a thickness of 6 nm.
[0090] In this embodiment, the third intrinsic amorphous silicon layer 2-3 includes the following three-layer structure arranged in sequence from the top side of the second intrinsic amorphous silicon layer 2-2 towards the electrode direction:
[0091] The first passivation layer has a hydrogen and silane gas flow ratio of 3 and a thickness of 1 nm; the second passivation layer has a hydrogen and silane gas flow ratio of 5 and a thickness of 2 nm; the third passivation layer has a hydrogen and silane gas flow ratio of 10 and a thickness of 3 nm.
[0092] Example 3
[0093] A heterojunction solar cell according to this embodiment includes a substrate sheet and electrodes 6 provided on the top and bottom surfaces of the substrate sheet. The substrate sheet includes:
[0094] The single crystal silicon substrate layer 1 in this embodiment is an N-type single crystal silicon substrate layer, with a size of 156.75 mm and a thickness of 180 μm.
[0095] The two groups of intrinsic amorphous silicon layers include a first group of intrinsic amorphous silicon layers arranged on the top side of the single crystal silicon substrate layer 1 and a second group of intrinsic amorphous silicon layers arranged on the bottom side of the single crystal silicon substrate layer.
[0096] The first group of intrinsic amorphous silicon layers includes the following three-layer structure arranged in sequence from the top side of the single crystal silicon substrate layer to the electrode direction:
[0097] The first intrinsic amorphous silicon layer 2 - 1 has a thickness of 3 nm.
[0098] The second intrinsic amorphous silicon layer 2-2, the first intrinsic amorphous silicon layer 2-1 and the second intrinsic amorphous silicon layer 2-2 are both integral layered passivation structures formed by silane gas deposition, the second intrinsic amorphous silicon layer 2-2 is denser than the first intrinsic amorphous silicon layer 2-1, and has a thickness of 3nm.
[0099] The third intrinsic amorphous silicon layer 2 - 3 is a stacked passivation layer deposited by a gas containing silane and hydrogen, and has a thickness of 9 nm.
[0100] In this embodiment, the third intrinsic amorphous silicon layer 2-3 includes the following three-layer structure arranged in sequence from the top side of the second intrinsic amorphous silicon layer 2-2 toward the electrode:
[0101] The first passivation layer has a hydrogen and silane gas flow ratio of 3; the second passivation layer has a hydrogen and silane gas flow ratio of 5; the third passivation layer has a hydrogen and silane gas flow ratio of 10, and the thicknesses of both layers are 3 nm.
[0102] The thickness of the N-type doping layer 4 is 8 nm. The thickness of the light-transmitting conductive layer 5 is 100 nm.
[0103] The second group of intrinsic amorphous silicon layers includes the following two-layer structure arranged in sequence from the bottom side of the single crystal silicon substrate layer to the electrode direction:
[0104] The fourth intrinsic amorphous silicon layer 2 - 4 has a thickness of 3 nm.
[0105] The fifth intrinsic amorphous silicon layer 2-5, the fourth intrinsic amorphous silicon layer 2-4 and the fifth intrinsic amorphous silicon layer 2-5 are both integral layered passivation structures formed by deposition of silane-containing gas, the fifth intrinsic amorphous silicon layer 2-5 is denser than the fourth intrinsic amorphous silicon layer 2-4, and has a thickness of 3nm.
[0106] A P-type doped layer is disposed on a top side of the first group of intrinsic amorphous silicon layers.
[0107] The P-type doped layer is a stacked structure extending from the top side of the first group of intrinsic amorphous silicon layers toward the electrode, and includes a first P-type doped layer 3-1, the first P-type doped layer 3-1 being in contact with the first group of intrinsic amorphous silicon layers. The first P-type doped layer 3-1 is a monolithic layered structure deposited with trimethylboron gas, and at least two monolithic layers with increasing boron doping concentrations deposited with trimethylboron and diborane gases are disposed on the first P-type doped layer 3-1. In this embodiment, the first P-type doped layer 3-1 is a monolithic layered structure lightly doped with boron deposited with trimethylboron gas. The structure also includes: a second P-type doped layer 3-2, the second P-type doped layer 3-2 being a monolithic layered structure lightly doped with boron deposited with trimethylboron and diborane gases; and a third P-type doped layer 3-3, the third P-type doped layer 3-3 being a monolithic layered structure heavily doped with boron deposited with trimethylboron and diborane gases. The thickness of the first P-type doping layer 3 - 1 , the second P-type doping layer 3 - 2 and the third P-type doping layer 3 - 3 are all 5 nm; the thickness of the P-type doping layer is 15 nm.
[0108] An N-type doping layer 4 is provided on the bottom side of the second group of intrinsic amorphous silicon layers; the thickness of the N-type doping layer 4 is 10 nm.
[0109] The light-transmitting conductive layer 5 is respectively arranged on the top side of the P-type doped layer and the bottom side of the N-type doped layer 5, and the electrode 6 is arranged on the surface of the light-transmitting conductive layer 5; the thickness of the light-transmitting conductive layer 5 is 100nm.
[0110] A heterojunction solar cell of this embodiment has an emitter structure with low defect state density and high optical band gap, thereby improving the photoelectric conversion performance of the heterojunction solar cell.
[0111] Example 4
[0112] This embodiment is a heterojunction solar cell and a preparation method for implementing embodiment 1, comprising the following steps:
[0113] (1) A single crystal silicon substrate layer with a size of 156.75 mm and a thickness of 180 μm is subjected to texturing and cleaning. In this embodiment, the single crystal silicon substrate layer is an N-type single crystal silicon wafer.
[0114] (2) A first group of intrinsic amorphous silicon layers is deposited on the top side (P-side) of the single crystal silicon substrate layer by PECVD equipment. The first group of intrinsic amorphous silicon layers includes a first intrinsic amorphous silicon layer 2-1, a second intrinsic amorphous silicon layer 2-2 and a third intrinsic amorphous silicon layer 2-3.
[0115] The first intrinsic amorphous silicon layer 2-1 refers to a passivation layer deposited on the top surface (P surface) of the single crystal silicon substrate layer 1 using pure silane SiH4 at a high speed (deposition speed of 0.6 to 1.2 nm / s) with a thickness of 0.5 to 5 nm;
[0116] The second intrinsic amorphous silicon layer 2-2 refers to a passivation layer deposited on the top side of the first intrinsic amorphous silicon layer 2-1 using pure silane SiH4 at a low speed (deposition speed of 0.2 to 0.6 nm / s) and has a thickness of 0.5 to 5 nm.
[0117] The third intrinsic amorphous silicon layer 2-3 refers to a stacked passivation layer deposited at a low speed using silane SiH4 and hydrogen on the top side 2-2 of the second intrinsic amorphous silicon layer. The stacked passivation layer includes three passivation layers deposited using different [H2] / [SiH4] gas flow ratios. The gas flow ratio of the first passivation layer is 1 to 5, and the thickness is 0.5 to 5 nm. The gas flow ratio of the second passivation layer is 5 to 10, and the thickness is 0.5 to 5 nm. The gas flow ratio of the third passivation layer is 10 to 15, and the thickness is 0.5 to 5 nm.
[0118] The third intrinsic amorphous silicon layer 2-3 adopts a stacked structure, and its functions include passivating the silicon wafer surface and preventing dopant diffusion into the inner layer structure. The three layers of the stacked structure adopt different gas flow ratios = [SiH4] / [H2]. The gas flow ratio of the first passivation layer is [H2] / [SiH4]=1~5, the gas flow ratio of the second passivation layer is [H2] / [SiH4]=5~10, and the gas flow ratio of the third passivation layer is [H2] / [SiH4]=10~15. When the same gas flow rate of SiH4 is passed through the chamber, the greater the relative ratio of its gas flow to the H2 gas flow in the chamber, the lower the deposition rate of the film layer. The lower the deposition rate of the film layer, the denser the deposited amorphous silicon film. Therefore, the density of the stacked structure increases from the inside to the outside, which can effectively prevent B ion diffusion. The stacked structure is not limited to three layers, but many layers, as long as the gradually increasing density is maintained, but also some passivation performance must be provided.
[0119] (3) Deposit a second group of intrinsic amorphous silicon layers on the bottom side (N side) of the single-crystalline silicon substrate layer 1 of the battery through a PECVD device, including a fourth intrinsic amorphous silicon layer 2-4 and a fifth intrinsic amorphous silicon layer 2-5. The fourth intrinsic amorphous silicon layer 2-4 refers to a passivation layer deposited on the N side of the single-crystalline silicon substrate layer 1 at a high speed (deposition rate of 0.6 - 1.2 nm / s) using pure silane SiH4, with a thickness of 0.5 - 5 nm; the fifth intrinsic amorphous silicon layer 2-5 refers to a passivation layer deposited on the bottom surface of the fourth intrinsic amorphous silicon layer 2-4 at a low speed using silane SiH4 and hydrogen, with a gas flow ratio of 5 - 10 and a thickness of 0.5 - 5 nm.
[0120] (4) Use plasma-enhanced chemical vapor deposition to deposit and prepare an N-type amorphous silicon layer, i.e., an N-type doped layer 4, on the bottom side of the second group of intrinsic amorphous silicon layers, with a thickness of 5 - 10 nm.
[0121] (5) Use plasma chemical vapor deposition to deposit and prepare a P-type amorphous silicon layer, i.e., a P-type doped layer, on the top side of the first group of intrinsic amorphous silicon layers, with a total thickness of 10 - 20 nm.
[0122] Regarding the P-type doped layer, the setting of the thickness is less important than the flow ratio (using plasma chemical vapor deposition to prepare the P-type amorphous silicon layer, with a total thickness of 10 - 20 nm; assuming the SiH4 gas flow is 1, then deposit the first P-type doped layer 3-1 on the top side of the first group of intrinsic amorphous silicon layers, which is a lightly doped layer formed by doping with trimethylboron gas, with a gas flow ratio [TMB] / [SiH4] of 1 - 5 and a thickness of 2 - 10 nm; deposit the second P-type doped layer 3-2 on the top side of the first P-type doped layer 3-1, which is doped with a gas flow ratio [TMB] / [B2H6] of 1 - 5 to form a doped layer, with a thickness of 2 - 10 nm; deposit the third P-type doped layer 3-3 on the top side of the second P-type doped layer 3-2, which is doped with a [TMB] / [B2H6] volume ratio of 0.2 - 1 to form a heavily doped layer, with a thickness of 2 - 10 nm.
[0123] The deposition conditions for the first P-type doped layer 3-1 are: the gas flow of SiH4 (silane gas) is 200 - 400 sccm, TMB (trimethylboron gas) is 600 - 2000 sccm, H2 is 200 - 1000 sccm, the pressure range is 0.5 - 2 mbar, the radio frequency power range is 1000 - 3000 W, the thickness is 2 - 10 nm, and the temperature is 190 - 200 °C;
[0124] The deposition conditions of the second P-type doping layer 3-1 are as follows: the gas flow rates are 200 - 400 sccm for B2H6, 200 - 2000 sccm for TMB, 200 - 500 sccm for SiH4, and 200 - 1000 sccm for H2; the pressure range is 0.5 - 2 mbar; the radio frequency power range is 1000 - 2000 W; the thickness is 2 - 10 nm; and the temperature is 190 - 200 °C.
[0125] The deposition conditions of the third P-type doping layer 3-1 are as follows: the gas flow rates are 200 - 400 sccm for TMB, 200 - 2000 sccm for B2H6 (diborane), 200 - 500 sccm for SiH4, and 200 - 1000 sccm for H2; the pressure range is 0.5 - 2 mbar; the radio frequency power range is 1000 - 2000 W; the thickness is 2 - 10 nm; and the temperature is 190 - 200 °C.
[0126] In this embodiment, the two gas flow ratios of the first P-type doping layer 3-1, the second P-type doping layer 3-2, and the third P-type doping layer 3-3 are 1, 1, and 0.5 respectively, which are the optimal values. The thicknesses of the first P-type doping layer 3-1, the second P-type doping layer 3-2, and the third P-type doping layer 3-3 are 2 nm, 3 nm, and 5 nm respectively, which are the optimal values. Regarding the thickness, it follows the principle of gradually increasing, with the innermost layer being the thinnest and the outermost layer being the thickest.
[0127] (6) Deposit a transparent conductive layer 5 (TCO conductive film) with a thickness of 90 - 110 nm on the N / P surfaces of the battery through a PVD device.
[0128] (7) Form the front and back Ag electrodes by screen printing.
[0129] (8) Through curing, a good ohmic contact is formed between the silver grid lines and the TCO conductive film.
[0130] (9) Test the electrical performance of the battery.
[0131] The heterojunction solar cell prepared in this embodiment is as Figure 2 shown.
[0132] Comparative Example 1
[0133] The structure of the heterojunction cell in the prior art is as Figure 1 shown:
[0134] 1. First, perform texturing and cleaning treatment on the N-type monocrystalline silicon wafer.
[0135] 2. Deposit an intrinsic amorphous silicon and an N-type amorphous silicon thin film on the front side of the silicon wafer. The front intrinsic amorphous silicon layer includes two layers:
[0136] The first layer: Deposited with pure SiH4 gas at a rate of 0.7 nm / s and a thickness of 3 nm;
[0137] The second layer: Two gases, SiH4 and H2, with a flow rate ratio of SiH4:H2 = 1:10, a deposition rate of 1.2 nm / s, and a thickness of 5 nm. The N-type amorphous silicon thin film is a mixture of SiH4, H2, and PH3 gases, with a deposition rate of 1.4 nm / s and a thickness of 8 nm.
[0138] 3. Deposit intrinsic amorphous silicon and P-type amorphous silicon thin films on the back of the silicon wafer. The intrinsic amorphous silicon layer on the front includes two layers: The first layer: Deposited with pure SiH4 gas at a rate of 0.75 nm / s and a thickness of 4 nm; The second layer: Two gases, SiH4 and H2, with a flow rate ratio of SiH4:H2 = 1:10, a deposition rate of 1.2 nm / s, and a thickness of 6 nm. The P-type amorphous silicon thin film is a mixture of SiH4, H2, and B2H6 gases, with a deposition rate of 2 nm / s and a thickness of 10 nm.
[0139] 4. Deposit a transparent conductive thin film on the amorphous silicon. The thickness of the transparent conductive thin film is 90 nm.
[0140] 5. Finally, fabricate metal electrodes on the transparent conductive thin film.
[0141] 6. Test the battery efficiency and electrical parameters.
[0142] Table 1 Comparison of the performance of heterojunction solar cells prepared in the comparative examples and examples
[0143]
[0144] It can be seen from Table 1 that:
[0145] 1. From the aspect of short-circuit current Isc, the data of the experimental group has an increase of about 10 mA compared with the control group, indicating that the setting of the P-type doping layer in this application can improve the conductivity of the film layer and reduce the current loss during current transmission; an increase in the bandgap width of 0.1 - 0.3 eV will act on the current and increase it.
[0146] 2. From the aspect of open-circuit voltage Voc, there is an increase of 0.2 - 0.5 mV, indicating that the setting of the intrinsic amorphous silicon layers 2-1, 2-2, and 2-3 in this application can play a role in improving the passivation performance, that is, reducing the influence of B atom diffusion to a certain extent.
[0147] 3. From the aspect of fill factor Fff, the efficiency improvement is mainly due to the increase in FF. Compared with the comparative example, the FF increases by 0.14 - 0.33%, and the increase in its FF is mainly due to the better passivation effect. In addition, it also benefits from the reduction of the contact resistance between the film layers. It shows that the structural design of this invention can indeed reduce the influence of B atom recombination to improve the passivation performance, and the three-layer stack setting of the P-type doping layer can reduce the contact resistance between the film layers and reduce the resistance loss.
Claims
1. A heterojunction solar cell, the heterojunction solar cell comprising a substrate sheet and electrodes provided on the top surface and the bottom surface of the substrate sheet, characterized in that: The substrate sheet includes: A single-crystalline silicon substrate layer; Two groups of intrinsic amorphous silicon layers, where the two groups of intrinsic amorphous silicon layers include a first group of intrinsic amorphous silicon layers disposed on the top side of the single-crystalline silicon substrate layer and a second group of intrinsic amorphous silicon layers disposed on the bottom side of the single-crystalline silicon substrate layer; A P-type doped layer, and the P-type doped layer is disposed on the top side of the first group of intrinsic amorphous silicon layers; An N-type doped layer, and the N-type doped layer is disposed on the bottom side of the second group of intrinsic amorphous silicon layers; A transparent conductive layer, and the transparent conductive layer is respectively disposed on the top side of the P-type doped layer and the bottom side of the N-type doped layer, and the electrode is disposed on the surface of the transparent conductive layer; The P-type doped layer is a stacked structure pointing from the top side of the first group of intrinsic amorphous silicon layers towards the electrode direction, including a first P-type doped layer which contacts the first group of intrinsic amorphous silicon layers. The first P-type doped layer is an integral layer structure formed by depositing trimethylboron gas, and at least two integral layer structures with increasing boron doping concentration formed by depositing trimethylboron and diborane gases are disposed on the first P-type doped layer; The P-type doped layer includes the following three-layer structure arranged in sequence from the top side of the first group of intrinsic amorphous silicon layers towards the electrode direction: A first P-type doped layer, and the first P-type doped layer is a boron lightly doped integral layer structure formed by depositing trimethylboron gas; A second P-type doped layer, and the second P-type doped layer is a boron lightly doped integral layer structure formed by depositing trimethylboron and diborane gases; A third P-type doped layer, and the third P-type doped layer is a boron heavily doped integral layer structure formed by depositing trimethylboron and diborane gases; In the preparation of the first P-type doped layer, the gas flow ratio of trimethylboron to silane is 1 to 5; in the preparation of the second P-type doped layer, the gas flow ratio of trimethylboron to diborane is 1 to 5; when preparing the third P-type doped layer, the volume ratio of trimethylboron to diborane gas is 0.2 to 1.
2. The heterojunction solar cell according to claim 1, wherein: The thicknesses of the first P-type doped layer, the second P-type doped layer, and the third P-type doped layer are respectively 2 to 10 nm; the thickness of the P-type doped layer is 10 to 20 nm.
3. The heterojunction solar cell according to claim 1, wherein: The first group of intrinsic amorphous silicon layers includes the following three-layer structure arranged in sequence from the top side of the single-crystalline silicon substrate layer towards the electrode direction: A first intrinsic amorphous silicon layer, A second intrinsic amorphous silicon layer. Both the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer are integral layer passivation structures formed by depositing silane gas, and the second intrinsic amorphous silicon layer has higher density than the first intrinsic amorphous silicon layer; A third intrinsic amorphous silicon layer, and the third intrinsic amorphous silicon layer is a stacked passivation layer formed by depositing silane and hydrogen gases.
4. A heterojunction solar cell according to claim 3, characterized in that: The third intrinsic amorphous silicon layer is at least three integral layer passivation structures with increasing density arranged in sequence from the top side of the second intrinsic amorphous silicon layer towards the electrode direction.
5. The heterojunction solar cell according to claim 3, wherein: The second group of intrinsic amorphous silicon layers includes the following two-layer structure arranged in sequence from the bottom side of the single-crystalline silicon substrate layer towards the electrode direction: A fourth intrinsic amorphous silicon layer, The fifth intrinsic amorphous silicon layer. Both the fourth intrinsic amorphous silicon layer and the fifth intrinsic amorphous silicon layer are integral layered passivation structures formed by depositing silane gas, and the fifth intrinsic amorphous silicon layer has a higher density than the fourth intrinsic amorphous silicon layer.
6. The heterojunction solar cell according to claim 5, characterized in that: The thicknesses of the first intrinsic amorphous silicon layer, the second intrinsic amorphous silicon layer, the third intrinsic amorphous silicon layer, the fourth intrinsic amorphous silicon layer, and the fifth intrinsic amorphous silicon layer are 0.5 - 5 nm respectively.
7. A heterojunction solar cell according to any one of claims 1-6, characterized in that: The thickness of the N-type doped layer is 5 - 10 nm; the thickness of the transparent conductive layer is 90 - 110 nm.
8. A heterojunction solar cell according to claim 7, characterized in that: The single-crystalline silicon substrate layer is an N-type single-crystalline silicon substrate layer.
9. The preparation method of the heterojunction solar cell according to any one of claims 1-8, characterized in that: Including the following steps: Set the single-crystalline silicon substrate layer; Set a first group of intrinsic amorphous silicon layers on the top side of the single-crystalline silicon substrate layer, and set a second group of intrinsic amorphous silicon layers on the bottom side of the single-crystalline silicon substrate layer; Set an N-type doped layer on the bottom side of the second group of intrinsic amorphous silicon layers; Set a P-type doped layer on the top side of the first group of intrinsic amorphous silicon layers; Set a transparent conductive layer on the top side of the P-type doped layer and the bottom side of the N-type doped layer; Apply electrodes on the exposed surfaces of the transparent conductive layer; The preparation of the P-type doped layer includes: depositing a first P-type doped layer using trimethylboron-containing gas on the first group of intrinsic amorphous silicon layers, and depositing at least two integral layered structures with increasing boron doping concentration using trimethylboron and diborane gas on the first P-type doped layer.
10. The manufacturing method of a heterojunction solar cell according to claim 9, characterized in that: Setting the P-type doped layer includes the following steps: Deposit a first P-type doped layer with lightly doped boron using a hydrogen-containing atmosphere, silane, and trimethylboron gas; Deposit a second P-type doped layer with lightly doped boron using a hydrogen-containing atmosphere, silane, trimethylboron, and diborane gas; Deposit a third P-type doped layer with heavily doped boron using a hydrogen-containing atmosphere, silane, trimethylboron, and diborane gas.
11. The preparation method of a heterojunction solar cell according to claim 9, wherein: Setting the first group of intrinsic amorphous silicon layers includes the following steps: High-speed deposit a first intrinsic amorphous silicon layer on the top side of the single-crystalline silicon substrate layer using silane gas; Low-speed deposit a second intrinsic amorphous silicon layer on the first intrinsic amorphous silicon layer using silane gas; Deposit a third intrinsic amorphous silicon layer with a laminated passivation structure on the second intrinsic amorphous silicon layer using different hydrogen and silane gas flow ratios.
12. The preparation method of a heterojunction solar cell according to claim 11, characterized in that: The third intrinsic amorphous silicon layer includes the following three-layer structure arranged in sequence from the top side of the second intrinsic amorphous silicon layer towards the electrode direction: The first passivation layer, and the hydrogen and silane gas flow ratio of the first passivation layer is 1 - 5; The second passivation layer, and the hydrogen and silane gas flow ratio of the second passivation layer is 5 - 10; The third passivation layer, and the hydrogen and silane gas flow ratio of the third passivation layer is 10 - 15.
13. The preparation method of a heterojunction solar cell according to claim 9, characterized in that: Setting the second group of intrinsic amorphous silicon layers includes the following steps: High-speed deposit a fourth intrinsic amorphous silicon layer on the bottom side of the single-crystalline silicon substrate layer using silane gas; Low-speed deposit a fifth intrinsic amorphous silicon layer on the fourth intrinsic amorphous silicon layer using hydrogen and silane gas.
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