Solid-state imaging device, electronic device, and method for manufacturing solid-state imaging device

Abstract

This solid-state imaging device (1) includes one or more photoelectric conversion layers (2), a through electrode (50), and a connection pad (52). The one or more photoelectric conversion layers (2) are provided on the side of one main surface of a semiconductor substrate (10) as a light incident surface. The through electrode (50) is provided in a pixel region and has one end connected to the photoelectric conversion layer (2). The through electrode (50) penetrates the semiconductor substrate (10) from the top to the bottom and transports electric charges obtained by photoelectric conversion by the photoelectric conversion layer (2) to the side of the other main surface of the semiconductor substrate (10). The connection pad (52) is provided on the same layer as a gate (Ga, Gr, G1, and G2) of a transistor (AMP, RST, TG1, and TG2) provided on the side of the other main surface of the semiconductor substrate (10), and the other end of the through electrode (50) is connected to the connection pad.

Description

TECHNICAL FIELD

[0001] The present application relates to a solid-state imaging device, an electronic apparatus, and a manufacturing method of a solid-state imaging device. BACKGROUND

[0002] There is a back-illuminated solid-state imaging device including a photoelectric conversion layer provided on the side of one main surface (rear surface) serving as a light incident surface of a semiconductor substrate, and a transistor provided on the side of the other main surface (front surface) of the semiconductor substrate and processing electric charges photoelectrically converted by the photoelectric conversion layer.

[0003] The back-illuminated solid-state imaging device includes a through electrode penetrating the front surface and the rear surface of the semiconductor substrate, which is used to transfer electric charges photoelectrically converted by the photoelectric conversion layer from the rear surface side to the front surface side of the semiconductor substrate (see, for example, Patent Literature 1).

[0004] One end of the through electrode is connected to the photoelectric conversion layer, and the other end is connected to a connection pad formed on a wiring layer buried in an interlayer insulating film stacked on the front surface side of the semiconductor substrate. The through electrode is connected to the above-described transistor or the like via the connection pad.

[0005] LIST OF CITATIONS

[0006] PATENT LITERATURE

[0007] Patent Literature 1: Japanese Patent Application Publication No. 2017-73436 SUMMARY

[0008] PROBLEMS TO BE SOLVED BY THE INVENTION

[0009] However, although the miniaturization of the solid-state imaging device has been promoted, in order to achieve improvement in imaging performance, there is a tendency to demand a thicker film. As the aspect, which is the ratio of the depth to the width of the through electrode, is correspondingly made higher, the level of difficulty of the formation process of the through electrode is made higher, which has become a problem.

[0010] In view of the foregoing, the present application proposes a solid-state imaging device, an electronic apparatus, and a manufacturing method of a solid-state imaging device, which can suppress the level of difficulty of the formation process of the through electrode to a low level.

[0011] SOLUTION TO PROBLEM

[0012] According to the present application, there is provided a solid-state imaging device. The solid-state imaging device according to the present application includes one or more photoelectric conversion layers, a through electrode, and a connection pad. The one or more photoelectric conversion layers are provided on one main surface side of a semiconductor substrate serving as a light incident surface. The through electrode is provided in a pixel region, one end of the through electrode is connected to the photoelectric conversion layer and penetrates a front surface and a rear surface of the semiconductor substrate, and the through electrode transports electric charges photoelectrically converted by the photoelectric conversion layer to the other main surface side of the semiconductor substrate. The connection pad is provided on the same layer as a gate electrode of a transistor provided on the other main surface side of the semiconductor substrate, and the other end of the through electrode is connected to the connection pad. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 is a cross-sectional explanatory view of a solid-state imaging device according to the present application.

[0014] Figure 2 is an explanatory view showing a manufacturing process of a solid-state imaging device according to the present application.

[0015] Figure 3 is an explanatory view showing a manufacturing process of a solid-state imaging device according to the present application.

[0016] Figure 4 is an explanatory view showing a manufacturing process of a solid-state imaging device according to the present application.

[0017] Figure 5 is an explanatory view showing a manufacturing process of a solid-state imaging device according to the present application.

[0018] Figure 6 is an explanatory view showing a manufacturing process of a solid-state imaging device according to the present application.

[0019] Figure 7 is an explanatory view showing a manufacturing process of a solid-state imaging device according to the present application.

[0020] Figure 8 is an explanatory view showing an example of a layout structure of a solid-state imaging device according to the present application.

[0021] Figure 9 is an explanatory view showing an example of a circuit structure of a solid-state imaging device according to the present application.

[0022] Figure 10 is a plan explanatory view of a solid-state imaging device according to the present application.

[0023] Figure 11 is a cross-sectional explanatory view of a solid-state imaging device according to the present application.

[0024] Figure 12 is a cross-sectional explanatory diagram showing Modification 1 of the solid-state imaging device according to the present application.

[0025] Figure 13 is a planar explanatory diagram showing a connection pad of Modification 1 of the solid-state imaging device according to the present application.

[0026] Figure 14 is a cross-sectional explanatory diagram showing Modification 2 of the solid-state imaging device according to the present application.

[0027] Figure 15 is a planar explanatory diagram showing a connection pad of Modification 2 of the solid-state imaging device according to the present application.

[0028] Figure 16 is a cross-sectional explanatory diagram showing Modification 3 of the solid-state imaging device according to the present application.

[0029] Figure 17 is a cross-sectional explanatory diagram showing Modification 4 of the solid-state imaging device according to the present application.

[0030] Figure 18 is an explanatory diagram showing an example of a configuration of an electronic apparatus according to the present application.

[0031] Figure 19 is a planar explanatory diagram showing Modification 1 of the solid-state imaging device according to the present application.

[0032] Figure 20 is a cross-sectional explanatory diagram showing Modification 1 of the solid-state imaging device according to the present application.

[0033] Figure 21 is a planar explanatory diagram showing Modification 2 of the solid-state imaging device according to the present application.

[0034] Figure 22 is a diagram showing an example of a schematic configuration of an endoscope surgery system.

[0035] Figure 23 is a block diagram showing an example of a functional configuration of a camera head and a camera control unit (CCU).

[0036] Figure 24 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0037] Figure 25 is an explanatory diagram showing an example of a mounting position of an outside-vehicle information detecting portion and an imaging unit. DETAILED DESCRIPTION

[0038] Embodiments of the present application will be described in detail below with reference to the accompanying drawings. In addition, in the embodiments described below, the same parts are denoted by the same reference numerals, and description thereof will be omitted.

[0039] In addition, the present application will be described in accordance with the order of the following items.

[0040] 1. Cross-sectional structure of solid-state imaging device

[0041] 2. Method for manufacturing solid-state imaging device

[0042] 3. Example of layout structure of solid-state imaging device

[0043] 4. Example of circuit structure of solid-state imaging device

[0044] 5. Definition of pixel region

[0045] 6. Modified example 1 of solid-state imaging device

[0046] 7. Modified example 2 of solid-state imaging device

[0047] 8. Modified example 3 of solid-state imaging device

[0048] 9. Modified example 4 of solid-state imaging device

[0049] 10. Configuration of electronic apparatus including solid-state imaging device

[0050] 11. Modified example 1 and modified example 2 of solid-state imaging device

[0051] 12. Application example applied to endoscope surgery system

[0052] 13. Application example applied to mobile body

[0053] [1. Cross-sectional structure of solid-state imaging device]

[0054] Figure 1 is a cross-sectional explanatory view of a solid-state imaging device according to the present application. Note that, Figure 1 A cross section of a solid-state imaging device 1 corresponding to one pixel among a plurality of solid-state imaging devices arranged in a matrix form in a pixel region of a back-illuminated solid-state imaging device that captures an image is schematically shown.

[0055] As Figure 1 shown, the solid-state imaging device 1 includes, for example, a photoelectric conversion layer 2 provided on the side of one main surface (hereinafter, explained as a rear surface) of a P-type semiconductor substrate 10 serving as a light incident surface, and a first photoelectric conversion element PD1 and a second photoelectric conversion element PD2 provided inside the semiconductor substrate 10.

[0056] The photoelectric conversion layer 2 includes a lower transparent electrode 21, an upper transparent electrode 23, and a photoelectric conversion film 22 arranged between the lower transparent electrode 21 and the upper transparent electrode 23. The photoelectric conversion film 22 has, for example, sensitivity to green light and converts incident green light into an amount of electric charge corresponding to the intensity of the received light.

[0057] The photoelectric conversion layer 2 is stacked on the semiconductor substrate 10 via insulating films 41 and 42. Further, a passivation film 31 and a planarization film 32 are stacked on the photoelectric conversion layer 2. Further, an on-chip lens 33 is provided at a position on the planarization film 32 facing the first and second photoelectric conversion elements PD1 and PD2. The on-chip lens 33 focuses incident light to the first and second photoelectric conversion elements PD1 and PD2.

[0058] The first photoelectric conversion element PD1 is, for example, a region doped with an N-type impurity and has sensitivity to red light. The first photoelectric conversion element PD1 converts incident red light into an amount of electric charge corresponding to the intensity of the received light. The second photoelectric conversion element PD2 is, for example, a region doped with an N-type impurity and has sensitivity to blue light. The second photoelectric conversion element PD2 converts incident blue light into an amount of electric charge corresponding to the intensity of the received light.

[0059] Further, the solid-state imaging device 1 includes, on the other main surface (hereinafter, described as a front surface) of the semiconductor substrate 10, a plurality of transistors such as an amplification transistor AMP, a reset transistor RST, and transfer transistors TG1 and TG2.

[0060] Note that an example of the layout structure of these transistors and other transistors included in the solid-state imaging device 1 will be described later with reference to Figure 4 an example of the circuit structure will be described later with reference to Figure 9 The amplification transistor AMP includes a gate electrode Ga, a source electrode 11a, and a drain electrode 11b. The amplification transistor AMP amplifies electric charge photoelectrically converted by the photoelectric conversion layer 2.

[0061] The reset transistor RST includes a gate electrode Gr, a floating diffusion portion FD serving as a source electrode, and a drain electrode 11c. The reset transistor RST resets the floating diffusion portion FD that temporarily holds electric charge photoelectrically converted by the photoelectric conversion layer 2.

[0062] The transfer transistor TG1 includes a gate electrode G1, the first photoelectric conversion element PD1 serving as a source electrode, and a floating diffusion portion FD1 serving as a drain electrode. The transfer transistor TG1 transfers electric charge photoelectrically converted by the first photoelectric conversion element PD1 from the first photoelectric conversion element PD1 to the floating diffusion portion FD1.

[0063] The transfer transistor TG2 includes a gate G2, a second photoelectric conversion element PD2 serving as the source, and a floating diffusion section FD2 serving as the drain. The transfer transistor TG2 transfers the charge converted by the second photoelectric conversion element PD2 from the second photoelectric conversion element PD2 to the floating diffusion section FD2.

[0064] The floating diffusion sections FD, FD1, and FD2, the source electrode 11a, and the drain electrodes 11b and 11c are regions doped with N-type impurities and are disposed on the front surface of the semiconductor substrate 10. Figure 1 The interior of the bottom surface.

[0065] Gates Ga, Gr, and G1 are disposed on the front surface of the semiconductor substrate 10. Figure 1 On the top layer inside the interlayer insulating film 45 on the bottom surface side. The gate G2 extends upward from the top layer inside the interlayer insulating film 45 to the second photoelectric conversion element PD2 inside the semiconductor substrate 10. A gate insulating film 43 is disposed between these gates Ga, Gr, G1 and G2 and the semiconductor substrate 10.

[0066] Furthermore, a contact etch stop layer (CESL) film 44 is provided between the gates Ga, Gr, G1, and G2 and the interlayer insulating film 45. Additionally, a metal wiring layer 53 is provided inside the interlayer insulating film 45 on the lower side of the gates Ga, Gr, and G1.

[0067] In this way, in the solid-state imaging element 1, the processing is performed on the rear surface of the semiconductor substrate 10. Figure 1 The photoelectric conversion layer 2 on the upper surface of the semiconductor substrate 10 contains a photoelectric conversion charge amplification transistor AMP, a reset transistor RST, etc., disposed on the front surface of the semiconductor substrate 10. Figure 1 (The bottom surface of the middle) side.

[0068] Therefore, the solid-state imaging element 1 includes a through electrode 50 in the pixel region, which is connected at one end to the photoelectric conversion layer 2 and penetrates the front and rear surfaces of the semiconductor substrate 10, and transfers the charge photoelectrically converted by the photoelectric conversion layer 2 to the front surface side of the semiconductor substrate 10. Note that one end of the through electrode 50 ( Figure 1 The upper end of the electrode is connected to the lower transparent electrode 21 of the photoelectric conversion layer 2 via a contact hole 51.

[0069] Here, the typical through electrode is connected at the other end to a connection pad formed in a wiring layer, which is buried on the wiring layer within an interlayer insulating film stacked on the front surface side of the semiconductor substrate, and the through electrode is connected to the gate and floating diffuser of the amplifying transistor via the connection pad.

[0070] This general through electrode is formed by forming a through-hole reaching a connection pad formed on a wiring layer in an interlayer insulating film stacked on the front surface side from the rear surface of the semiconductor substrate, and a conductive member is provided in the through-hole.

[0071] However, although the solid-state imaging device has been miniaturized in recent years, in order to achieve improvement in imaging performance, there is a tendency to demand a thicker film. As the aspect ratio, which is the ratio of the depth to the width of the through electrode, correspondingly becomes higher, the difficulty level of the formation process of the through electrode becomes higher, which has become a problem.

[0072] Specifically, in the case where the through electrode is arranged in the pixel region of the back-illuminated solid-state imaging device, if the percentage of the area occupied by the through electrode becomes larger, the imaging performance of the solid-state imaging device deteriorates. Therefore, it is necessary to miniaturize the through electrode and the connection pad on the front surface side of the semiconductor substrate connected to the through electrode with respect to the pixel size.

[0073] However, in recent years, although the pixel size of the back-illuminated solid-state imaging device is reduced to several micrometers, in order to improve the characteristics of the solid-state imaging device, there is a tendency to maintain or thicken the film thickness of the semiconductor substrate. If the through electrode is sufficiently miniaturized to be smaller than the pixel size, a structure of an ultra-high aspect ratio can be obtained.

[0074] Therefore, the difficulty level of the process of forming a through-hole having an ultra-high aspect ratio structure that penetrates the front surface and the rear surface of the semiconductor substrate and further reaches a connection pad buried in the interlayer insulating film by dry etching has been increasingly high. Against this background, the above general through electrode has the following two problems.

[0075] The first problem is that since the interlayer insulating film needs to be removed from the semiconductor substrate to the wiring layer in the process of processing the interlayer insulating film by dry etching and forming a through-hole reaching the connection pad, the amount of processing and the processing aspect ratio are increased.

[0076] Since the difficulty level of dry etching correspondingly increases, the risk of occurrence of opening failure of the through electrode due to processing failure is increased. In addition, since the rate of dry etching decreases as the aspect ratio increases, the increase in the amount of processing corresponding to the interlayer insulating film has a great impact on production costs.

[0077] The second problem is that the metal material of the wiring layer is used for the connection pad. In the case where the metal material is used for the connection pad, when the interlayer insulating film is processed by dry etching and a through-hole reaching the connection pad is formed, there is a concern that the metal of the connection pad is scattered and the noise characteristics of the solid-state imaging device deteriorate.

[0078] Furthermore, when performing dry etching of interlayer insulating films at ultra-high aspect ratios, it is difficult to avoid metal scattering caused by sputtering because dry etching is performed under high ion energy conditions. In addition, since subsequent cleaning processes are required at high aspect ratios without etching the insulating film that penetrates the electrode side surface, it is difficult to adequately remove the scattered metal.

[0079] Furthermore, since fluorocarbon or hydrofluorocarbon gases are typically used in the dry etching of interlayer insulating films, there are concerns about the formation of a modified layer on the metal material, the generation of metal-containing reactants, and the instability of the resistance value through the electrode.

[0080] In view of the above, if Figure 1 As shown, the connection pad 52 is disposed on the same layer as the gate of the transistor disposed on the front surface side of the semiconductor substrate 10, and the other end of the through electrode 50 according to the present invention ( Figure 1 The lower end of the connector is connected to the connection pad 52.

[0081] Specifically, the connection pad 52 is disposed on the same layer as the gate Ga of the amplifying transistor AMP, the gate Gr of the reset transistor RST, the gate Gl of the transfer transistor TG1, and the gate G2 of the transfer transistor TG2. Furthermore, the connection pad 52 is connected to the gate Ga of the amplifying transistor AMP and the floating diffuser FD via contact vias 54 and wiring layers 53.

[0082] As described above, gates Ga, Gr, Gl, and G2 are disposed on the top layer of the interlayer insulating film 45. Therefore, in this invention, the bonding pads 52 are closer to the semiconductor substrate 10, and through-holes for providing through electrodes 50 can be formed simply by forming through-holes penetrating the front and rear surfaces of the semiconductor substrate 10 without processing the interlayer insulating film 45 by dry etching.

[0083] Therefore, in the solid-state imaging element 1, since the amount of dry etching and the aspect ratio of the process for forming the through hole for setting the through electrode 50 are reduced, the difficulty level of the process for forming the through electrode 50 can be suppressed to a low level.

[0084] Furthermore, in the solid-state imaging element 1, since the aspect ratio of the through electrode 50 is lower, the product yield can be improved by reducing the risk of open failure of the through electrode 50. Additionally, in the solid-state imaging element 1, since the amount of dry etching required to form the through hole for the through electrode 50 is reduced, productivity can also be improved by increasing the production volume of the manufacturing process.

[0085] Further, since the connection pad 52 according to the present application is provided on the same layer as the gate electrodes Ga, Gr, Gl, and G2, for example, a semiconductor material such as amorphous silicon or polycrystal silicon, which is the same material as that of the gate electrodes Ga and the like, can be selected instead of a metal material of the wiring layer 53 and the like.

[0086] Therefore, in the solid-state imaging device 1, it is possible to prevent metal scattering in a process of forming a via hole for providing the through electrode 50 reaching the connection pad 52 from the rear surface of the semiconductor substrate 10.

[0087] Therefore, according to the solid-state imaging device 1, it is possible to avoid deterioration of noise characteristics caused by metal scattering in the manufacturing process, and it is possible to reduce the affected layer and the generation of reactants compared to a metal material. Therefore, the resistance value of the through electrode 50 becomes stable.

[0088] Note that, in Figure 1 , the connection pad 52 is connected to the gate electrode Ga and the floating diffusion FD via the wiring layer 53, but the connection pad 52 can be connected to at least one of the gate electrode Ga and the floating diffusion FD.

[0089] In a case where the connection pad 52 is connected to the gate electrode Ga, the gate electrode Ga and the floating diffusion FD are connected via other wiring layers. Further, in a case where the connection pad 52 is connected to the floating diffusion FD, the floating diffusion FD and the gate electrode Ga are connected via other wiring layers.

[0090] In this structure, the arrangement of the through electrode 50 and the connection pad 52 has a similar structure to that of the solid-state imaging device 1 shown in Figure 1 . Therefore, it is possible to suppress the difficulty level of the formation process of the through electrode 50 to a low level.

[0091] [2. Manufacturing method of solid-state imaging device]

[0092] Next, a manufacturing method of the solid-state imaging device 1 according to the present application will be described with reference to Figures 2 to 6 . Figures 2 to 6 is an explanatory view showing a manufacturing process of the solid-state imaging device 1 according to the present application.

[0093] In a case of manufacturing the solid-state imaging device 1, as shown in Figure 2 , first, for example, the first photoelectric conversion element PD1 and the second photoelectric conversion element PD2 are formed by implanting an N-type impurity such as phosphorus into a predetermined region inside the semiconductor substrate 10 such as a silicon-on-insulator (SOI) substrate (doping a P-type impurity such as boron) and the like.

[0094] Then, an opening is formed in the semiconductor substrate 10 at a position where the gate G2 of the transfer transistor TG2 is formed, and then a gate insulating film 43 is formed on the front surface of the semiconductor substrate 10. Next, the gates Ga, Gr, Gl, and G2 are formed at predetermined positions on the gate insulating film 43.

[0095] At this time, the connection pad 52 is formed on the same layer as the layer where the gates Ga, Gr, Gl, and G2 are formed, at a position facing where the through electrode 50 will be formed later. The connection pad 52 is formed in such a manner that the area in a plan view is equal to or smaller than 1 / 10 of the pixel size, and preferably equal to or smaller than 1 / 30 of the pixel size.

[0096] Further, as the material of the gates Ga, Gr, Gl, and G2 and the connection pad 52, for example, in addition to a metal material similar to the through electrode 50, a semiconductor such as amorphous silicon or polycrystal silicon doped with impurities at a high concentration can be applied.

[0097] In a case where the same material as the gates Ga, Gr, Gl, and G2 is adopted as the material of the connection pad 52, the gates Ga, Gr, Gl, and G2 and the connection pad 52 can be formed at the same time. Thus, the connection pad 52 can be formed without increasing the number of manufacturing processes.

[0098] Further, in a case where a semiconductor doped with impurities is adopted as the material of the connection pad 52, in a process of forming a via hole for providing the through electrode 50 by a plasma etching process, generation of the above-described problems caused by metal scattering can be suppressed.

[0099] Specifically, in a case where a semiconductor doped with impurities is adopted as the material of the connection pad 52, deterioration of noise characteristics caused by metal scattering and instability of the resistance value of the through electrode 50 caused by a metal-modified layer and a reactant containing metal can be avoided.

[0100] Then, N-type impurity ions are implanted into predetermined positions on the surface layer in the semiconductor substrate 10, and a floating diffusion FD, FD1, and FD2, a source 11a, and drains 11b and 11c are formed. In this way, an amplification transistor AMP, a reset transistor RST, and transfer transistors TG1 and TG2 are formed on the front surface side of the semiconductor substrate 10.

[0101] Next, a CESL film 44 is formed on the gates Ga, Gr, Gl, and G2, the connection pad 52, and the gate insulating film 43, and then an interlayer insulating film 45, a wiring layer 53, and a contact via 54 are formed on the CESL film 44. In this process, the connection pad 52, the gate Ga, and the floating diffusion FD are connected via the contact via 54 and the wiring layer 53.

[0102] Then, asFigure 3 As shown, the semiconductor substrate 10 is flipped upside down, and a back surface of the semiconductor substrate 10 is formed at the location where the through electrode 50 will be arranged by dry etching. Figure 3 The via (from the upper surface of the semiconductor substrate 10) reaches the upper surface of the gate insulating film 43. When the thickness of the semiconductor substrate 10 is 2 μm to 10 μm, the via is formed with a diameter of 150 nm to 600 nm in the planar view.

[0103] Next, as Figure 4 As shown, an insulating film 41 is deposited on the entire back surface of the semiconductor substrate 10, including the vias, using an atomic layer deposition (ALD) method. For example, a silicon oxide film, tetraethoxysilane (TEOS), a silicon nitride film, or a silicon oxynitride film can be used as the material for the insulating film 41. Furthermore, dielectric materials with insulating properties, such as porous SiOC films, porous hydrogen silsesquioxane (HSQ) films, or porous methyl silsesquioxane (MSQ) films, can be used as the dielectric material for the insulating film 41.

[0104] At this point, an anti-reflective film can be stacked between the semiconductor substrate 10 and the insulating film 41 using ALD or physical vapor deposition (PVD). The anti-reflective film has a negative fixed charge and can also prevent dark current from the semiconductor substrate 10.

[0105] As materials for antireflective coatings, hafnium oxide (HfO2), aluminum oxide (Al2O3), zirconium oxide (ZrO2), tantalum oxide (Ta2O5), titanium oxide (TiO2), or lanthanum oxide (La2O3) can be used.

[0106] As materials for antireflective films, praseodymium oxide (Pr2O3) films, cerium oxide (CeO2) films, neodymium oxide (Nd2O3) films, promethium oxide (Pm2O3) films, or samarium oxide (Sm2O3) films can also be used.

[0107] In addition, europium oxide (Eu2O3) film, gadolinium oxide (Gd2O3) film, terbium oxide (Tb2O3) film, dysprosium oxide (Dy2O3) film or holmium oxide (Ho2O3) film can also be used as materials for antireflective coatings.

[0108] In addition, thulium oxide (Tm2O3) film, ytterbium oxide (Yb2O3) film, lutetium oxide (Lu2O3) film, yttrium oxide (Y2O3) film or hafnium nitride film can also be used as materials for antireflective coatings.

[0109] In addition, aluminum nitride films, hafnium oxynitride films, or aluminum oxynitride films can also be used as materials for antireflective coatings. Note that these antireflective coatings can be formed by chemical vapor deposition (CVD), PVD, or ALD.

[0110] Next, as shown in Figure 5 , the insulating film 41 of the bottom of the through-hole is removed by dry etching until reaching the connection pad 52 on the front surface side. At this time, the inner peripheral surface of the through-hole is covered with the insulating film 41 so that the inner diameter in the plan view is 50 nm to 400 nm.

[0111] At this time, if the thickness of the semiconductor substrate 10 is 4 μm and the diameter of the through-hole is 200 nm, the aspect ratio of the through-hole is about 4 μm / 200 nm = 20, and the degree of difficulty of the processing of dry etching becomes not very high.

[0112] Then, as shown in Figure 6 , the through-electrode 50 is formed by forming a conductive film on the entire rear surface of the semiconductor substrate 10 including the through-hole, and then removing the conductive film by dry etching except for the region to be the through-electrode 50. As the material of the through-electrode 50, a metal material such as aluminum, tungsten, titanium, cobalt, hafnium, tantalum, copper, or ruthenium can be used.

[0113] Then, as shown in Figure 7 , the insulating film 42 covering the through-electrode 50 and the insulating film 41 is formed, and the upper surface of the insulating film 42 is planarized, for example, by chemical mechanical polishing (CMP).

[0114] Next, a contact hole reaching the through-electrode 50 is formed at a predetermined position of the insulating film 42 by patterning the insulating film 42, and the contact hole is filled with a conductive material, thereby forming a contact through-hole 51. Then, the photoelectric conversion layer 2 is formed by sequentially stacking the lower transparent electrode 21, the photoelectric conversion film 22, and the upper transparent electrode 23 on the rear surface side of the semiconductor substrate 10.

[0115] As the material of the photoelectric conversion film 22, an organic photoelectric conversion material such as a rhodamine-based dye, a cyanine-based dye, or quinacridone, an ultrafine particle material such as Si, InN, GaN, CdSe, or ZnTe, or the like can be used. Finally, the solid-state imaging element 1 shown in Figure 1 is completed by stacking the passivation film 31, the planarization film 32, and the on-chip lens 33 on the upper transparent electrode 23.

[0116] [3. Example of Layout Structure of Solid-state Imaging Element]

[0117] Next, an example of the layout structure of the solid-state imaging element 1 will be described with reference to Figure 8 . Figure 8 is an explanatory diagram showing an example of the layout structure of the solid-state imaging element 1 according to the present application. Note that, in the following description, the same reference numerals are given to the same components as those in the above-described embodiment, and the description thereof will be omitted. Figure 8The upper part is an example illustrating the layout of the second photoelectric conversion element PD2 and the through electrode 50 included in the solid-state imaging device 1, and the lower part illustrates the lower transparent electrode 21.

[0118] As shown in the upper part of FIG. 1, in the solid-state imaging device 1, along one side of the pixel having a rectangular shape in a plan view (the right end of FIG. 1), a selection transistor SEL, an amplification transistor AMP, and a reset transistor RST for the photoelectric conversion layer 2 are arranged. Figure 8 Figure 8 As shown in the upper part of FIG. 1, in the solid-state imaging device 1, along one side of the pixel having a rectangular shape in a plan view (the right end of FIG. 1), a selection transistor SEL, an amplification transistor AMP, and a reset transistor RST for the photoelectric conversion layer 2 are arranged.

[0119] In a case where the charge photoelectrically converted by the photoelectric conversion layer 2 is to be read out, the selection transistor SEL is turned on, and a voltage corresponding to the photoelectrically converted charge is output to the signal read line VSL. Further, the gate of the amplification transistor AMP and the floating diffusion portion FD are connected with the lower transparent electrode 21 via the through electrode 50. Note that the power supply voltage VDD is applied to the drain of the amplification transistor AMP. The lower transparent electrode 21 is connected to a peripheral voltage application circuit, and the peripheral voltage application circuit applies a predetermined voltage VOA thereto.

[0120] Further, in the solid-state imaging device 1, along the other side of the pixel having a rectangular shape in a plan view (the left end of FIG. 1), a selection transistor SEL1, an amplification transistor AMP1, and a reset transistor RST1 for the first photoelectric conversion element PD1 are arranged. Figure 8

[0121] In a case where the charge photoelectrically converted by the first photoelectric conversion element PD1 is to be read out, the selection transistor SEL1 is turned on, and a voltage corresponding to the photoelectrically converted charge is output to the signal read line VSL1. Further, the gate of the amplification transistor AMP1 is connected with the floating diffusion portion FD1. The power supply voltage VDD is applied to the drain of the amplification transistor AMP1.

[0122] Further, in the solid-state imaging device 1, along one side of the pixel having a rectangular shape in a plan view (the right end of FIG. 1), a selection transistor SEL, an amplification transistor AMP, and a reset transistor RST for the photoelectric conversion layer 2 are arranged.

[0123] In a case where the charge photoelectrically converted by the second photoelectric conversion element PD2 is to be read out, the selection transistor SEL2 is turned on, and a voltage corresponding to the photoelectrically converted charge is output to the signal read line VSL2. Further, the gate of the amplification transistor AMP2 is connected with the floating diffusion portion FD2 and the drain of the transfer transistor TG2. The power supply voltage VDD is applied to the drain of the amplification transistor AMP2. ​​

[0124] Further, in the solid-state imaging device 1, within a pixel having a rectangular shape in a plan view, the second photoelectric conversion element PD2 is arranged in a region surrounded by a transistor used for the photoelectric conversion layer 2, a transistor used for the first photoelectric conversion element PD1, and a transistor used for the second photoelectric conversion element PD2. Note that the layout structure of the solid-state imaging device 1 is not limited to Figure 8 the layout structure shown.

[0125] [4. Example of Circuit Structure of Solid-state Imaging Device]

[0126] Next, an example of a circuit structure of the solid-state imaging device 1 will be described with reference to Figure 9 FIG. 6. Figure 9 is an explanatory diagram showing an example of a circuit structure of the solid-state imaging device 1 according to the present application. As Figure 9 shown, the transfer transistor TG1 for the first photoelectric conversion element PD1 is connected at the gate to the transfer gate line Tg1, at the source to the first photoelectric conversion element PD1, and at the drain to the floating diffusion FD1.

[0127] Further, the reset transistor RST1 for the first photoelectric conversion element PD1 is connected at the gate to the reset gate line Rst1 and at the source to the floating diffusion FD1, and a power supply voltage VDD is applied to the drain.

[0128] Further, the amplification transistor AMP1 for the first photoelectric conversion element PD1 is connected at the gate to the floating diffusion FD1 and at the source to the drain of the selection transistor SEL1, and a power supply voltage VDD is applied to the drain.

[0129] Further, the selection transistor SEL1 for the first photoelectric conversion element PD1 is connected at the gate to the selection gate line Sel1, at the source to the signal read line VSL1, and at the drain to the source of the amplification transistor AMP1.

[0130] Further, the transfer transistor TG2 for the second photoelectric conversion element PD2 is connected at the gate to the transfer gate line Tg2, at the source to the second photoelectric conversion element PD2, and at the drain to the floating diffusion FD2.

[0131] Further, the reset transistor RST2 for the second photoelectric conversion element PD2 is connected at the gate to the reset gate line Rst2 and at the source to the floating diffusion FD2, and a power supply voltage VDD is applied to the drain.

[0132] Further, the amplification transistor AMP2 for the second photoelectric conversion element PD2 is connected at the gate to the floating diffusion FD2 and at the source to the drain of the selection transistor SEL2, and a power supply voltage VDD is applied to the drain.

[0133] Further, the selection transistor SEL2 for the second photoelectric conversion element PD2 is connected at the gate to the selection gate line Sel2, at the source to the signal read line VSL2, and at the drain to the source of the amplification transistor AMP2.

[0134] Further, the reset transistor RST for the photoelectric conversion layer 2 is connected to the reset gate line Rst3 and at the source to the floating diffusion region FD, and a power supply voltage VDD is applied to the drain. The floating diffusion FD is connected to the lower transparent electrode 21 of the photoelectric conversion layer 2 via the through electrode 50.

[0135] Further, in the photoelectric conversion layer 2, a predetermined voltage VOA is applied to the lower transparent electrode 21 and a predetermined voltage VOU is applied to the upper transparent electrode 23. Thus, an electric field is formed in the photoelectric conversion film 22 based on a voltage difference between the voltage VOU and the voltage VOA.

[0136] Further, the amplification transistor AMP for the photoelectric conversion layer 2 is connected at the gate to the floating diffusion FD and at the source to the drain of the selection transistor SEL, and a power supply voltage VDD is applied to the drain.

[0137] Further, the selection transistor SEL for the photoelectric conversion layer 2 is connected at the gate to the selection gate line Sel3, at the source to the signal read line VSL3, and at the drain to the source of the amplification transistor AMP. Note that the circuit structure of the solid-state imaging device 1 is not limited to Figure 9 the circuit structure illustrated.

[0138] Note that the above-described embodiments are examples, and the structure of the solid-state imaging device according to the present application is not limited to Figure 1 the structure illustrated. Next, Modification Examples 1 to 4 of the solid-state imaging device according to the present application will be described.

[0139] [5. Definition of pixel region]

[0140] As described above, the through electrode 50 of the solid-state imaging device 1 is provided in a pixel region (pixel area) in the solid-state imaging device. Here, the definition of the pixel region of the solid-state imaging device according to the present application will be described with reference to Figure 10 and Figure 11 .

[0141] Figure 10 is a plan view of the solid-state imaging device according to the present application. Figure 11is a cross-sectional explanatory view of a solid-state imaging device according to the present application. In Figure 11 , part components of components included in the solid-state imaging element 1 shown in Figure 1 will be omitted.

[0142] Note that, Figure 11 the portion surrounded by the broken line shown in Figure 1 corresponds to a portion of the solid-state imaging element 1 shown in Figure 11 Here, in the components shown in Figure 1 , components that are the same as the components shown in Figure 1 are designated by the same reference numerals and hatching as the reference numerals and hatching shown in , and thus repeated explanation will be omitted.

[0143] Figure 10 As shown in Figure 10 , the solid-state imaging device 101 includes a pixel array 102 in which a plurality of solid-state imaging elements 1 are arranged in a matrix form, and a pixel drive circuit 103 and pixel readout circuits 104 and 105 provided around the pixel array 102. Note that, Figure 9 the portion surrounded by the broken line shown in corresponds to a portion of the circuit shown in

[0144] . Figure 9 For example, the pixel drive circuit 103 performs transfer and reset of photoelectrically converted charges by driving the transfer transistors TG1 and TG2, the reset transistors RST, RST1, and RST2, and the like shown in Figure 9 . Further, for example, the pixel readout circuits 104 and 105 read out photoelectrically converted charges from the solid-state imaging elements 1 by driving the selection transistors SEL, SEL1, and SEL2, and the like shown in .

[0145] In the solid-state imaging device 101 according to the present application, a region in which the pixel array 102 is provided is defined as a pixel region (pixel area). Specifically, as shown in Figure 11 , in the planar direction of the semiconductor substrate 10, the inside of a region in which a plurality of lower transparent electrodes 21 are provided is defined as a pixel region (pixel area). The through electrode 50 is provided in this pixel region. Further, in the solid-state imaging device 101, the periphery of the pixel area becomes a peripheral area, and the outside of the peripheral area becomes an inspection / isolation area.

[0146] Note that, as shown in Figure 11 , the solid-state imaging device 101 includes a light shielding film 34 that also functions as a VOU line connected to the upper transparent electrode 23, inside the passivation film 31. The light shielding film 34 that also functions as the VOU line is connected to a connection pad 52 provided on the front surface side (bottom surface side of the semiconductor substrate 10) via the through electrode 50, and applies the above-described predetermined voltage VOU to the upper transparent electrode 23. Figure 11 .

[0147] [6. Modification 1 of the solid-state imaging device]

[0148] Next, a modification 1 of the solid-state imaging device will be described with reference to Figures 12 to 13 A modification 1 of the solid-state imaging device will be described. Figure 12 is a cross-sectional explanatory view showing the modification 1 of the solid-state imaging device according to the present application. Figure 13 is a planar explanatory view showing a connection pad in the modification 1 of the solid-state imaging device according to the present application.

[0149] As shown in Figure 12 , the solid-state imaging device 1a has a similar configuration to the solid-state imaging device 1 shown in Figure 1 , except that the connection pad 52a extends to a position facing a channel formation region of the amplification transistor AMP across a gate insulating film 43 provided on a front surface of the semiconductor substrate 10.

[0150] Note that, since Figure 12 a cross section of the solid-state imaging device 1a is shown taken along a line that traverses between the source 11a and the drain 11b of the amplification transistor AMP, the source 11a and the drain 11b are not shown in Figure 12 . For example, an element isolation region 55 composed of an insulating material such as silicon oxide is provided around the source 11a and the drain 11b of the amplification transistor AMP (refer to Figure 13 ).

[0151] The connection pad 52a according to the modification 1 also has the function of the connection pad 52 shown in Figure 1 and the function of the gate Ga of the amplification transistor AMP shown in Figure 1 . In comparison with the solid-state imaging device 1 shown in Figure 1 , according to the connection pad 52a, it is not necessary to provide a space between the connection pad 52 and the gate Ga of the amplification transistor AMP. Therefore, it is possible to increase the number of components per chip by reducing the size in the planar direction of the semiconductor substrate 10.

[0152] Further, as shown in Figure 13 , the connection pad 52a can have a configuration in which the connection portion to the through electrode 50 and the portion serving as the gate of the amplification transistor AMP are positioned on one straight line.

[0153] With this configuration, by minimizing the distance between the connection portion to the through electrode 50 and the portion serving as the gate of the amplification transistor AMP in the connection pad 52a, it is possible to further increase the number of components per chip.

[0154] Note that, in the connection pad 52a, the positional relationship between the connection portion of the through electrode 50 and the portion serving as the gate of the amplification transistor AMP is not limited to Figure 13 the positional relationship illustrated in the drawing, and can be arbitrarily changed according to the layout of the solid-state imaging device 1a.

[0155] Further, in the connection pad 52a, the connection portion of the through electrode 50 is wider than the portion serving as the gate of the amplification transistor AMP in a plan view. With this configuration, even in a case where the position of the via hole for providing the through electrode 50 is slightly shifted, it is possible to ensure that the through electrode 50 and the connection pad 52a are reliably connected. Nonetheless, the shape of the connection pad 52a in the plan view is not limited to Figure 13 the shape illustrated in the drawing.

[0156] [7. Modified Example 2 of Solid-State Imaging Device]

[0157] Next, a modified example 2 of a solid-state imaging device will be described with reference to Figure 14 and Figure 15 . Figure 14 is a cross-sectional explanatory view illustrating the modified example 2 of the solid-state imaging device according to the present application. Figure 15 is a planar explanatory view illustrating a connection pad in the modified example 2 of the solid-state imaging device according to the present application.

[0158] As illustrated in Figure 14 , the solid-state imaging device 1b has a similar configuration to the solid-state imaging device 1 illustrated in Figure 1 except that the connection pad 52b extends to a position in contact with the floating diffusion portion FD.

[0159] The connection pad 52b according to the modified example 2 is engaged with the floating diffusion portion FD at the contact portion CNT. According to the connection pad 52b, it is possible to suppress the generation of damage at the time of connecting the contact via to the floating diffusion portion FD, and the degradation of the noise characteristics due to metal contamination.

[0160] Further, as illustrated in Figure 15 , the connection pad 52b can have a configuration in which the connection portion of the through electrode 50 and the contact portion CNT are positioned on one straight line. With this configuration, by minimizing the distance between the connection portion of the through electrode 50 and the contact portion CNT in the connection pad 52b, it is possible to increase the number of components per chip.

[0161] Note that, in the connection pad 52b, the positional relationship between the connection portion of the through electrode 50 and the contact portion CNT is not limited to Figure 14 the positional relationship illustrated in the drawing, and can be arbitrarily changed according to the layout of the solid-state imaging device 1b.

[0162] Further, in the connection pad 52b, the connecting portion to the through electrode 50 is wider than the contact portion CNT in a plan view. With this configuration, even if the position of the via hole for providing the through electrode 50 is slightly shifted, the through electrode 50 and the connection pad 52b can be reliably connected. Nonetheless, the shape of the connection pad 52b in a plan view is not limited to Figure 14 the shape illustrated.

[0163] Note that the connection pad 52b can have a configuration further extending to a position facing the channel formation region of the amplification transistor AMP across the gate insulating film 43 provided on the front surface of the semiconductor substrate 10. With this configuration, in addition to the effects of the above-described structure according to the modification 2, the connection pad 52b also brings the effects of the above-described structure according to the modification 1.

[0164] [8. Modification 3 of the Solid-state Imaging Device]

[0165] Next, a modification 3 of the solid-state imaging device will be described with reference to Figure 16 FIG. 9. Figure 16 is a cross-sectional explanatory view illustrating the modification 3 of the solid-state imaging device according to the present application. As Figure 16 illustrated, the solid-state imaging device 1c has a similar structure to the solid-state imaging device 1 illustrated in FIG. 1, except that a shallow trench isolation (STI) 46 surrounding the side surface of the other end (lower end) of the through electrode 50 is included at a position facing the connection pad 52 across the gate insulating film 43 provided on the front surface of the semiconductor substrate 10. Figure 16 Figure 1 The STI 46 is formed in the semiconductor substrate 10 in a process before a process of forming a via hole for providing the through electrode 50. Further, the STI 46 is formed in such a manner that the film thickness of the semiconductor substrate 10 in the thickness direction becomes thicker than the gate insulating film 43.

[0166] Nonetheless, if the film thickness of the STI 46 in the thickness direction of the semiconductor substrate 10 (the depth at which the STI 46 is buried in the semiconductor substrate 10) is too deep, the amount of via hole processing at a high aspect ratio increases. Therefore, it is desirable to set the depth of the STI 46 to be equal to or smaller than the depth of other STIs formed in the vicinity.

[0167] In a case where the depth of the STI 46 is set to be equal to the depth of other STIs formed in the vicinity, the STI 46 can be formed at the same time as the other STIs formed in the vicinity. Therefore, a new manufacturing process for forming the STI 46 does not need to be added. Note that, as a material of the STI 46, the same insulating material (for example, silicon oxide) as the gate insulating film 43 can be used.

[0168] In a case where the depth of the STI 46 is set to be equal to the depth of other STIs formed in the vicinity, the STI 46 can be formed at the same time as the other STIs formed in the vicinity. Therefore, a new manufacturing process for forming the STI 46 does not need to be added. Note that, as a material of the STI 46, the same insulating material (for example, silicon oxide) as the gate insulating film 43 can be used. ​

[0169] In the semiconductor substrate 10, the STI 46 functions as an etching stopper layer in a process of forming a via hole for providing the through electrode 50. With this configuration, since the thickness of the film functioning as the etching stopper layer in the process of forming the via hole in the semiconductor substrate 10 is increased in the solid-state imaging device 1c, reduction in yield caused by the via hole formed by etching the through gate insulating film 43 can be suppressed.

[0170] Further, with the solid-state imaging device 1c including the STI 46, the distance between the through electrode 50 and the semiconductor substrate 10 can be enlarged. Thus, an effect of reducing the wiring capacitance formed between the through electrode 50 and the semiconductor substrate 10 is also brought about.

[0171] Note that, Figure 16 The STI 46 illustrated can be provided at a position of a side surface of the lower end side of the through electrode 50 included in the solid-state imaging device 1, Figure 1 the solid-state imaging device 1a illustrated in Figure 12 the solid-state imaging device 1b illustrated in Figure 14 and the solid-state imaging device 1d to be described later. Figure 17

[0172] [9. Modification 4 of the Solid-State Imaging Device]

[0173] Next, Modification 4 of the solid-state imaging device will be described with reference to Figure 17 FIG. 17. Figure 17 is a cross-sectional explanatory view illustrating Modification 4 of the solid-state imaging device according to the present application. Note that, Figure 17 illustrates the solid-state imaging device 1d in a portion corresponding to two pixels in a pixel region.

[0174] As Figure 17 illustrated, the solid-state imaging device 1d has a configuration in which a color filter Rcf and a Bcf are included between the semiconductor substrate 10 and the lower transparent electrode 21 of the photoelectric conversion layer 2, and a first photoelectric conversion element PD1 is provided in a left pixel and a second photoelectric conversion element PD2 is provided in a right pixel.

[0175] Specifically, the color filter Rcf provided in the left pixel illustrated in Figure 17 selectively passes red light. Further, the color filter Bcf provided in the right pixel illustrated in Figure 17 selectively passes blue light.

[0176] With this configuration, the first photoelectric conversion element PD1 inside the semiconductor substrate 10 in the left pixel photoelectrically converts red light. Further, the second photoelectric conversion element PD2 inside the semiconductor substrate 10 in the right pixel photoelectrically converts blue light. ​

[0177] A plurality of first photoelectric conversion elements PD1 and a plurality of second photoelectric conversion elements PD2 are arranged in a matrix manner in the planar direction of the semiconductor substrate 10. Further, the photoelectric conversion layer 2 of the solid-state imaging device 1d is shared by all pixels, and photoelectrically converts green light.

[0178] Further, the solid-state imaging device 1d includes, for each pixel, a through electrode 50 and a connection pad 52 having the same structure as the through electrode 50 and the connection pad 52 of the solid-state imaging device 1 illustrated in FIG. 1. Figure 1 The through electrode 50 is connected to the lower transparent electrode 21 of the photoelectric conversion layer 2 at one end (here, the upper end) and penetrates the semiconductor substrate 10. The connection pad 52 is provided on the same layer as the gate electrode Ga of the amplification transistor AMP, the gate electrode Gr of the reset transistor RST, and the like provided on the front surface side of the semiconductor substrate 10, and the other end (here, the lower end) of the through electrode 50 is connected to the connection pad 52.

[0179] Further, the connection pad 52 is provided on the same layer as the gate electrode Ga of the amplification transistor AMP, the gate electrode Gr of the reset transistor RST, and the like provided on the front surface side of the semiconductor substrate 10, and the other end (here, the lower end) of the through electrode 50 is connected to the connection pad 52.

[0180] In this way, the through electrode 50 according to the present application can also be applied to the solid-state imaging device 1d having a structure in which the photoelectric conversion layer 2 that photoelectrically converts green light is included on the rear surface side of the semiconductor substrate 10, and the first photoelectric conversion element PD1 that photoelectrically converts red light and the second photoelectric conversion element PD2 that photoelectrically converts blue light are arranged inside the semiconductor substrate 10.

[0181] Note that, up to now, the solid-state imaging devices 1, 1a, 1b, 1c, and 1d including one photoelectric conversion layer 2 on the rear surface side of the semiconductor substrate 10 have been described as examples. However, the through electrode 50 and the connection pad 52 according to the present application can also be applied to a solid-state imaging device including two or more photoelectric conversion layers 2 on the rear surface side of the semiconductor substrate 10.

[0182] Further, the through electrode 50 and the connection pad 52 according to the present application can also be applied to a solid-state imaging device having a structure in which a region of a photoelectric conversion layer that photoelectrically converts green light, a region of a photoelectric conversion layer that photoelectrically converts red light, and a region of a photoelectric conversion layer that photoelectrically converts blue light are arranged in a Bayer arrangement on the same plane as the rear surface side of the semiconductor substrate 10.

[0183] [10. Configuration of electronic device including solid-state imaging device]

[0184] Next, a configuration example of an electronic device including the solid-state imaging device according to the present application will be described. Figure 18 A configuration example of an electronic device according to the present application will be described with reference to FIG. 10. Figure 18 is a diagram illustrating a configuration example of an electronic device according to the present application. Figure 18The electronic device 100 shown is a camera including a solid-state imaging device 101 that has a plurality of solid-state imaging elements according to the present application as imaging pixels, and can capture still images or moving images.

[0185] As shown in Figure 18 , the electronic device 100 includes the solid-state imaging device 101, an optical system (imaging lens) 110, a shutter device 111, a drive unit 113 that drives the solid-state imaging device 101 and the shutter device 111, a signal processing unit 112, a user interface 114, and a monitor 115.

[0186] The optical system 110 guides image light (incident light) from a subject to a light-receiving unit of the solid-state imaging device 101. Note that the optical system 110 can include a plurality of optical lenses. The shutter device 111 controls an exposure time of the solid-state imaging device 101. The drive unit 113 controls a transfer operation of the solid-state imaging device 101 and a shutter operation of the shutter device 111.

[0187] The signal processing unit 112 performs various types of signal processing on a signal output from the solid-state imaging device 101. A video signal that has undergone the signal processing is output to the monitor 115. Note that the video signal can be stored in a storage medium such as a memory or the like.

[0188] The user interface 114 can perform designation of an imaging scene, such as designation of a dynamic range or designation of a wavelength (terahertz, visible wavelength, infrared wavelength, ultraviolet wavelength, X-ray, or the like). The designation (input signal from the user interface 114) is input to the drive unit 113, and the solid-state imaging device 101 captures an image based on the designation.

[0189] [11. Modification 1 and Modification 2 of the Solid-State Imaging Device]

[0190] Next, Modification 1 and Modification 2 of the solid-state imaging device will be described with reference to Figure 19 , Figure 20 , and Figure 21 . Figure 19 is a plan view that shows Modification 1 of the solid-state imaging device according to the present application. Figure 20 is a cross-sectional view that shows Modification 1 of the solid-state imaging device according to the present application. Figure 21 is a plan view that shows Modification 2 of the solid-state imaging device according to the present application.

[0191] Note that here, in the components shown in Figure 19 and Figure 21 , components having the same or similar functions to the components shown in Figure 10 are given the same reference numerals as Figure 10components shown in FIG. 1 are assigned the same reference numerals, and thus overlapping description will be omitted.

[0192] Further, in Figure 20 components shown in FIG. 1 have the same or similar functions to those of Figure 11 components shown in FIG. 1 have the same or similar functions to those of Figure 11 components shown in FIG. 1 are assigned the same reference numerals, and thus overlapping description will be omitted.

[0193] In the above-described embodiment, the solid-state imaging device 101 in which the through electrode 50 is provided for each pixel has been described by way of example, but the solid-state imaging device according to the present application can have a configuration in which one through electrode 50 is shared by a plurality of pixels.

[0194] For example, as Figure 19 shown, the solid-state imaging device 101a according to the modified example 1 has a configuration in which two adjacently arranged pixels surrounded by a thick line frame in the figure share one through electrode 50. In the case of this configuration, as Figure 20 shown, the solid-state imaging device 101a includes a lower transparent electrode 21 extending across the two adjacently arranged pixels and a shared through electrode 50 provided between the two adjacently arranged pixels.

[0195] With this configuration, the solid-state imaging device 101a can reduce the number of through electrodes 50 and can narrow the interval between the pixels that do not share the through electrode 50 by a reduced amount. Thus, the density of the pixel array 102 can be increased.

[0196] Further, as Figure 21 shown, the solid-state imaging device 101b according to the modified example 2 has a configuration in which four adjacently arranged pixels surrounded by a thick line frame in the figure share one through electrode 50. In the case of this configuration, the solid-state imaging device 101b includes a lower transparent electrode 21 extending across the four adjacently arranged pixels and a shared through electrode 50 provided at the center of a region in which the four adjacently arranged pixels are arranged. With this configuration, the solid-state imaging device 101b can further increase the density of the pixel array 102.

[0197] Note that, in both the solid-state imaging device 101a shown in Figure 19 and the solid-state imaging device 101b shown in Figure 21 similarly to the solid-state imaging device 101 shown in Figure 10 , the through electrode 50 connecting the lower transparent electrode 21 and the connection pad 52 is provided in the pixel region.

[0198] [12. Application Example of Endoscopic Surgical System]

[0199] The technology according to the present application (the present technology) can be applied to various products. For example, the technology according to the present application can be applied to an endoscopic surgery system.

[0200] Figure 22 is a view showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present application (the present technology) can be applied.

[0201] In Figure 22 , a state in which a surgeon (doctor) 11131 performs surgery on a patient 11132 on a bed 11133 using an endoscopic surgery system 11000 is shown. As shown in the drawing, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical tools 11110 (such as a gas tube 11111 and an energy device 11112), a support arm device 11120 on which the endoscope 11100 is supported, and a cart 11200 on which various devices for endoscopic surgery are loaded.

[0202] The endoscope 11100 includes a lens barrel 11101 having a region for insertion into a body cavity of the patient 11132 of a predetermined length from a distal end thereof, and a camera head 11102 connected to a proximal end of the lens barrel 11101. In the illustrated example, the endoscope 11100 includes a rigid endoscope that is a lens barrel 11101 having a hard type. However, the endoscope 11100 can also include a flexible endoscope that is a lens barrel 11101 having flexibility.

[0203] The lens barrel 11101 has an opening portion at the distal end thereof at which an objective lens is mounted. A light source device 11203 is connected to the endoscope 11100. Light generated by the light source device 11203 is guided to the distal end of the lens barrel 11101 through a light guide extending inside the lens barrel 11101, and illuminates an observation target in the body cavity of the patient 11132 with the light. Note that the endoscope 11100 can be a forward-viewing endoscope, or can be an oblique-viewing endoscope or a side-viewing endoscope.

[0204] An optical system and an imaging element are provided inside the camera head 11102 so that reflected light (observation light) from the observation target is collected on the imaging element by the optical system. The imaging element photoelectrically converts the observation light to generate an electric signal corresponding to the observation light, that is, an image signal corresponding to an observation image. The image signal is transmitted to a camera control unit (CCU) 11201 as raw data.

[0205] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), and the like, and centrally controls the operation of the endoscope 11100 and the display apparatus 11202. In addition, the CCU 11201 receives an image signal from the camera head 11102, and performs various image processing such as development processing (demosaicing processing) or the like for the image signal for displaying an image based on the image signal.

[0206] The display apparatus 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201 under the control of the CCU 11201.

[0207] The light source apparatus 11203 includes a light source such as, for example, a light emitting diode (LED) or the like, and supplies irradiation light to the endoscope 11100 when imaging a surgical region or the like.

[0208] The input apparatus 11204 is an input interface for the endoscopic surgery system 11000. The user can perform input of various types of information or instructions input to the endoscopic surgery system 11000 through the input apparatus 11204. For example, the user changes an image capturing condition (a type of irradiation light, a magnification, or a focal distance, or the like) by inputting an instruction or the like through the endoscope 11100.

[0209] The treatment tool control apparatus 11205 controls the driving of the energy device 11112 for cauterizing or incising tissue, sealing a blood vessel, or the like. The pneumoperitoneum apparatus 11206 sends gas into a body cavity of the patient 11132 through the pneumoperitoneum tube 11111 so as to inflate the body cavity, to secure a field of view of the endoscope 11100 and to secure a working space of a surgeon. The recorder 11207 is an apparatus capable of recording various types of information related to surgery. The printer 11208 is an apparatus capable of printing various types of information related to surgery in various forms such as text, an image, or a graph.

[0210] Note that the light source apparatus 11203 that supplies irradiation light to the endoscope 11100 when the surgical region is to be imaged can include a white light source including an LED, a laser light source, or a combination thereof. In the case where the white light source includes a combination of red, green, and blue (RGB) laser light sources, the output intensity and the output timing of various colors (wavelengths) can be controlled with high precision. Therefore, white balance adjustment of a captured image can be performed by the light source apparatus 11203. In addition, in this case, when laser beams from the respective RGB laser light sources irradiate an observation target time-divisionally and the driving of the imaging element of the camera head 11102 is controlled in synchronization with the irradiation timing, images corresponding to R, G, and B each can also be captured time-divisionally. According to this method, even if a color filter is not provided for the imaging element, a color image can be obtained.

[0211] In addition, the light source device 11203 can be controlled so that the intensity of light to be output is changed at each predetermined time. By controlling the driving of the imaging element of the camera head 11102 in synchronization with the timing of the change in light intensity so as to acquire images time-divisionally and synthesize the images, it is possible to create an image with a high dynamic range that has no underexposed shadows and overexposed highlights.

[0212] In addition, the light source device 11203 can be configured to provide light of a predetermined wavelength band suitable for special light observation. In special light observation, for example, narrow-band light observation that images a predetermined tissue, such as a blood vessel on the surface of a mucous membrane, with high contrast is performed by irradiating a narrower band of light than the irradiation light for ordinary observation, that is, white light, using the wavelength dependency of light absorption in human tissue. Alternatively, in special light observation, fluorescence observation for obtaining an image by fluorescence generated by excitation light irradiation can be performed. In fluorescence observation, it is possible to observe fluorescence from a body tissue by irradiating the body tissue with excitation light (autofluorescence observation) or obtain a fluorescence image by locally injecting an agent such as indocyanine green (ICG) and irradiating the human body tissue with excitation light corresponding to the fluorescence wavelength of the agent. The light source device 11203 can be configured to provide narrow-band light and / or excitation light suitable for the above-described special light observation.

[0213] Figure 23 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in Figure 22

[0214] The camera head 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 to communicate.

[0215] The lens unit 11401 is an optical system provided at the connection position with the barrel 11101. The observation light taken in from the distal end of the barrel 11101 is guided to the camera head 11102 and introduced into the lens unit 11401. The lens unit 11401 includes a combination of a plurality of lenses including a zoom lens and a focus lens.

[0216] ​The imaging unit 11402 includes an imaging element. The number of imaging elements included by the imaging unit 11402 can be one (so-called single board type) or a plurality (so-called multi board type). For example, when the imaging unit 11402 is configured as a multi board type imaging unit, image signals corresponding to each of R, G, and B are generated by the imaging elements, and the image signals can be synthesized to obtain a color image. The imaging unit 11402 can also be configured to have a pair of imaging elements for respectively acquiring an image signal for the right eye and an image signal for the left eye so as to be compatible with three-dimensional (3D) display. With 3D display, the surgeon 11131 is able to more accurately understand the depth of living tissue in the surgical region. It should be noted that, in the case where the imaging unit 11402 is configured as a stereoscopic type imaging unit, a plurality of lens units 11401 are provided corresponding to each imaging element.

[0217] Further, the imaging unit 11402 is not necessarily provided on the camera head 11102. For example, the imaging unit 11402 can be provided inside the lens barrel 11101 immediately behind the objective lens.

[0218] The drive unit 11403 includes an actuator, and under the control of the camera head control unit 11405, moves the zoom lens and the focus lens of the lens unit 11401 at a predetermined distance along the optical axis. Thus, the magnification and the focus of the image taken by the imaging unit 11402 can be appropriately adjusted.

[0219] The communication unit 11404 includes a communication device for transmitting various types of information to the CCU 11201 and receiving various types of information from the CCU 11201. The communication unit 11404 transmits the image signal acquired from the imaging unit 11402 to the CCU 11201 as RAW data through the transmission cable 11400.

[0220] In addition, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201, and provides the control signal to the camera head control unit 11405. The control information includes information related to the image capturing conditions such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of capturing the image, and / or information specifying the magnification and the focus of the captured image.

[0221] It should be noted that the image capturing conditions such as the frame rate, the exposure value, the magnification, or the focus can be appropriately specified by the user or can be automatically set by the control unit 11413 of the CCU 11201 based on the obtained image signal. In the latter case, the endoscope 11100 includes an automatic exposure (AE) function, an automatic focus (AF) function, and an automatic white balance (AWB) function.

[0222] The camera control unit 11405 controls the driving of the camera 11102 on the basis of a control signal from the CCU 11201 received through the communication unit 11404.

[0223] The communication unit 11411 includes a communication device for transmitting various types of information to and receiving various types of information from the camera 11102. The communication unit 11411 receives an image signal transmitted from the camera 11102 through the transmission cable 11400.

[0224] Further, the communication unit 11411 transmits a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal can be transmitted through electric communication, optical communication, or the like.

[0225] The image processing unit 11412 performs various types of image processing on an image signal as RAW data transmitted from the camera 11102.

[0226] The control unit 11413 performs various types of control related to image capturing of a surgical region or the like by the endoscope 11100 and display of a captured image obtained by the image capturing of the surgical region or the like. For example, the control unit 11413 creates a control signal for controlling the driving of the camera 11102.

[0227] Further, the control unit 11413 controls the display device 11202 to display an imaged captured image of the surgical region or the like on the basis of an image signal on which image processing has been performed by the image processing unit 11412. Thus, the control unit 11413 can recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 can recognize a surgical tool such as forceps, a specific living body region, bleeding, fog when the energy device 11112 is used, or the like by detecting the shape, color, or the like of the edge of an object included in the captured image. When the control unit 11413 controls the display device 11202 to display the captured image, the control unit 11413 can use the result of the recognition to cause various types of surgery support information to be displayed in a manner of superimposition on the image of the surgical region. When the surgery support information is displayed in a manner of superimposition and presented to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can perform surgery with confidence.

[0228] The transmission cable 11400 connecting the camera 11102 and the CCU 11201 to each other is an electric signal cable compatible with electric signal communication, an optical fiber compatible with optical communication, or a composite cable compatible with both electric communication and optical communication.

[0229] Here, although communication is performed by using wired communication of the transmission cable 11400 in the illustrated example, communication between the camera head 11102 and the CCU 11201 can also be performed by wireless communication.

[0230] In the above, an example of an endoscopic surgery system to which the technology according to the present application can be applied is described. The technology according to the present application can be applied to the imaging unit 11402 of the camera head 11102 in the above-described configuration. Specifically, for example, Figure 1 The illustrated solid-state imaging device 1 can be applied to the imaging unit 10402. By applying the technology according to the present application to the imaging unit 10402, the imaging unit 10402 can be further downsized and high-performed. Thus, a higher-quality image of a lesion portion can be captured while the physical burden on the patient 11132 is alleviated.

[0231] Note that although an endoscopic surgery system has been described as an example herein, the technology according to the present application can also be applied to other technologies, such as a microscopic surgery system and the like.

[0232] <13. Application Example of Mobile Body>

[0233] The technology according to the present application (the present technology) can be applied to a device mounted on an arbitrary type of mobile body such as a car, an electric car, a hybrid electric car, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, and a robot.

[0234] Figure 24 is a block diagram showing an example of a schematic configuration of a vehicle control system as an example of a mobile body control system to which the technology according to the present application can be applied.

[0235] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. In the illustrated example, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an inside information detection unit 12040, and an integrated control unit 12050. Figure 24 In the illustrated example, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an inside information detection unit 12040, and an integrated control unit 12050. Further, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, a sound image output section 12052, and a vehicle-mounted network interface (I / F) 12053 are illustrated.

[0236] The drive system control unit 12010 controls the operations of devices related to the drive system of the vehicle in accordance with various types of programs. For example, the drive system control unit 12010 functions as a control device for a drive power generation device such as an internal combustion engine or a drive motor that generates drive power of the vehicle, a drive power transmission mechanism that transmits the drive power to wheels, a steering mechanism that adjusts the steering angle of the vehicle, a braking device that generates braking power of the vehicle, and the like.

[0237] The body system control unit 12020 controls the operations of various types of devices provided on the vehicle body in accordance with various types of programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, or fog lamps. In this case, radio waves transmitted from a mobile device that substitutes for a key or signals of various switches can be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals, and controls a door lock device, a power window device, or vehicle lamps of the vehicle, and the like.

[0238] The outside -information detecting unit 12030 detects information about the outside of the vehicle that includes the vehicle control system 12000. For example, the outside-information detecting unit 12030 is connected to an imaging unit 12031. The outside-information detecting unit 12030 causes the imaging unit 12031 to image an image of the outside of the vehicle, and receives the imaged image. Based on the received image, the outside-information detecting unit 12030 can execute a process of detecting an object such as a person, a vehicle, an obstacle, a sign, or a character on a road surface, or a process of detecting a distance to the above object.

[0239] The imaging unit 12031 is an optical sensor that receives light and outputs an electric signal corresponding to the amount of light of the received light. The imaging unit 12031 can output the electric signal as an image, or can output the electric signal as information on a measured distance. Furthermore, the light received by the imaging unit 12031 can be visible light, or can be invisible light such as infrared rays.

[0240] The in-vehicle information detecting unit 12040 detects information about the inside of the vehicle. The in-vehicle information detecting unit 12040 is connected to a driver state detecting portion 12041 that detects a state of a driver, for example. The driver state detecting portion 12041 includes a camera that photographs the driver, for example. Based on detection information input from the driver state detecting portion 12041, the in-vehicle information detecting unit 12040 can calculate the degree of fatigue of the driver or the degree of concentration of the driver, or can determine whether the driver is dozing.

[0241] The microcomputer 12051 can calculate a control target value of a driving force generation device, a steering mechanism, or a braking device on the basis of information about the inside or outside of the vehicle acquired by the outside information detecting unit 12030 or the in-vehicle information detecting unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing a function of an advanced driver assistance system (ADAS) including collision avoidance or impact mitigation of the vehicle, follow-up driving based on a following distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, or the like.

[0242] Further, by controlling a driving force generation device, a steering mechanism, or a braking device, or the like on the basis of information about the surroundings of the vehicle acquired by the outside information detecting unit 12030 or the in-vehicle information detecting unit 12040, the microcomputer 12051 can perform cooperative control aimed at realizing automatic driving or the like that enables the vehicle to travel autonomously without relying on the operation of the driver.

[0243] Further, on the basis of information about the outside of the vehicle acquired by the outside information detecting unit 12030, the microcomputer 12051 can output a control command to the body system control unit 12020. For example, the microcomputer 12051 can perform cooperative control aimed at preventing glare by, for example, controlling a headlamp to change from high beam to low beam in accordance with the position of a preceding vehicle or an oncoming vehicle detected by the outside information detecting unit 12030.

[0244] The sound image output section 12052 transmits an output signal of at least one of a sound or an image to an output device capable of notifying a passenger of the vehicle or outside of the vehicle visually or aurally. In Figure 24 Examples, an audio speaker 12061, a display section 12062, and an instrument panel 12063 are shown as output devices. The display section 12062 can include at least one of a vehicle-mounted display or a head-up display, for example.

[0245] Figure 25 is a schematic view showing an example of a mounting position of the imaging unit 12031.

[0246] In Figure 25 , as the imaging unit 12031, the vehicle 12100 includes an imaging unit 12101, an imaging unit 12102, an imaging unit 12103, an imaging unit 12104, and an imaging unit 12105.

[0247] The imaging ranges of the imaging units 12101 to 12104 are shown as examples. The imaging range 12111 represents the imaging range of the imaging unit 12101 provided at the front nose. The imaging ranges 12112 and 12113 represent the imaging ranges of the imaging units 12102 and 12103 provided at the side mirrors, respectively. The imaging range 12114 represents the imaging range of the imaging unit 12104 provided at the rear bumper or the rear door. For example, a bird's-eye image of the vehicle 12100 viewed from above is obtained by superimposing image data imaged by the imaging units 12101 to 12104.

[0248] Incidentally, Figure 25 The imaging ranges of the imaging units 12101 to 12104 are shown as examples. The imaging range 12111 represents the imaging range of the imaging unit 12101 provided at the front nose. The imaging ranges 12112 and 12113 represent the imaging ranges of the imaging units 12102 and 12103 provided at the side mirrors, respectively. The imaging range 12114 represents the imaging range of the imaging unit 12104 provided at the rear bumper or the rear door. For example, a bird's-eye image of the vehicle 12100 viewed from above is obtained by superimposing image data imaged by the imaging units 12101 to 12104.

[0249] At least one of the imaging units 12101 to 12104 can have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 can be a stereo camera composed of a plurality of imaging elements, or can be an imaging element having pixels for phase difference detection.

[0250] For example, based on distance information acquired from the imaging units 12101 to 12104, the microcomputer 12051 can determine the distance of each three-dimensional object within the imaging ranges 12111 to 12114 and the time change of the distance (relative speed with respect to the vehicle 12100), and thereby extract, as a preceding vehicle, the closest three-dimensional object that is particularly on a travel path of the vehicle 12100 and traveling in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, equal to or greater than 0 km / h). Further, the microcomputer 12051 can set a following distance to be maintained in front of the preceding vehicle in advance, and perform automatic brake control (including follow-up stop control), automatic acceleration control (including follow-up start control), and the like. Thus, cooperative control aimed at automatic driving and the like of the vehicle 12100 without depending on the operation of the driver can be performed.

[0251] For example, based on distance information acquired from the imaging units 12101 to 12104, the microcomputer 12501 can classify three-dimensional object data on three-dimensional objects into three-dimensional object data of two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, and other three-dimensional objects such as utility poles, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic avoidance of obstacles. For example, the microcomputer 12051 classifies obstacles around the vehicle 12100 into obstacles that the driver of the vehicle 12100 can visually recognize and obstacles that the driver of the vehicle 12100 cannot visually recognize. Then, the microcomputer 12051 determines a collision risk indicating a risk of collision with each obstacle. In a case where the collision risk is equal to or higher than a set value and thus there is a possibility of collision, the microcomputer 12051 issues a warning to the driver via the audio speaker 12061 or the display portion 12062, and performs forced deceleration or evasive steering by the drive system control unit 12010. The microcomputer 12051 can thereby assist the driver to avoid collision.

[0252] At least one of the imaging units 12101 to 12104 can be an infrared camera that detects infrared rays. The microcomputer 12051 can recognize a pedestrian, for example, by judging whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. Such recognition of a pedestrian is performed, for example, by extracting feature points in the captured images of the imaging units 12101 to 12104 that are infrared cameras, and performing pattern matching processing on a series of feature points representing the outline of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and thus recognizes a pedestrian, the sound image output section 12052 controls the display section 12062 so that a square outline for emphasis is displayed superimposed on the recognized pedestrian. Further, the sound image output section 12052 can also control the display section 12062 so as to display an icon or the like representing a pedestrian at a desired position.

[0253] In the above, an example of a vehicle control system to which the technology according to the present application can be applied is described. The technology according to the present application can be applied, for example, to the imaging unit 12031 or the driver state detection section 12041 of the above-described configuration. Specifically, for example, Figure 1 The illustrated solid-state imaging device 1 can be applied to the imaging unit 12031 and the driver state detection section 12041. By applying the technology according to the present application to the in-vehicle camera, it is possible to further downsize and increase the performance of the camera. Thus, the restriction on the mounting position of the camera in the vehicle is alleviated, and it becomes possible to capture a high-quality image of a three-dimensional object present in the vicinity of the vehicle or the passengers of the vehicle.

[0254] Further, the effects described herein are merely examples and are not limiting, and other effects can be present.

[0255] Further, the present application can also be configured as follows. (1)

[0257] A solid-state imaging device includes:

[0258] One or more photoelectric conversion layers provided on one main surface side of the semiconductor substrate as a light incident surface;

[0259] A through electrode provided in the pixel region, one end of the through electrode being connected to the photoelectric conversion layer and penetrating the front surface and the back surface of the semiconductor substrate, and the through electrode being used to transport electric charges photoelectrically converted by the photoelectric conversion layer to the other main surface side of the semiconductor substrate; and

[0260] A connection pad provided on the same layer as a gate electrode of a transistor provided on the other main surface side of the semiconductor substrate, and the other end of the through electrode is connected to the connection pad. (2)

[0262] The solid-state imaging device according to any one of (1) to (8) above,

[0263] A shallow trench isolation (STI) provided at a position facing the connection pad across a gate insulating film provided on the other main surface of the semiconductor substrate, and surrounding a side peripheral surface of the other end side of the through electrode. (3)

[0265] The solid-state imaging device according to any one of (1) to (8) above,

[0266] The connection pad is connected to at least one of a floating diffusion or a gate electrode of a transistor for amplifying the electric charge transmitted to the floating diffusion. (4)

[0268] The solid-state imaging device according to any one of (1) to (8) above,

[0269] The connection pad extends to a position facing a channel formation region of a transistor for amplifying the electric charge across a gate insulating film provided on the other main surface of the semiconductor substrate, and functions as a gate electrode of the transistor for amplifying the electric charge. (5)

[0271] The solid-state imaging device according to any one of (1) to (8) above,

[0272] The connection pad extends to a position contacting a floating diffusion to which the electric charge is transmitted and engages with the floating diffusion. (6)

[0274] The solid-state imaging device according to any one of (1) to (8) above,

[0275] A material of the connection pad is the same material as a gate electrode of the transistor. (7)

[0277] The solid-state imaging device according to any one of (1) to (8) above,

[0278] A material of the connection pad is a semiconductor doped with an impurity. (8)

[0280] An electronic device including:

[0281] solid-state imaging device,

[0282] wherein the solid-state imaging device includes:

[0283] one or more photoelectric conversion layers provided on one main surface side of a semiconductor substrate as a light incident surface;

[0284] a through electrode provided in a pixel region, one end of the through electrode being connected to the photoelectric conversion layer and penetrating a front surface and a rear surface of the semiconductor substrate, and the through electrode being used to transport electric charges photoelectrically converted by the photoelectric conversion layer to the other main surface side of the semiconductor substrate; and

[0285] a connection pad provided on the same layer as a gate of a transistor provided on the other main surface side of the semiconductor substrate, and the other end of the through electrode being connected to the connection pad. (9)

[0287] A manufacturing method of a solid-state imaging device, the manufacturing method including:

[0288] a process of forming one or more photoelectric conversion layers on one main surface side of a semiconductor substrate as a light incident surface;

[0289] a process of forming a through electrode in a pixel region, one end of the through electrode being connected to the photoelectric conversion layer and penetrating a front surface and a rear surface of the semiconductor substrate, and the through electrode being used to transport electric charges photoelectrically converted by the photoelectric conversion layer to the other main surface side of the semiconductor substrate; and

[0290] a process of forming, in the same process and on the same layer, a gate of a transistor provided on the other main surface side of the semiconductor substrate and a connection pad connected to the other end of the through electrode.

[0291] List of Reference Numerals

[0292] 1, 1a, 1b, 1c, 1d solid-state imaging device

[0293] 2 photoelectric conversion layer

[0294] 21 lower transparent electrode

[0295] 22 photoelectric conversion film

[0296] 23 upper transparent electrode

[0297] PD1 first photoelectric conversion element

[0298] PD2 second photoelectric conversion element

[0299] AMP amplification transistor

[0300] RST reset transistor

[0301] TG1, TG2 transfer transistor

[0302] Ga, Gr, G1, G2 gate

[0303] FD, FD1, FD2 floating diffusion

[0304] 10 semiconductor substrate

[0305] 11a source

[0306] 11b, 11c drain

[0307] 31 passivation film

[0308] 32 planarization film

[0309] 33 on-chip lens

[0310] 41, 42 insulating film

[0311] 43 gate insulating film

[0312] 44 CESL film

[0313] 45 interlayer insulating film

[0314] 46 STI

[0315] 50 through electrode

[0316] 52, 52a, 52b connection pad

[0317] 53 wiring layer

[0318] 51, 54 contact via

Claims

1. A solid-state imaging device comprising: one or more photoelectric conversion layers provided on one main surface side of a semiconductor substrate that serves as a light incident surface; a through electrode provided in a pixel region, one end of the through electrode being connected to the photoelectric conversion layer and penetrating a front surface and a back surface of the semiconductor substrate, and for transporting electric charges photoelectrically converted by the photoelectric conversion layer to the other main surface side of the semiconductor substrate; and a connection pad provided on the same layer as a gate of an amplification transistor provided on the other main surface side of the semiconductor substrate, and having a gap from the gate of the amplification transistor, and the other end of the through electrode being connected to the connection pad.

2. The solid-state imaging device according to claim 1, comprising: a shallow trench isolation provided at a position facing the connection pad across a gate insulating film provided on the other main surface of the semiconductor substrate, and surrounding a side peripheral surface of the other end side of the through electrode.

3. The solid-state imaging device according to claim 1 or 2, wherein the connection pad is connected to at least one of a floating diffusion portion and the gate of the amplification transistor, the electric charges being transported to the floating diffusion portion.

4. The solid-state imaging device according to claim 1 or 2, wherein the connection pad extends to a position in contact with a floating diffusion portion and engages with the floating diffusion portion, the electric charges being transported to the floating diffusion portion.

5. The solid-state imaging device according to claim 1 or 2, wherein a material of the connection pad is the same material as the gate of the amplification transistor.

6. The solid-state imaging device according to claim 1 or 2, wherein a material of the connection pad is a semiconductor doped with an impurity.

7. An electronic device comprising: a solid-state imaging device, wherein the solid-state imaging device is the solid-state imaging device according to any one of claims 1 to 6.

8. A manufacturing method of a solid-state imaging device, the manufacturing method comprising: a process of forming one or more photoelectric conversion layers on one main surface side of a semiconductor substrate that serves as a light incident surface; a process of forming a through electrode in a pixel region, one end of the through electrode being connected to the photoelectric conversion layer and penetrating a front surface and a back surface of the semiconductor substrate, and for transporting electric charges photoelectrically converted by the photoelectric conversion layer to the other main surface side of the semiconductor substrate; and a process of forming, in the same process and on the same layer, a gate of an amplification transistor provided on the other main surface side of the semiconductor substrate and a connection pad having a gap from the gate of the amplification transistor and connected to the other end of the through electrode.

Images