Display device and method of manufacturing the same

Abstract

A display device includes: a display panel including a plurality of pixel regions; a first insulating layer, disposed on the display panel, having a first refractive index, and having a plurality of first openings defined in a region overlapping the plurality of pixel regions; a second insulating layer, disposed directly on the first insulating layer and having a plurality of second openings defined in a region corresponding to the plurality of first openings; and a third insulating layer, used to cover the display panel, the first insulating layer and the second insulating layer, and having a second refractive index higher than the first refractive index, wherein the third insulating layer can overlap the plurality of pixel regions on a plane.

Description

Technical Field

[0001] The present disclosure herein relates to a display device with improved light efficiency and a method of manufacturing the display device with improved process reliability. Background Art

[0002] The display device can be divided into a self-luminous display device in which the light-emitting element emits light by itself or a light-receiving display device that controls the transmittance of the received light. The self-luminous display device may be, for example, an organic light-emitting display device. The light generated in the light-emitting layer of the organic light-emitting display device may be emitted not only in the front direction but also in the side direction. The light efficiency may be determined based on the light emitted in the front direction. That is, the light emitted in the side direction may result in a decrease in the light efficiency. Summary of the invention

[0003] Technical issues

[0004] The present disclosure provides a display device having improved light efficiency and a method of manufacturing the display device.

[0005] The present disclosure provides a method of manufacturing a display device with improved process reliability.

[0006] Technical Solution

[0007] An embodiment of the present invention provides a display device, comprising: a display panel having a plurality of pixel regions; a first insulating layer disposed on the display panel, having a first refractive index, and having a plurality of first openings defined in a region overlapping the plurality of pixel regions; a second insulating layer disposed directly on the first insulating layer and having a plurality of second openings in a region corresponding to the plurality of first openings; and a third insulating layer covering the display panel, the first insulating layer and the second insulating layer, and having a second refractive index higher than the first refractive index, wherein the third insulating layer can overlap with the plurality of pixel regions on a plane.

[0008] In some embodiments, a first conductive layer disposed on the display panel and a second conductive layer disposed on the first conductive layer may also be included.

[0009] In other embodiments, an interlayer insulating layer disposed between the first conductive layer and the second conductive layer may be further included, and the first insulating layer may be disposed on the second conductive layer.

[0010] In other embodiments, the first insulating layer and the second insulating layer may be disposed between the first conductive layer and the second conductive layer.

[0011] In other embodiments, the first conductive layer may include a connecting portion; the second conductive layer may include a sensor portion; the first insulating layer and the second insulating layer may have touch contact holes defined therein; and the connecting portion may be electrically connected to the sensor portion through the touch contact holes.

[0012] In other embodiments, each of the sensor parts may have a grid shape, and the sensor parts may not overlap with the plurality of pixel regions on a plane.

[0013] In a further embodiment, a third insulating layer may be disposed on the second conductive layer to cover the second conductive layer.

[0014] In further embodiments, the first insulating layer may include a first organic material, the second insulating layer may include an inorganic material, and the third insulating layer may include a second organic material.

[0015] In still further embodiments, each of the plurality of first openings and the plurality of second openings may be filled with a third insulating layer.

[0016] In still further embodiments, the first insulating layer may be further defined to have a plurality of first auxiliary openings, and each of the plurality of first auxiliary openings may be defined to surround a corresponding first opening among the plurality of first openings.

[0017] In still further embodiments, the second insulating layer may be further defined to have a plurality of second auxiliary openings, and the plurality of second auxiliary openings may be defined in regions corresponding to the plurality of first auxiliary openings.

[0018] In further embodiments, the thickness of the first insulating layer may be greater than the thickness of the second insulating layer.

[0019] In still further embodiments, the first refractive index is about 1.45 to about 1.55, and the second refractive index is about 1.60 to about 1.70.

[0020] In other embodiments of the present invention, a method for manufacturing a display panel includes: forming a display panel including a plurality of pixel areas; forming a first initial layer having a first refractive index on the display panel; forming a second initial layer comprising an inorganic material on the first initial layer; forming a mask by patterning the second initial layer; forming a first insulating layer by patterning the first initial layer using a mask; and forming a covering layer having a second refractive index higher than the first refractive index on the mask.

[0021] In some embodiments, the step of forming the display panel may include: providing a base layer; providing a circuit layer on the base layer; forming a light emitting layer on the circuit layer; and forming an encapsulation layer on the light emitting layer.

[0022] In other embodiments, the method may further include: forming a buffer layer on the encapsulation layer; forming a first conductive layer on the buffer layer; forming an interlayer insulating layer covering the first conductive layer, and forming a second conductive layer on the interlayer insulating layer, wherein the first initial layer may be disposed on the second conductive layer.

[0023] In other embodiments, the step of forming a mask may include forming a plurality of mask openings in a region of the second preliminary layer that overlaps the plurality of pixel regions in plane.

[0024] In other embodiments, the step of forming the mask may further include forming a plurality of auxiliary mask openings corresponding one-to-one to the plurality of mask openings and surrounding the plurality of mask openings.

[0025] In other embodiments, the first initial layer may include a first organic material, and the capping layer may include a second organic material.

[0026] In a further embodiment, the method may further include: forming a buffer layer on the encapsulation layer; forming a first conductive layer on the buffer layer; and forming a second conductive layer on the first conductive layer, wherein a mask and a first insulating layer may be disposed between the first conductive layer and the second conductive layer, and a covering layer may be disposed on the second conductive layer.

[0027] Beneficial Effects

[0028] According to an embodiment of the present invention, a display device includes a low refractive index layer in which a plurality of openings are defined, an inorganic layer disposed on the low refractive index layer, and a high refractive index layer filling the plurality of openings. The light emitted from the light-emitting element of the display device can be refracted or totally reflected at the boundary between the low refractive index layer and the high refractive index layer, thereby changing the path of the light. The light output efficiency of the display device can be improved by changing the light path. In addition, a plurality of openings are set by an etching process using an inorganic layer as a mask, so that the deviation of the inclination of the plurality of openings can be reduced and the patterning accuracy can be improved. Therefore, not only can a plurality of openings be easily set even in a high-resolution display device, but also the dispersion of optical properties can be reduced, thereby improving the display quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a perspective view of a display device according to an embodiment of the present invention.

[0030] Figure 2a to Figure 2d is a cross-sectional view of a display device according to an embodiment of the present invention.

[0031] Figure 3 is a plan view of a display panel according to an embodiment of the present invention.

[0032] Figure 4 is an equivalent circuit diagram of a pixel according to an embodiment of the present invention.

[0033] Figure 5 is a cross-sectional view showing a partial configuration of a display panel according to an embodiment of the present invention.

[0034] Figure 6 is a plan view of an input sensing layer according to an embodiment of the present invention.

[0035] Figure 7 It is shown Figure 6 An enlarged plan view of area AA.

[0036] Figure 8 It is shown along Figure 6 A cross-sectional view of a portion taken along line II'.

[0037] Fig. 9 It is shown along Figure 7 A cross-sectional view of a portion taken along line II-II'.

[0038] Fig.10 is a diagram showing a method of performing the following steps according to an embodiment of the present invention. Figure 6 A cross-sectional view of a portion taken along the line II' corresponding to the line.

[0039] Fig.11 is a diagram showing a method of performing the following steps according to an embodiment of the present invention. Figure 7 A cross-sectional view of a portion taken along the line II-II' corresponding to the line.

[0040] Fig.12 is a diagram showing a method according to an embodiment of the present invention Figure 6 Region AA corresponds to an enlarged plan view of the region.

[0041] Fig.13 is shown along with Fig.12 A cross-sectional view of a portion taken along line III-III' corresponds to the line.

[0042] Figures 14a to 14g is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present invention.

[0043] Figures 15a to 15c is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present invention.

[0044] Figures 16a to 16f is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0045] In the present specification, it will be understood that when an element (or region, layer, part, etc.) is referred to as being "on", "connected to" or "coupled to" another element, the element can be directly on or directly connected or coupled to the other element, or a third element may be present therebetween.

[0046] The same reference numerals refer to the same elements throughout. In addition, in order to effectively describe the technical content, the thickness, ratio and size of the elements in the drawings are exaggerated.

[0047] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0048] The terms "first", "second", etc. may be used to describe various elements, but these elements should not be interpreted as being limited by these terms. These terms are only used to distinguish one element from other elements. For example, a first element may be named a second element, and vice versa, without departing from the disclosed teachings. Unless otherwise specified, terms in the singular may include plural forms.

[0049] In addition, terms "below", "lower side", "on", "upper side" and the like are used to describe the association relationship between elements shown in the drawings. Terms as relative concepts are described based on the directions shown in the drawings.

[0050] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as understood by those skilled in the art. Common terms (such as those defined in general dictionaries) should be interpreted as matching their meanings in the relevant art in the context, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0051] It will also be understood that when used in this specification, the terms "comprises," "including," "having," etc. indicate the presence of stated features, quantities, steps, operations, elements, components, or combinations thereof, but do not exclude the presence or addition of one or more other features, quantities, steps, operations, elements, components, or combinations thereof.

[0052] Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

[0053] Figure 1 is a perspective view of a display device according to an embodiment of the present invention.

[0054] Reference Figure 1, the display device DD can be used not only for large electronic devices (such as televisions, monitors or external billboards), but also for small or medium-sized electronic devices (such as personal computers, laptop computers, personal digital terminals, vehicle navigation units, game consoles, portable electronic devices and cameras). In addition, these are presented only as examples, so the display device can also be used for other electronic devices without departing from the concept of the present invention.

[0055] The display device DD may have a display area DA and a non-display area NDA defined therein.

[0056] The display area DA in which the image IM is displayed is parallel to a plane defined by the first direction DR1 and the second direction DR2. The normal direction of the display area DA, which is the thickness direction of the display device DD, is represented by the third direction DR3. The front surface (or upper surface) and the rear surface (lower surface) of each component are divided by the third direction DR3. However, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 are relative concepts and can therefore be converted into different directions. In the following, the first direction to the third direction may be the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3, respectively, and will be identified with the same reference numerals.

[0057] The non-display area NDA is a region adjacent to the display area DA and in which the image IM is not displayed. A bezel area of ​​the display device DD may be defined by the non-display area NDA.

[0058] The non-display area NDA may surround the display area DA. However, not limited thereto, the shape of the display area DA and the shape of the non-display area NDA may be relatively designed.

[0059] Figure 2a to Figure 2d is a cross-sectional view of a display device DD according to an embodiment of the present invention. Figure 2a to Figure 2d The cross section defined by the second direction DR2 and the third direction DR3 is shown. Figure 2a to Figure 2d This is to illustrate the stacking relationship of the functional components constituting the display device DD.

[0060] The display device DD according to an embodiment of the present invention may include a display panel, an input detection sensor, an anti-reflector, and a window. At least some of the components among the display panel, the input detection sensor, the anti-reflector, and the window may be provided by a continuous process, or at least some of the components may be bonded to each other by an adhesive member. Figure 2a to Figure 2d An optically transparent bonding member OCA is shown as an example of a bonding member. The bonding member described hereinafter may include a general adhesive or glue. According to an embodiment of the present invention, an anti-reflector and a window may be omitted or may be replaced with other components.

[0061] exist Figure 2a to Figure 2d In the description, among the input detection sensor, the anti-reflector and the window, the corresponding structure formed together with other structures through a continuous process is expressed as a "layer". The structure combined with other structures among the input detection sensor, the anti-reflector and the window through a bonding member is expressed as a "panel". The panel includes a base layer providing a base surface, such as a synthetic resin film, a composite material film and a glass substrate, but the base layer can be omitted from the "layer". In other words, the unit expressed as a "layer" is provided on the base surface provided by other units.

[0062] Hereinafter, the input detection sensor, the anti-reflector and the window may be referred to as an input sensing panel ISP, an anti-reflection panel RPP and a window panel WP or an input sensing layer ISL, an anti-reflection layer RPL and a window layer WL, depending on the presence or absence of a base layer.

[0063] like Figure 2a As shown in , the display device DD may include a display panel DP, an input sensing layer ISL, an anti-reflection panel RPP and a window panel WP. The input sensing layer ISL is directly disposed on the display panel DP. In this specification, the expression "construction B is directly disposed on construction A" means that there is no separate adhesive layer / member between construction A and construction B. Construction B is formed by a continuous process on the substrate surface provided by construction A after construction A has been provided.

[0064] A combination of the display panel DP and the input sensing layer ISL disposed directly on the display panel DP may be defined as a display module DM. An optically transparent adhesive member OCA is disposed between the display module DM and the anti-reflection panel RPP and between the anti-reflection panel RPP and the window panel WP, respectively.

[0065] The display panel DP displays an image. The input sensing layer ISL obtains coordinate information of an external input (e.g., a touch event). Although not shown separately, the display module DM according to an embodiment of the present invention may further include a protective member disposed on the lower surface of the display panel DP. The protective member and the display panel DP may be bonded to each other by an adhesive member. Figure 2b to Figure 2d The display device DD may further include a protective member.

[0066] The display panel DP according to an embodiment of the present invention may be a light-emitting display panel, and is not specifically limited. For example, the display panel DP may be an organic light-emitting display panel or a quantum dot light-emitting display panel. The light-emitting layer of the organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of the quantum dot light-emitting display panel may include quantum dots, quantum rods, etc. Hereinafter, the display panel DP will be described as an organic light-emitting display panel.

[0067] The anti-reflection panel RPP reduces the reflectivity of external light incident from the upper surface of the window panel WP. The anti-reflection panel RPP according to an embodiment of the present invention may include a retarder and a polarizer. The retarder may be a film-type retarder or a liquid crystal coating type retarder, and include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may also be a film-type polarizer or a liquid crystal coating type polarizer. The film type may include an elongated synthetic resin film, and the liquid crystal coating type may include liquid crystals arranged in a predetermined arrangement. The retarder and the polarizer may also include a protective film. The retarder and the polarizer themselves or the protective film may be defined as a base layer of the anti-reflection panel RPP.

[0068] The anti-reflection panel RPP according to an embodiment of the present invention may include a color filter. The color filter has a predetermined arrangement. The arrangement of the color filter may be determined in consideration of the luminous color of the pixels included in the display panel DP. The anti-reflection panel RPP may further include a black matrix adjacent to the color filter.

[0069] The anti-reflection panel RPP according to an embodiment of the present invention may include a destructive interference structure. For example, the destructive interference structure may include a first reflection layer and a second reflection layer disposed on corresponding different layers. The first reflected light and the second reflected light reflected by the first reflection layer and the second reflection layer, respectively, destructively interfere with each other, thereby reducing the reflectivity of the external light.

[0070] The window panel WP according to an embodiment of the present invention includes a base layer WP-BS and a light shielding pattern WP-BZ. The base layer WP-BS may include a glass substrate and / or a synthetic resin film. The base layer WP-BS is not limited to a single-layer structure. The base layer WP-BS may include two or more films bonded to each other by an adhesive member.

[0071] The light shielding pattern WP-BZ partially overlaps the base layer WP-BS. The light shielding pattern WP-BZ may be disposed on the rear surface of the base layer WP-BS and substantially define a non-display area NDA of the display device DD. An area in which the light shielding pattern WP-BZ is not disposed may define a display area DA of the display device DD. When limited to the window panel WP, an area in which the light shielding pattern WP-BZ is disposed is defined as a light shielding area, and an area in which the light shielding pattern WP-BZ is not disposed is defined as a transmissive area of ​​the window panel WP.

[0072] The light shielding pattern WP-BZ may have a multi-layer structure. The multi-layer structure may include a coloring layer and a black light shielding layer. The coloring layer and the black light shielding layer may be provided by deposition, printing, and coating processes. Although not shown separately, the window panel WP may further include a functional coating layer disposed on the front surface of the base layer WP-BS. The functional coating layer may include an anti-fingerprint layer, an anti-reflection layer, a hard coating layer, etc. Figure 2b to Figure 2d, the window panel WP and the window layer WL are briefly shown without being divided into the base layer WP-BS and the light shielding pattern WP-BZ.

[0073] like Figure 2b and Figure 2c As shown in , the display device DD may include a display panel DP, an input sensing panel ISP, an anti-reflection panel RPP, and a window panel WP. The stacking order of the input sensing panel ISP and the anti-reflection panel RPP may be changed.

[0074] like Figure 2d As shown in , the display device DD may include a display panel DP, an input sensing layer ISL, an anti-reflection layer RPL, and a window layer WL. Figure 2a Compared with the display device DD shown in FIG, the optically transparent adhesive member is omitted, and the input sensing layer ISL, the anti-reflection layer RPL and the window layer WL are disposed on the base surface provided by the display panel DP through a continuous process. The stacking order of the input sensing layer ISL and the anti-reflection layer RPL may be changed.

[0075] Figure 3 is a plan view of a display panel according to an embodiment of the present invention.

[0076] Reference Figure 3 The display panel DP may include a driving circuit GDC, a plurality of signal lines SGL (hereinafter, referred to as signal lines), a plurality of signal pads (or referred to as "pads" or "pads") DP-PD (hereinafter, referred to as signal pads) and a plurality of pixels PX (hereinafter, referred to as pixels).

[0077] The display area DP-DA may be defined as an area in which pixels PX are disposed. Each pixel PX includes an organic light emitting diode and a pixel driving circuit connected thereto. The driving circuit GDC, the signal line SGL, the signal pad DP-PD, and the pixel driving circuit may be included in Figure 5 The circuit layer ML is shown in FIG.

[0078] The drive circuit GDC may include a scan drive circuit. The scan drive circuit generates a plurality of scan signals (hereinafter, referred to as scan signals) and sequentially outputs the scan signals to a plurality of scan lines SL (hereinafter, referred to as scan lines) to be described below. The scan drive circuit may also output another control signal to the drive circuit of the pixel PX.

[0079] The scan driving circuit may include a plurality of thin film transistors provided by the same process as that for forming the driving circuit of the pixel PX, for example, a low temperature polysilicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process.

[0080] The signal lines SGL include scan lines SL, data lines DL, power lines PL, emission control lines ECL, and control signal lines CSL.

[0081] Each of the scan lines SL is connected to a corresponding pixel PX among the pixels PX, and each of the data lines DL is connected to a corresponding pixel PX among the pixels PX. The power line PL is connected to the pixel PX. Each of the emission control lines ECL is connected to a corresponding pixel PX among the pixels PX. The control signal line CSL can provide a control signal to the scan driving circuit.

[0082] The signal line SGL overlaps the display area DP-DA and the non-display area DP-NDA. The signal line SGL may include a pad portion and a line portion. The line portion overlaps the display area DP-DA and the non-display area DP-NDA. The pad portion is disposed at an end of the line portion. The pad portion is disposed in the non-display area DP-NDA and overlaps a corresponding signal pad among the signal pads DP-PD. An area in which the signal pad DP-PD is disposed in the non-display area DP-NDA may be defined as a pad area DP-PA. A circuit substrate not shown may be connected to the pad area DP-PA.

[0083] Figure 4 is an equivalent circuit diagram of a pixel PX according to an embodiment of the present invention. As an example, Figure 4 A pixel PX connected to an i-th scan line SLi and an i-th emission control line ECLi is shown.

[0084] The pixel PX may include an organic light emitting diode OLED and a pixel circuit CC. The pixel circuit CC may include a plurality of transistors T1 to T7 and a capacitor CP. The pixel circuit CC controls the amount of current flowing through the organic light emitting diode OLED in response to a data signal.

[0085] The organic light emitting diode OLED may emit light having a predetermined brightness in response to the amount of current supplied from the pixel circuit CC. To this end, the level of the first power source ELVDD may be set to be higher than the level of the second power source ELVSS.

[0086] Each of the plurality of transistors T1 to T7 may include an input electrode (or source electrode), an output electrode (or drain electrode), and a control electrode (or gate electrode). In this specification, for convenience, one of the input electrode and the output electrode may be referred to as a first electrode, and the other may be referred to as a second electrode.

[0087] A first electrode of the first transistor T1 is connected to the first power source ELVDD via the fifth transistor T5, and a second electrode of the first transistor T1 is connected to the anode electrode of the organic light emitting diode OLED via the sixth transistor T6. In this specification, the first transistor T1 may be referred to as a driving transistor.

[0088] The first transistor T1 controls the amount of current flowing through the organic light emitting diode OLED in response to a voltage applied to a control electrode of the first transistor T1 .

[0089] The second transistor T2 is connected between the data line DL and the first electrode of the first transistor T1, and the control electrode of the second transistor T2 is connected to the i-th scan line SLi. When the i-th scan signal is supplied to the i-th scan line SLi, the second transistor T2 is turned on, thereby electrically connecting the data line DL to the first electrode of the first transistor T1.

[0090] The third transistor T3 is connected between the second electrode of the first transistor T1 and the control electrode of the first transistor T1. The control electrode of the third transistor T3 is connected to the i-th scan line SLi. When the i-th scan signal is supplied to the i-th scan line SLi, the third transistor T3 is turned on, thereby electrically connecting the second electrode of the first transistor T1 to the control electrode of the first transistor T1. Therefore, when the third transistor T3 is turned on, the first transistor T1 is connected in the form of a diode.

[0091] The fourth transistor T4 is connected between the node ND and the initialization power generating unit (not shown), and the control electrode of the fourth transistor T4 is connected to the i-1th scan line SLi-1. When the i-1th scan signal is supplied to the i-1th scan line SLi-1, the fourth transistor T4 is turned on to supply the initialization voltage Vint to the node ND.

[0092] The fifth transistor T5 is connected between the power line PL and the first electrode of the first transistor T1. A control electrode of the fifth transistor T5 is connected to the i-th light emission control line ECLi.

[0093] The sixth transistor T6 is connected between the second electrode of the first transistor T1 and the anode electrode of the organic light emitting diode OLED, and a control electrode of the sixth transistor T6 is connected to the i-th light emission control line ECLi.

[0094] The seventh transistor T7 is connected between the initialization power generation unit (not shown) and the anode electrode of the organic light emitting diode OLED, and the control electrode of the seventh transistor T7 is connected to the i+1th scan line SLi+1. When the i+1th scan signal is supplied to the i+1th scan line SLi+1, the seventh transistor T7 is turned on to supply the initialization voltage Vint to the anode electrode of the organic light emitting diode OLED.

[0095] The seventh transistor T7 can improve the black performance of the pixel PX. Specifically, when the seventh transistor T7 is turned on, the parasitic capacitor (not shown) of the organic light emitting diode OLED is discharged. Then, when black brightness is achieved, since the leakage current from the first transistor T1 is discharged by the initialization voltage Vint, the organic light emitting diode OLED may not emit light, thereby improving the black performance.

[0096] In addition, although Figure 4 The control electrode of the seventh transistor T7 is shown to be connected to the i+1th scan line SLi+1, but the present invention is not limited thereto. In another embodiment of the present invention, the control electrode of the seventh transistor T7 may be connected to the i-th scan line SLi or the i-1th scan line SLi-1.

[0097] Figure 4 A p-type metal oxide semiconductor (PMOS) is shown as a reference, but the present invention is not limited thereto. In an optional embodiment of the present invention, the pixel circuit CC may be composed of an n-type metal oxide semiconductor (NMOS). In another embodiment of the present invention, the pixel circuit CC may be composed of a combination of NMOS and PMOS.

[0098] The capacitor CP is provided between the power line PL and the node ND. The capacitor CP stores a voltage corresponding to the data signal. When the fifth transistor T5 and the sixth transistor T6 are turned on, the amount of current flowing through the first transistor T1 may be determined according to the voltage stored in the capacitor CP.

[0099] In the present invention, the equivalent circuit of the pixel PX is not limited to Figure 4 In another embodiment of the present invention, the pixel PX may be implemented in various forms to allow the organic light emitting diode OLED to emit light.

[0100] Figure 5 is a cross-sectional view showing a partial configuration of a display panel according to an embodiment of the present invention.

[0101] Reference Figure 5 The display panel DP may include a base layer BL, a circuit layer ML, a light emitting element layer EL, and an encapsulation layer TFE. The circuit layer ML may include a transistor TR and a plurality of insulating layers BFL, L1, L2, L3, and L4.

[0102] An insulating layer BFL may be disposed on the base layer BL, and the transistor TR may be disposed on the insulating layer BFL. Figure 5 The transistor TR can be Figure 4 The transistor TR may include a semiconductor layer ACL, a control electrode GED, a first electrode ED1, and a second electrode ED2.

[0103] The semiconductor layer ACL may be disposed on the insulating layer BFL. The insulating layer BFL may be a buffer layer that provides a modified surface for the semiconductor layer ACL. In this case, the semiconductor layer ACL may have higher adhesion to the insulating layer BFL than to the base layer BL. In addition, the insulating layer BFL may be a barrier layer that protects the lower surface of the semiconductor layer ACL. In this case, the insulating layer BFL may block contaminants or moisture that passes through the base layer BL or the base layer BL itself from penetrating into the semiconductor layer ACL. Alternatively, the insulating layer BFL may be a light-blocking layer that blocks external light that is incident through the base layer BL from being incident on the semiconductor layer ACL. In this case, the insulating layer BFL may further include a light-shielding material.

[0104] The semiconductor layer ACL may include polycrystalline silicon or amorphous silicon. In addition, the semiconductor layer ACL may include a metal oxide semiconductor. The semiconductor layer ACL may include: a channel region serving as a channel through which electrons or holes can move; and a first ion doping region and a second ion doping region, which are arranged so that the channel region is placed between the first ion doping region and the second ion doping region.

[0105] The first circuit insulating layer L1 is disposed on the insulating layer BFL and may cover the semiconductor layer ACL. The first circuit insulating layer L1 may include an inorganic material. The inorganic material may include at least one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, and aluminum oxide.

[0106] The control electrode GED may be disposed on the first circuit insulating layer L1. The second circuit insulating layer L2 is disposed on the first circuit insulating layer L1 and may cover the control electrode GED. The second circuit insulating layer L2 may include an inorganic material.

[0107] The third circuit insulating layer L3 may be disposed on the second circuit insulating layer L2. The first electrode ED1 and the second electrode ED2 may be disposed on the third circuit insulating layer L3. The first electrode ED1 and the second electrode ED2 may be connected to the semiconductor layer ACL through a through hole penetrating the first circuit insulating layer L1, the second circuit insulating layer L2, and the third circuit insulating layer L3.

[0108] The fourth circuit insulating layer L4 is disposed on the third circuit insulating layer L3 and may cover the first electrode ED1 and the second electrode ED2. The fourth circuit insulating layer L4 may be composed of a single layer or multiple layers. For example, a single layer may include an organic layer. Multiple layers may be provided by stacking an organic layer and an inorganic layer. The fourth circuit insulating layer L4 may be a planarization layer providing a flat surface on the top thereof.

[0109] The light emitting element layer EL and the defining pattern PDP may be disposed on the fourth circuit insulating layer L4.

[0110] The light emitting element layer EL may include a first electrode E1, a light emitting layer EM, and a second electrode E2. The first electrode E1 is disposed on the fourth circuit insulating layer L4 and may be electrically connected to the second electrode ED2 through a through hole defined in the fourth circuit insulating layer L4. The light emitting element layer EL may correspond to Figure 4 The organic light emitting diode OLED described in.

[0111] The defining pattern PDP may be disposed on the circuit layer ML and define the pixel area PXA. The defining pattern PDP covers at least a portion of the first electrode E1 and may be disposed on the fourth circuit insulating layer L4. A portion of the first electrode E1 may not be covered by the defining pattern PDP, and the portion may correspond to the pixel area PXA. Therefore, the defining pattern PDP may be referred to as a pixel defining pattern or a pixel defining film. In addition, as Figure 5 As shown in , the non-light emitting area NPXA may surround the pixel area PXA.

[0112] The light emitting layer EM may be disposed between the first electrode E1 and the second electrode E2. The light emitting layer EM may have a single layer structure made of a single material, a single layer structure made of a plurality of different materials, or a multilayer structure consisting of a plurality of layers made of a plurality of different materials.

[0113] The light emitting layer EM may include an organic material. The organic material is not particularly limited as long as it is a commonly used material. For example, the light emitting layer EM may be composed of at least one of materials emitting red, green, and blue light, and may include a fluorescent material or a phosphorescent material.

[0114] The second electrode E2 may be disposed on the light emitting layer EM and the defining pattern PDP. The second electrode E2 may receive a second power source ELVSS (see Figure 4 ).

[0115] The encapsulation layer TFE is disposed on the second electrode E2. The encapsulation layer TFE may directly cover the second electrode E2. In another embodiment of the present invention, a covering layer covering the second electrode E2 may be further disposed between the encapsulation layer TFE and the second electrode E2. In this case, the encapsulation layer TFE may directly cover the covering layer. The covering layer may contain an organic material. The covering layer protects the second electrode E2 from subsequent processes (such as a sputtering process) and improves the light output efficiency of the light emitting element layer EL. The covering layer may have a refractive index higher than that of the first inorganic layer ECL1 described later.

[0116] The encapsulation layer TFE may include a first inorganic layer ECL1, an organic layer ECL2, and a second inorganic layer ECL3 sequentially stacked. The organic layer ECL2 may be disposed between the first inorganic layer ECL1 and the second inorganic layer ECL3. The first inorganic layer ECL1 and the second inorganic layer ECL3 may be provided by depositing an inorganic material, and the organic layer ECL2 may be provided by depositing, printing, or coating an organic material.

[0117] The first inorganic layer ECL1 and the second inorganic layer ECL3 protect the light emitting element layer EL from moisture and oxygen, and the organic layer ECL2 protects the light emitting element layer EL from foreign matter (such as dust particles). The first inorganic layer ECL1 and the second inorganic layer ECL3 may include at least one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, and aluminum oxide. The organic layer ECL2 may include a polymer, for example, an acrylic organic layer. However, this is exemplary, and the present invention is not limited thereto.

[0118] although Figure 5 It is exemplarily shown that the encapsulation layer TFE includes two inorganic layers and one organic layer, but the present invention is not limited thereto. For example, the encapsulation layer TFE may include three inorganic layers and two organic layers, and in this case, the inorganic layers and the organic layers may have an alternately stacked structure.

[0119] Figure 6 1 is a plan view of an input sensing layer according to an embodiment of the present invention. The input sensing layer ISL described below can be equally applied to the input sensing panel ISP (see Figure 2b ).

[0120] The input sensing layer ISL may include Figure 3 , a sensing area IS-DA corresponding to a display area DP-DA of the display panel DP and a line area IS-NDA corresponding to a non-display area DP-NDA are shown in FIG.

[0121] The input sensing layer ISL may include: a first sensing electrode EG1; a second sensing electrode EG2; a first signal line group SG1, electrically connected to some corresponding electrodes among the first sensing electrodes EG1; a second signal line group SG2, electrically connected to other corresponding electrodes among the first sensing electrodes EG1; and a third signal line group SG3, electrically connected to the second sensing electrodes EG2.

[0122] Figure 6It is exemplarily shown that the first signal line group SG1 and the second signal line group SG2 are arranged so that the sensing area IS-DA is placed between the first signal line group SG1 and the second signal line group SG2. However, in an embodiment of the present invention, the first signal line group SG1 and the second signal line group SG2 may be arranged on the same side of the sensing area IS-DA. In addition, in an embodiment of the present invention, each of the first signal line group SG1 and the second signal line group SG2 may be connected to the first sensing electrode EG1 in a double wiring structure.

[0123] The first sensing electrode EG1 and the second sensing electrode EG2 are disposed in the sensing area IS-DA. The first signal line group SG1, the second signal line group SG2, and the third signal line group SG3 are disposed in the line area IS-NDA.

[0124] In this embodiment, the input sensing layer ISL may be a capacitive touch sensor that senses external input using a mutual capacitance method. One of the first sensing electrode EG1 and the second sensing electrode EG2 receives a detection signal, and the other of the first sensing electrode EG1 and the second sensing electrode EG2 outputs a change between the first sensing electrode EG1 and the second sensing electrode EG2 as an output signal.

[0125] Each of the first sensing electrodes EG1 extends along the second direction DR2. The first sensing electrodes EG1 are disposed by being spaced apart in the first direction DR1. Each of the second sensing electrodes EG2 extends along the first direction DR1. The second sensing electrodes EG2 are disposed by being spaced apart in the second direction DR2.

[0126] The first sensing electrode EG1 may include first sensor portions SP1 and first connection portions CP1. The first sensor portions SP1 are arranged along the second direction DR2. Each first connection portion CP1 may connect two adjacent first sensor portions SP1 among the first sensor portions SP1.

[0127] The second sensing electrode EG2 may include second sensor parts SP2 and second connection parts CP2. The second sensor parts SP2 are arranged along the first direction DR1. Each second connection part CP2 may connect two adjacent second sensor parts SP2 among the second sensor parts SP2.

[0128] The first signal line group SG1, the second signal line group SG2, and the third signal line group SG3 may be electrically connected to the corresponding signal pad IS-PD. An area where the signal pad IS-PD is disposed in the line area IS-NDA may be defined as a pad area IS-PA. A circuit board (not shown) may be connected to the pad area IS-PA.

[0129] Figure 7 It is shown Figure 6An enlarged plan view of area "AA" is shown in FIG.

[0130] The display panel DP (see Figure 5 ) between the first pixel region PXA-R, the second pixel region PXA-B and the third pixel region PXA-G. The first pixel region PXA-R, the second pixel region PXA-B and the third pixel region PXA-G are defined as reference Figure 5 Described pixel area PXA.

[0131] Reference Figure 6 and Figure 7 In the present embodiment, the first pixel region PXA-R, the second pixel region PXA-B, and the third pixel region PXA-G may have different areas. The first pixel region PXA-R may have a first area, the second pixel region PXA-B may have a second area, and the third pixel region PXA-G may have a third area. The second area may be greater than the first area, and the first area may be greater than the third area.

[0132] Reference Figure 3 The described plurality of pixels PX may include a red pixel generating red light, a blue pixel generating blue light, and a green pixel generating green light. In this embodiment, the first pixel region PXA-R may correspond to a red pixel, the second pixel region PXA-B may correspond to a blue pixel, and the third pixel region PXA-G may correspond to a green pixel.

[0133] The first pixel region PXA-R and the second pixel region PXA-B may be alternately arranged along the first direction DR1 and the second direction DR2. A plurality of third pixel regions PXA-G may be provided, and the plurality of third pixel regions PXA-G may be arranged along the first direction DR1 and the second direction DR2. The first pixel region PXA-R and the third pixel region PXA-G may be alternately arranged along the fourth direction DR4. The second pixel region PXA-B and the third pixel region PXA-G may be alternately arranged along the fourth direction DR4. The fourth direction DR4 may be referred to as a diagonal direction intersecting the first direction DR1 and the second direction DR2.

[0134] Although as an example, Figure 7It is shown that the first pixel region PXA-R, the second pixel region PXA-B, and the third pixel region PXA-G are arranged in the form of five tiles (pentile), but the present invention is not limited thereto. For example, the first pixel region PXA-R, the second pixel region PXA-B, and the third pixel region PXA-G may be arranged in the form of a stripe. The stripe form may indicate that the first pixel region PXA-R, the second pixel region PXA-B, and the third pixel region PXA-G are alternately arranged along the second direction DR2, and the same pixel region is arranged in the first direction DR1.

[0135] Each of the first sensor portion SP1 and the second sensor portion SP2 may have a grid shape. A plurality of openings OP-MR, OP-MG, and OP-MB may be defined in each of the first sensor portion SP1 and the second sensor portion SP2. Therefore, on a plane, the first sensor portion SP1 and the second sensor portion SP2 may not overlap with the first pixel region PXA-R, the second pixel region PXA-B, and the third pixel region PXA-G. For example, the first opening OP-MR may be defined in an area corresponding to the first pixel region PXA-R, the second opening OP-MB may be defined in an area corresponding to the second pixel region PXA-B, and the third opening OP-MG may be defined in an area corresponding to the third pixel region PXA-G.

[0136] Figure 8 It is shown along Figure 6 A cross-sectional view of a portion taken along line II' of Fig. 9 It is shown along Figure 7 A cross-sectional view of a portion taken along line II-II'.

[0137] Reference Figure 7 , Figure 8 and Fig. 9 The input sensing layer ISL may include a buffer layer BFL-I, a first conductive layer CL1, an interlayer insulating layer IL-C, a second conductive layer CL2, a first insulating layer IL1, a second insulating layer IL2, and a third insulating layer IL3.

[0138] The buffer layer BFL-I may be disposed on the encapsulation layer TFE. The buffer layer BFL-I may include an inorganic material. For example, the inorganic material may be silicon nitride. The buffer layer BFL-I may have a thickness of about 2000 angstroms. However, this is exemplary, and the material and thickness of the buffer layer BFL-I are not limited thereto. In addition, in one embodiment of the present invention, the buffer layer BFL-I may be omitted.

[0139] The first conductive layer CL1 may be disposed on the buffer layer BFL-I. The first conductive layer CL1 may include a first connection portion CP1.

[0140] The interlayer insulating layer IL-C may be disposed on the first conductive layer CL1. The interlayer insulating layer IL-C may include an inorganic material. For example, the inorganic material may be silicon nitride. The thickness of the interlayer insulating layer IL-C may be about 3000 angstroms.

[0141] The second conductive layer CL2 may be disposed on the interlayer insulating layer IL-C. The second conductive layer CL2 may include a first sensor part SP1, a second sensor part SP2, and a second connection part CP2.

[0142] Two first sensor parts SP1 adjacent to each other among the first sensor parts SP1 may be connected to one first connection part CP1. The two first sensor parts SP1 may be connected to the first connection part CP1 through a through hole HL-I defined in the interlayer insulating layer IL-C.

[0143] In another embodiment of the present invention, the first conductive layer CL1 may include the first sensor part SP1, the second sensor part SP2, and the second connection part CP2, and the second conductive layer CL2 may include the first connection part CP1.

[0144] The first insulating layer IL1 may be disposed on the second conductive layer CL2. The first insulating layer IL1 may have a first refractive index. The first insulating layer IL1 may include a first organic material. The first organic material may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. However, this is exemplary, and the first organic material is not limited to these examples.

[0145] In the first insulating layer IL1, a plurality of first openings may be defined in a region overlapping the first pixel region PXA-R, the second pixel region PXA-B, and the third pixel region PXA-G. Fig. 9 A first opening OPa is shown. The first opening OPa may be defined in an area corresponding to the first pixel region PXA-R. For example, the first opening OPa may overlap with the first pixel region PXA-R in a plane. In this specification, some guide lines of the reference numerals of the openings are indicated to indicate various aspects of the configuration defining the openings.

[0146] The second insulating layer IL2 may be disposed on the first insulating layer IL1. The second insulating layer IL2 may include an inorganic material. The inorganic material may be silicon nitride. The inorganic material may be replaced by various organic materials that may be deposited by a low temperature process. The low temperature process may refer to a process performed at a temperature of about 85 degrees or less, for example. However, the low temperature range is not limited to the above examples. The low temperature standard may be determined in consideration of the temperature at which the material constituting the display panel DP deteriorates.

[0147] In the second insulating layer IL2 , a plurality of second openings may be defined in regions corresponding to the plurality of first openings. Fig. 9 One second opening OPb is shown. The second opening OPb may be defined in a region corresponding to the first pixel region PXA-R.

[0148] The first opening OPa and the second opening OPb may be referred to as a first lens opening OPL-MR. Figure 7 , showing a second lens opening OPL-MB defined in a region overlapping with the second pixel region PXA-B and a third lens opening OPL-MG defined in a region overlapping with the third pixel region PXA-G.

[0149] On a plane, a first area of ​​the first lens opening OPL-MR, a second area of ​​the second lens opening OPL-MB, and a third area of ​​the third lens opening OPL-MG may be different from each other. The second area may be greater than the first area, and the first area may be greater than the third area.

[0150] The third insulating layer IL3 may be disposed on the second insulating layer IL2. The third insulating layer IL3 may have a second refractive index. The third insulating layer IL3 may include a second organic material. In one embodiment of the present invention, the second organic material may be selected from a material having a refractive index higher than that of the first organic material. In addition, in one embodiment of the present invention, the third insulating layer IL3 may include a material that is the same as that of the first organic material and a material that improves the refractive index. The material may be, for example, zirconium oxide.

[0151] The first refractive index may be about 1.45 to about 1.55. The second refractive index may be about 1.60 to about 1.70. The difference between the second refractive index and the first refractive index may be about 0.1 or more. The ranges of the first refractive index and the second refractive index are presented as examples. Therefore, the ranges of the first refractive index and the second refractive index are not limited to these examples, as long as the second refractive index is higher than the first refractive index.

[0152] The third insulating layer IL3 may fill the first lens opening OPL-MR, the second lens opening OPL-MB, and the third lens opening OPL-MG. In addition, the third insulating layer IL3 may also provide a flat upper surface.

[0153] The light provided from the light emitting element layer EL may be emitted in the front direction (for example, in the third direction DR3) as well as in the side direction. The light efficiency may be determined based on the light emitted in the front direction. According to an embodiment of the present invention, due to the refractive index difference between the first insulating layer IL1 and the third insulating layer IL3, the light LT emitted in the side direction may be refracted or totally reflected. Therefore, the optical path of the light LT may be changed to the third direction DR3 or a direction close to the third direction DR3. As a result, the display device DD (see FIG. 2 ) may be improved. Figure 1 )'s light efficiency.

[0154] The first thickness TK1 of the first insulating layer IL1 may be greater than the second thickness TK2 of the second insulating layer IL2. The third thickness TK3 of the third insulating layer IL3 may be greater than the first thickness TK1 and the second thickness TK2. Each of the first thickness TK1, the second thickness TK2, and the third thickness TK3 may represent a maximum thickness.

[0155] The first thickness TK1 may be about 1.5 microns or more. For example, the first thickness TK1 may be about 3 microns to about 5 microns. The second thickness TK2 may be several thousand angstroms. For example, the second thickness may be about 3000 angstroms. The third thickness TK3 may be several microns. For example, the third thickness TK3 may be about 5 microns. The width WT of the first lens opening OPL-MR may be about 1 micron or less. The width WT may represent the minimum width of the first lens opening OPL-MR. This numerical range is presented only as an example, and the first thickness TK1, the second thickness TK2, the third thickness TK3 and the width WT are not limited to the above numerical ranges.

[0156] Fig.10 is a diagram showing a method of performing the following steps according to an embodiment of the present invention. Figure 6 A cross-sectional view of a portion taken along the line II' corresponding to the line. Fig.11 is a diagram showing a method of performing the following steps according to an embodiment of the present invention. Figure 7 A cross-sectional view of a portion taken along the line II-II' corresponding to the line.

[0157] Reference Fig.10 and Fig.11 The input sensing layer ISLa may include a buffer layer BFL-I, a first conductive layer CL1, a first insulating layer IL1a, a second insulating layer IL2a, a second conductive layer CL2, and a third insulating layer IL3a.

[0158] The first conductive layer CL1 may be disposed on the buffer layer BFL-I. The first conductive layer CL1 may include a first connection portion CP1.

[0159] The first insulating layer IL1a may be disposed on the first conductive layer CL1, and the second insulating layer IL2a may be disposed on the first insulating layer IL1a.

[0160] The first insulating layer IL1a has a first refractive index, and the first insulating layer IL1a may include a first organic material. The second insulating layer IL2a may include an inorganic material.

[0161] In the first insulating layer IL1a, a plurality of first openings may be defined in a region overlapping the first pixel region PXA-R, the second pixel region PXA-B, and the third pixel region PXA-G. Fig.11 , one first opening OPa1 is shown. The first opening OPa1 may be defined in a region corresponding to the first pixel region PXA-R. For example, in a plane, the first opening OPa1 may overlap the first pixel region PXA-R.

[0162] In the second insulating layer IL2a, a plurality of second openings may be defined in regions corresponding to the plurality of first openings. Fig.11 , one second opening OPb1 is shown. The second opening OPb1 may be defined in a region corresponding to the first pixel region PXA-R.

[0163] The first opening OPa1 and the second opening OPb1 may be referred to as a first lens opening OPL-MR1. According to an embodiment of the present invention, in cross section, the first lens opening OPL-MR1 may be defined between the first conductive layer CL1 and the second conductive layer CL2. Fig. 9 By comparison, the thickness of the input sensing layer ISLa can be less than Fig. 9 The thickness of the input sensing layer ISL.

[0164] The second conductive layer CL2 may be disposed on the second insulating layer IL2a. The second conductive layer CL2 may include a first sensor portion SP1, a second sensor portion SP2 (see FIG. Figure 6 ) and the second connecting part CP2.

[0165] Two first sensor parts SP1 adjacent to each other among the first sensor parts SP1 may be connected to one first connection part CP1. The two first sensor parts SP1 may be connected to the first connection part CP1 through a touch contact hole HL-C defined in the first insulating layer IL1a and the second insulating layer IL2a. The touch contact hole HL-C may include a first touch contact hole HLa defined in the first insulating layer IL1a and a second touch contact hole HLb defined in the second insulating layer IL2a.

[0166] Fig.12 According to an embodiment of the present invention Figure 6Region AA corresponds to an enlarged plan view of the region. Fig.13 is shown along with Fig.12 The line III-III' corresponds to a cross-sectional view of a portion of the line. Fig.12 and Fig.13 When Figure 7 and Fig. 9 The different parts are described in the section.

[0167] Reference Fig.12 and Fig.13 The input sensing layer ISLb may include a buffer layer BFL-I, a first conductive layer, a second conductive layer, an interlayer insulating layer IL-C disposed between the first conductive layer and the second conductive layer, a first insulating layer IL1b, a second insulating layer IL2b, and a third insulating layer IL3b.

[0168] The first auxiliary openings SOPa may be further defined in the first insulating layer IL1b, and the second auxiliary openings SOPb may be further defined in the second insulating layer IL2b.

[0169] The first auxiliary opening SOPa may be defined to surround the first opening OPa. The second auxiliary opening SOPb may be defined in a region corresponding to the first auxiliary opening SOPa (eg, a region overlapping the first auxiliary opening SOPa on a plane). Therefore, the second auxiliary opening SOPb may also be defined to surround the second opening OPb.

[0170] The first auxiliary opening SOPa and the second auxiliary opening SOPb may be referred to as auxiliary lens openings SOPL. A plurality of auxiliary lens openings SOPL may be provided. A plurality of auxiliary lens openings SOPL may be defined as corresponding one-to-one to the peripheries of the first lens opening OPL-MR, the second lens opening OPL-MB, and the third lens opening OPL-MG and surrounding the peripheries of the first lens opening OPL-MR, the second lens opening OPL-MB, and the third lens opening OPL-MG.

[0171] The third insulating layer IL3b may fill the first lens opening OPL-MR, the second lens opening OPL-MB, the third lens opening OPL-MG, and the auxiliary lens opening SOPL. In addition, the third insulating layer IL3b may also provide a flat upper surface.

[0172] Due to the refractive index difference between the first insulating layer IL1b and the third insulating layer IL3b, the light LT and LTa emitted in the side direction may be refracted or totally reflected. According to an embodiment of the present invention, the second light LTa emitted more sideways than the first light LT may be totally reflected or refracted in the auxiliary lens opening SOPL. That is, the paths of the second light LTa and the first light LT may be changed to the third direction DR3 or a direction close to the third direction DR3. As a result, the display device DD (see Figure 1 )'s light efficiency.

[0173] Figures 14a to 14g is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present invention.

[0174] Reference Fig.14a , forming a display panel DP including a plurality of pixel areas PXA1 , PXA2 , and PXA3 .

[0175] The step of forming the display panel DP may include forming a base layer BL, forming a circuit layer ML on the base layer BL, forming a light emitting element layer EL on the circuit layer ML, and forming an encapsulation layer TFE on the light emitting element layer EL.

[0176] Each of the plurality of pixel areas PXA1, PXA2, and PXA3 may correspond to the above reference Figure 7 Each of the first pixel area PXA-R, the second pixel area PXA-B, and the third pixel area PXA-G is described.

[0177] Reference Fig.14b A buffer layer BFL-I is formed on the display panel DP. A first conductive layer CL1 is formed on the buffer layer BFL-I. An interlayer insulating layer IL-C is formed on the first conductive layer CL1. A second conductive layer CL2 is formed on the interlayer insulating layer IL-C.

[0178] Reference Fig.14c , a first initial layer BIL1 is formed on the second conductive layer CL2. The first initial layer BIL1 may be a layer having a first refractive index. The first initial layer BIL1 may be composed of an organic material. The first initial layer BIL1 may be formed in a low temperature environment. The low temperature may refer to a temperature for a process performed at a temperature of about 85 degrees or less, for example.

[0179] Reference Fig.14d , a second initial layer BIL2 is formed on the first initial layer BIL1. The second initial layer BIL2 may include an inorganic material. The second initial layer BIL2 may include a light-transmitting material or a light-blocking material. The second initial layer BIL2 may be formed in a low temperature environment. The low temperature may refer to a temperature for a process performed at a temperature of about 85 degrees or less, for example.

[0180] Reference Fig.14e , a photoresist pattern PRP is formed on the second initial layer BIL2. Although not shown, the photoresist pattern PRP may be formed by patterning the photoresist layer. Patterning may include an exposure process and a development process. The photoresist pattern PRP may include a negative photoresist material or a positive photoresist material. For example, when the photoresist pattern PRP includes a negative photoresist material, the photoresist pattern PRP may be a portion irradiated with light. When the photoresist pattern PRP is a positive photoresist material, the photoresist pattern PRP may be a portion not irradiated with light.

[0181] The second initial layer BIL2 is patterned using the photoresist pattern PRP as a mask to form a mask IL2. The mask IL2 may also be referred to as a second insulating layer IL2. A mask opening OPb may be provided in the mask IL2. The mask opening OPb may also be referred to as a second opening OPb. The mask opening OPb may be provided in an area overlapping with the plurality of pixel areas PXA1, PXA2, and PXA3 on a plane.

[0182] Reference Fig.14f , the first insulating layer IL1 is formed by patterning the first initial layer BIL1 using the mask IL2. The process of patterning the first initial layer BIL1 may include an etching process. The etching process may include a dry etching process. The photoresist pattern PRP may be removed during the process of patterning the first initial layer BIL1, or may be removed by using a separate additional process.

[0183] A first opening OPa may be formed in the first insulating layer IL1 . The first opening OPa may overlap the plurality of pixel areas PXA1 , PXA2 , and PXA3 on a plane.

[0184] According to an embodiment of the present invention, when forming the first opening OPa, the mask IL2 composed of an inorganic material may be used. In addition, the first opening OPa may be formed by a dry etching process using a gas reaction.

[0185] According to a comparative example of the present invention, the first insulating layer may include a photosensitive material, and the first opening in the first insulating layer may be formed by using an exposure process and a development process. In this case, there are the following disadvantages: due to the material properties of the photosensitive material, the inclination of the first opening deviates, and the accuracy for patterning is insufficient. The deviation may cause a dispersion of optical properties, and a residual film may be generated due to insufficient patterning accuracy, which may reduce process reliability. In addition, when the material of the photosensitive material constituting the first insulating layer is changed, there is the inconvenience of redesigning the process conditions for exposing and developing the first insulating layer.

[0186] However, according to an embodiment of the present invention, the first opening OPa can be formed by using a dry etching process. The dry etching process has the advantages of high pattern formation accuracy and easy high-resolution patterning. Therefore, when the first opening OPa is formed in the first insulating layer IL1 by using the mask IL2, the tilt deviation of the first opening OPa can be reduced, and the patterning accuracy can be improved. As the deviation is reduced, the dispersion of the optical properties is reduced, thereby improving the display quality. In addition, since the accuracy of patterning is improved, the first opening OPa can be easily set even in a high-resolution display device.

[0187] In addition, since the pattern formation accuracy in the dry etching process is high, the first opening OPa can be easily formed even if the thickness of the first insulating layer IL1 becomes large. Therefore, the first opening OPa can be easily formed even if the thickness of the first insulating layer IL1 is about 3 micrometers or more.

[0188] Reference Figure 14g A cover layer IL3 having a second refractive index higher than the first refractive index is formed on the mask IL2. The cover layer IL3 may be referred to as a third insulating layer IL3.

[0189] Figures 15a to 15c is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present invention.

[0190] Reference Fig.15a , a first initial layer BIL1x is formed on the second conductive layer CL2. The first initial layer BIL1x may be a layer having a first refractive index. The first initial layer BIL1x may be composed of an organic material. The first initial layer BIL1x may be formed in a low temperature environment. The low temperature may refer to a temperature for a process performed at a temperature of about 85 degrees or less, for example.

[0191] A second initial layer (not shown) is formed on the first initial layer BIL1x, and a photoresist layer (not shown) is formed on the second initial layer. The photoresist layer (not shown) is exposed and developed to form a photoresist pattern PRPx. A mask IL2b is formed by patterning the second initial layer using the photoresist pattern PRPx. The mask IL2b may include an inorganic material. For example, silicon nitride may be included. The mask IL2b may be referred to as a second insulating layer IL2b.

[0192] A mask opening OPb and an auxiliary mask opening SOPb may be formed in the mask IL2b. The auxiliary mask opening SOPb may surround the mask opening OPb. One auxiliary mask opening may surround one mask opening.

[0193] Reference Fig.15bThe first insulating layer IL1b is formed by patterning the first preliminary layer BIL1x using the mask IL2b. The process of patterning the first preliminary layer BIL1x may include an etching process. The etching process may be a dry etching process.

[0194] The first opening OPa and the first auxiliary opening SOPa may be formed in the first insulating layer IL1b. One first auxiliary opening may be formed to surround one first opening.

[0195] Reference Fig.15c , a cover layer IL3b having a second refractive index higher than the first refractive index is formed on the mask IL2b. The cover layer IL3b may be referred to as a third insulating layer IL3b. The first opening OPa, the second opening OPb, the first auxiliary opening SOPa, and the second auxiliary opening SOPb may be filled with the cover layer IL3b. Therefore, due to the refractive index difference between the cover layer IL3b filling the opening and the first insulating layer IL1b, light may be totally reflected or refracted, and as a result, light efficiency may be improved.

[0196] Figures 16a to 16f is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment of the present invention.

[0197] Reference Fig.16a , forming a first connection portion CP1 on the buffer layer BFL-I. Forming a first initial layer BIL1y on the first connection portion CP1. The first initial layer BIL1y may be a layer having a first refractive index. The first initial layer BIL1y may be composed of an organic material. The first initial layer BIL1y may be formed in a low temperature environment.

[0198] Reference Fig.16b The second initial layer BIL2y is formed on the first initial layer BIL1y. The second initial layer BIL2y may include an inorganic material. The second initial layer BIL2y may be formed in a low temperature environment.

[0199] Reference Fig.16c , a photoresist pattern PRPy is formed on the second preliminary layer BIL2y. The photoresist pattern PRPy may be formed by exposing and developing the photoresist layer.

[0200] The mask IL2a is formed by patterning the second initial layer BIL2y using the photoresist pattern PRPy. The mask IL2a may also be referred to as a second insulating layer IL2a. An opening OPb1 defined to correspond to the pixel areas PXA1, PXA2, and PXA3 and a touch contact hole HLb overlapping the first connection portion CP1 may be formed in the mask IL2a.

[0201] Reference Fig.16dThe first insulating layer IL1a is formed by patterning the first preliminary layer BIL1y using a mask IL2a. A first opening OPa1 overlapping the pixel areas PXA1, PXA2, and PXA3 and a touch contact hole HLa overlapping the first connection portion CP1 may be formed in the first insulating layer IL1a.

[0202] Reference Fig.16e , the touch contact hole HLa of the first insulating layer IL1a and the touch contact hole HLb of the mask IL2a may overlap each other on a plane to constitute a touch contact hole HL-C.

[0203] A second conductive layer CL2 is formed on the mask IL2a. The second conductive layer CL2 may include a first sensor portion SP1, a second sensor portion SP2 (see Figure 6 One of the two adjacent first sensor parts SP1 may penetrate one touch contact hole to contact the first connection part CP1, and the other adjacent first sensor part may penetrate the other touch contact hole to contact the first connection part CP1.

[0204] Reference Fig.16f , a cover layer IL3a having a second refractive index higher than the first refractive index is formed on the mask IL2a. The cover layer IL3a may also be referred to as a third insulating layer IL3a. The first opening OPa1 and the second opening OPb1 may be filled with the cover layer IL3a. Therefore, due to the refractive index difference between the cover layer IL3a filling the opening and the first insulating layer IL1a, light may be totally reflected or refracted, and as a result, light efficiency may be improved.

[0205] Although the present invention has been described with reference to the preferred embodiments of the present invention, it will be understood by those skilled in the art or those of ordinary skill in the art that various modifications and changes may be made to the present invention without departing from the spirit and technical field of the present invention described in the claims described later. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be determined by the claims.

[0206] Industrial Applicability

[0207] The present invention improves the image quality and light output efficiency of a display device and has high industrial applicability.

Claims

1. A display device, comprising: A display panel including a plurality of pixel regions; a first insulating layer disposed on the display panel, having a first refractive index, and having a plurality of first openings defined in a region overlapping the plurality of pixel regions; a second insulating layer disposed directly on the first insulating layer and having a plurality of second openings defined in regions corresponding to the plurality of first openings; as well as a third insulating layer covering the display panel, the first insulating layer and the second insulating layer, and having a second refractive index higher than the first refractive index, wherein the third insulating layer overlaps with the plurality of pixel regions on a plane, and wherein each of the plurality of first openings and the plurality of second openings is filled with the third insulating layer.

2. The display device according to claim 1, further comprising: A first conductive layer, disposed on the display panel; as well as The second conductive layer is disposed on the first conductive layer.

3. The display device according to claim 2, further comprising an interlayer insulating layer provided between the first conductive layer and the second conductive layer, in, The first insulating layer is disposed on the second conductive layer.

4. The display device according to claim 2, wherein: The first insulating layer and the second insulating layer are disposed between the first conductive layer and the second conductive layer.

5. The display device according to claim 4, wherein: The first conductive layer includes a connection portion, the second conductive layer includes a sensor portion, a touch contact hole is defined in the first insulating layer and the second insulating layer, and the connection portion is electrically connected to the sensor portion through the touch contact hole.

6. The display device according to claim 5, wherein: Each of the sensor portions has a grid shape, and on a plane, the sensor portion does not overlap with the plurality of pixel regions.

7. The display device according to claim 4, wherein: The third insulating layer is disposed on the second conductive layer to cover the second conductive layer.

8. The display device according to claim 1, wherein: The first insulating layer includes a first organic material, the second insulating layer includes an inorganic material, and the third insulating layer includes a second organic material.

9. The display device according to claim 1, wherein: A plurality of first auxiliary openings are further defined in the first insulating layer, and each of the plurality of first auxiliary openings is defined to surround a corresponding first opening among the plurality of first openings.

10. The display device according to claim 9, wherein: A plurality of second auxiliary openings are further defined in the second insulating layer, and the plurality of second auxiliary openings are defined in regions corresponding to the plurality of first auxiliary openings.

11. The display device according to claim 1, wherein: The thickness of the first insulating layer is greater than the thickness of the second insulating layer.

12. The display device according to claim 1, wherein: The first refractive index is 1.45 to 1.55, and the second refractive index is 1.60 to 1.

70.

13. A method for manufacturing a display device, the method comprising: forming a display panel including a plurality of pixel regions; forming a first initial layer having a first refractive index on the display panel; forming a second initial layer including an inorganic material on the first initial layer; forming a mask by patterning the second initial layer; forming a first insulating layer by patterning the first preliminary layer using the mask; as well as forming a capping layer having a second refractive index higher than the first refractive index on the mask, The step of forming the mask includes forming a plurality of mask openings in a region of the second initial layer that overlaps with the plurality of pixel regions in a plane.

14. The method according to claim 13, wherein: The steps of forming the display panel include: forming a matrix layer; forming a circuit layer on the substrate layer; forming a light emitting layer on the circuit layer; and An encapsulation layer is formed on the light emitting layer.

15. The method according to claim 14, further comprising: forming a buffer layer on the encapsulation layer; forming a first conductive layer on the buffer layer; forming an interlayer insulating layer covering the first conductive layer; as well as forming a second conductive layer on the interlayer insulating layer, Wherein, the first initial layer is formed on the second conductive layer.

16. The method according to claim 13, wherein: The step of forming the mask further includes forming a plurality of auxiliary mask openings corresponding one-to-one to the plurality of mask openings and surrounding the plurality of mask openings.

17. The method according to claim 13, wherein: The first initial layer includes a first organic material, and the capping layer includes a second organic material.

18. The method according to claim 14, further comprising: forming a buffer layer on the encapsulation layer; forming a first conductive layer on the buffer layer; as well as forming a second conductive layer on the first conductive layer, The mask and the first insulating layer are formed between the first conductive layer and the second conductive layer, and the cover layer is formed on the second conductive layer.

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