Display device and method of forming the same

Abstract

In some embodiments, the present disclosure relates to a display device comprising a first reflector electrode and a second reflector electrode separated from the first reflector electrode. The display device further comprises an isolation structure overlying the first reflector electrode and the second reflector electrode. The isolation structure comprises a first portion and a second portion. The first portion overlies the first reflector electrode and has a first thickness. The second portion overlies the second reflector electrode, has a second thickness greater than the first thickness, and is separated from the first portion of the isolation structure. The display device further comprises a first optical emitter structure and a second optical emitter structure overlying the first portion and the second portion of the isolation structure, respectively.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to a display device and a method for forming the same. Background Art

[0002] Many modern electronic devices, such as televisions and cellular devices, use image display devices to convert digital data into optical images. To achieve this, the image display device may include an array of pixel regions. Each pixel region may have an optical emitter structure and may be coupled to a semiconductor device. The semiconductor device may selectively apply an electrical signal (e.g., a voltage) to the optical emitter structure. After the electrical signal is applied, the optical emitter structure may emit an optical signal (e.g., light). The optical emitter structure may be, for example, an organic light emitting diode (OLED) or some other suitable light-emitting device. Summary of the Invention

[0003] According to an embodiment of the present disclosure, a display device includes a first reflector electrode, a second reflector electrode, an isolation structure, a first optical emitter structure, and a second optical emitter structure. The second reflector electrode is separated from the first reflector electrode. The isolation structure overlies the first and second reflector electrodes, and includes a first portion overlying the first reflector electrode and having a first thickness, and a second portion overlying the second reflector electrode. The second portion has a second thickness greater than the first thickness and is separated from the first portion of the isolation structure. The first and second optical emitter structures overlie the first and second portions of the isolation structure, respectively.

[0004] According to an embodiment of the present disclosure, a display device includes a first reflector electrode, a second reflector electrode, a first isolation layer, a second isolation layer, a first optical emitter structure, a second optical emitter structure, a first conductive structure, and a second conductive structure. The first reflector electrode and the second reflector electrode are located above an interconnect structure. The first isolation layer includes a pair of segments that are spaced apart from each other and overlie the first reflector electrode and the second reflector electrode, respectively. The second isolation layer overlies the first isolation layer and the second reflector electrode, but does not overlie the first reflector electrode. The first optical emitter structure overlies the first isolation layer and the first reflector electrode, and the second optical emitter structure overlies the second isolation layer and the second reflector electrode. A first conductive structure and a second conductive structure extend from the first reflector electrode to the first optical emitter structure and from the second reflector electrode to the second optical emitter structure, respectively, wherein the first conductive structure extends through the first isolation layer, and wherein the second conductive structure extends through the first isolation layer and the second isolation layer.

[0005] According to an embodiment of the present disclosure, a method for forming a display device includes: forming a first reflector electrode and a second reflector electrode on an interconnect structure, wherein the first reflector electrode is laterally separated from the second reflector electrode; depositing a first isolation layer on the first reflector electrode and the second reflector electrode; forming a first shielding layer directly overlying the first reflector electrode but not overlying the second reflector electrode; depositing a second isolation layer on the first isolation layer and on the first shielding layer; forming a second shielding layer on the second isolation layer, and the second shielding layer directly overlying the second reflector electrode but not overlying the first reflector electrode; performing a first removal process to remove multiple portions of the first isolation layer and the second isolation layer that are not covered by the first shielding layer or the second shielding layer; and performing a second removal process to remove the first shielding layer and the second shielding layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The various aspects of the present disclosure are best understood by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1 Cross-sectional views illustrating some embodiments of a display device having an isolation structure disposed over a reflector electrode structure, wherein the isolation structure includes a first portion and further includes a second portion spaced apart from the first portion and having a different thickness than the first portion.

[0008] Figure 2 Example Figure 1 Cross-sectional views of some additional embodiments of display devices in FIG. 1 and exemplary light paths through a portion of an isolation structure.

[0009] Figure 3 and Figure 4 Example Figure 1 Cross-sectional views of some additional embodiments of a display device in which the display device includes an isolation structure having different material layers.

[0010] Figures 5 to 18 、 Figures 19A to 19C 、 Figure 20 and Figure 21 Cross-sectional views illustrating some embodiments of a method of forming a display device having an isolation structure disposed above a reflector electrode structure, wherein the isolation structure includes a first portion and a second portion spaced apart from each other to mitigate damage to the reflector electrode structure.

[0011] Figure 22 Examples and Figures 5 to 18 、 Figures 19A to 19C 、 Figure 20 and Figure 21 Flowcharts of some embodiments of the corresponding methods.

[0012] [Explanation of Symbols]

[0013] 100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600, 1700, 1800, 1900A, 1900B, 1900C, 2000, 2100: Cross-sectional view

[0014] 101a: first pixel area

[0015] 101b: second pixel area

[0016] 101c: third pixel area

[0017] 102a: First reflector electrode

[0018] 102b: Second reflector electrode

[0019] 102c: third reflector electrode

[0020] 104: First blocking structure

[0021] 106: Isolation Structure

[0022] 106a: Part 1

[0023] 106b: Part 2

[0024] 106c: Part 3

[0025] 108a: First through-hole structure

[0026] 108b: Second through-hole structure

[0027] 108c: Third through-hole structure

[0028] 110a: First optical emitter structure

[0029] 110b: Second optical emitter structure

[0030] 110c: Third optical emitter structure

[0031] 112a: first transparent electrode

[0032] 112b: second transparent electrode

[0033] 112c: third transparent electrode

[0034] 114: Second blocking structure

[0035] 120: Control circuit system

[0036] 122: substrate

[0037] 124: Semiconductor devices

[0038] 124a: Source / drain region

[0039] 124b: Gate electrode

[0040] 124c: Gate dielectric layer

[0041] 130: Internal structure

[0042] 132: Interconnect dielectric structure

[0043] 134: Internal wiring

[0044] 136: Internal connecting hole

[0045] 150: Frontline

[0046] 152: Second Line

[0047] 202: First light path

[0048] 204: Second light path

[0049] 302: First isolation layer

[0050] 304: Second isolation layer

[0051] 306: The third isolation layer

[0052] 308: First interface

[0053] 310: Second interface

[0054] 312: The third interface

[0055] 314: The fourth interface

[0056] 316: Fifth Interface

[0057] 318: Sixth Interface

[0058] 402: Seventh interface

[0059] 602: First dielectric layer

[0060] 603: First barrier layer

[0061] 604: Second dielectric layer

[0062] 702: Cavity

[0063] 802: Conductive materials

[0064] 1004: First conformal shielding layer

[0065] 1006: First conformal oxide layer

[0066] 1106: First oxide layer

[0067] 1204: First shielding layer

[0068] 1204s: outer wall

[0069] 1402: Second conformal shielding layer

[0070] 1404: Second conformal oxide layer

[0071] 1502: Second shielding layer

[0072] 1504: Second oxide layer

[0073] 1702: Third conformal shielding layer

[0074] 1704: Third conformal oxide layer

[0075] 1802: Third shielding layer

[0076] 1804: Third oxide layer

[0077] 1902: First removal process

[0078] 2200: Method

[0079] 2202, 2204, 2206, 2208, 2210, 2212, 2214: Action

[0080] t1: first thickness

[0081] t2: second thickness

[0082] t3: third thickness

[0083] t4: fourth thickness

[0084] t5: fifth thickness

[0085] w1: first width

[0086] w2: second width

[0087] w3: third width DETAILED DESCRIPTION

[0088] The following disclosure provides many different embodiments or examples to implement the different features of the provided subject matter. Specific examples of components and arrangements are set forth below to simplify the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, forming a first feature on or on a second feature may include an embodiment in which the first feature and the second feature are formed to be in direct contact, and may also include an embodiment in which an additional feature may be formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. In addition, the present disclosure may reuse reference numbers and / or letters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0089] Furthermore, for ease of description, spatially relative terms, such as "beneath," "below," "lower," "above," and "upper," may be used herein to describe the relationship of one element or feature to another element or feature as depicted in the figures. These spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0090] A display device includes an array of pixel regions, wherein each pixel region includes a portion of an isolation structure disposed between a reflector electrode and a transparent electrode. A via structure may extend through the isolation structure to electrically couple the reflector electrode to the transparent electrode. An optical emitter structure may be disposed above the transparent electrode. The isolation structure may comprise silicon dioxide, and the portion of the isolation structure may have a thickness corresponding to a certain color. For example, during operation of the display device, an electrical signal (e.g., a voltage) may be applied to the transparent electrode from circuitry coupled to the reflector electrode, the via structure, and the transparent electrode. The electrical signal may cause light to be generated at the interface between the optical emitter structure and the transparent electrode (e.g., due to electron-hole recombination). The light may be reflected by a top surface of the isolation structure and / or may travel through the isolation structure, be reflected by the reflector electrode, and travel back toward the top surface of the isolation structure. Due to constructive interference of light of a given wavelength at the top surface of the isolation structure and / or destructive interference of light of other wavelengths at the top surface of the isolation structure, colored light may be emitted from the top surface of the optical emitter structure depending on the thickness of the portion of the isolation structure.

[0091] To form the isolation structure, a first isolation layer may be formed, for example, over the first and second reflector electrodes. The first isolation layer may then be patterned to remove it from the second reflector electrode. A second isolation layer may then be formed over the first and second reflector electrodes. However, patterning the first isolation layer may damage the top surface of the second reflector electrode (e.g., causing pits, crystal defects, increased surface roughness, etc.), thereby affecting the interface between the second isolation layer and the second reflector electrode. For example, an etching process may be used to remove the first isolation layer covering the second reflector electrode. This etching process may use a dry etchant and damage the top surface of the second reflector electrode by increasing surface roughness. Because the second reflector electrode receives and reflects light at its top surface, damage to the top surface may scatter the reflected light, which may, for example, cause the emitted light to be of a different color and / or reduce the intensity of the emitted light. Consequently, the aforementioned patterning process may render the display device unreliable.

[0092] Various embodiments of the present disclosure relate to a method for forming an isolation structure to mitigate damage to an underlying reflector electrode structure of a display device, the isolation structure comprising a first portion, a second portion, and a third portion separated from each other. In some embodiments, a first reflector electrode and a second reflector electrode are formed over the interconnect structure. A first isolation layer is deposited over the first reflector electrode and the second reflector electrode. A first shielding layer is formed over the first reflector electrode such that the first shielding layer directly overlies the first reflector electrode and does not directly overlie the second reflector electrode. A second isolation layer is deposited over the first isolation layer and over the first shielding layer. A second shielding layer is then formed over the second reflector electrode such that the second shielding layer directly overlies the second reflector electrode and does not directly overlie the first reflector electrode or the first shielding layer.

[0093] A first removal process is performed to remove portions of the first isolation layer and the second isolation layer that are not directly beneath the first shielding layer or the second shielding layer. The first shielding layer and the second shielding layer are hard masks, and therefore, during the first removal process, the first shielding layer and the second shielding layer protect the underlying first isolation layer, the second isolation layer, the first reflector electrode, and the second reflector electrode from damage caused by the first removal process. For example, in some embodiments, the first removal process utilizes plasma dry etching, and the first shielding layer and the second shielding layer block ions from passing through and reaching the underlying first isolation layer and the second isolation layer and the underlying first reflector electrode and the second reflector electrode. In addition, a second removal process is performed to remove the first shielding layer and the second shielding layer. The second removal process can be performed by wet etching to selectively remove the first shielding layer and the second shielding layer, while the first reflector electrode and the second reflector electrode are protected by the first isolation layer and the second isolation layer. Therefore, since the first reflector electrode and the second reflector electrode are respectively protected during the first removal process and the second removal process of forming the isolation structure, damage to the first reflector electrode and the second reflector electrode is reduced, thereby manufacturing a reliable device.

[0094] Figure 1 A cross-sectional view 100 illustrates some embodiments of a display device including an isolation structure having a first portion, a second portion, and a third portion separated from each other.

[0095] The display device of cross-sectional view 100 includes a first pixel region 101a, a second pixel region 101b, and a third pixel region 101c. Each of the first pixel region 101a, the second pixel region 101b, and the third pixel region 101c is configured to emit light of a different color (e.g., red, green, blue) when receiving an electrical signal (e.g., a voltage), and the color of the light depends on the thickness and material of the isolation structure 106. For example, in some embodiments, the first pixel region 101a may include a first portion 106a of the isolation structure 106 having a first thickness t1; the second pixel region 101b may include a second portion 106b of the isolation structure 106 having a second thickness t2; and the third pixel region 101c may include a third portion 106c of the isolation structure 106 having a third thickness t3. In some embodiments, the first thickness t1, the second thickness t2, and the third thickness t3 are different from each other. For example, in some embodiments, the first thickness t1 may be less than the second thickness t2 and the third thickness t3, and the second thickness t2 may be less than the third thickness t3.

[0096] In some embodiments, the first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106 may each include one or more oxides, such as, for example, silicon dioxide, aluminum oxide, etc. In other embodiments, the first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106 may include a nitride (e.g., silicon nitride) or some other material having optical properties such that colored light is visible from the surface of the material, and the colored light depends on the thickness of each portion (first portion 106a, second portion 106b, third portion 106c) of the isolation structure 106. For example, the first thickness t1 may correspond to red light, the second thickness t2 may correspond to blue light, and the third thickness t3 may correspond to green light.

[0097] The first portion 106a of the isolation structure 106 may be disposed between the first reflector electrode 102a and the first transparent electrode 112a. The second portion 106b of the isolation structure 106 may be disposed between the second reflector electrode 102b and the second transparent electrode 112b. The third portion 106c of the isolation structure 106 may be disposed between the third reflector electrode 102c and the third transparent electrode 112c. The first, second, and third optical emitter structures 110a, 110b, and 110c may be disposed above the first, second, and third transparent electrodes 112a, 112b, and 112c, respectively. In some embodiments, the first, second, and third via structures 108a, 108b, and 108c extend through the first, second, and third portions 106a, 106b, and 106c of the isolation structure 106, respectively. The via structures (first via structure 108a, second via structure 108b, and third via structure 108c) extend from the top surface to the bottom surface of each portion (first portion 106a, second portion 106b, and third portion 106c) of the isolation structure 106. Thus, the first via structure 108a can electrically couple the first reflector electrode 102a to the first transparent electrode 112a; the second via structure 108b can electrically couple the second reflector electrode 102b to the second transparent electrode 112b; and the third via structure 108c can electrically couple the third reflector electrode 102c to the third transparent electrode 112c.

[0098] In some embodiments, the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c can be coupled to the control circuitry 120. For example, in some embodiments, the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c are disposed on an interconnect structure 130, which includes a network of interconnect wires 134 and interconnect vias 136 embedded in an interconnect dielectric structure 132. In some embodiments, the interconnect structure 130 is disposed on the substrate 122 and coupled to the semiconductor device 124. In some embodiments, the semiconductor device 124 can be, for example, a metal oxide semiconductor field-effect transistor (MOSFET), which includes source / drain regions 124a located within the substrate 122 and a gate electrode 124b located on the substrate 122. The gate electrode 124b can be separated from the substrate 122 by a gate dielectric layer 124c. The control circuitry 120 is configured to selectively supply an electrical signal (e.g., a voltage) to each of the first pixel region 101a, the second pixel region 101b, and the third pixel region 101c to emit colored light as indicated by the digital data. For example, if an electrical signal (e.g., a voltage) is supplied from the control circuitry 120 to the first reflector electrode 102a, the electrical signal (e.g., the voltage) may cause the first optical emitter structure 110a to generate light, and the light may reflect from the top surface of the first portion 106a of the isolation structure 106 and / or travel through the first portion 106a of the isolation structure 106, reflect from the first reflector electrode 102a, and exit through the top surface of the first portion 106a of the isolation structure 106. Due to constructive and / or destructive interference, colored light may be observed depending on the first thickness t1 and the material of the first portion 106a of the isolation structure 106.

[0099] In some embodiments, the first blocking structure 104 and / or the second blocking structure 114 separate the first pixel region 101a, the second pixel region 101b, and the third pixel region 101c. In some embodiments, the first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106 are completely separated from each other by the second blocking structure 114.

[0100] For example, in some embodiments, the first line 150 may be arranged between the first portion 106a and the second portion 106b of the isolation structure 106 without intersecting the first portion 106a or the second portion 106b of the isolation structure 106. The first line 150 may extend continuously in a first direction perpendicular to the upper surface of the first reflector electrode 102a and may also be arranged between the first reflector electrode 102a and the second reflector electrode 102b, between the first transparent electrode 112a and the second transparent electrode 112b, and between the first optical emitter structure 110a and the second optical emitter structure 110b. In some embodiments, the first line 150 may intersect the first and second blocking structures 104 and 114. Therefore, in some embodiments, the second blocking structure 114 directly overlies the first blocking structure 104. Furthermore, a second line 152, which is parallel to the first line 150 and extends continuously in the first direction, may be arranged between the second portion 106b and the third portion 106c of the isolation structure 106 without intersecting the second portion 106b or the third portion 106c of the isolation structure 106. In some embodiments, as a result of protecting the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c during fabrication of the isolation structure 106, the first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106 may be completely separated from each other. In some embodiments, the separation between the first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106 may also reduce optical interference between each of the first pixel region 101a, the second pixel region 101b, and the third pixel region 101c, thereby providing a reliable display device.

[0101] Figure 2 A cross-sectional view 200 illustrating some embodiments of a display device including an isolation structure having a first portion, a second portion, and a third portion spaced apart from one another, and exemplary light paths during operation of the display device.

[0102] The display device in the cross-sectional view 200 includes a first reflector electrode 102a having a first width w1, a second reflector electrode 102b having a second width w2, and a third reflector electrode 102c having a third width w3. In some embodiments, the first width w1, the second width w2, and the third width w3 may be substantially equal to each other, for example, Figure 1 As shown in , while in other embodiments, as Figure 2As shown in , the first width w1, the second width w2, and the third width w3 may be different from each other. For example, in some embodiments, the third width w3 may be smaller than the second width w2, and the second width w2 may be smaller than the first width w1. In some embodiments, the minimum width (e.g., the first width w1) corresponds to a pixel region (e.g., the first pixel region 101a) having a portion (e.g., the first portion 106a) of the isolation structure 106 with the minimum thickness (e.g., the first thickness t1). Similarly, in some embodiments, the maximum width (e.g., the third width w3) corresponds to a pixel region (e.g., the third pixel region 101c) having a portion (e.g., the third portion 106c) of the isolation structure (e.g., the isolation structure 106) with the maximum thickness (e.g., the third thickness t3). However, in other embodiments, the widths (e.g., first width w1, second width w2, third width w3) of the reflector electrodes (e.g., first reflector electrode 102a, second reflector electrode 102b, third reflector electrode 102c) in each pixel region (e.g., first pixel region 101a, second pixel region 101b, third pixel region 101c) are not associated with the thicknesses (e.g., first thickness t1, second thickness t2, third thickness t3) of the portions (e.g., first isolation structure 106a, second isolation structure 106b, third isolation structure 106c) of the isolation structure (e.g., isolation structure 106).

[0103] Cross-sectional view 200 also illustrates an exemplary first light path 202 in first pixel region 101a and an exemplary second light path 204 in second pixel region 101b. In some embodiments, first and second optical emitter structures 110a, 110b generate light due to electrical signals (e.g., voltages) applied by control circuitry 120 to first and second reflector electrodes 102a, 102b, respectively. For example, in cross-sectional view 200, first and second pixel regions 101a, 101b are "ON" (e.g., light is generated at first and second optical emitter structures 110a, 110b), while third pixel region 101c is "OFF" (e.g., light is not generated by third optical emitter structure 110c). In the first pixel region 101a, an exemplary first light path 202 illustrates how, in some embodiments, light generated at the first optical emitter structure 110a may be reflected by the top surface of the first portion 106a of the isolation structure 106 and / or travel through the first portion 106a of the isolation structure 106, be reflected by the first reflector electrode 102a, and travel back upward toward the top surface of the first portion 106a of the isolation structure 106. Due to constructive interference of the first wavelength and / or destructive interference of the remaining wavelengths, colored light having a first wavelength may be emitted / visible from the top surface of the first optical emitter structure 110a in the first pixel region 101a. The first wavelength is associated with the first thickness t1 and material of the first portion 106a of the isolation structure 106, and in some embodiments, the first wavelength is the only or predominant wavelength emitted / visible from the top surface of the first optical emitter structure 110a.

[0104] Similarly, in the second pixel region 101b, an exemplary second light path 204 illustrates how, in some embodiments, light generated at the second optical emitter structure 110b may be reflected by the top surface of the second portion 106b of the isolation structure 106 and / or travel through the second portion 106b of the isolation structure 106, be reflected by the second reflector electrode 102b, and travel back upward toward the top surface of the second portion 106b of the isolation structure 106. Due to constructive interference of the second wavelength and / or destructive interference of the remaining wavelengths, colored light having a second wavelength may be emitted / visible from the top surface of the second optical emitter structure 110b in the second pixel region 101b. The second wavelength is associated with the second thickness t2 and material of the second portion 106b of the isolation structure 106, and in some embodiments, the second wavelength is the only or predominant wavelength emitted / visible from the top surface of the second optical emitter structure 110b. In some embodiments, because the second thickness t2 of the second portion 106b of the isolation structure 106 is different from the first thickness t1 of the first portion 106a of the isolation structure 106, the second wavelength is different from the first wavelength, and therefore, the second pixel region 101b emits a different color light than the first pixel region 101a. Therefore, the control circuit system 120 can use digital data to selectively "turn on" one or more pixel regions (e.g., the first pixel region 101a, the second pixel region 101b, and the third pixel region 101c) to generate an optical image.

[0105] Figure 3 A cross-sectional view 300 illustrates some embodiments of a display device including an isolation structure having a first portion, a second portion, and a third portion, wherein the second portion and the third portion include multiple layers.

[0106] The display device in cross-sectional view 300 includes: 1) a first portion 106a of isolation structure 106, comprising a first isolation layer 302; 2) a second portion 106b of isolation structure 106, comprising a second isolation layer 304 disposed above first isolation layer 302; and 3) a third portion 106c of isolation structure 106, comprising a second isolation layer 304 disposed above first isolation layer 302 and below third isolation layer 306. The first, second, and third portions 106a, 106b, 106c of isolation structure 106 are still separated from each other by second barrier structure 114. In some embodiments, first isolation layer 302, second isolation layer 304, and third isolation layer 306 comprise different materials. For example, in some embodiments, first isolation layer 302 may comprise aluminum oxide; second isolation layer 304 may comprise silicon dioxide; and third isolation layer 306 may comprise some other material with optical properties, such as silicon nitride. In other embodiments, each of the first isolation layer 302, the second isolation layer 304, and the third isolation layer 306 may comprise the same material, such as, for example, silicon dioxide. In such embodiments, the isolation layers (the first isolation layer 302, the second isolation layer 304, the third isolation layer 306) may be indistinguishable from one another, and the first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106 may appear to be Figure 1 The first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106 shown in the cross-sectional view 100 of FIG.

[0107] In some embodiments, the first thickness t1 of the first portion 106a of the isolation structure 106 may be equal to the thickness of the first isolation layer 302. In some embodiments, the first portion 106a of the isolation structure 106 contacts the first reflector electrode 102a at a first interface 308 and contacts the first transparent electrode 112a at a second interface 310. The first thickness t1 of the first portion 106a of the isolation structure 106 may be measured in a first direction normal to the top surface of the first reflector electrode 102a, from the first interface 308 to the second interface 310. In some embodiments, the second thickness t2 of the second portion 106b of the isolation structure 106 may be equal to the sum of the thickness of the first isolation layer 302 and the thickness of the second isolation layer 304. In some embodiments, the second portion 106b of the isolation structure 106 contacts the second reflector electrode 102b at a third interface 312 and contacts the second transparent electrode 112b at a fourth interface 314. The second thickness t2 of the second portion 106b of the isolation structure 106 may be measured in the first direction, from the third interface 312 to the fourth interface 314. In some embodiments, the third thickness t3 of the third portion 106c of the isolation structure 106 may be equal to the sum of the thickness of the first isolation layer 302, the thickness of the second isolation layer 304, and the thickness of the third isolation layer 306. In some embodiments, the third portion 106c of the isolation structure 106 contacts the third reflector electrode 102c at the fifth interface 316 and contacts the third transparent electrode 112c at the sixth interface 318. The third thickness t3 of the third portion 106c of the isolation structure 106 may be measured in the first direction from the fifth interface 316 to the sixth interface 318.

[0108] Figure 3 The cross-sectional view 300 further illustrates that, in some embodiments, the first through-hole structure 108a, the second through-hole structure 108b, and the third through-hole structure 108c can extend completely through the first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106, respectively. In some embodiments, the through-hole structures (the first through-hole structure 108a, the second through-hole structure 108b, and the third through-hole structure 108c) include a material that completely fills the space between the outer sidewalls of each through-hole structure (the first through-hole structure 108a, the second through-hole structure 108b, and the third through-hole structure 108c). In other embodiments (e.g., Figure 1), the transparent electrodes (first transparent electrode 112a, second transparent electrode 112b, transparent electrode 112c) fill some of the space between the outer sidewalls of the through-hole structures (first through-hole structure 108a, second through-hole structure 108b, third through-hole structure 108c). In this embodiment, because the through-hole structures (first through-hole structure 108a, second through-hole structure 108b, third through-hole structure 108c) between the reflector electrodes (first reflector electrode 102a, second reflector electrode 102b, third reflector electrode 102c) and the transparent electrodes (first transparent electrode 112a, second transparent electrode 112b, third transparent electrode 112c) are thinner, the electrical connection between the transparent electrodes (first transparent electrode 112a, second transparent electrode 112b, third transparent electrode 112c) and the reflector electrodes (first reflector electrode 102a, second reflector electrode 102b, third reflector electrode 102c) can be more efficient.

[0109] Figure 4 A cross-sectional view 400 of an isolation structure is illustrated having a first portion, a second portion, and a third portion, wherein the third portion of the isolation structure includes a second layer and a third layer comprising the same material.

[0110] Figure 4 Cross-sectional view 400 illustrates some embodiments of a display device in which portions (first isolation structure 106a, second isolation structure 106b, third isolation structure 106c) of an isolation structure (isolation structure 106) may be wider than their respective overlying transparent electrodes (first transparent electrode 112a, second transparent electrode 112b, third transparent electrode 112c) and / or optical emitter structures (first optical emitter structure 110a, second optical emitter structure 110b, third optical emitter structure 110c).

[0111] Furthermore, the display device in cross-sectional view 400 includes a first portion 106a, a second portion 106b, and a third portion 106c of isolation structure 106. In some embodiments, third portion 106c of isolation structure 106 may include first isolation layer 302, second isolation layer 304, and third isolation layer 306. In some embodiments, first isolation layer 302 may comprise a first material, and second isolation layer 304 and third isolation layer 306 may comprise a second material different from the first material. For example, in some embodiments, the first material may comprise aluminum oxide, and the second material may comprise silicon dioxide. In some embodiments, first isolation layer 302 may be thinner than each of second isolation layer 304 and third isolation layer 306. In such embodiments, first isolation layer 302 may comprise aluminum oxide, for example, because controlling the thickness of aluminum oxide during deposition may be easier than controlling the thickness of silicon dioxide, for example. Because second isolation layer 304 and third isolation layer 306 may comprise the same second material, seventh interface 402 between second isolation layer 304 and third isolation layer 306 may be indistinguishable, as indicated by the dashed line.

[0112] Figures 5 to 18 、 Figures 19A to 19C 、 Figure 20 and Figure 21 Cross-sectional views 500 through 1800, 1900A through 1900C, 2000, and 2100 illustrate some embodiments of methods for forming isolation structures over reflector electrode structures to prevent damage to the reflector electrode structures and produce reliable display devices. Figures 5 to 18 、 Figures 19A to 19C 、 Figure 20 and Figure 21 This is about a method, but it should be understood that Figures 5 to 18 、 Figures 19A to 19C 、 Figure 20 and Figure 21 The structure disclosed in is not limited to such a method, but can exist as a structure independently of the method.

[0113] like Figure 5As shown in cross-sectional view 500 of FIG, in some embodiments, control circuitry 120 may be formed over substrate 122. In some embodiments, control circuitry 120 may include an interconnect structure 130 disposed over substrate 122. Interconnect structure 130 may include interconnect wiring 134 and interconnect vias 136 embedded in interconnect dielectric structure 132. In some embodiments, interconnect wiring 134 and interconnect vias 136 may comprise copper, tungsten, or the like. Interconnect structure 130 may be coupled to semiconductor device 124 integrated over substrate 122. In some embodiments, semiconductor device 124 may be or may include a metal oxide semiconductor field effect transistor (MOSFET), wherein the MOSFET includes source / drain regions 124a disposed in substrate 122. Semiconductor device 124 may also include a gate electrode 124b disposed over a gate dielectric layer 124c disposed over substrate 122.

[0114] like Figure 6As shown in cross-sectional view 600 of FIG, a first dielectric layer 602, a first barrier layer 603, and a second dielectric layer 604 can be formed over interconnect structure 130. In some embodiments, first dielectric layer 602, first barrier layer 603, and second dielectric layer 604 can comprise the same material. In other embodiments, at least first barrier layer 603 can comprise a different material than first dielectric layer 602 and / or second dielectric layer 604. First barrier layer 603 can comprise a dielectric material, which can also serve as an etch stop layer to protect interconnect structure 130. For example, in some embodiments, first barrier layer 603 can comprise a nitride (e.g., silicon nitride), a carbide (e.g., silicon carbide), or the like. Furthermore, in some embodiments, the first dielectric layer and the second dielectric layer 604 may include a dielectric material such as, for example, a nitride (e.g., silicon nitride, silicon oxynitride), a carbide (e.g., silicon carbide), an oxide (e.g., silicon oxide), borosilicate glass (BSG), undoped silicate glass (USG), phosphoric silicate glass (PSG), borophosphosilicate glass (BPSG), a low-k oxide (e.g., a carbon-doped oxide, SiCOH), etc. In some embodiments, the first dielectric layer and / or the second dielectric layer 604 may include the same material as the interconnect dielectric structure 132. In some embodiments, the first dielectric layer 602, the first barrier layer 603, and / or the second dielectric layer 604 may each be formed using a deposition process (e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PE-CVD), atomic layer deposition (ALD), sputtering, etc.).

[0115] like Figure 7 As shown in the cross-sectional view 700, the first dielectric layer 602, the second dielectric layer 604 and the first barrier layer ( Figure 6The first barrier layer 603 is formed by removing portions of the first barrier layer 603 to define cavities 702 separated by the first barrier structure 104. Each cavity 702 can expose a top portion of the inner communicating hole 136. The cavities 702 can be formed using photolithography and removal (e.g., etching) processes. In some embodiments, each cavity 702 can have equal widths, where the first width w1 is equal to the second width w2 and the third width w3. In other embodiments, at least one of the first width w1, the second width w2, or the third width w3 is different.

[0116] like Figure 8 As shown in the cross-sectional view 800 of FIG. 8 , a conductive material 802 may be deposited on the interconnect structure 130 so that the conductive material 802 fills the cavity ( Figure 7 In some embodiments, the conductive material 802 comprises a metal that is both conductive and reflective. For example, in some embodiments, the conductive material 802 may comprise aluminum or aluminum copper. The conductive material 802 may be deposited over the interconnect dielectric structure 132 using a deposition process (e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), PE-CVD, atomic layer deposition (ALD), sputtering, etc.). In some embodiments, the conductive material 802 overfills the cavity ( Figure 7 The cavity 702 is formed so that the conductive material 802 has a top surface located above the second dielectric layer 604.

[0117] like Figure 9 As shown in the cross-sectional view 900 of FIG. 1 , a planarization process (eg, chemical mechanical planarization (CMP)) is performed to remove the conductive material ( Figure 8Portions of the conductive material 802 (of the conductive material 802) located above the second dielectric layer 604 are planarized to form the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c. The first reflector electrode 102a may have a first width w1, the second reflector electrode 102b may have a second width w2, and the third reflector electrode 102c may have a third width w3. The first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c may have upper surfaces that are substantially coplanar with each other. Furthermore, the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c may have upper surfaces that are substantially coplanar with the second dielectric layer 604. In other embodiments, the planarization process may remove, for example, the second dielectric layer 604, and thus the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c may have upper surfaces that are substantially coplanar with the first blocking structure 104. In some embodiments, the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c may each be coupled to a different one of the plurality of semiconductor devices 124. Furthermore, each of the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c may be laterally spaced apart from each other and electrically isolated from each other by the first blocking structure 104.

[0118] In some embodiments, after the planarization process, the first reflector electrode 102a may have a first average surface roughness, the second reflector electrode 102b may have a second average surface roughness, and the third reflector electrode 102c may have a third average surface roughness. In some embodiments, since each reflector electrode (the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c) includes the same material and uses the same process method (e.g., deposition method), the surface roughness of the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c may be the same. Figure 8The conductive material 802 (conductive material 802 and then a planarization process) is formed simultaneously, so the first average surface roughness, the second average surface roughness, and the third average surface roughness can be substantially equal to each other. Since the reflector electrodes (first reflector electrode 102a, second reflector electrode 102b, third reflector electrode 102c) have the optical function of reflecting light, a low average surface roughness is preferred to reduce light scattering during reflection. In some embodiments, to measure the average surface roughness, a roughness measurement tool (e.g., a profilometer, atomic force microscopy (AFM), etc.) calculates a mean line along the surface and measures the deviation between the height of the peaks or valleys on the surface and the mean line. After measuring many deviations at many peaks and valleys across the entire surface, the average surface roughness is calculated by taking the average of the many deviations, where the deviation is an absolute value. In other embodiments, the surface roughness is quantified by measuring the total thickness variation (TTV). The total thickness variation of a layer is the difference between the minimum thickness and the maximum thickness of the layer. The total thickness variation is measured over the entire length of the layer.

[0119] like Figure 10 As shown in cross-sectional view 1000 of FIG, a first isolation layer 302 may be formed over the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c. In some embodiments, the first isolation layer 302 may comprise a material having optical properties such that colored light is visible from the surface of the material, where the colored light depends on the thickness of the first isolation layer 302. In some embodiments, the first isolation layer 302 may comprise, for example, an oxide (e.g., aluminum oxide or silicon dioxide). The first isolation layer 302 may have a first thickness t1. In some embodiments, the first thickness t1 may range from, for example, approximately 200 angstroms to approximately 600 angstroms. In other embodiments, the first thickness t1 may range from, for example, approximately 49 angstroms to approximately 51 angstroms. In such other embodiments, because the first isolation layer 302 may be thin (e.g., less than 100 angstroms), the first isolation layer 302 may comprise aluminum oxide deposited by atomic layer deposition (ALD), which enables precise control of the first thickness t1. In some embodiments, the first isolation layer 302 may be formed using a deposition process other than ALD, such as physical vapor deposition (PVD), chemical vapor deposition (CVD), PE-CVD, or sputtering. The first isolation layer 302 may directly contact the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c.

[0120] Furthermore, a first conformal shielding layer 1004 may be deposited over the first isolation layer 302. The first conformal shielding layer 1004 may include, for example, titanium, titanium nitride, tantalum, tantalum nitride, silicon nitride, etc. Therefore, the first conformal shielding layer 1004 may be deposited using a deposition process (e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), PE-CVD, atomic layer deposition (ALD), sputtering, etc.).

[0121] In some embodiments, a first conformal oxide layer 1006 may be formed on the first conformal masking layer 1004. Figure 11 and Figure 12 , a first conformal oxide layer 1006 can be used to more precisely pattern the first conformal masking layer 1004. However, it should be understood that in some embodiments, the first conformal oxide layer 1006 can be omitted. In some embodiments, the first conformal oxide layer 1006 can include an oxide material such as, for example, silicon dioxide, silicon oxynitride, aluminum oxide, etc. In some embodiments, the first conformal oxide layer 1006 can be formed using a deposition process (e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), PE-CVD, atomic layer deposition (ALD), sputtering, etc.).

[0122] like Figure 11 As shown in the cross-sectional view 1100 of FIG. 1 , the first conformal oxide layer ( Figure 10 The first conformal oxide layer 1006 is selectively patterned to form a first oxide layer 1106 over the first conformal shielding layer 1004. The first oxide layer 1106 is formed to directly overlie the first reflector electrode 102a, but not directly overlie the second reflector electrode 102b or the third reflector electrode 102c. In some embodiments, the first oxide layer 1106 completely overlies the first reflector electrode 102a, and therefore, the first oxide layer 1106 may have a width approximately equal to or greater than the first width w1 of the first reflector electrode 102a.

[0123] In some embodiments, the first oxide layer 1106 can be formed by, for example, a photolithography / etching process or some other suitable process. In some embodiments, a dry etching process can be used to form the first oxide layer 1106, and the first conformal shielding layer 1004 can block ions from passing through during the dry etching process, thereby protecting the underlying first isolation layer 302 and the first, second, and third reflector electrodes 102a, 102b, and 102c from damage caused by the dry etching.

[0124] like Figure 12As shown in cross-sectional view 1200 of FIG, portions of the first conformal shielding layer (first conformal shielding layer 1004) not covered by the first oxide layer 1106 can be removed to form the first shielding layer 1204. Thus, in some embodiments, the first oxide layer 1106 acts as a mask to form the first shielding layer 1204. In some embodiments, portions of the first conformal shielding layer (first conformal shielding layer 1004) are removed using a wet etching process. The wet etching process can use a wet etchant containing, for example, hydrogen peroxide. The wet etchant used in the wet etching process does not remove or affect the first isolation layer 302, the second reflector electrode 102b, and the third reflector electrode 102c. Therefore, during the formation of the first oxide layer 1106 and the first shielding layer 1204, the first isolation layer 302, the second reflector electrode 102b, and the third reflector electrode 102c can remain substantially unchanged. If dry etching is used, ions from the dry etching process may pass through the first isolation layer 302 and impact the second and third reflector electrodes 102b, 102c. This may cause damage to the first isolation layer 302, the second and third reflector electrodes 102b, 102c (e.g., compositional defects, structural defects, etc.). Such damage may in turn cause light scattering, thereby negatively impacting the reliability of the display device. In some embodiments, due to the lateral effects of the wet etching process, the first shielding layer 1204 may have curved outer sidewalls 1204s.

[0125] like Figure 13 As shown in cross-sectional view 1300 of FIG, a second isolation layer 304 may be formed over the first isolation layer 302 and the first shielding layer 1204. In some embodiments, the second isolation layer 304 may include the same or different material as the first isolation layer 302. In some embodiments, the second isolation layer 304 may include, for example, an oxide (e.g., aluminum oxide or silicon dioxide).

[0126] Second isolation layer 304 may have a fourth thickness t4. In some embodiments, fourth thickness t4 may be within a range of, for example, approximately 200 angstroms to approximately 800 angstroms. In some other embodiments, fourth thickness t4 may be within a range of, for example, approximately 800 angstroms to approximately 1000 angstroms. In some embodiments, fourth thickness t4 is less than, greater than, or approximately equal to first thickness t1 of first isolation layer 302. For example, in cross-sectional view 1300, fourth thickness t4 is greater than first thickness t1. Second isolation layer 304 may be formed using a deposition process (e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), PE-CVD, atomic layer deposition (ALD), sputtering, etc.). Second isolation layer 304 may directly contact first isolation layer 302. In some embodiments, if first isolation layer 302 and second isolation layer 304 comprise the same material, the interface between first isolation layer 302 and second isolation layer 304 may be indistinguishable.

[0127] like Figure 14 As shown in the cross-sectional view 1400 of FIG, a second conformal shielding layer 1402 may be formed on the second isolation layer 304. In some embodiments, the second conformal shielding layer 1402 may include a first conformal shielding layer ( Figure 10 The same material as the first conformal shielding layer 1004 can be used. Figure 10 Furthermore, in some embodiments, a second conformal oxide layer 1404 may be deposited over the second conformal shielding layer 1402. In some embodiments, the second conformal oxide layer 1404 may comprise the same conformal oxide layer as the first conformal oxide layer ( Figure 10 The same material as the first conformal oxide layer 1006 of the embodiment of the present invention can be used. Figure 10 The first conformal oxide layer 1006 is deposited using the same deposition process as described above.

[0128] like Figure 15 As shown in the cross-sectional view 1500 of FIG. 1 , the second conformal oxide layer ( Figure 14 The second conformal oxide layer 1404) and the second conformal shielding layer ( Figure 14 The second conformal shielding layer 1402 is patterned so that the second shielding layer 1502 and the second oxide layer 1504 directly overlie the second reflector electrode 102b, but not directly overlie the first reflector electrode 102a or the third reflector electrode 102c. The patterning of the second oxide layer 1504 and the second shielding layer 1502 can be performed using Figure 11 and Figure 12 The second oxide layer 1504 and the second shielding layer 1502 are formed by performing the same or similar steps as those described above with respect to forming the first oxide layer 1106 disposed above the first shielding layer 1204. Furthermore, in some embodiments, the second oxide layer 1504 and the second shielding layer 1502 completely overlie the second reflector electrode 102b. Therefore, the second oxide layer 1504 and the second shielding layer 1502 may each have a width approximately equal to or greater than the second width w2 of the second reflector electrode 102b. Furthermore, similar to the first isolation layer 302 during the formation of the first shielding layer 1204, in some embodiments, the second isolation layer 304 remains substantially unchanged during the formation of the second shielding layer 1502 because the second shielding layer 1502 prevents ions from passing therethrough and is patterned using a wet etching process.

[0129] like Figure 16As shown in cross-sectional view 1600 of FIG, a third isolation layer 306 may be formed over the second isolation layer 304 and the second shielding layer 1502. In some embodiments, the third isolation layer 306 may include the same or different material as the first isolation layer 302 and / or the second isolation layer 304. In some embodiments, the third isolation layer 306 may include, for example, an oxide (e.g., aluminum oxide or silicon dioxide).

[0130] The third isolation layer 306 may have a fifth thickness t5. In some embodiments, the fifth thickness t5 may be within a range of, for example, approximately 200 angstroms to approximately 1100 angstroms. In some other embodiments, the fifth thickness t5 may be within a range of, for example, approximately 1100 angstroms to approximately 1300 angstroms. In some embodiments, the fifth thickness t5 is less than, greater than, or approximately equal to the fourth thickness t4 of the second isolation layer 304. For example, in cross-sectional view 1600, the fifth thickness t5 is approximately equal to the fourth thickness t4. The third isolation layer 306 may be formed using a deposition process (e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), PE-CVD, atomic layer deposition (ALD), sputtering, etc.). The third isolation layer 306 may directly contact the second isolation layer 304. In some embodiments, if the second isolation layer 304 and the third isolation layer 306 comprise the same material, the interface between the second isolation layer 304 and the third isolation layer 306 may be indistinguishable.

[0131] like Figure 17 As shown in the cross-sectional view 1700 of FIG. 1 , a third conformal shielding layer 1702 may be formed on the third isolation layer 306. In some embodiments, the third conformal shielding layer 1702 may include a first conformal shielding layer ( Figure 10 The same material as the first conformal shielding layer 1004 can be used. Figure 10 Furthermore, in some embodiments, a third conformal oxide layer 1704 may be deposited over the third conformal shielding layer 1702. In some embodiments, the third conformal oxide layer 1704 may comprise the same conformal oxide layer as the first conformal oxide layer ( Figure 10 The same material as the first conformal oxide layer 1006 of the embodiment of the present invention can be used. Figure 10 The first conformal oxide layer 1006 is deposited using the same deposition process as described above.

[0132] like Figure 18 As shown in the cross-sectional view 1800 of FIG. 1 , the third conformal oxide layer ( Figure 17 The third conformal oxide layer 1704) and the third conformal shielding layer ( Figure 17The third conformal shielding layer 1702 is patterned so that the third shielding layer 1802 and the third oxide layer 1804 directly overlie the third reflector electrode 102c, but not directly overlie the second reflector electrode 102b or the third reflector electrode 102c. The patterning of the third oxide layer 1804 and the third shielding layer 1802 can be performed using Figure 11 and Figure 12 The third oxide layer 1106 disposed on the first shielding layer 1204 is formed by performing the same or similar steps as described in [ 1804 ] regarding forming the third oxide layer 1106 disposed on the first shielding layer 1204. Furthermore, in some embodiments, the third oxide layer 1804 and the third shielding layer 1802 completely overlie the third reflector electrode 102c. Therefore, the third oxide layer 1804 and the third shielding layer 1802 may each have a width approximately equal to or greater than the third width w3 of the third reflector electrode 102c. Furthermore, similar to the first isolation layer 302 during the formation of the first shielding layer 1204, in some embodiments, because the third shielding layer 1802 prevents ions from passing therethrough and is patterned using a wet etching process, the third isolation layer 306 remains substantially unchanged during the formation of the third shielding layer 1802.

[0133] like Figures 19A to 19C As shown in cross-sectional views 1900A to 1900C of , a first removal process 1902 is performed to remove portions of the first isolation layer 302 , the second isolation layer 304 , and the third isolation layer 306 that are not covered by the first masking layer 1204 , the second masking layer 1502 , and the third masking layer 1802 . Figure 19A 、 Figure 19B and Figure 19C Cross-sectional views 1900A, 1900B, and 1900C illustrate the first removal process 1902 at a first time, a second time, and a third time, respectively, where the second time is after the first time, and the third time is after the second time.

[0134] During the first period, if Figure 19AAs shown in cross-sectional view 1900A of FIG, the third isolation layer 306 not covered by the third masking layer 1802 is removed. In some embodiments, first removal process 1902 utilizes vertical etching. Therefore, in some embodiments, first removal process 1902 is an etching process utilizing a dry etchant. This dry etchant does not remove the first masking layer 1204, the second masking layer 1502, or the third masking layer 1802. In some embodiments, the first oxide layer 1106, the second oxide layer 1504, and the third oxide layer 1804 comprise the same material as the first isolation layer 302, the second isolation layer 304, and / or the third isolation layer 306. In some embodiments, first removal process 1902 may partially remove the first oxide layer 1106, the second oxide layer 1504, and the third oxide layer 1804, such that after first removal process 1902, the first oxide layer 1106, the second oxide layer 1504, and the third oxide layer 1804 may have a higher average surface roughness than before first removal process 1902. In other embodiments (not shown), the first removal process 1902 may completely remove the first oxide layer 1106, the second oxide layer 1504, and the third oxide layer 1804. However, the first masking layer 1204, the second masking layer 1502, and the third masking layer 1802 cover and protect the underlying first isolation layer 302, the second isolation layer 304, and / or the third isolation layer 306 from ions during dry etching.

[0135] During the second time period, if Figure 19B As shown in cross-sectional view 1900B of FIG, a first removal process 1902 begins to remove portions of the second isolation layer 304 that are not covered by the second masking layer 1502 and the third masking layer 1802. In some embodiments, the same dry etchant is used during the first removal process 1902. In other embodiments, for example, if the first isolation layer 302, the second isolation layer 304, and / or the third isolation layer 306 comprise different materials, different dry etchants may be used to effectively remove each of the first isolation layer 302, the second isolation layer 304, and the third isolation layer 306 that are not covered or directly under the first masking layer 1204, the second masking layer 1502, or the third masking layer 1802. For example, in some embodiments, a carbon fluoride-based dry etchant may be used for the oxide-based first isolation layer 302, the second isolation layer 304, and / or the third isolation layer 306, while in some other embodiments, a carbon hydrogen fluoride-based dry etchant may be used for the nitride-based first isolation layer 302, the second isolation layer 304, and / or the third isolation layer 306. It should be understood that other dry etchants are also within the scope of the present disclosure.

[0136] During the third time period, if Figure 19CAs shown in cross-sectional view 1900C of FIG1 , the first removal process 1902 is completed and the portions of the first isolation layer 302, the second isolation layer 304, and the third isolation layer 306 that are not directly beneath the first shielding layer 1204, the second shielding layer 1502, or the third shielding layer 1802 are removed. The first removal process 1902 may stop at the second dielectric layer 604 or at the first blocking structure 104. Since the first shielding layer 1204, the second shielding layer 1502, and the third shielding layer 1802 completely overlie the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c, respectively, the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c are not damaged by the first removal process 1902 and thus maintain the first average surface roughness, the second average surface roughness, and the third average surface roughness, respectively. Therefore, patterning of the first, second, and third isolation layers 302, 304, and 306 does not damage the first, second, and third reflector electrodes 102a, 102b, and 102c, and their optical properties are maintained.

[0137] like Figure 20 As shown in the cross-sectional view 2000 of FIG. 1 , a second removal process may be performed to remove the first shielding layer, the second shielding layer, and the third shielding layer ( Figure 19C In addition, in some embodiments, the second removal process further removes the first oxide layer ( Figure 19C The first oxide layer 1106), the second oxide layer ( Figure 19C The second oxide layer 1504) and the third oxide layer ( Figure 19C In some embodiments, the second removal process may include, for example, a dry etching process to remove the first oxide layer ( Figure 19C The first oxide layer 1106), the second oxide layer ( Figure 19C The second oxide layer 1504) and the third oxide layer ( Figure 19C The third oxide layer 1804 is then subjected to a wet etching process to remove the first shielding layer, the second shielding layer and the third shielding layer ( Figure 19C The first shielding layer 1204, the second shielding layer 1502, and the third shielding layer 1802 are omitted. Figure 19C The first oxide layer 1106), the second oxide layer ( Figure 19C The second oxide layer 1504) and the third oxide layer ( Figure 19C The third oxide layer 1804) or wherein the first removal process ( Figure 19A 、19B , 19C first removal process 1902) during which the first oxide layer ( Figure 19C The first oxide layer 1106), the second oxide layer ( Figure 19C The second oxide layer 1504) and the third oxide layer ( Figure 19C In other embodiments of the third oxide layer 1804), the second removal process may only include the process for removing the first masking layer, the second masking layer and the third masking layer ( Figure 19C The wet etching process of the first shielding layer 1204, the second shielding layer 1502, and the third shielding layer 1802 is performed.

[0138] Wet etching is used instead of dry etching to prevent damage to the first, second, and third isolation layers 302, 304, and 306, as well as the first, second, and third reflector electrodes 102a, 102b, and 102c. If a dry etchant were used, ions from the dry etching process could pass through the first, second, and third isolation layers 302, 304, and 306, respectively, reaching the upper surfaces of the first, second, and third reflector electrodes 102a, 102b, and 102c. This would damage the crystal structure of the first, second, and third isolation layers 302, 304, and 306, and increase the surface roughness of the first, second, and third reflector electrodes 102a, 102b, and 102c. Crystal damage and / or increased surface damage, in turn, would increase light scattering and reduce the reliability of the display device.

[0139] First isolation layer 302, second isolation layer 304, and third isolation layer 306 form isolation structure 106, which is coupled to control circuitry 120. First portion 106a of isolation structure 106 includes first isolation layer 302. First portion 106a of isolation structure 106 has a first thickness t1. Second portion 106b of isolation structure 106 includes portions of first isolation layer 302 and second isolation layer 304, respectively, that directly overlie second reflector electrode 102b. First isolation layer 302 of second portion 106b of isolation structure 106 directly contacts second reflector electrode 102b. Second portion 106b of isolation structure 106 has a second thickness t2. In some embodiments, second thickness t2 ranges from, for example, approximately 300 angstroms to approximately 1300 angstroms. Second thickness t2 is greater than first thickness t1, such that the upper surface of first portion 106a of isolation structure 106 is lower than the upper surface of second portion 106b of isolation structure 106. Second thickness t2 is equal to the sum of first thickness t1 and fourth thickness t4. The third portion 106c of the isolation structure 106 directly overlies the third reflector electrode 102c and includes portions of the first isolation layer 302, the second isolation layer 304, and the third isolation layer 306. The first isolation layer 302 of the third portion 106c of the isolation structure directly contacts the third reflector electrode 102c. The third portion 106c of the isolation structure 106 has a third thickness t3. In some embodiments, the third thickness t3 ranges from approximately 400 angstroms to approximately 1500 angstroms. The third thickness t3 is equal to the sum of the first thickness t1, the fourth thickness t4, and the fifth thickness t5. The third thickness t3 may be greater than the second thickness t2, such that the upper surface of the second portion 106b of the isolation structure 106 is lower than the upper surface of the third portion 106c of the isolation structure 106. The first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106 are completely separated laterally from each other to enable optical isolation.

[0140] like Figure 21 As shown in cross-sectional view 2100 of FIG, a first via structure 108a, a second via structure 108b, and a third via structure 108c are formed on the first portion 106a, the second portion 106b, and the third portion 106c of the interconnect structure, respectively, extending through the first portion 106a, the second portion 106b, and the third portion 106c of the interconnect structure to contact the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c, respectively. In some embodiments, the via structures (first via structure 108a, second via structure 108b, and third via structure 108c) may include tantalum, titanium, or some other conductive material.

[0141] Furthermore, in some embodiments, a first transparent electrode 112a, a second transparent electrode 112b, and a third transparent electrode 112c may be formed on the first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106, respectively. The first transparent electrode 112a may directly contact the first portion 106a of the isolation structure 106. The second transparent electrode 112b may directly contact the second portion 106b of the isolation structure 106. The third transparent electrode 112c may directly contact the third portion 106c of the isolation structure 106. In some embodiments, the transparent electrodes (the first transparent electrode 112a, the second transparent electrode 112b, and the third transparent electrode 112c) include an optically transparent conductive material, such as, for example, indium tin oxide (ITO), fluorine tin oxide (FTO), or the like. In some embodiments, each of the transparent electrodes (first transparent electrode 112a, second transparent electrode 112b, third transparent electrode 112c) may have a thickness ranging, for example, between approximately 500 angstroms and approximately 3000 angstroms.

[0142] In some embodiments, a first optical emitter structure 110a, a second optical emitter structure 110b, and a third optical emitter structure 110c may be formed over the first transparent electrode 112a, the second transparent electrode 112b, and the third transparent electrode 112c, respectively. In some embodiments, the optical emitter structures (the first optical emitter structure 110a, the second optical emitter structure 110b, and the third optical emitter structure 110c) may be or include organic light-emitting diodes (OLEDs) or some other suitable light-generating devices. In some embodiments, each of the optical emitter structures (the first optical emitter structure 110a, the second optical emitter structure 110b, and the third optical emitter structure 110c) may have a thickness ranging from approximately 500 angstroms to approximately 3000 angstroms, for example.

[0143] In some embodiments, a second blocking structure 114 is formed to separate the transparent electrodes (first transparent electrode 112a, second transparent electrode 112b, and third transparent electrode 112c) from the optical emitter structures (first optical emitter structure 110a, second optical emitter structure 110b, and third optical emitter structure 110c), thereby defining the first pixel region 101a, the second pixel region 101b, and the third pixel region 101c. Furthermore, the second blocking structure 114 can completely separate the first portion 106a, the second portion 106b, and the third portion 106c of the isolation structure 106. It should be understood that a display device may include an array of pixel regions and may include more than the first pixel region 101a, the second pixel region 101b, and the third pixel region 101c. Some of the second barrier structures 114 may directly overlie the first barrier structure 104, and the second barrier structures 114 may include a dielectric material for electrically and optically isolating the pixel regions (the first pixel region 101a, the second pixel region 101b, and the third pixel region 101c) from each other. For example, the second barrier structures 114 may include a nitride (e.g., silicon nitride, silicon oxynitride), an oxide (e.g., silicon oxide), or the like. For example, in some other embodiments, the second barrier structures 114 may include a multilayer film stack of silicon nitride and silicon oxide. Furthermore, in some embodiments, the second barrier structures 114 may include the same material as the isolation structure 106, the first barrier structure 104, and / or the interconnect dielectric structure 132. In other embodiments, the second barrier structures 114 may include a different material than the isolation structure 106, the first barrier structure 104, and / or the interconnect dielectric structure 132.

[0144] It should be understood that each of the through-hole structures (the first through-hole structure 108a, the second through-hole structure 108b, the third through-hole structure 108c), the transparent electrodes (the first transparent electrode 112a, the second transparent electrode 112b, the third transparent electrode 112c), the optical emitter structures (the first optical emitter structure 110a, the second optical emitter structure 110b, the third optical emitter structure 110c), and the second blocking structure 114 may be formed by various steps including a deposition process (e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), PE-CVD, atomic layer deposition (ALD), sputtering, etc.), a removal process (e.g., wet etching, dry etching, chemical mechanical planarization (CMP), etc.), and / or a patterning process (e.g., photolithography / etching).

[0145] Therefore, the display device includes a control circuit system 120 to selectively operate the first pixel region 101a, the second pixel region 101b, and the third pixel region 101c. Since the first reflector electrode 102a, the second reflector electrode 102b, and the third reflector electrode 102c are protected by the first shielding layer 1204, the second shielding layer 1502, and the third shielding layer 1802, respectively, they are not subjected to the first removal process ( Figure 19A 、 Figure 19B 、 Figure 19C The control circuit system 120 is affected by the first removal process 1902), so that the control circuit system 120 can selectively operate each of the pixel areas (the first pixel area 101a, the second pixel area 101b and the third pixel area 101c) to reliably emit colored light according to the thickness (first thickness t1, second thickness t2, third thickness t3) and / or material of each part (first part 106a, second part 106b, third part 106c) of the isolation structure (isolation structure 106).

[0146] Figure 22 Examples and Figures 5 to 18 、 Figures 19A to 19C 、 Figure 20 and Figure 21 Flowcharts of some embodiments of the corresponding method 2200.

[0147] Although method 2200 is hereinafter illustrated and described as a series of actions or events, it should be understood that the illustrated order of these actions or events should not be interpreted in a limiting sense. For example, in addition to the actions or events shown and / or described herein, some actions can also be performed in different orders and / or simultaneously with other actions or events. In addition, not all of the actions illustrated are necessary to implement one or more aspects or one or more embodiments described herein. In addition, one or more actions in the actions illustrated herein can be performed in one or more separate actions and / or stages.

[0148] At act 2202, a first reflector electrode and a second reflector electrode are formed over the interconnect structure. Figures 7 to 9 Cross-sectional views 700 to 900 illustrate some embodiments corresponding to act 2202 .

[0149] At act 2204, a first isolation layer is deposited over the first reflector electrode and the second reflector electrode. Figure 10 Cross-sectional view 1000 of some embodiments corresponding to act 2204 is illustrated.

[0150] At act 2206, a first shielding layer is formed over the first reflector electrode such that the first shielding layer directly overlies the first reflector electrode but does not overly the second reflector electrode. Figures 10 to 12Cross-sectional views 1000 to 1200 illustrate some embodiments corresponding to act 2206 .

[0151] At act 2208, a second isolation layer is deposited over the first isolation layer and over the first shielding layer. Figure 13 Cross-sectional view 1300 illustrates some embodiments corresponding to act 2208 .

[0152] At act 2210, a second shielding layer is formed over the second isolation layer such that the second shielding layer directly overlies the second reflector electrode but does not overly the first reflector electrode. Figure 14 and Figure 15 Cross-sectional views 1400 and 1500 respectively illustrate some embodiments corresponding to action 2210 .

[0153] At act 2212 , a first removal process is performed to remove portions of the first isolation layer and the second isolation layer that are not directly beneath the first masking layer or the second masking layer. Figure 19A 、 Figure 19B and Figure 19C Cross-sectional view 1900A, cross-sectional view 1900B, and cross-sectional view 1900C respectively illustrate some embodiments corresponding to action 2212.

[0154] At act 2214 , a second removal process is performed to remove the first masking layer and the second masking layer. Figure 20 Cross-sectional view 2000 illustrates some embodiments corresponding to act 2214 .

[0155] Therefore, the present disclosure is directed to a method of forming an isolation structure that prevents damage to an upper surface of an underlying reflector electrode structure to improve the reliability of a display device.

[0156] Therefore, in some embodiments, the present disclosure relates to a display device, comprising: a first reflector electrode; a second reflector electrode spaced apart from the first reflector electrode; an isolation structure overlying the first reflector electrode and the second reflector electrode, the isolation structure comprising: a first portion overlying the first reflector electrode and having a first thickness, and a second portion overlying the second reflector electrode, having a second thickness greater than the first thickness and spaced apart from the first portion of the isolation structure; and a first optical emitter structure and a second optical emitter structure overlying the first portion and the second portion of the isolation structure, respectively. In an embodiment, the display device further comprises: a first transparent electrode and a second transparent electrode. The first transparent electrode is disposed between the first portion of the isolation structure and the first optical emitter structure. The second transparent electrode is disposed between the second portion of the isolation structure and the second optical emitter structure, wherein the second transparent electrode is electrically isolated from the first transparent electrode. In an embodiment, the first portion of the isolation structure contacts the first reflector electrode at a first interface, wherein the first portion of the isolation structure contacts the first transparent electrode at a second interface, wherein the first thickness of the first portion of the isolation structure is measured from the first interface to the second interface, wherein the second portion of the isolation structure contacts the second reflector electrode at a third interface, wherein the second portion of the isolation structure contacts the second transparent electrode at a fourth interface, and wherein the second thickness of the second portion of the isolation structure is measured from the third interface to the fourth interface. In an embodiment, a first blocking structure is arranged between the first reflector electrode and the second reflector electrode, wherein a second blocking structure is arranged between the first portion and the second portion of the isolation structure, and wherein the second blocking structure directly overlies the first blocking structure. In an embodiment, the second blocking structure comprises a different material than the isolation structure. In an embodiment, the first portion of the isolation structure directly contacts the first reflector electrode, and wherein the second portion of the isolation structure directly contacts the second reflector electrode.

[0157] In other embodiments, the present disclosure relates to a display device comprising: first and second reflector electrodes positioned above an interconnect structure; a first isolation layer comprising a pair of segments spaced apart from each other and overlying the first and second reflector electrodes, respectively; a second isolation layer overlying the first isolation layer and the second reflector electrode, but not overlying the first reflector electrode; a first optical emitter structure overlying the first isolation layer and the first reflector electrode, and a second optical emitter structure overlying the second isolation layer and the second reflector electrode; and first and second conductive structures extending from the first reflector electrode to the first optical emitter structure and from the second reflector electrode to the second optical emitter structure, respectively, wherein the first conductive structure extends through the first isolation layer, and wherein the second conductive structure extends through the first isolation layer and the second isolation layer. In embodiments, a barrier structure separates the first conductive structure from the second conductive structure, and wherein the barrier structure separates the first optical emitter structure from the second optical emitter structure. In embodiments, the second isolation layer is a different material than the first isolation layer. In an embodiment, the first reflector electrode has a first average surface roughness, and the second reflector electrode has a second average surface roughness approximately equal to the first average surface roughness. In an embodiment, the first isolation layer is thinner than the second isolation layer. In an embodiment, the second isolation layer is the same material as the first isolation layer. In an embodiment, a line extends continuously between the first reflector electrode and the second reflector electrode and between the pair of segments of the first isolation layer, wherein the line does not intersect the first and second reflector electrodes or the first and second isolation layers, and wherein the line extends in a first direction orthogonal to the upper surface of the first reflector electrode.

[0158] In yet other embodiments, the present disclosure relates to a method for forming a display device, the method comprising: forming a first reflector electrode and a second reflector electrode on an interconnect structure, wherein the first reflector electrode is laterally separated from the second reflector electrode; depositing a first isolation layer on the first reflector electrode and the second reflector electrode; forming a first shielding layer directly overlying the first reflector electrode; depositing a second isolation layer on the first isolation layer and on the first shielding layer; forming a second shielding layer on the second isolation layer, and the second shielding layer directly overlying the second reflector electrode; performing a first removal process to remove multiple portions of the first isolation layer and the second isolation layer that are not directly under the first shielding layer or the second shielding layer; and performing a second removal process to remove the first shielding layer and the second shielding layer. In an embodiment, the first removal process comprises dry etching, and the second removal process comprises wet etching. In an embodiment, the first isolation layer and the second isolation layer are the same material. In an embodiment, forming the first shielding layer includes: depositing a first conformal shielding layer over the first spacer layer; depositing a first conformal oxide layer over the first conformal shielding layer; patterning the first conformal oxide layer using a dry etchant to form a first oxide layer directly overlying the first reflector electrode; and patterning the first conformal shielding layer based on the first oxide layer using a wet etchant to form the first shielding layer. In an embodiment, after the first removal process, the first oxide layer has a higher average surface roughness than before the first removal process. In an embodiment, after the second removal process, a first segment of the first spacer layer overlies the first reflector electrode, and a second segment of the first spacer layer overlies the second reflector electrode, wherein the first segment of the first spacer layer is laterally spaced apart from the second segment of the first spacer layer. In an embodiment, the method further includes: forming a first transparent electrode over the first segment of the first spacer layer; forming a second transparent electrode over the second segment of the first spacer layer; forming a first optical emitter structure over the first transparent electrode; and forming a second optical emitter structure over the second transparent electrode.

[0159] The foregoing summarizes the features of several embodiments so that those skilled in the art may better understand the various aspects of the present disclosure. Those skilled in the art will appreciate that they may readily use this disclosure as a basis for designing or modifying other processes and structures to carry out the same purposes and / or achieve the same advantages as the embodiments described herein. Those skilled in the art will also recognize that these equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and modifications herein without departing from the spirit and scope of the present disclosure.

Claims

1. A display device comprising: a first reflector electrode; a second reflector electrode spaced apart from the first reflector electrode; an isolation structure overlying the first reflector electrode and the second reflector electrode, the isolation structure comprising: a first portion overlying the first reflector electrode and having a first thickness, and a second portion overlying the second reflector electrode, having a second thickness greater than the first thickness, and spaced apart from the first portion of the isolation structure; a first optical emitter structure and a second optical emitter structure respectively overlying the first portion and the second portion of the isolation structure, wherein the first optical emitter structure and the second optical emitter structure have vertical outer sidewalls; a first blocking structure disposed between the first reflector electrode and the second reflector electrode; a second blocking structure disposed between the first portion and the second portion of the isolation structure; a first transparent electrode disposed between the first portion of the isolation structure and the first optical emitter structure; and a second transparent electrode disposed between the second portion of the isolation structure and the second optical emitter structure, wherein the second transparent electrode is electrically isolated from the first transparent electrode, The first transparent electrode and the second transparent electrode have vertical outer walls, and the vertical outer walls are aligned with the vertical outer walls of the first optical emission structure and the second optical emission structure, and The spacing between the vertical outer walls of the first transparent electrode is smaller than the spacing between the vertical outer walls of the first part of the isolation structure, and the spacing between the vertical outer walls of the second transparent electrode is smaller than the spacing between the vertical outer walls of the second part of the isolation structure.

2. The display device according to claim 1 , wherein the first portion of the isolation structure contacts the first reflector electrode at a first interface, wherein the first portion of the isolation structure contacts the first transparent electrode at a second interface, wherein the first thickness of the first portion of the isolation structure is measured from the first interface to the second interface, wherein the second portion of the isolation structure contacts the second reflector electrode at a third interface, wherein the second portion of the isolation structure contacts the second transparent electrode at a fourth interface, and wherein the second thickness of the second portion of the isolation structure is measured from the third interface to the fourth interface.

3. The display device according to claim 1, further comprising a dielectric layer, wherein the first reflector electrode and the second reflector electrode are embedded in the dielectric layer, A top surface of the dielectric layer is flush with the top surfaces of the first reflector electrode and the second reflector electrode. The display device according to claim 1 , wherein the second blocking structure comprises a material different from that of the isolation structure. 5 . The display device of claim 1 , wherein the first portion of the isolation structure directly contacts the first reflector electrode, and wherein the second portion of the isolation structure directly contacts the second reflector electrode.

6. A display device comprising: a first reflector electrode and a second reflector electrode located on the interconnect structure; a first isolation layer comprising a pair of segments, the pair of segments being spaced apart from each other and respectively overlying the first reflector electrode and the second reflector electrode, the pair of segments being composed of a first dielectric material; a second isolation layer overlying the first isolation layer and the second reflector electrode but not overlying the first reflector electrode, the second isolation layer being composed of a second dielectric material different from the first dielectric material; a first optical emitter structure and a second optical emitter structure, the first optical emitter structure overlying the first isolation layer and the first reflector electrode, the second optical emitter structure overlying the second isolation layer and the second reflector electrode; a second transparent electrode directly contacting an upper surface of the second isolation layer and a lower surface of the second optical emission structure, the second transparent electrode having an outermost vertical sidewall, the outermost vertical sidewall being aligned with the outermost vertical sidewall of the second optical emission structure and having a smaller spacing than the outermost vertical sidewall of the second isolation layer; as well as A first conductive structure and a second conductive structure extend from the first reflector electrode to the first optical emitter structure and from the second reflector electrode to the second optical emitter structure, respectively, wherein the first conductive structure extends through the first isolation layer, and wherein the second conductive structure extends through the first isolation layer and the second isolation layer. 7 . The display device according to claim 6 , further comprising a blocking structure separating the first conductive structure from the second conductive structure and separating the first optical emitter structure from the second optical emitter structure. 8 . The display device of claim 6 , wherein the first reflector electrode has a first average surface roughness, and wherein the second reflector electrode has a second average surface roughness approximately equal to the first average surface roughness. 9 . The display device according to claim 6 , wherein the first isolation layer is thinner than the second isolation layer.

10. The display device of claim 6 , wherein a line extends continuously between the first reflector electrode and the second reflector electrode and between the pair of segments of the first isolation layer, wherein the line does not intersect the first reflector electrode and the second reflector electrode or the first isolation layer and the second isolation layer, and wherein the line extends in a first direction orthogonal to an upper surface of the first reflector electrode.

11. A method of forming a display device, comprising: forming a first reflector electrode and a second reflector electrode on the interconnect structure, wherein the first reflector electrode is laterally spaced from the second reflector electrode; depositing a first isolation layer on the first reflector electrode and the second reflector electrode; forming a first shielding layer directly overlying the first reflector electrode but not overlying the second reflector electrode; depositing a second isolation layer on the first isolation layer and on the first shielding layer; forming a second shielding layer on the second isolation layer, wherein the second shielding layer directly overlies the second reflector electrode but does not overlie the first reflector electrode; forming a third isolation layer, the third isolation layer continuously extending from above the upper surface of the second shielding layer, downward along the outer sidewall of the second shielding layer, laterally to the outer sidewall of the second isolation layer, and upward to above the upper surface of the second isolation layer; performing a first removal process to remove portions of the third isolation layer and portions of the first isolation layer and the second isolation layer that are not covered by the first shielding layer or the second shielding layer; performing a second removal process to remove the first shielding layer and the second shielding layer, wherein after the second removal process, a first segment of the first isolation layer overlies the first reflector electrode, and a second segment of the first isolation layer overlies the second reflector electrode, wherein the first segment of the first isolation layer is laterally spaced apart from the second segment of the first isolation layer; and forming a first transparent electrode on the first segment of the first isolation layer; and forming a second transparent electrode on the second segment of the first isolation layer, The outermost vertical sidewalls of the second transparent electrode are spaced smaller than the outermost vertical sidewalls of the second isolation layer. 12 . The method of claim 11 , wherein the first removal process comprises dry etching, and wherein the second removal process comprises wet etching. The method according to claim 11 , wherein the first isolation layer and the second isolation layer are made of the same material.

14. The method according to claim 11, wherein forming the first shielding layer comprises: depositing a first conformal shielding layer over the first isolation layer; depositing a first conformal oxide layer over the first conformal masking layer; patterning the first conformal oxide layer using a dry etchant to form a first oxide layer directly overlying the first reflector electrode; as well as The first conformal masking layer is patterned according to the first oxide layer using a wet etchant to form the first masking layer. 15 . The method according to claim 14 , wherein after the first removal process, the first oxide layer has a higher average surface roughness than before the first removal process.

16. The method according to claim 11, further comprising: forming a first optical emitter structure on the first transparent electrode; as well as A second optical emitter structure is formed over the second transparent electrode.

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