A low-loss ideal diode

Abstract

The invention discloses a low-loss ideal diode, which comprises a control IC, a charge pump capacitor C1, and an enhanced MOSFET. The entire rectifier system has very few components, which is very beneficial to reducing the volume of the overall application solution. The power pin VIN of the control IC is connected to the source end of the enhanced MOSFET and serves as the anode of the rectifier. The charge pump pin CPO of the control IC is connected to the source end of the MOSFET through the capacitor C1. The drive pin Gate of the control IC is connected to the gate end of the enhanced MOSFET. The pin OUT of the control IC is connected to the drain end of the MOSFET and serves as the cathode and output of the rectifier. The low-loss ideal diode has a simple periphery and controllable power consumption, reduces the power consumption of the rectifier, simplifies the layout, reduces the volume of the overall solution, meets the development trend of high energy efficiency and high power density, and does not require a heat dissipation device in application.

Description

Technical Field

[0001] The invention relates to semiconductor technology, and in particular to a low-loss ideal diode. Background Art

[0002] Schottky diodes are often used to replace ordinary diodes (forward voltage drop of about 0.7V) as rectifiers in high-current circuits due to their low forward voltage drop (usually around 0.3V). This can greatly reduce the power loss caused by the diode. For example, under a current of 3A, a Schottky diode can save (0.7V-0.3V)*3A=1.2W of power consumption, and the voltage obtained from the cathode of the diode will be closer to the input voltage of the anode of the diode.

[0003] However, with the improvement of energy efficiency requirements, when large current is used, the Schottky diode used as a rectifier will still generate large power consumption, so that the energy efficiency cannot meet the requirements. At the same time, the Schottky diode generates very serious heat during operation and needs heat dissipation treatment, which requires increasing the volume of the overall solution and the cost of the solution. Summary of the invention

[0004] In order to further reduce the power consumption of the rectifier and ensure that the load power supply can be close to the input power supply, the present invention provides a low-loss ideal diode, which can reduce the power consumption caused by the rectifier in an extremely simple and controllable manner. Due to the reduction in the power consumption of the rectifier, no heat dissipation device is required in the application, and the volume of the overall solution is reduced. The present invention discloses a low-loss ideal diode, the diode includes a control IC, a charge pump capacitor C1, and an enhanced MOSFET. The entire rectifier system has very few components, which is very helpful in reducing the volume of the overall application solution. The power pin VIN of the control IC is connected to the source end of the enhanced MOSFET and serves as the anode of the rectifier. The charge pump pin CPO of the control IC is connected to the source end of the MOSFET through the capacitor C1. The drive pin Gate of the control IC is connected to the gate end of the enhanced MOSFET. The pin OUT of the control IC is connected to the drain end of the MOSFET, which is the cathode and output of the rectifier.

[0005] As an improvement of the present invention, the control IC includes a comparator CMP1, a comparator CMP2, an operational amplifier AMP, a level conversion module, an LDO / BIAS / UVLO module, and a ChargePump module. Inside the control chip IC, the LDO / BIAS / UVLO module is used to generate a reference, bias, enable, and a low-voltage power supply VCC inside the chip. The power supply VIN generates a charge pump current source through the ChargePump module, and charges the external capacitor C1 through the pin CPO. The function of the ChargePump is to pump the CPO pin voltage to above the VIN power supply voltage, NMOS tube N1 and PMOS tube P1, the CPO pin of the ChargePump module is connected to the capacitor C1, and there is a voltage regulator DZ between the CPO pin and VIN, which is used to clamp the CPO voltage to ensure that the CPO voltage is higher than the VIN voltage. The two input ends of comparator CMP1, comparator CMP2 and operational amplifier AMP are connected to the anode voltage VIN and the cathode voltage VOUT respectively. The output ends of comparator CMP1 and comparator CMP2 are connected to the level conversion module. Comparators CMP1 and CMP2 are used to compare the anode and cathode voltages of the rectifier, that is, the VIN and OUT voltages. The operational amplifier AMP is used to maintain the voltage difference between VIN and OUT to ensure that the cathode voltage VOUT is maintained at a level lower than the anode voltage VIN by 25mV. The level conversion module is connected to the NMOS tube N1 and the PMOS tube P1. The level conversion module is used to convert the high and low levels VCC and GND output by the two comparators into high and low levels CPO and VIN to drive the subsequent driving tubes. The NMOS tube N1 and the PMOS tube P1 are driving tubes of the IC. The source terminal of the PMOS tube P1 is connected to the CPO voltage, and the source terminal of the NMOS tube N1 is connected to the VIN voltage.

[0006] As an improvement of the present invention, the difference between the cathode voltage VOUT and the anode voltage VIN is equal to 25mV.

[0007] As an improvement of the present invention, through the comparator CMP1, when the cathode voltage VOUT of the rectifier is lower than the value of the anode voltage VIN-75mV, the pull-up PMOS tube P1 is controlled to quickly pull up the Gate pin, and through the comparator CMP2, when the cathode voltage VOUT-25mV of the rectifier is higher than the anode voltage VIN, the pull-down NMOS tube N1 is controlled to quickly pull down the Gate pin. The NMOS tube N1 and the PMOS tube P1 are driving tubes of the IC, which are used to quickly pull up or pull down the driving pin Gate.

[0008] As an improvement of the present invention, the voltage value of the voltage regulator tube DZ is 5~7V.

[0009] As an improvement of the present invention, the ChargePump module includes five groups of ring inverters, the five groups of ring inverters are connected to capacitors, which are connected to a group of series diodes via the capacitors, the series diodes are connected to PMOS tubes P2 and PMOS tubes P3, and PMOS tubes P2 and PMOS tubes P3 are connected to NMOS tubes N2 and NMOS tubes P3.

[0010] As an improvement of the present invention, after the bias current Ib passes through the NMOS and PMOS current mirrors, a fixed current source is obtained at the CPO pin.

[0011] Beneficial effects of the present invention: The present invention provides a low-loss diode with simple periphery and controllable power consumption, which reduces the power consumption of the rectifier, simplifies the layout, and reduces the volume of the overall solution, conforms to the development trend of high energy efficiency and high power density, and does not require a heat dissipation device in application. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a schematic diagram of the circuit structure of the low-loss diode in the present invention.

[0013] Figure 2 It is a schematic diagram of the effects of the control driving tubes P1, N1 and the operational amplifier AMP on the Gate pin in the present invention.

[0014] Figure 3 It is a schematic diagram of the internal structure of the ChargePump module in the present invention. DETAILED DESCRIPTION

[0015] The following is combined with Figure 1-3 The present invention will be further illustrated with the following specific embodiments. It should be understood that the following specific embodiments are only used to illustrate the present invention and are not used to limit the scope of the present invention.

[0016] Embodiment: The diode includes a control IC, a charge pump capacitor C1, and an enhanced MOSFET. The entire rectifier system has very few components, which is very helpful in reducing the volume of the overall application solution. The power pin VIN of the control IC is connected to the source end of the enhanced MOSFET and serves as the anode of the rectifier. The charge pump pin CPO of the control IC is connected to the source end of the MOSFET through the capacitor C1. The drive pin Gate of the control IC is connected to the gate end of the enhanced MOSFET. The pin OUT of the control IC is connected to the drain end of the MOSFET and serves as the cathode and output of the rectifier.

[0017] The control IC includes comparator CMP1, comparator CMP2, operational amplifier AMP, level conversion module, LDO / BIAS / UVLO module, ChargePump (charge pump) module. Inside the control chip IC, LDO / BIAS / UVLO module is used to generate reference, bias, enable and internal low-voltage power supply VCC of the chip. The power supply VIN generates a charge pump current source through the ChargePump module, and charges the external capacitor C1 through the pin CPO. The function of the ChargePump module is to pump the CPO pin voltage to above the VIN power supply voltage, NMOS tube N1 and PMOS tube P1, the CPO pin of the ChargePump module is connected to the capacitor C1, and there is a voltage regulator DZ between the CPO pin and VIN for clamping the CPO voltage to ensure that the CPO voltage is higher than the VIN voltage by the breakdown voltage of the voltage regulator DZ, comparator CMP1, comparator The two input ends of CMP2 and the operational amplifier AMP are connected to the anode voltage VIN and the cathode voltage VOUT respectively. The output end of the comparator CMP2 of the comparator CMP1 is connected to the level conversion module. The comparators CMP1 and CMP2 are used to compare the anode and cathode voltages of the rectifier, that is, the VIN and OUT voltages. The operational amplifier AMP is used to maintain the voltage difference between VIN and OUT to ensure that the cathode voltage VOUT is maintained at a level lower than the anode voltage VIN by 25mV. The level conversion module is connected to the NMOS tube N1 and the PMOS tube P1. The level conversion module is used to convert the high and low levels VCC and GND output by the two comparators into high and low levels CPO and VIN to drive subsequent driving tubes. The NMOS tube N1 and the PMOS tube P1 are driving tubes of the IC. The source terminal of the PMOS tube P1 is connected to the CPO voltage, and the source terminal of the NMOS tube N1 is connected to the VIN voltage. The difference between the cathode voltage VOUT and the anode voltage VIN is equal to 25mV. When the cathode voltage VOUT of the rectifier is lower than the value of the anode voltage VIN-75mV through the comparator CMP1, the pull-up PMOS tube P1 is controlled to quickly pull up the Gate pin. When the cathode voltage VOUT-25mV of the rectifier is higher than the anode voltage VIN through the comparator CMP2, the pull-down NMOS tube N1 is controlled to quickly pull down the Gate pin. The NMOS tube N1 and the PMOS tube P1 are driving tubes of the IC, which are used to quickly pull up or pull down the driving pin Gate. The voltage value of the voltage regulator tube DZ is 5-7V. The ChargePump module includes five groups of ring inverters, the five groups of ring inverters are connected to capacitors, and a group of series diodes are connected through the capacitors. The series diodes are connected to PMOS tubes P2 and PMOS tubes P3, and PMOS tubes P2 and PMOS tubes P3 are connected to NMOS tubes N2 and NMOS tubes P3. After the bias current Ib passes through the NMOS and PMOS current mirrors, a fixed current source is obtained at the CPO pin.

[0018] Working principle: After the rectifier is powered on, that is, the anode of the rectifier VIN is powered on. Since there is a parasitic diode at the drain terminal of the MOSFET, assuming the forward voltage drop of the parasitic diode is 0.7V, then VIN - 0.7V will be obtained at the cathode OUT of the rectifier first. After that, the charge pump pin CPO of the chip charges the external capacitor C1, and the voltage gradually rises to VIN + VDZ. At this time, since VOUT < VIN - 75mV, the driving transistor P1 is triggered to quickly pull up the Gate pin. For the external power MOSFET, since the voltage of the Gate pin rises rapidly, the current-carrying capacity of the MOSFET is greatly enhanced, thereby quickly increasing the cathode voltage VOUT until VIN - 75mV. After that, the internal operational amplifier AMP of the IC adjusts the voltage of the Gate pin. In fact, AMP and MOSFET form a negative feedback structure. When VOUT is low and VOUT + 25mV < VIN, the output of AMP is high. For the MOSFET, Vgs becomes larger and the current-carrying capacity becomes stronger, pulling up the OUT voltage. When the VOUT voltage is high, that is, VOUT + 25mV > VIN, the output of AMP is low, the Vgs of the MOSFET decreases, the current-carrying capacity becomes weaker, and the OUT voltage decreases. Under the action of such negative feedback, the cathode voltage of the rectifier finally maintains at a level 25mV lower than the anode voltage.

[0019] The chip always keeps detecting the anode and cathode voltages of the rectifier. Under the condition that the anode voltage remains unchanged, the change of the cathode voltage controls the actions of the driving transistors P1, N1, and the operational amplifier AMP on the Gate pin. For example Figure 2 , when the OUT voltage is lower than VIN - 75mV, DRV1 is at a low level, the P1 transistor keeps pulling up the Gate, and the N1 transistor is turned off; when the OUT voltage is higher than VIN + 25mV, DRV2 is at a high level, the N1 transistor pulls down the Gate, and the P1 transistor is turned off; in the region where the driving transistors P1 and N1 act, the operational amplifier AMP hardly plays a role due to its too weak current-carrying capacity. Only when VIN - 75mV < VOUT < VIN + 25mV, both P1 and N1 are turned off, and the operational amplifier AMP can truly adjust the Gate, and finally VOUT = VIN - 25mV.

[0020] The structure of the ChargePump module is as Figure 3 shown. The first five groups of ring inverters form an oscillator function. The oscillator can form a typical charge pump structure with the subsequent capacitor and series diodes, and finally raise the source voltages of P1 and P2. After the bias current Ib passes through the NMOS and PMOS current mirrors, a fixed current source can be obtained at the CPO pin. This current source charges the external capacitor to raise the voltage of the CPO pin.

[0021] In the description of the present invention, it should be noted that the terms "upper", "lower", "left", "right", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention; in addition, unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal connection of two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0022] Finally, it should be noted that the embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein, and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A low-loss ideal diode, Features The diode includes a control IC, a capacitor C1, and an enhanced MOSFET. The power pin VIN of the control IC is connected to the source end of the enhanced MOSFET and serves as the anode of the rectifier. The charge pump pin CPO of the control IC is connected to the source end of the MOSFET through the capacitor C1. The drive pin Gate of the control IC is connected to the gate end of the enhanced MOSFET. The pin OUT of the control IC is connected to the drain end of the MOSFET and serves as the cathode and output of the rectifier. The control IC includes a comparator CMP1, a comparator CMP2, an operational amplifier AMP, a level conversion module, an LDO / BIAS / UVLO module, a ChargePump module, an NMOS tube N1 and a PMOS tube P1. The CPO pin of the ChargePump module is connected to the capacitor C1. There is a voltage regulator tube DZ between the CPO pin and the anode voltage VIN. The two input ends of the comparator CMP1, the comparator CMP2 and the operational amplifier AMP are respectively connected to the anode. The output ends of the comparators CMP1 and CMP2 are connected to a level conversion module, and the level conversion module is connected to the NMOS tube N1 and the PMOS tube P1. The level conversion module is used to convert the high and low levels VCC and GND output by the two comparators into high and low levels CPO and VIN. The NMOS tube N1 and the PMOS tube P1 are driving tubes of the IC. The source terminal of the PMOS tube P1 is connected to the CPO voltage, and the source terminal of the NMOS tube N1 is connected to the VIN voltage. The difference between the cathode voltage VOUT and the anode voltage VIN is equal to 25mV. After the comparator CMP1, when the cathode voltage VOUT of the rectifier is lower than the value of the anode voltage VIN-75mV, the pull-up PMOS tube P1 is controlled to quickly pull up the Gate pin. After the comparator CMP2, when the cathode voltage VOUT-25mV of the rectifier is higher than the anode voltage VIN, the pull-down NMOS tube N1 is controlled to quickly pull down the Gate pin.

2. A low-loss ideal diode according to claim 1, It is characterized in that The voltage value of the voltage regulator tube DZ is 5~7V.

3. A low-loss ideal diode according to claim 2, Features The ChargePump module includes five groups of ring inverters, the five groups of ring inverters are connected to capacitors, which are connected to a group of series diodes through the capacitors, the series diodes are connected to PMOS tubes P2 and PMOS tubes P3, and PMOS tubes P2 and PMOS tubes P3 are connected to NMOS tubes N2 and NMOS tubes P3.

4. A low-loss ideal diode according to claim 3, It is characterized in that After the bias current Ib passes through the NMOS and PMOS current mirrors, a fixed current source is obtained at the CPO pin.

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