Electronic packaging and its supporting structure
By using the inclined portion of the guide in the crystal-covered packaging process, the problem that the bottom glue is difficult to fill the area between the semiconductor elements is solved, and the problem of effectively filling and avoiding the overflow of glue and air chamber is achieved.
Patent Information
- Application Number
- CN202010174656.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-03-04
- Filing Date
- 2020-03-13
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2040-03-13
AI Technical Summary
In the existing crystal-covered packaging process, the bottom glue is difficult to fill the area between the semiconductor components, resulting in problems with the overflow and air chamber, and the film is extended, resulting in the packaging layer being unable to be effectively filled.
The inclined portion of the guide is used to guide the flow of the packaging layer, limiting the flow range of the packaging layer, and ensuring that the packaging layer can effectively fill the area between the carrier and the electronic component.
Effectively fill the area between the packaging substrate and the electronic components, avoid glue spills and air chamber problems, and ensure good electrical connection of the electronic components.
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Figure CN113363220B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a packaging process, and in particular to an electronic packaging component and a supporting structure thereof which are beneficial to a flip chip packaging process. Background Art
[0002] With the evolution of semiconductor packaging technology, semiconductor devices have developed different packaging types. In order to improve electrical performance and save packaging space, the industry has developed a packaging type that stacks multiple packaging structures to form a package stacking structure (Package on Package, referred to as POP). This packaging type can give full play to the heterogeneous integration characteristics of the system package (SiP). Electronic components with different functions, such as memory, central processing unit, graphics processor, image application processor, etc., can be integrated into the system through a stacking design, and are suitable for various thin and short electronic products.
[0003] Figure 1 FIG. 1 is a cross-sectional view of a well-known semiconductor package 1. Figure 1 As shown, the manufacturing process of the semiconductor package 1 is to set a first semiconductor element 11 with multiple electrode pads 110 on a packaging substrate 10 by means of multiple conductive bumps 15 in a flip chip manner, and then stack a second semiconductor element 12 on the first semiconductor element 11 by means of multiple conductive bumps 16 in a flip chip manner, and then form a bottom glue 14 between the packaging substrate 10 and the first semiconductor element 11 to cover the conductive bumps 15.
[0004] In order to prevent the bottom glue 14 from overflowing and contaminating other circuits of the package substrate 10 (such as the contacts 102 outside the die-plating area), at least one rectangular stopper 18 may be disposed on the package substrate 10 to limit the flow range of the bottom glue 14 .
[0005] However, since it is difficult for the base glue 14 to fill the area between the first semiconductor element 11 and the second semiconductor element 12, and a large amount of base glue 14 is required to fill the area between the first semiconductor element 11 and the second semiconductor element 12, resulting in too wide an overflow area, making it difficult for the stop block 18 to stop the flow of the base glue 14, a film 17 is generally used to combine the first semiconductor element 11 and the second semiconductor element 12, so that the base glue 14 only needs to be formed between the packaging substrate 10 and the first semiconductor element 11.
[0006] In the manufacturing process, the film 17 is first formed on the first semiconductor element 11 , and then the second semiconductor element 12 is pressed onto the film 17 , and then the underfill 14 is formed to avoid the problem that the underfill 14 is difficult to fill the space between the first and second semiconductor elements 11 , 12 .
[0007] However, the film 17 expands in all directions due to the squeezing of the second semiconductor element 12, and the protrusion L of the side 11c of the first semiconductor element 11 is about 440 microns (um), causing the glue lowering position of the equipment for subsequently forming the base glue 14 to be too far away from the first semiconductor element 11, resulting in the traction distance r (about 250um) between the base glue 14 and the first semiconductor element 11 being too large, causing the base glue 14 to be unable to fill the area between the packaging substrate 10 and the first semiconductor element 11.
[0008] In addition, if the first semiconductor element 11 cannot pull the bottom glue 14 , the bottom glue 14 will accumulate at the bottom glue position, causing the problem of glue overflow at the stop block 18 .
[0009] In addition, if the film 17 is used to replace the base glue 14 and is formed between the packaging substrate 10 and the first semiconductor element 11, but the die-stack side of the packaging substrate 10 has a highly densely arranged electrical contact pad 101 (or the conductive bumps 15 thereon), the base glue 14 cannot fill the gaps between the conductive bumps 15, resulting in air chambers (voids) between the conductive bumps 15.
[0010] On the other hand, if the base glue 14 is formed first and then the film 17 is formed, although the glue lowering position can be pulled closer to facilitate the first semiconductor element 11 to pull the base glue 14 to fill the area between the packaging substrate 10 and the first semiconductor element 11, the base glue 14 is easy to creep along the side 11c of the first semiconductor element 11 (siphon phenomenon) to the upper side of the first semiconductor element 11 when flowing and contaminate the transfer pad 111 on the upper side, resulting in the subsequent second semiconductor element 12 being unable to effectively electrically connect to the first semiconductor element 11, for example, the electrode pad 111 is not tin-wetting (Non-wetting) or is not connected to the conductive bump 16.
[0011] Therefore, how to overcome the various problems in the known technology has become a topic that needs to be solved urgently. Summary of the invention
[0012] In view of the above-mentioned defects of the prior art, the present invention provides an electronic package and a supporting structure thereof, which can be used to form a packaging layer.
[0013] The electronic package of the present invention comprises: a carrier; a first electronic element, which is arranged on the carrier and electrically connected to the carrier; a second electronic element, which is stacked on the first electronic element; a bonding layer, which is formed between the first and second electronic elements and protrudes from the side of the first electronic element; a packaging layer, which is formed between the carrier and the first electronic element; and a guide member, which is arranged on the carrier and is spaced apart from the first electronic element, wherein the guide member has an inclined portion toward the first electronic element.
[0014] In the aforementioned electronic package, the second electronic component is electrically connected to the first electronic component. Alternatively, the bonding layer is in the form of a thin film.
[0015] The present invention also provides a bearing structure, comprising: a bearing member having a placement area for placing electronic components; and a guide member, which is arranged on the bearing member and has an inclined portion facing the placement area.
[0016] In the aforementioned electronic package and carrier structure, the carrier is provided with an insulating protective layer, and a portion of the insulating protective layer serves as the guide.
[0017] In the aforementioned electronic package and supporting structure, the inclined portion of the guide member is in the shape of a straight inclined surface.
[0018] In the aforementioned electronic package and supporting structure, the inclined portion of the guide member is in a stepped shape.
[0019] In the aforementioned electronic package and supporting structure, the inclined portion of the guide member is in the shape of an inclined valley.
[0020] In the aforementioned electronic package and supporting structure, the guiding member is disposed corresponding to at least one edge of the placement area (or corresponding to at least one side surface of the first electronic component).
[0021] As can be seen from the above, the electronic package and its supporting structure of the present invention mainly guide the flow of the packaging layer by the inclined portion of the guide member. Even if the bonding layer protrudes out of the side of the first electronic component and the lower glue position of the packaging layer is far away from the first electronic component, the packaging layer can still flow closer to the first electronic component by the guidance of the inclined portion to shorten the traction distance between the packaging layer and the first electronic component. Therefore, compared with the known technology, the packaging layer can effectively fill the area between the carrier and the electronic component.
[0022] In addition, since the first electronic component can effectively pull the packaging layer, the packaging layer will not accumulate at the lower glue position, and thus the problem of glue overflow will not occur at the guide member.
[0023] In addition, there is no need to replace the packaging layer with a film, so even if the carrier has highly densely arranged conductive bumps, the packaging layer can still fill the gaps between the conductive bumps to avoid the formation of air chambers between the conductive bumps. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 The figure is a cross-sectional schematic diagram of a well-known semiconductor package.
[0025] Figure 2 It is a cross-sectional schematic diagram of the electronic package of the present invention.
[0026] Figure 2A and Figure 2B for Figure 2 Partial cross-sectional schematic diagrams of other different embodiments.
[0027] Figure 3A FIG. 4 is a top view of another embodiment of an electronic package of the present invention.
[0028] Figure 3B for Figure 3A Another embodiment of .
[0029] Figure 4 It is a cross-sectional schematic diagram of another embodiment of the electronic package of the present invention.
[0030] Description of Reference Numerals
[0031] 1: Semiconductor packaging
[0032] 10: Package substrate
[0033] 101,201: Electrical contact pads
[0034] 102: Contact
[0035] 11: First semiconductor element
[0036] 11c, 21c: Side
[0037] 110,210,220: Electrode pads
[0038] 111,211: Adapter pad
[0039] 12: Second semiconductor element
[0040] 14: Primer
[0041] 15,16,25,26: Conductive bumps
[0042] 17: Film
[0043] 18: Stop block
[0044] 2,3a,3b,4: Electronic packaging
[0045] 2a: Load-bearing structure
[0046] 20: Bearing parts
[0047] 20a: First side
[0048] 20b: Second side
[0049] 200: Dielectric
[0050] 202: Circuit layer
[0051] 21: First Electronic Components
[0052] 21a: First surface
[0053] 21b: Second surface
[0054] 22,41: Second electronic component
[0055] 23: Insulation protection layer
[0056] 24: Encapsulation layer
[0057] 27: Binding layer
[0058] 28,28a,28b,38a,38b: Guide
[0059] 280,281,282: inclined part
[0060] 9: Dispensing head
[0061] A: Placement area
[0062] L: Extension
[0063] R, r: pulling distance
[0064] t: interval. DETAILED DESCRIPTION
[0065] The following describes the implementation of the present invention by means of specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.
[0066] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no substantial technical significance. Any modification of the structure, change in the proportion relationship, or adjustment of the size should still fall within the scope of the technical content disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "on", "first", "second", and "one" cited in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present invention without substantially changing the technical content.
[0067] Figure 2 FIG. 2 is a cross-sectional schematic diagram of an electronic package 2 of the present invention. Figure 2 As shown, the electronic package 2 includes: a carrier 20 , a first electronic component 21 , a second electronic component 22 , a packaging layer 24 and at least one guiding member 28 .
[0068] The carrier 20 has a fan-out type redistribution layer (RDL). For example, the carrier 20 may be a package substrate having a core layer and a circuit portion or a coreless circuit structure. It should be understood that the carrier may also be other carrier units for carrying the first electronic component 21 such as a chip, such as a silicon interposer, and is not limited to the above.
[0069] In this embodiment, the carrier 20 has a first side 20a and a second side 20b opposite to each other, and includes a dielectric 200 and at least one circuit layer 202 combined with the dielectric 200, and the circuit layer 202 has a plurality of electrical contact pads 201 at the first side 20a, and an insulating protective layer 23 such as a solder mask is formed on the first side 20a and the second side 20b respectively, and the electrical contact pads 201 are exposed from the insulating protective layer 23.
[0070] In addition, the first side 20a of the carrier 20 serves as a chip placement side, which defines a placement area A to configure the electrical contact pads 201, and a plurality of circuit layers 202 serving as electrical contacts are configured outside the placement area A, and the second side 20b of the carrier 20 serves as a ball implantation side to implant a plurality of solder materials such as solder balls (not shown) for connection with an electronic device such as a circuit board (not shown).
[0071] The first electronic component 21 is disposed on a placement area A of the first side 20 a of the carrier 20 .
[0072] In this embodiment, the first electronic component 21 is an active component, a passive component or a combination of the two, and the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor. For example, the first electronic component 21 is a semiconductor chip, which has a first surface 21a and a second surface 21b opposite to each other, and the first surface 21a has a plurality of electrode pads 210, so that the electrode pads 210 are combined with the electrical contact pads 201 in a flip chip manner through a plurality of conductive bumps 25 such as solder materials or copper bumps to electrically connect the carrier 20.
[0073] In addition, the second surface 21 b of the first electronic component 21 has a plurality of transfer pads 211 .
[0074] The packaging layer 24 is formed between the first side 20 a of the carrier 20 and the first surface 21 a of the electronic component 21 to cover the conductive bumps 25 .
[0075] In this embodiment, the packaging layer 24 is an insulator such as a primer, which is formed by filling. However, the type of the packaging layer 24 is not limited to the primer, and may also be other fluid or flowable insulating materials.
[0076] The guide member 28 is disposed on the first side 20a of the carrier 20 and maintains a distance t from the first electronic component 21, wherein the guide member 28 has at least one inclined portion 280 toward the first electronic component 21 (or the placement area A) to guide the flow of the packaging layer 24 and limit the flow range of the packaging layer 24.
[0077] In this embodiment, the guide member 28 is disposed on the insulating protection layer 23 , so that the guide member 28 and the supporting member 20 (including the insulating protection layer 23 ) serve as a supporting structure 2 a .
[0078] In addition, the guide member 28 may be combined with the insulating protective layer 23; or, the guide member 28 and the insulating protective layer 23 may be formed as one piece. Figure 2A and Figure 2B Specifically, part of the insulating protective layer 23 can be used as the guide members 28a, 28b.
[0079] In addition, if Figure 2 As shown in FIG. 2 , the inclined portion 280 of the guide member 28 is in the shape of a straight inclined surface. Figure 2A As shown in FIG. 2 , the inclined portion 281 of the guide member 28a is stepped. Figure 2B As shown, the inclined portion 282 of the guide member 28b is in the shape of an inclined valley. It should be understood that the shape of the inclined portion of the guide member can be designed according to requirements, such as an arc shape, without any special limitation.
[0080] In addition, the guide member 28 is correspondingly disposed outside at least one side surface 21c of the first electronic component 21 (or at least one edge of the placement area A). Figure 3A The electronic package 3a shown in the figure makes the guide member 38a correspond to the single side surface 21c of the first electronic component 21; or Figure 3B The electronic package 3b shown in the figure makes the guide member 38b correspond to the four side surfaces 21c of the first electronic component 21. Specifically, the guide member 38a can be a continuous body (such as Figure 3A as shown) or in multiple segments (as shown Figure 3B shown).
[0081] The second electronic component 22 is stacked on the second surface 21 b of the first electronic component 21 .
[0082] In this embodiment, the second electronic component 22 is an active component, a passive component or a combination of the two, and the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor. For example, the second electronic component 22 is a semiconductor chip, and its plurality of electrode pads 220 are combined with the transfer pad 211 in a flip chip manner by a plurality of conductive bumps 26 such as solder material to electrically connect the first electronic component 21. Specifically, the second electronic component 22 is placed on the first electronic component 21 by a thin film bonding layer 27, and the bonding layer 27 covers the conductive bumps 26.
[0083] In addition, in the manufacturing process, the bonding layer 27 is first formed on the first electronic component 21, and then the second electronic component 22 is pressed on the bonding layer 27, so that the bonding layer 27 covers the conductive bumps 26, and the bonding layer 27 is squeezed by the second electronic component 22 and expands in all directions. Figure 2A and Figure 2B The protrusion L shown is about 440 microns) on the side surface 21c of the first electronic component 21. Then, the packaging layer 24 is formed between the first side 20a of the carrier 20 and the first surface 21a of the electronic component 21, so that the packaging layer 24 covers the conductive bumps 25. The device (such as Figure 2A and Figure 2B The glue dispensing position of the glue dispensing head 9 shown is far away from the side surface 21 c of the first electronic component 21 and will not touch the protruding part of the bonding layer 27 .
[0084] In addition, a plurality of second electronic components 41, 22 may be stacked on the first electronic component 21 as required, such as Figure 4 The electronic package 4 is shown.
[0085] In summary, the electronic packaging 2, 3a, 3b, 4 and the supporting structure 2a of the present invention mainly guide the flow of the packaging layer 24 by the inclined parts 280, 281, 282 of the guide members 28, 28a, 28b, 38a, 38b to limit the flow range of the packaging layer 24. Therefore, compared with the known technology, even if the bonding layer 27 protrudes from the side 21c of the first electronic component 21 so that the glue-on position of the packaging layer 24 is far away from the first electronic component 21, the packaging layer 24 can still flow closer to the first electronic component 21 by the guidance of the inclined parts 280, 281, 282, so as to shorten the pulling distance R between the packaging layer 24 and the first electronic component 21 (such as Figure 2A and 2B The pulling distance R shown is less than 250 microns. Therefore, the guide members 28, 28a, 28b, 38a, 38b not only prevent the overflowing glue from contaminating the contacts 202, but also enable the packaging layer 24 to effectively fill the area between the first side 20a of the carrier 20 and the first surface 21a of the electronic component 21.
[0086] In addition, since the first electronic component 21 can effectively pull the packaging layer 24 , the packaging layer 24 will not accumulate at the lower glue position, and thus the glue overflow problem will not occur at the guide members 28 , 28 a , 28 b , 38 a , 38 b , thereby preventing the contacts 202 from being contaminated.
[0087] In addition, there is no need to replace the packaging layer 24 with a thin film. Therefore, even if the placement area A of the first side 20a of the carrier 20 has highly densely arranged electrical contact pads 201 (or the conductive bumps 25 thereon), the packaging layer 24 can fill the gaps between the conductive bumps 25 to avoid the formation of air chambers (voids) between the conductive bumps 25.
[0088] On the other hand, since the bonding layer 27 is formed first and then the packaging layer 24 is formed, even if the packaging layer 24 creeps along the side surface 21c of the first electronic component 21 during flow (siphoning phenomenon), the bonding layer 27 can still prevent the packaging layer 24 from flowing to the second surface 21b of the first electronic component 21, thereby avoiding contamination of the transfer pad 211, thereby avoiding the problem of the transfer pad 211 not being tin-wetting or not being connected to the conductive bump 26.
[0089] The above embodiments are only used to illustrate the principles and effects of the present invention, and are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be as set forth in the claims described below.
Claims
1. An electronic package, characterized in that: include: A carrier, comprising a dielectric and at least one circuit layer combined with the dielectric; An insulating protective layer, which is disposed on the dielectric body of the carrier; A first electronic component is disposed on the circuit layer of the carrier through a plurality of conductive bumps and is electrically connected to the carrier; A second electronic component stacked on the first electronic component; A bonding layer formed between the first electronic component and the second electronic component and protruding from a side surface of the first electronic component; A packaging layer formed between the carrier and the first electronic component; as well as The guide member is arranged on the insulating protection layer and is spaced apart from the first electronic component, wherein the guide member has an inclined portion facing the first electronic component.
2. The electronic package according to claim 1, characterized in that: A portion of the insulating protection layer serves as the guide.
3. The electronic package according to claim 1, characterized in that: The inclined portion of the guide member is in a stepped shape.
4. The electronic package according to claim 1, characterized in that: The inclined portion of the guide member is in the shape of a straight inclined surface.
5. The electronic package according to claim 1, characterized in that: The inclined portion of the guide member is in a valley shape.
6. The electronic package according to claim 1, characterized in that: The second electronic component is electrically connected to the first electronic component.
7. The electronic package according to claim 1, characterized in that: The bonding layer is in the form of a film.
8. The electronic package according to claim 1, characterized in that: The guiding member is disposed corresponding to at least one side surface of the first electronic component.
Citation Information
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Manufacture of resin sealed semiconductor package
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