Optical receiving device and ranging module

Abstract

The present technology relates to a light receiving device and a ranging module capable of improving sensitivity. The light receiving device includes a pixel array unit, in which pixels are arranged two-dimensionally in a matrix, and the pixels respectively have a first spectrometer and a second spectrometer, the first spectrometer detects the charge photoelectrically converted by the photoelectric conversion unit, and the second spectrometer detects the charge photoelectrically converted by the photoelectric conversion unit. The first spectrometer and the second spectrometer each have a voltage application unit for applying a voltage, and the pixel array unit has a groove portion formed by digging to a predetermined depth from the light incident surface side of the substrate, and the groove portion is arranged to overlap with at least a portion of the voltage application unit in a plan view. The present technology can be applied to, for example, a ranging sensor of an indirect ToF scheme.

Description

Technical Field

[0001] The present technology relates to a light receiving device and a distance measuring module, and more particularly to a light receiving device and a distance measuring module capable of improving sensitivity. Background Art

[0002] A distance-measuring sensor using an indirect ToF (time of flight) scheme is known. In this type of distance-measuring sensor, the signal charge obtained by receiving light reflected by the object being measured is distributed between two charge accumulation regions, and the distance is calculated based on the signal charge distribution ratio. Among these distance-measuring sensors, one proposed employs a back-illuminated structure to improve light-receiving characteristics (for example, see Patent Document 1).

[0003] List of citations

[0004] Patent Literature

[0005] Patent Document 1: International Patent Application No. 2018 / 135320 Summary of the Invention

[0006] Problems to be solved by the present invention

[0007] In this indirect ToF ranging sensor, it is desired to further improve the sensitivity.

[0008] The present technology has been made in view of the above circumstances, and aims to improve sensitivity.

[0009] Technical solutions to the problem

[0010] A light receiving device according to a first aspect of the present technology includes a pixel array unit in which pixels are arranged two-dimensionally in a matrix. Each pixel includes a first spectrometer that detects charge photoelectrically converted by a photoelectric conversion unit and a second spectrometer that detects charge photoelectrically converted by the photoelectric conversion unit. Each of the first spectrometer and the second spectrometer includes a voltage application unit that applies a voltage. The pixel array unit includes a groove portion formed by digging to a predetermined depth from the light incident surface side of a substrate, and the groove portion is arranged so as to overlap at least a portion of the voltage application unit in a plan view.

[0011] A distance measuring module according to a second aspect of the present technology includes a light receiving device having a pixel array unit, wherein pixels are arranged two-dimensionally in a matrix, each of the pixels having a first spectrometer and a second spectrometer, the first spectrometer detecting charge photoelectrically converted by a photoelectric conversion unit, the second spectrometer detecting charge photoelectrically converted by the photoelectric conversion unit, the first spectrometer and the second spectrometer each having a voltage applying unit for applying a voltage, the pixel array unit having a groove portion formed by digging to a predetermined depth from a light incident surface side of a substrate, and the groove portion being arranged so as to overlap with at least a portion of the voltage applying unit in a plan view.

[0012] In the first and second aspects of the present technology, a pixel array unit is provided, wherein pixels are arranged two-dimensionally in a matrix, each pixel having a first spectrometer for detecting charge photoelectrically converted by a photoelectric conversion unit and a second spectrometer for detecting charge photoelectrically converted by the photoelectric conversion unit. The first spectrometer and the second spectrometer each have a voltage application unit for applying a voltage, and the pixel array unit has a groove formed by digging to a predetermined depth from the light incident surface side of a substrate. The groove is arranged so as to overlap at least a portion of the voltage application unit in a plan view.

[0013] The light receiving device and the distance measuring module may be independent devices, or may be modules included in another device. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is a block diagram showing a configuration example of a light receiving device.

[0015] Figure 2 is a cross-sectional view illustrating a configuration example of a pixel.

[0016] Figure 3 is a plan view of the first and second beam splitters of a pixel.

[0017] Figure 4 is a cross-sectional view of a pixel provided with a separation structure.

[0018] Figure 5 is a cross-sectional view of multiple pixels.

[0019] Figure 6 is a cross-sectional view of multiple pixels.

[0020] Figure 7 1 is a plan view showing a first modified example of the spectrometer for a pixel.

[0021] Figure 8 1 is a plan view showing a second modified example of the spectrometer for a pixel.

[0022] Figure 9 1 is a plan view showing a third modified example of the spectrometer for a pixel.

[0023] Figure 10 1 is a plan view showing a fourth modified example of the spectrometer for a pixel.

[0024] Figure 11 1 is a plan view showing a fifth modification of the spectrometer for a pixel.

[0025] Figure 12 is a diagram showing an equivalent circuit of a pixel.

[0026] Figure 13 is a diagram showing another equivalent circuit of a pixel.

[0027] Figure 14 is a diagram showing a first wiring example of vertical signal lines.

[0028] Figure 15 is a diagram showing a second wiring example of the vertical signal line.

[0029] Figure 16 is a diagram showing a third wiring example of the vertical signal line.

[0030] Figure 17 is a diagram showing a fourth wiring example of a vertical signal line.

[0031] Figure 18 This is a plan view of the gate electrode formation surface between the multilayer wiring layer and the substrate.

[0032] Figure 19 is a diagram showing a planar layout example of a metal film M1 as a first layer of a multilayer wiring layer.

[0033] Figure 20 is a diagram showing a planar layout example of a metal film M2 as the second layer of the multilayer wiring layer.

[0034] Figure 21 3 is a diagram showing a planar layout example of a metal film M3 as the third layer of the multilayer wiring layer.

[0035] Figure 22 3 is a diagram showing a planar layout example of the metal film M4 as the fourth layer of the multilayer wiring layer.

[0036] Figure 23 1 is a diagram showing a planar layout example of a metal film M5 as the fifth layer of the multilayer wiring layer.

[0037] Figure 24 3 is a diagram illustrating a first pixel separation structure of a pixel.

[0038] Figure 253 is a diagram illustrating a second pixel separation structure of a pixel.

[0039] Figure 26 3 is a diagram illustrating a third pixel separation structure of a pixel.

[0040] Figure 27 3 is a diagram illustrating a fourth pixel separation structure of a pixel.

[0041] Figure 28 3 is a diagram illustrating a fifth pixel separation structure of a pixel.

[0042] Figure 29 2 is a diagram illustrating a sixth pixel separation structure of a pixel.

[0043] Figure 30 1 is a diagram showing a first pixel separation structure provided with a concavo-convex structure.

[0044] Figure 31 2 is a diagram illustrating a seventh pixel separation structure of a pixel.

[0045] Figure 32 2 is a diagram showing a seventh pixel separation structure provided with a concavo-convex structure.

[0046] Figure 33 It is a diagram showing the substrate structure of the light receiving device.

[0047] Figure 34 is a block diagram showing a configuration example of a ranging module.

[0048] Figure 35 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0049] Figure 36 It is an explanatory diagram showing an example of the installation positions of the vehicle exterior information detection unit and the imaging unit. DETAILED DESCRIPTION

[0050] Hereinafter, a mode for implementing the present technology (hereinafter referred to as an embodiment) will be described. Note that the description will be given in the following order.

[0051] 1. Block diagram of the optical receiver

[0052] 2. Example Structure of Pixel

[0053] 3. Example of a cross-sectional structure of multiple pixels

[0054] 4. Examples of other planar shapes of beam splitters T

[0055] 5. Pixel Equivalent Circuit

[0056] 6. Example of vertical signal line VSL wiring

[0057] 7.5 Planar Layout Example of Metal Films M1 to M5

[0058] 8. Example of DTI construction

[0059] 9. Example of substrate structure for a light-receiving device

[0060] 10. Example of distance measurement module configuration

[0061] 11. Application examples of mobile objects

[0062] <1. Block Diagram of Light Receiving Device>

[0063] Figure 1 is a block diagram showing a configuration example of a light receiving device to which the present technology is applied.

[0064] Figure 1 The light receiving device 1 in the present invention is a back-illuminated current-assisted photonic demodulator (CAPD) sensor and is used, for example, as part of a distance measurement system that measures distance using an indirect ToF scheme. This distance measurement system can be applied to, for example, an in-vehicle system that measures the distance to objects outside the vehicle, a gesture recognition system that measures the distance to an object such as a user's hand and recognizes the user's gesture based on the measurement results, and the like.

[0065] For example, the light receiving device 1 includes a pixel array unit 20 formed on a semiconductor substrate (not shown) and a peripheral circuit unit arranged around the pixel array unit 20. The peripheral circuit unit includes, for example, a beam splitter driving unit 21, a vertical driving unit 22, a column processing unit 23, a horizontal driving unit 24, and a system control unit 25.

[0066] The light receiving device 1 is also provided with a signal processing unit 31 and a data storage unit 32. Note that the signal processing unit 31 and the data storage unit 32 may be arranged on the same substrate as the light receiving device 1, or may be arranged on a substrate different from the light receiving device 1 in the imaging device.

[0067] The pixel array unit 20 has a configuration in which pixels 51 are arranged two-dimensionally in an array in row and column directions. These pixels 51 generate an electric charge based on the amount of light they receive and output a signal based on the electric charge. Specifically, the pixel array unit 20 includes a plurality of pixels 51 that perform photoelectric conversion on incident light and output a detection signal based on the resulting electric charge. Here, the row direction refers to the horizontal direction in which the pixels 51 are arranged, and the column direction refers to the vertical direction in which the pixels 51 are arranged. The row direction is the horizontal direction in the figure, and the column direction is the vertical direction in the figure.

[0068] The pixel 51 receives externally incident light (particularly infrared light), performs photoelectric conversion, and outputs a signal corresponding to the resulting charge. The pixel 51 includes a first spectrometer TA for applying a predetermined voltage MIX_A (first voltage) to detect the photoelectrically converted charge, and a second spectrometer TB for applying a predetermined voltage MIX_B (second voltage) to detect the photoelectrically converted charge.

[0069] The spectrometer driver 21 supplies a predetermined voltage MIX_A to the first spectrometer TA of each pixel 51 in the pixel array unit 20 via a predetermined voltage supply line tdrv, and supplies a predetermined voltage MIX_B to the second spectrometer TB via a predetermined voltage supply line tdrv. Therefore, two voltage supply lines tdrv are provided within a pixel column in the pixel array unit 20: one for transmitting the voltage MIX_A and one for transmitting the voltage MIX_B.

[0070] In the pixel array unit 20, for a matrix pixel array, pixel drive lines pdrv are arranged along the row direction of each pixel row. The pixel drive lines pdrv transmit drive signals for performing drive when reading detection signals from pixels. Note that although Figure 1 The pixel driving line pdrv is shown as one wiring line, but the pixel driving line pdrv is not limited to one and actually includes a plurality of wiring lines. One end of the pixel driving line pdrv is connected to the output end corresponding to each row of the vertical driving unit 22.

[0071] In addition, for each pixel column of a plurality of pixels arranged in a matrix shape of the pixel array unit 20, four vertical signal lines VSL are arranged along the column direction. Figures 14 to 17 The details of the four vertical signal lines VSL are described below. However, by providing four vertical signal lines VSL for each pixel column, a plurality of rows can be read simultaneously, thereby improving the S / N ratio and shortening the reading time.

[0072] The vertical drive unit 22 includes a shift register, an address decoder, and the like, and drives the pixels of the pixel array unit 20 simultaneously or row by row, for example. That is, the vertical drive unit 22 is included in a drive unit for controlling the operation of each pixel of the pixel array unit 20 together with a system control unit 25 that controls the vertical drive unit 22.

[0073] The detection signal output from each pixel 51 of the pixel row according to the drive control of the vertical drive unit 22 is input to the column processing unit 23 through the vertical signal line VSL. The column processing unit 23 performs predetermined signal processing on the detection signal output from each pixel 51 through the vertical signal line VSL, and temporarily holds the detection signal after the signal processing.

[0074] Specifically, the column processing unit 23 performs noise removal processing, analog-to-digital (AD) conversion processing, and the like as signal processing.

[0075] The horizontal drive unit 24 includes a shift register, an address decoder, and the like, and sequentially selects unit circuits corresponding to pixel columns in the column processing unit 23. Through selective scanning by the horizontal drive unit 24, detection signals that have undergone signal processing by each unit circuit in the column processing unit 23 are sequentially output to the signal processing unit 31.

[0076] The system control unit 25 includes a timing generator that generates various timing signals and the like, and performs drive control of the spectrometer driving unit 21 , vertical driving unit 22 , column processing unit 23 , horizontal driving unit 24 and the like based on the various timing signals generated by the timing generator.

[0077] The signal processing unit 31 has at least an arithmetic processing function and performs various signal processing such as arithmetic processing based on the detection signal output from the column processing unit 23. When the signal processing unit 31 performs signal processing, the data storage unit 32 temporarily stores data necessary for the processing.

[0078] The light receiving device 1 is constructed as described above.

[0079] <2. Exemplary Structure of Pixel>

[0080] Next, the structure of the pixel 51 provided in the pixel array unit 20 will be described.

[0081] Figure 2 A cross-sectional view of one pixel 51 provided in the pixel array unit 20 is shown.

[0082] The pixel 51 receives light (particularly infrared light) incident from the outside and performs photoelectric conversion, and outputs a signal corresponding to the charge obtained as a result.

[0083] For example, the pixel 51 has a substrate 61 including a P-type semiconductor layer such as a silicon substrate and an on-chip lens 62 formed on the substrate 61. The substrate 61 corresponds to a photoelectric conversion unit that photoelectrically converts light incident on the pixel 51 from the outside.

[0084] The substrate 61 includes, for example, a high-resistance P-Epi substrate having a substrate concentration of 1E+13 or less, and is formed so that the resistance (resistivity) of the substrate 61 is, for example, 500 [Ωcm] or more. Here, the relationship between the substrate concentration and the resistance of the substrate 61 is, for example, such that when the substrate concentration is 6.48E+12 [cm 3 ], the resistance is 2000 [Ωcm]; when the substrate concentration is 1.30E+13 [cm 3], the resistance is 1000[Ωcm]; when the substrate concentration is 2.59E+13[cm 3 ], the resistance is 500[Ωcm]; when the substrate concentration is 1.30E+14[cm 3 ], the resistance is 100[Ωcm].

[0085] exist Figure 2 , the upper surface of the substrate 61 is the back surface of the substrate 61, and is a light incident surface on which light from the outside is incident on the substrate 61. On the other hand, the lower surface of the substrate 61 is the front surface of the substrate 61, and is formed with a multilayer wiring layer (not shown). A fixed charge film 66 including a single layer film or a stacked film having a positive fixed charge is formed on the light incident surface of the substrate 61, and an on-chip lens 62 is formed on the upper surface of the fixed charge film 66, which converges light incident from the outside and causes the light to be incident on the substrate 61. The fixed charge film 66 puts the light incident surface side of the substrate 61 into a hole accumulation state and suppresses the generation of dark current.

[0086] Inter-pixel light shielding films 63-1 and 63-2 are formed at the pixel boundaries on the fixed charge film 66 to prevent crosstalk between adjacent pixels. Hereinafter, when there is no need to specifically distinguish between the inter-pixel light shielding films 63-1 and 63-2, they are simply referred to as the inter-pixel light shielding films 63.

[0087] In this example, when light from the outside is incident on the substrate 61 through the on-chip lens 62, the inter-pixel light-shielding film 63 is formed to prevent the light entering from the outside from being incident on the region of the adjacent pixel 51. That is, light that is incident on the on-chip lens 62 from the outside and propagates into another pixel adjacent to the pixel 51 is blocked by the inter-pixel light-shielding film 63-1 or the inter-pixel light-shielding film 63-2 and is prevented from being incident on another adjacent pixel.

[0088] Since the light receiving device 1 is a back-illuminated CAPD sensor, the light incident surface of the substrate 61 is the so-called back surface, and no wiring layer including wiring etc. is formed on the back surface. In addition, a multilayer wiring layer including wiring for driving transistors etc. formed in the pixels 51 and wiring for reading detection signals from the pixels 51 is formed in a portion of the surface of the substrate 61 on the side opposite to the light incident surface.

[0089] On the surface side of the substrate 61 opposite to the light incident surface, that is, Figure 2 An oxide film 64, a first beam splitter TA, and a second beam splitter TB are formed on the inner side of the lower surface of the optical fiber.

[0090] In this example, an oxide film 64 is formed in the central portion of the pixel 51 near the surface of the substrate 61 opposite to the light incident surface, and a first beam splitter TA and a second beam splitter TB are formed at both ends of the oxide film 64 .

[0091] Here, the first optical splitter TA includes: an N+ semiconductor region 71-1 and an N- semiconductor region 72-1 having a lower donor impurity concentration than the N+ semiconductor region 71-1, which are N-type semiconductor regions; and a P+ semiconductor region 73-1 and a P- semiconductor region 74-1 having a lower acceptor impurity concentration than the P+ semiconductor region 73-1, which are P-type semiconductor regions. Examples of donor impurities include elements belonging to Group 5 of the periodic table, such as phosphorus (P) and arsenic (As) relative to Si, and examples of acceptor impurities include elements belonging to Group 3 of the periodic table, such as boron (B) relative to Si. Elements that serve as donor impurities are referred to as donor elements, and elements that serve as acceptor impurities are referred to as acceptor elements.

[0092] exist Figure 2 In the embodiment, an N+ semiconductor region 71-1 is formed at a position adjacent to the oxide film 64 on the right side of the inner portion of the surface (ie, the front surface) of the substrate 61 opposite to the light incident surface. Figure 2 In the embodiment, the N- semiconductor region 72-1 is formed above the N+ semiconductor region 71-1 and covers (surrounds) the N+ semiconductor region 71-1.

[0093] In addition, the P+ semiconductor region 73-1 is formed on the right side of the N+ semiconductor region 71-1. Figure 2 In the embodiment, the P- semiconductor region 74-1 is formed above the P+ semiconductor region 73-1 and covers (surrounds) the P+ semiconductor region 73-1.

[0094] In addition, the N+ semiconductor region 71-1 is formed on the right side of the P+ semiconductor region 73-1. Figure 2 In the embodiment, the N- semiconductor region 72-1 is formed above the N+ semiconductor region 71-1 and covers (surrounds) the N+ semiconductor region 71-1.

[0095] Similarly, the second splitter TB includes: an N+ semiconductor region 71-2 and an N- semiconductor region 72-2 having a lower donor impurity concentration than the N+ semiconductor region 71-2, which are N-type semiconductor regions; and a P+ semiconductor region 73-2 and a P- semiconductor region 74-2 having a lower acceptor impurity concentration than the P+ semiconductor region 73-2, which are P-type semiconductor regions.

[0096] exist Figure 2In the embodiment, an N+ semiconductor region 71-2 is formed on the left side of the inner portion of the surface (ie, the front surface) of the substrate 61 opposite to the light incident surface at a position adjacent to the oxide film 64. Figure 2 In the embodiment, the N- semiconductor region 72-2 is formed above the N+ semiconductor region 71-2 and covers (surrounds) the N+ semiconductor region 71-2.

[0097] In addition, the P+ semiconductor region 73-2 is formed on the left side of the N+ semiconductor region 71-2. Figure 2 In the embodiment, the P- semiconductor region 74-2 is formed above the P+ semiconductor region 73-2 and covers (surrounds) the P+ semiconductor region 73-2.

[0098] In addition, the N+ semiconductor region 71-2 is formed on the left side of the P+ semiconductor region 73-2. Figure 2 In the embodiment, the N- semiconductor region 72-2 is formed above the N+ semiconductor region 71-2 and covers (surrounds) the N+ semiconductor region 71-2.

[0099] In a portion inside the surface (ie, the front surface) of the substrate 61 opposite to the light incident surface, an oxide film 64 similar to the central portion of the pixel 51 is formed at the end of the pixel 51 .

[0100] Hereinafter, the first optical splitter TA and the second optical splitter TB are simply referred to as an optical splitter T when there is no need to particularly distinguish between the first optical splitter TA and the second optical splitter TB.

[0101] In addition, hereinafter, when there is no need to specifically distinguish between the N+ semiconductor region 71-1 and the N+ semiconductor region 71-2, the N+ semiconductor region 71-1 and the N+ semiconductor region 71-2 are also referred to as the N+ semiconductor region 71, and when there is no need to specifically distinguish between the N- semiconductor region 72-1 and the N- semiconductor region 72-2, the N- semiconductor region 72-1 and the N- semiconductor region 72-2 are referred to as the N- semiconductor region 72.

[0102] In addition, hereinafter, when there is no need to specifically distinguish between the P+ semiconductor region 73-1 and the P+ semiconductor region 73-2, the P+ semiconductor region 73-1 and the P+ semiconductor region 73-2 are also referred to as the P+ semiconductor region 73, and when there is no need to specifically distinguish between the P- semiconductor region 74-1 and the P- semiconductor region 74-2, the P- semiconductor region 74-1 and the P- semiconductor region 74-2 are referred to as the P- semiconductor region 74.

[0103] Furthermore, in substrate 61, a separating portion 75-1 for separating N+ semiconductor region 71-1 and P+ semiconductor region 73-1 is formed by an oxide film or the like between the regions. Similarly, a separating portion 75-2 for separating N+ semiconductor region 71-2 and P+ semiconductor region 73-2 is also formed by an oxide film or the like between the regions. Hereinafter, when there is no need to specifically distinguish between separating portion 75-1 and separating portion 75-2, separating portion 75-1 and separating portion 75-2 are simply referred to as separating portion 75.

[0104] The N+ semiconductor region 71 provided in the substrate 61 serves as a charge detection unit for detecting the amount of light incident from the outside into the pixel 51, that is, the amount of signal carriers generated by the substrate 61 through photoelectric conversion. Note that, in addition to the N+ semiconductor region 71, the N- semiconductor region 72 having a low donor impurity concentration can also be considered as part of the charge detection unit. The N- semiconductor region 72 having a low donor impurity concentration can be omitted. In addition, the P+ semiconductor region 73 serves as a voltage application unit for injecting majority carrier current into the substrate 61, that is, for applying voltage directly to the substrate 61 to generate an electric field in the substrate 61. Note that, in addition to the P+ semiconductor region 73, the P- semiconductor region 74 having a low acceptor impurity concentration can also be considered as part of the voltage application unit. The P- semiconductor region 74 having a low acceptor impurity concentration can be omitted.

[0105] Although the details will be explained later, the floating diffusion (FD) portion (hereinafter also specifically referred to as FD portion A) serving as a floating diffusion region (not shown) is directly connected to the N+ semiconductor region 71-1, and the FD portion A is also connected to the vertical signal line VSL through an amplifying transistor, etc. (not shown).

[0106] Similarly, another FD portion different from the FD portion A (hereinafter also specifically referred to as the FD portion B) is directly connected to the N + semiconductor region 71-2, and the FD portion B is also connected to the vertical signal line VSL through an amplifier transistor or the like (not shown). Here, the vertical signal line VSL connected to the FD portion A and the vertical signal line VSL connected to the FD portion B are different vertical signal lines VSL.

[0107] For example, when measuring the distance to an object using an indirect ToF scheme, infrared light is emitted toward the object from an imaging device equipped with a light receiving device 1. When the infrared light reflects off the object and returns to the imaging device as reflected light, the substrate 61 of the light receiving device 1 receives the incident reflected light (infrared light) and performs photoelectric conversion. The spectrometer drive unit 21 drives the first and second spectrometers TA and TB of the pixel 51 and distributes signals corresponding to the charge DET obtained by the photoelectric conversion to the FD section A and FD section B.

[0108] For example, at a certain moment, the optical splitter driving unit 21 applies a voltage to the two P+ semiconductor regions 73 through a contact, etc. Specifically, for example, the optical splitter driving unit 21 applies a voltage MIX_A = 1.5 V to the P+ semiconductor region 73-1 of the first optical splitter TA and applies a voltage MIX_B = 0 V to the P+ semiconductor region 73-2 of the second optical splitter TB.

[0109] Then, an electric field is generated between the two P+ semiconductor regions 73 in the substrate 61, and current flows from the P+ semiconductor region 73-1 to the P+ semiconductor region 73-2. In this case, holes in the substrate 61 move in the direction of the P+ semiconductor region 73-2, while electrons move in the direction of the P+ semiconductor region 73-1.

[0110] Therefore, when infrared light (reflected light) from the outside is incident on the substrate 61 through the on-chip lens 62 in this state and the infrared light is photoelectrically converted in the substrate 61 and converted into electron and hole pairs, the obtained electrons are guided along the direction of the P+ semiconductor region 73-1 through the electric field between the P+ semiconductor regions 73, and the obtained electrons move to the N+ semiconductor region 71-1.

[0111] In this case, electrons generated by photoelectric conversion are used as signal carriers (signal charges) for detecting a signal corresponding to the amount of infrared light incident on the pixel 51 (ie, the amount of received infrared light).

[0112] As a result, in the N+ semiconductor region 71-1, charges corresponding to the electrons moving into the N+ semiconductor region 71-1 are accumulated and detected by the column processing unit 23 through the FD portion A, the amplifying transistor, the vertical signal line VSL, and the like.

[0113] That is, the accumulated charge DET_A in the N+ semiconductor region 71-1 is transferred to the FD portion A directly connected to the N+ semiconductor region 71-1, and a signal corresponding to the charge DET_A transferred to the FD portion A is read by the column processing unit 23 through the amplifier transistor and the vertical signal line VSL. Then, the read signal is subjected to processing such as AD conversion processing in the column processing unit 23, and the detection signal obtained as a result is provided to the signal processing unit 31.

[0114] The detection signal is a signal indicating the amount of charge corresponding to electrons detected by the N+ semiconductor region 71 - 1 (ie, the amount of charge DET_A accumulated in the FD portion A). In other words, the detection signal is a signal indicating the amount of infrared light received by the pixel 51 .

[0115] Note that at this time, similarly to the case of the N + semiconductor region 71 - 1 , the detection signal corresponding to the electrons detected in the N + semiconductor region 71 - 2 can also be appropriately used for distance measurement.

[0116] Furthermore, at the next moment, the optical splitter driving unit 21 applies a voltage to the two P+ semiconductor regions 73 through a contact or the like so as to generate an electric field in a direction opposite to the electric field generated so far in the substrate 61. Specifically, for example, a voltage MIX_A = 0 V is applied to the P+ semiconductor region 73-1 of the first optical splitter TA, and a voltage MIX_B = 1.5 V is applied to the P+ semiconductor region 73-2 of the second optical splitter TB.

[0117] As a result, an electric field is generated between the two P + semiconductor regions 73 in the substrate 61 , and current flows from the P + semiconductor region 73 - 2 to the P + semiconductor region 73 - 1 .

[0118] When infrared light (reflected light) from the outside is incident on the substrate 61 through the on-chip lens 62 in this state and the infrared light is photoelectrically converted in the substrate 61 and converted into electron and hole pairs, the obtained electrons are guided along the direction of the P+ semiconductor region 73-2 by the electric field between the P+ semiconductor regions 73, and the obtained electrons move to the N+ semiconductor region 71-2.

[0119] As a result, in the N+ semiconductor region 71 - 2 , charges corresponding to the electrons moving into the N+ semiconductor region 71 - 2 are accumulated and detected by the column processing unit 23 through the FD portion B, the amplifying transistor, the vertical signal line VSL, and the like.

[0120] That is, the accumulated charge DET_B in the N+ semiconductor region 71-2 is transferred to the FD portion B directly connected to the N+ semiconductor region 71-2, and a signal corresponding to the charge DET_B transferred to the FD portion B is read by the column processing unit 23 through the amplifier transistor and the vertical signal line VSL. Then, the read signal is subjected to processing such as AD conversion processing in the column processing unit 23, and the detection signal obtained as a result is provided to the signal processing unit 31.

[0121] Note that at this time, similarly to the case of the N + semiconductor region 71 - 2 , the detection signal corresponding to the electrons detected in the N + semiconductor region 71 - 1 can also be appropriately used for distance measurement.

[0122] In this manner, when detection signals obtained by photoelectric conversion in different periods are obtained in the same pixel 51 , the signal processing unit 31 calculates distance information indicating the distance to the object based on the detection signals and outputs the distance information to a subsequent stage.

[0123] A method of allocating signal carriers to different N+ semiconductor regions 71 in this manner and calculating distance information based on detection signals corresponding to the signal carriers is referred to as an indirect ToF method.

[0124] <Example of Planar Shape of Beam Splitter T>

[0125] Figure 3 5 is a plan view of the first beam splitter TA and the second beam splitter TB in the pixel 51 .

[0126] Note that in Figure 3 In, with Figure 2 Corresponding parts are denoted by the same reference numerals, and thus their description will be appropriately omitted.

[0127] like Figure 3 As shown, each optical splitter T has a structure in which a P+ semiconductor region 73 is surrounded by an N+ semiconductor region 71. More specifically, a rectangular P+ semiconductor region 73 is formed at the center of the optical splitter T, and the P+ semiconductor region 73 is surrounded by a rectangular, or more specifically, rectangular frame-shaped, N+ semiconductor region 71.

[0128] Note that in Figure 3 In FIG. 5 , the separation portion 75 between the P+ semiconductor region 73 and the N+ semiconductor region 71 and the oxide film 64 are omitted.

[0129] Externally incident infrared light is focused by the on-chip lens 62 on the center portion of the pixel 51, that is, on the middle portion between the first beam splitter TA and the second beam splitter TB. As a result, the occurrence of crosstalk caused by infrared light incident on pixels 51 adjacent to the pixel 51 can be suppressed. In addition, when infrared light is directly incident on the beam splitter T, the charge separation efficiency, that is, the contrast between the active and inactive taps (Cmod) and the modulation contrast are reduced. Therefore, this reduction can also be suppressed.

[0130] Here, the spectrometer T on which a signal corresponding to the charge DET obtained by photoelectric conversion is read (ie, the spectrometer T on which the charge DET obtained by photoelectric conversion is to be detected) is also referred to as an effective spectrometer (effective spectrometer).

[0131] In contrast, a spectrometer T on which a signal corresponding to the charge DET obtained by photoelectric conversion is not substantially read (ie, a spectrometer T that is not an effective spectrometer) is also referred to as an ineffective spectrometer.

[0132] In the above-described example, the optical splitter T in which a voltage of 1.5 V is applied to the P+ semiconductor region 73 is an effective optical splitter, and the optical splitter T in which a voltage of 0 V is applied to the P+ semiconductor region 73 is an ineffective optical splitter.

[0133] Cmod is calculated by the following formula (1). Cmod is an indicator that indicates the percentage of charge generated by photoelectric conversion of incident infrared light that can be detected in the N+ semiconductor region 71 of the spectrometer T, which serves as an effective spectrometer. In other words, it indicates whether a signal corresponding to the charge can be extracted, and represents the charge separation efficiency. In formula (1), I0 is the signal detected by one of the two charge detection units (P+ semiconductor region 73), and I1 is the signal detected by the other of the two charge detection units.

[0134] Cmod={|I0-I1| / (I0+I1)}×100...(1)

[0135] Therefore, for example, when infrared light incident from the outside is incident on a region other than the effective beam splitter and undergoes photoelectric conversion in the non-effective beam splitter, electrons, which are signal carriers generated by the photoelectric conversion, are likely to move to the N+ semiconductor region 71 in the non-effective beam splitter. Then, the charges of some of the electrons obtained by the photoelectric conversion are not detected in the N+ semiconductor region 71 in the effective beam splitter, and Cmod, that is, the charge separation efficiency, decreases.

[0136] Therefore, in pixel 51, by converging infrared light near the center of pixel 51 at a substantially equal distance from both beam splitters T, the probability of externally incident infrared light being photoelectrically converted in the region outside the effective beam splitter can be reduced, thereby improving charge separation efficiency. Furthermore, modulation contrast can be improved in pixel 51. In other words, electrons obtained through photoelectric conversion can be easily guided to N+ semiconductor region 71 in the effective beam splitter.

[0137] <Exemplary Structure Provided with DTI for Pixel Separation>

[0138] exist Figure 2 In the structure of the pixel 51 shown, a separation structure can be provided between the pixels 51 to improve the separation characteristics between adjacent pixels and suppress crosstalk.

[0139] Figure 4 It is shown in Figure 2 The pixel 51 shown is a cross-sectional view of a structure in which a separation structure is provided between adjacent pixels.

[0140] exist Figure 4 In, with Figure 2 Corresponding parts are denoted by the same reference numerals, and descriptions of these parts are omitted.

[0141] Figure 4 Pixel 51 and Figure 2 The pixel 51 shown is different in that DTI (deep trench isolation) 65-1 and 65-2 are provided as pixel separation portions, and Figure 4 The other parts of the pixel 51 are Figure 2 The DTIs 65-1 and 65-2 are formed in the substrate 61 at the boundary portion with the adjacent pixels 51 from the back side of the substrate 61 at a predetermined depth. Hereinafter, when there is no need to particularly distinguish between the DTIs 65-1 and 65-2, the DTIs 65-1 and 65-2 are simply referred to as DTIs 65. The DTIs 65 can include, for example, an oxide film. In addition, for example, the DTIs 65 can have a structure in which the periphery of a metal film such as tungsten (W), aluminum (Al), copper (Cu), or titanium (Ti) is covered (surrounded) by an insulating film such as silicon oxide (SiO2) or silicon oxynitride (SiON).

[0142] By forming the embedded DTI 65 in this manner, the separation characteristics of infrared light between pixels can be improved, and the occurrence of crosstalk can be suppressed.

[0143] <3. Example of Cross-Sectional Structure of Multiple Pixels>

[0144] exist Figure 2 and Figure 4 In the cross-sectional structure of the pixel 51 shown, the multilayer wiring layer formed on the front side of the substrate 61 opposite to the light incident surface is omitted.

[0145] therefore, Figure 5 and Figure 6 A cross-sectional view of a plurality of adjacent pixels is shown without omitting the multi-layer wiring layer.

[0146] Figure 5 It is along Figure 3 A cross-sectional view taken along line BB', Figure 6 It is along Figure 3 A cross-sectional view taken along line AA'.

[0147] Notice, Figure 5 and Figure 6 It is arranged with Figure 4 A cross-sectional view of multiple pixels 51 of the DTI 65 is shown. Figure 5 and Figure 6 In the same way, Figure 3 and Figure 4 Corresponding parts are denoted by the same reference numerals, and descriptions of these parts are omitted.

[0148] A multilayer wiring layer 111 is formed on the side of the substrate 61 on which the on-chip lens 62 is formed for each pixel, which is opposite to the light incident surface. In other words, the substrate 61 as a semiconductor layer is provided between the on-chip lens 62 and the multilayer wiring layer 111. The multilayer wiring layer 111 includes five metal films M1 to M5 and an interlayer insulating film 112 formed between the metal films. Note that in Figure 5 In FIG. 1 , among the five metal films M1 to M5 of the multilayer wiring layer 111, the outermost metal film M5 is not shown because it is located in an invisible place. However, in FIG. Figure 6 The metal film M5 is shown in FIG. Figure 6 It is from Figure 5 Cross-sectional views are cross-sectional views seen from different directions.

[0149] like Figure 6 As shown, a pixel transistor Tr is formed in a pixel boundary region at the interface portion between the multilayer wiring layer 111 and the substrate 61. The pixel transistor Tr is any one of the transfer transistor 121, the reset transistor 123, the amplifying transistor 124, or the selection transistor 125, which will be referred to later. Figure 12 and Figure 13 Describe these transistors.

[0150] Of the five metal films M1 to M5 of the multilayer wiring layer 111, the metal film M1 closest to the substrate 61 includes a power supply line 113 for supplying a power supply voltage, a voltage applying wiring 114 for applying a predetermined voltage to the P+ semiconductor region 73-1 or 73-2, and a reflective member 115 as a member that reflects incident light. Figure 6 In the metal film M1, wiring other than the power supply line 113 and the voltage application wiring 114 is a reflective member 115. However, for the sake of simplicity in the drawing, some reference numerals are omitted. Reflective member 115 is provided to reflect incident light. Reflective member 115 is provided below N+ semiconductor regions 71-1 and 71-2 and overlaps with N+ semiconductor regions 71-1 and 71-2, which serve as charge detection units, in plan view. Note that a light shielding member may be provided in place of reflective member 115.

[0151] In the second metal film M2 from the substrate 61 side, for example, a voltage applying wiring 116 connected to the voltage applying wiring 114 of the metal film M1, a voltage applying wiring 116 for transmitting voltage to be applied later in the metal film M2, and a voltage applying wiring 116 for transmitting voltage to be applied later in the metal film M2 are formed. Figure 12 and Figure 13 The control lines 117 for the drive signal TRG, the drive signal RST, the selection signal SEL, and the drive signal FDG described in the foregoing, and the VSS wiring having a predetermined VSS potential such as GND are formed in the metal film M2. Figure 12 and Figure 13FD 122 and additional capacitor 127 are illustrated.

[0152] In the third metal film M3 from the substrate 61 side, for example, a vertical signal line VSL, a VSS wiring, and the like are formed.

[0153] In the fourth and fifth metal films M4 and M5 from the substrate 61 side, for example, voltage supply lines 118 and 119 for supplying a predetermined voltage MIX_A or MIX_B to the P+ semiconductor regions 73-1 and 73-2 as the voltage applying unit of the splitter T are formed.

[0154] Note that this will be referenced later. Figures 18 to 23 Details of the planar layout of the five metal films M1 to M5 of the multilayer wiring layer 111 will be described.

[0155] <4. Examples of Other Planar Shapes of the Beam Splitter T>

[0156] Will refer to Figures 7 to 11 Other planar shapes of the beam splitter T will be described.

[0157] Note that in Figures 7 to 11 In, with Figure 3 Corresponding parts are denoted by the same reference numerals, and description thereof will be appropriately omitted.

[0158] (First Modification of the Optical Spectrometer TA)

[0159] Figure 7 1 is a plan view showing a first modification example of the first beam splitter TA and the second beam splitter TB in the pixel 51 .

[0160] exist Figure 3 In FIG, the planar shape of each of the first beam splitter TA and the second beam splitter TB is rectangular.

[0161] exist Figure 7 In the first modified example shown, the planar shape of each beam splitter T of the first beam splitter TA and the second beam splitter TB is circular. More specifically, a circular P+ semiconductor region 73 is formed at the center of each beam splitter T, and the P+ semiconductor region 73 is surrounded by a circular (ring-shaped) N+ semiconductor region 71.

[0162] (Second Modification of the Optical Spectrometer TA)

[0163] Figure 8 5 is a plan view showing a second modification of the first beam splitter TA and the second beam splitter TB in the pixel 51 .

[0164] exist Figure 3 In the embodiment, the N+ semiconductor region 71 of each optical splitter T is formed so as to surround the periphery of the P+ semiconductor region 73. Figure 8 In the second modification shown, the linear N+ semiconductor region 71 is formed to sandwich the linear P+ semiconductor region 73 in a direction perpendicular to the longitudinal direction. Therefore, the short side end faces of the linear P+ semiconductor region 73 are not surrounded by the N+ semiconductor region 71.

[0165] The lateral lengths of the linear N+ semiconductor region 71 and the P+ semiconductor region 73 can be any lengths, and the lengths of the regions are not necessarily the same.

[0166] (Third Modification of Optical Spectrometer TA)

[0167] Figure 9 5 is a plan view showing a third modification of the first beam splitter TA and the second beam splitter TB in the pixel 51 .

[0168] exist Figure 3 , each of the spectrometers T has a configuration in which a P+ semiconductor region 73 is surrounded by an N+ semiconductor region 71. In other words, in the spectrometer T, the P+ semiconductor region 73 is formed on the inside, and the N+ semiconductor region 71 is formed on the outside.

[0169] The arrangement of the N+ semiconductor region 71 and the P+ semiconductor region 73 may be reversed.

[0170] Figure 9 Each optical splitter T in the Figure 3 The arrangement of the N+ semiconductor region 71 and the P+ semiconductor region 73 of each optical splitter T is reversed.

[0171] Specifically, Figure 9 Each of the optical splitters T in FIG has a configuration in which a rectangular N+ semiconductor region 71 is surrounded by a P+ semiconductor region 73. In other words, the N+ semiconductor region 71 is formed, and the P+ semiconductor region 73 is formed outside the N+ semiconductor region 71.

[0172] (Fourth Modification of Optical Spectrometer TA)

[0173] Figure 10 5 is a plan view showing a fourth modification of the first beam splitter TA and the second beam splitter TB in the pixel 51 .

[0174] Figure 10 Each optical splitter T in the Figure 8 The arrangement of the N+ semiconductor region 71 and the P+ semiconductor region 73 of each optical splitter T is reversed.

[0175] Specifically, Figure 10 Each of the beam splitters T in FIG. 1 is formed so that the linear P+ semiconductor region 73 sandwiches the linear N+ semiconductor region 71 in a direction perpendicular to the longitudinal direction.

[0176] The lateral lengths of the linear N+ semiconductor region 71 and the P+ semiconductor region 73 can be any lengths, and the lengths of the regions are not necessarily the same.

[0177] (Fifth Modification of Optical Spectrometer TA)

[0178] Figure 11 5 is a plan view showing a fifth modification of the first beam splitter TA and the second beam splitter TB in the pixel 51 .

[0179] exist Figure 11 In FIG. 5 , six pixels 51 arranged in 2×3 are divided into pixels 51A to 51H.

[0180] The first spectrometer TA and the second spectrometer TB of each pixel 51 can have a structure in which the P+ semiconductor region 73 as a voltage applying unit is shared by adjacent pixels 51. Hereinafter, a structure in which the P+ semiconductor region 73 as a voltage applying unit is shared by two spectrometers T of different pixels 51 is also referred to as a shared spectrometer structure.

[0181] Figure 11 The fifth modification shown is one in which as Figure 8 The P+ semiconductor region 73 of the voltage applying unit of each spectrometer T in the embodiment is a shared spectrometer structure shared by two pixels 51 adjacent to each other in the vertical direction.

[0182] Specifically, the P+ semiconductor region 73-1 arranged at the pixel boundary between pixel 51A and pixel 51C serves as both the P+ semiconductor region 73 serving as a voltage application unit for the first spectrometer TA of pixel 51A and the P+ semiconductor region 73 serving as a voltage application unit for the first spectrometer TA of pixel 51C.

[0183] The P+ semiconductor region 73-1 arranged at the pixel boundary between the pixel 51B and the pixel 51D serves as both the P+ semiconductor region 73 serving as the voltage applying unit of the first spectrometer TA of the pixel 51B and the P+ semiconductor region 73 serving as the voltage applying unit of the first spectrometer TA of the pixel 51D.

[0184] The P+ semiconductor region 73-2 arranged at the pixel boundary between the pixel 51A and the pixel 51E serves as both the P+ semiconductor region 73 serving as the voltage applying unit for the second spectrometer TB of the pixel 51A and the P+ semiconductor region 73 serving as the voltage applying unit for the second spectrometer TB of the pixel 51E.

[0185] The P+ semiconductor region 73-2 arranged at the pixel boundary between the pixel 51B and the pixel 51F serves as both the P+ semiconductor region 73 serving as the voltage applying unit for the second spectrometer TB of the pixel 51B and the P+ semiconductor region 73 serving as the voltage applying unit for the second spectrometer TB of the pixel 51F.

[0186] Similarly, the P+ semiconductor region 73-2 arranged at the pixel boundary between pixel 51C and pixel 51G and the P+ semiconductor region 73-2 arranged at the pixel boundary between pixel 51D and pixel 51H also serve as the P+ semiconductor region 73 serving as a voltage application unit of the second spectrometer TB of two pixels 51 adjacent in the vertical direction.

[0187] As described above, in the shared spectrometer structure in which the P+ semiconductor region 73 as the voltage applying unit of each spectrometer T is shared between adjacent pixels, it is also possible to Figure 2 Describes the operation of an indirect ToF scheme to measure distance.

[0188] In such Figure 11 In the shared beam splitter structure shown, the distance between the paired P+ semiconductor regions used to generate an electric field (i.e., current), for example, the distance between the P+ semiconductor region 73-1 of the first beam splitter TA and the P+ semiconductor region 73-2 of the second beam splitter TB, is increased. In other words, by sharing the P+ semiconductor region 73 of the voltage application unit of each beam splitter T between adjacent pixels, the distance between the P+ semiconductor regions can be maximized. As a result, almost no current flows between the P+ semiconductor regions of the two beam splitters T, thereby reducing the power consumption of the pixel 51 and facilitating pixel miniaturization.

[0189] Note that although Figure 11 The shared optical splitter structure is based on Figure 8 The optical splitter structure, but for example, the shared optical splitter structure is based on Figure 10 In the case of the spectrometer structure, the N+ semiconductor region 71 is shared by adjacent pixels 51.

[0190] <5. Pixel Equivalent Circuit>

[0191] Figure 12 An equivalent circuit of the pixel 51 is shown.

[0192] The pixel 51 has a transfer transistor 121A, an FD 122A, a reset transistor 123A, an amplifying transistor 124A, and a selecting transistor 125A for the first optical splitter TA including the N+ semiconductor region 71-1, the P+ semiconductor region 73-1, and other parts.

[0193] In addition, the pixel 51 has a transfer transistor 121B, an FD 122B, a reset transistor 123B, an amplifying transistor 124B, and a selecting transistor 125B for the second spectrometer TB including the N+ semiconductor region 71-2, the P+ semiconductor region 73-2, and other parts.

[0194] The spectrometer driver 21 applies a predetermined voltage MIX_A (first voltage) to the P+ semiconductor region 73-1 and a predetermined voltage MIX_B (second voltage) to the P+ semiconductor region 73-2. In the above example, one of the voltages MIX_A and MIX_B is 1.5 V, and the other is 0 V. The P+ semiconductor regions 73-1 and 73-2 serve as voltage application units to which the first voltage or the second voltage is applied.

[0195] The N + semiconductor regions 71 - 1 and 71 - 2 are charge detection units for detecting charges generated by photoelectric conversion of light incident on the substrate 61 and accumulating the charges.

[0196] When the drive signal TRG supplied to the gate electrode is activated, the transfer transistor 121A is turned on in response thereto, thereby transferring the charge accumulated in the N+ semiconductor region 71-1 to the FD 122A. When the drive signal TRG supplied to the gate electrode is activated, the transfer transistor 121B is turned on in response thereto, thereby transferring the charge accumulated in the N+ semiconductor region 71-2 to the FD 122B.

[0197] The FD 122A temporarily holds the charge DET_A supplied from the N+ semiconductor region 71-1. The FD 122B temporarily holds the charge DET_B supplied from the N+ semiconductor region 71-2. The FD 122A corresponds to the reference Figure 2 The FD portion A and FD 122B described above correspond to the FD portion B.

[0198] When the drive signal RST supplied to the gate electrode is activated, the reset transistor 123A is turned on in response thereto, thereby resetting the potential of the FD 122A to a predetermined level (power supply voltage VDD). When the drive signal RST supplied to the gate electrode is activated, the reset transistor 123B is turned on in response thereto, thereby resetting the potential of the FD 122B to a predetermined level (power supply voltage VDD). Note that when the reset transistors 123A and 123B are activated, the transfer transistors 121A and 121B are also activated simultaneously.

[0199] The source of the amplifier transistor 124A is connected to the vertical signal line VSLA via the selection transistor 125A, thereby forming a source-follower circuit together with the load MOS transistor of the constant current source circuit unit 126A connected to one end of the vertical signal line VSLA. The source of the amplifier transistor 124B is connected to the vertical signal line VSLB via the selection transistor 125B, thereby forming a source-follower circuit together with the load MOS transistor of the constant current source circuit unit 126B connected to one end of the vertical signal line VSLB.

[0200] The selection transistor 125A is connected between the source of the amplifier transistor 124A and the vertical signal line VSLA. When the selection signal SEL supplied to the gate electrode is activated, the selection transistor 125A turns on in response thereto and outputs the detection signal output from the amplifier transistor 124A to the vertical signal line VSLA.

[0201] The selection transistor 125B is connected between the source of the amplifier transistor 124B and the vertical signal line VSLB. When the selection signal SEL supplied to the gate electrode is activated, the selection transistor 125B turns on in response thereto and outputs the detection signal output from the amplifier transistor 124B to the vertical signal line VSLB.

[0202] The transfer transistors 121A and 121B, the reset transistors 123A and 123B, the amplification transistors 124A and 124B, and the selection transistors 125A and 125B of the pixel 51 are controlled by, for example, the vertical drive unit 22 .

[0203] <Another Equivalent Circuit Configuration Example of Pixel>

[0204] Figure 13 Another equivalent circuit of the pixel 51 is shown.

[0205] exist Figure 13 In, with Figure 12 Corresponding parts are denoted by the same reference numerals, and description thereof will be appropriately omitted.

[0206] exist Figure 13 In the equivalent circuit of Figure 12 An additional capacitor 127 and a switching transistor 128 for controlling the connection of the additional capacitor 127 are added to both the first optical splitter TA and the second optical splitter TB in the equivalent circuit.

[0207] Specifically, the additional capacitor 127A is connected between the transfer transistor 121A and the FD 122A via the switching transistor 128A, and the additional capacitor 127B is connected between the transfer transistor 121B and the FD 122B via the switching transistor 128B.

[0208] When the drive signal FDG supplied to the gate electrode is activated, the switching transistor 128A is turned on in response thereto, thereby connecting the additional capacitor 127A to the FD 122A. When the drive signal FDG supplied to the gate electrode is activated, the switching transistor 128B is turned on in response thereto, thereby connecting the additional capacitor 127B to the FD 122B.

[0209] For example, under high illuminance with a large amount of incident light, the vertical drive unit 22 activates the switching transistors 128A and 128B to connect the FD 122A and the additional capacitor 127A and also connects the FD 122B and the additional capacitor 127B. As a result, under high illuminance, a larger amount of charge can be accumulated.

[0210] On the other hand, under low illumination with a small amount of incident light, the vertical drive unit 22 renders the switching transistors 128A and 128B in an inactive state and disconnects the additional capacitors 127A and 127B from the FDs 122A and 122B, respectively.

[0211] Although it is possible Figure 12 Although the additional capacitor 127 is omitted as in the equivalent circuit of , a high dynamic range can be ensured by providing the additional capacitor 127 and selectively using the additional capacitor 127 according to the amount of incident light.

[0212] <6. Wiring Example of Vertical Signal Line VSL>

[0213] In the light receiving device 1, as shown in FIG. Figure 1 As described, four vertical signal lines VSL are arranged for each pixel column of the pixels 51 arranged in a matrix in the pixel array unit 20 .

[0214] Figures 14 to 17 A wiring example of the light receiving device 1 in the case where four vertical signal lines VSL are arranged for one pixel column is shown.

[0215] (First Wiring Example of Vertical Signal Line VSL)

[0216] Figure 14 A first wiring example of the vertical signal line VSL is shown.

[0217] because Figure 14 The pixel circuit of each pixel 51 shown is Figure 12 The circuits shown are the same, so the reference numerals are omitted as appropriate. Figure 11 The shared optical splitter structure shown as Figure 14 The structure of the spectrometer T of the pixel 51 in FIG.

[0218] Note that although Figure 14Only one pixel column is shown, but the same applies to other pixel columns. Figure 14 In the CMOS image sensor, four pixels 51 arranged in one pixel column are distinguished as pixels 51A to 51D, and four vertical signal lines VSL arranged in one pixel column are distinguished as vertical signal lines VSL0 to VSL3.

[0219] exist Figure 14 In the first wiring example, two pixels 51 adjacent to each other in the vertical direction form a pair, the first spectrometers TA of the two pixels 51 in the pair are connected to the same vertical signal line VSL, and the second spectrometers TB of the two pixels 51 in the pair are connected to the same vertical signal line VSL.

[0220] Specifically, the first beam splitter TA of the paired pixel 51A and pixel 51B is connected to the vertical signal line VSL0, and the second beam splitter TB of the paired pixel 51A and pixel 51B is connected to the vertical signal line VSL2. The first beam splitter TA of the paired pixel 51C and pixel 51D is connected to the vertical signal line VSL1, and the second beam splitter TB of the paired pixel 51C and pixel 51D is connected to the vertical signal line VSL3.

[0221] As a result, the vertical signal line VSL0 outputs the detection signal of the first beam splitter TA of the pair of pixels 51A and 51B to the column processing unit 23, and the vertical signal line VSL1 outputs the detection signal of the first beam splitter TA of the pair of pixels 51C and 51D to the column processing unit 23. The vertical signal line VSL2 outputs the detection signal of the second beam splitter TB of the pair of pixels 51A and 51B to the column processing unit 23, and the vertical signal line VSL3 outputs the detection signal of the second beam splitter TB of the pair of pixels 51C and 51D to the column processing unit 23. Therefore, the four vertical signal lines VSL0 to VSL3 are arranged so that the two vertical signal lines (vertical signal lines VSL0, VSL1) that transmit the detection signal of the first beam splitter TA are adjacent to each other, and the two vertical signal lines (vertical signal lines VSL2, VSL3) that transmit the detection signal of the second beam splitter TB are adjacent to each other (TA, TA, TB, TB).

[0222] By arranging four vertical signal lines VSL0 to VSL3 for each pixel column, the light receiving device 1 can output detection signals to the outside of the pixel array unit 20 (column processing unit 23) in units of two odd or even rows in the first drive mode in which the detection signal of each pixel 51 is outputted in units of one pixel. Therefore, the reading speed can be increased.

[0223] On the other hand, in the second driving mode in which the detection signals of the two beam splitters T are added and output, the light receiving device 1 can add the detection signals of the first beam splitter TA or the second beam splitter TB of the two pixels in a pair and output the detection signals to the outside of the pixel array unit 20 in units of four rows. In order to improve the resolution, even when the number of pixels increases and the signal amount of each pixel is small, a sufficient S / N ratio can be ensured by adding the detection signals of the two pixels.

[0224] (Second Wiring Example of Vertical Signal Line VSL)

[0225] Figure 15 A second wiring example of the vertical signal line VSL is shown.

[0226] exist Figure 15 In the Figure 14 The description will be made of the points that are the same as those of the illustrated first wiring example, and the points that are different from the first wiring example will be described.

[0227] Figure 15 The second wiring example is common to the first wiring example in that the first beam splitters TA of the paired two pixels 51 are connected to the same vertical signal line VSL, and the second beam splitters TB of the paired two pixels 51 are connected to the same vertical signal line VSL.

[0228] Note, however, that although the point where the first spectrometer TA is connected to the vertical signal line VSL0 in the paired two pixels 51A and 51B is Figure 14 The first wiring example shown is the same, but the second optical splitter TB is connected to the vertical signal line VSL1 instead of the vertical signal line VSL2.

[0229] For the paired two pixels 51C and 51D, although the points where the paired two second optical splitters TB are connected to the vertical signal line VSL3 are the same as in the first wiring example, the first optical splitter TA is connected to the vertical signal line VSL2 instead of the vertical signal line VSL1.

[0230] As a result, in the second wiring example, vertical signal line VSL0 outputs a detection signal of the first beam splitter TA of the paired pixel 51A and pixel 51B, and vertical signal line VSL1 outputs a detection signal of the second beam splitter TB of the paired pixel 51A and pixel 51B to the column processing unit 23. Vertical signal line VSL2 outputs a detection signal of the first beam splitter TA of the paired pixel 51C and pixel 51D, and vertical signal line VSL3 outputs a detection signal of the second beam splitter TB of the paired pixel 51C and pixel 51D. Thus, the four vertical signal lines VSL0 to VSL3 are arranged so that the vertical signal lines VSL for transmitting the detection signal of the first beam splitter TA and the vertical signal lines VSL for transmitting the detection signal of the second beam splitter TB are alternately arranged (TA, TB, TA, TB).

[0231] The first and second drive modes in the second wiring example are similar to those in the first wiring example. Therefore, in the first drive mode, the reading speed can be increased. In the second drive mode, even when the signal amount per pixel is small, a sufficient S / N ratio can be ensured by adding the detection signals of two pixels.

[0232] exist Figure 14 The first wiring example and Figure 15 In the second wiring example, in the second drive mode, which adds and outputs the detection signals from the two beam splitters T, the two beam splitters T for adding the detection signals are enclosed within the two pixels forming a pair. As a result, operational deviation between the first beam splitter TA or the second beam splitter TB between two vertically adjacent pixels in a pair can be reduced, and distortion during high-speed operation can be reduced.

[0233] In addition, Figure 15 In the second wiring example, since the vertical signal lines VSL for transmitting the detection signal of the first spectrometer TA and the vertical signal lines VSL for transmitting the detection signal of the second spectrometer TB are arranged alternately (TA, TB, TA, TB), the coupling capacitance between adjacent vertical signal lines VSL can be made uniform and noise can be reduced.

[0234] (Third Wiring Example of Vertical Signal Line VSL)

[0235] Figure 16 A third wiring example of the vertical signal line VSL is shown.

[0236] exist Figure 16 In the Figure 14 The description will be made of the points that are the same as those of the illustrated first wiring example, and the points that are different from the first wiring example will be described.

[0237] exist Figure 16In the third wiring example, in the second driving mode of adding and outputting two detection signals, in both the first spectrometer TA and the second spectrometer TB, the two spectrometers T for adding the detection signals share the P+ semiconductor region 73 as the voltage applying unit.

[0238] For example, since the two second spectrometers TB arranged at the pixel boundary between pixel 51A and pixel 51B are both connected to the vertical signal line VSL2, the two second spectrometers TB are two spectrometers T used to add and output the detection signals in the second driving mode, and share the P+ semiconductor region 73 arranged at the pixel boundary between pixel 51A and pixel 51B.

[0239] Since the two first spectrometers TA arranged at the pixel boundary between pixel 51B and pixel 51C are both connected to the vertical signal line VSL1, the two first spectrometers TA are two spectrometers T used to add and output the detection signals in the second driving mode, and share the P+ semiconductor region 73 arranged at the pixel boundary between pixel 51B and pixel 51C.

[0240] Since the two second spectrometers TB arranged at the pixel boundary between pixel 51C and pixel 51D are both connected to the vertical signal line VSL3, the two second spectrometers TB are two spectrometers T used to add and output the detection signals in the second driving mode, and share the P+ semiconductor region 73 arranged at the pixel boundary between pixel 51C and pixel 51D.

[0241] On the other hand, Figure 14 In the first wiring example shown, in the second driving mode, as in the case of the third wiring example, the second spectrometer TB shares the P+ semiconductor region 73 as a voltage applying unit, but the two spectrometers T used to add the detection signals of the first spectrometer TA do not share the P+ semiconductor region 73 as a voltage applying unit.

[0242] For example, in Figure 14 In the paired pixel 51A and pixel 51B, regarding the second beam splitter TB, the second beam splitter TB of the pixel 51A and the second beam splitter TB of the pixel 51B for adding the detection signals share a P+ semiconductor region 73 arranged at the pixel boundary between the pixel 51A and the pixel 51B, but regarding the first beam splitter TA, the first beam splitter TA of the pixel 51A and the first beam splitter TA of the pixel 51B for adding the detection signals do not share the P+ semiconductor region 73. In other words, the P+ semiconductor region 73 of the first beam splitter TA of the pixel 51A and the P+ semiconductor region 73 of the first beam splitter TA of the pixel 51B are different P+ semiconductor regions 73.

[0243] In addition, Figure 16 In the third wiring example, two first beam splitters TA having a shared beam splitter structure arranged at the pixel boundary between pixel 51A and pixel 51 (not shown) above pixel 51A are both connected to the vertical signal line VSL0. Two second beam splitters TB having a shared beam splitter structure arranged at the pixel boundary between pixel 51A and pixel 51B are both connected to the vertical signal line VSL2. Two first beam splitters TA having a shared beam splitter structure arranged at the pixel boundary between pixel 51B and pixel 51C are both connected to the vertical signal line VSL1. Two second beam splitters TB having a shared beam splitter structure arranged at the pixel boundary between pixel 51C and pixel 51D are both connected to the vertical signal line VSL3. As a result, the four vertical signal lines VSL0 to VSL3 are arranged so that the two vertical signal lines (vertical signal lines VSL0, VSL1) for transmitting the detection signal of the first spectrometer TA are adjacent to each other, and the two vertical signal lines (vertical signal lines VSL2, VSL3) for transmitting the detection signal of the second spectrometer TB are adjacent to each other (TA, TA, TB, TB).

[0244] In the first driving mode, the light receiving device 1 outputs the detection signal of each pixel 51 in units of one pixel to the outside of the pixel array unit 20 (column processing unit 23) in units of two odd or even rows.

[0245] On the other hand, in the second driving mode in which the detection signals of the two beam splitters T are added and output, the light receiving device 1 adds the detection signals of the two first beam splitters TA or the two second beam splitters TB corresponding to two pixels, and outputs the detection signals in units corresponding to four rows to the outside of the pixel array unit 20. Even when the signal amount per pixel is small, a sufficient S / N ratio can be ensured.

[0246] According to the third wiring example, in the second driving mode, since the P+ semiconductor region 73 serving as the voltage applying unit for the two spectrometers T for adding and outputting the detection signals is common, changes in the applied voltage applied to the two spectrometers T for adding and outputting the detection signals can be suppressed.

[0247] (Fourth Wiring Example of Vertical Signal Line VSL)

[0248] Figure 17 A fourth wiring example of the vertical signal line VSL is shown.

[0249] exist Figure 17 In the description, descriptions of points that are the same as those of the first to third wiring examples described above will be appropriately omitted, and points that are different from the first to third wiring examples will be described.

[0250] Figure 17 The fourth wiring example is a configuration in which Figure 15 In the second wiring example shown, in the second driving mode in which two detection signals are added and output, the two spectrometers T for adding the detection signals share the P+ semiconductor region 73 as the voltage applying unit.

[0251] in other words, Figure 17 The fourth wiring example in Figure 16 The third wiring example in the common point is that in the second driving mode of adding and outputting two detection signals, in both the first spectrometer TA and the second spectrometer TB, the two spectrometers T for adding the detection signals share the P+ semiconductor region 73 as a voltage applying unit.

[0252] On the other hand, Figure 16 In the third wiring example of FIG. 5 , two second beam splitters TB arranged at the pixel boundary between the pixel 51A and the pixel 51B are connected to the vertical signal line VSL2, but in FIG. Figure 17 In the fourth wiring example, two second beam splitters TB are connected to the vertical signal line VSL1. In addition, in the third wiring example, two first beam splitters TA arranged at the pixel boundary between the pixel 51B and the pixel 51C are connected to the vertical signal line VSL1, but in Figure 17 In the fourth wiring example, two first optical splitters TA are connected to the vertical signal line VSL2. As a result, Figure 15 As in the case of the second wiring example shown, the four vertical signal lines VSL0 to VSL3 are arranged so that the vertical signal line VSL for transmitting the detection signal of the first optical splitter TA and the vertical signal line VSL for transmitting the detection signal of the second optical splitter TB are alternately arranged (TA, TB, TA, TB).

[0253] In the first driving mode, the light receiving device 1 outputs the detection signal of each pixel 51 in units of one pixel to the outside of the pixel array unit 20 (column processing unit 23) in units of two odd or even rows.

[0254] On the other hand, in the second driving mode in which the detection signals of the two beam splitters T are added and output, the light receiving device 1 adds the detection signals of the two first beam splitters TA or the two second beam splitters TB corresponding to two pixels, and outputs the detection signals in units corresponding to four rows to the outside of the pixel array unit 20. Even when the signal amount per pixel is small, a sufficient S / N ratio can be ensured.

[0255] According to the fourth wiring example, in the second driving mode, since the P+ semiconductor region 73 serving as the voltage applying unit for the two spectrometers T for adding and outputting the detection signals is common, changes in the applied voltage applied to the two spectrometers T for adding and outputting the detection signals can be suppressed.

[0256] According to the first to fourth wiring examples in which four vertical signal lines VSL are arranged for one pixel column, it is possible to selectively use a drive mode that improves resolution by outputting signals in pixel units (the first drive mode) and a drive mode that improves the signal S / N ratio rather than improving resolution (the second drive mode), depending on the application, etc. In other words, it is possible to achieve an increase in the number of pixels while also suppressing a decrease in ranging accuracy due to the increase in the number of pixels.

[0257] <7.5 Planar Layout Example of Metal Films M1 to M5>

[0258] Next, we will refer to Figures 18 to 23 The detailed structure of the multilayer wiring layer 111 formed on the side opposite to the light incident surface side of the substrate 61 will be described.

[0259] Note that although Figures 18 to 23 The construction shown corresponds to Figure 5 and Figure 6 , but it will be described as a different configuration with a different reference numeral.

[0260] Figure 18 It is a plan view of a gate formation surface which serves as an interface between the substrate 61 and the multilayer wiring layer 111 and on which a gate electrode and a contact of the pixel transistor Tr are formed.

[0261] Figure 18 The plan view on the left side of is a plan view of a region including a plurality of pixels arranged in the vertical direction of the pixel array unit 20 , and the region of one predetermined pixel 51 is indicated by a dotted line. Figure 18 The plan view on the right side of FIG. 1 is an enlarged view of the area near the pixel 51 indicated by the dotted line in the plan view on the left side. In the enlarged view, the areas of the first beam splitter TA and the second beam splitter TB are indicated by the dotted lines.

[0262] The gate forming surface of the substrate 61 includes an active region 181 in which the gate electrode of the pixel transistor Tr, a contact portion with the P+ semiconductor region 73 as a voltage applying unit, and a contact portion with the N+ semiconductor region 71 as a charge detecting unit are formed; and an oxide film region 182, which is the remaining portion of the gate forming surface. The oxide film region 182 corresponds to, for example, Figure 2 The oxide film 64 and the separation portion 75 in the Figures 19 to 23In order to better understand the positional relationship, the active region 181 is superimposed as a lower layer and the reference numerals are omitted.

[0263] In the area of ​​a pixel 51, a first spectrometer TA including an N+ semiconductor region 71-1, a P+ semiconductor region 73-1 and other parts, and a second spectrometer TB including an N+ semiconductor region 71-2, a P+ semiconductor region 73-2 and other parts are arranged at the pixel boundary and are symmetrical with respect to the pixel center line (not shown) in the vertical direction of the pixel 51.

[0264] The transfer transistor 121A, reset transistor 123A, amplifying transistor 124A, selecting transistor 125A and switching transistor 128A serving as the pixel transistor Tr for controlling the first spectrometer TA, and the transfer transistor 121B, reset transistor 123B, amplifying transistor 124B, selecting transistor 125B and switching transistor 128B serving as the pixel transistor Tr for controlling the second spectrometer TB are arranged symmetrically relative to the pixel middle line in the vertical direction of the pixel 51.

[0265] By arranging the plurality of pixel transistors Tr for controlling the first beam splitter TA or the second beam splitter TB in two columns in the active region 181, each pixel transistor Tr can be arranged with a margin. In particular, since the gate electrode of the amplifier transistor 124 can be formed to a maximum size, the noise characteristics of the amplifier transistor 124 can be suppressed.

[0266] Figure 19 An example of a planar arrangement of the metal film M1 as the first layer closest to the substrate 61 among the five metal films M1 to M5 of the multilayer wiring layer 111 is shown.

[0267] Figure 19 The relationship between the left and right planes is Figure 18 The relationship in is the same.

[0268] In the metal film M1 as the first layer of the multilayer wiring layer 111, a reflective member 115 ( Figure 5 ) metal films 201A and 201B. Although the boundary between the metal films 201A and 201B is not shown, the metal films 201A and 201B are formed symmetrically with respect to the vertical direction of the pixel 51 in the region of the pixel 51. Figure 19 As shown, the areas of metal films 201A and 201B are formed to be the largest in the area of ​​pixel 51. By allowing infrared light to pass through substrate 61 and be incident on multilayer wiring layer 111 to be reflected back to substrate 61, the amount of infrared light photoelectrically converted in substrate 61 can be increased, thereby improving sensitivity.

[0269] Note that the potential of the metal films 201A and 201B is a predetermined VSS potential, and is, for example, GND in this embodiment.

[0270] The metal film 202A is a gate electrode connecting the amplifying transistor 124A and the FD 122A ( Figure 20 The metal film 202B is a wiring that connects the gate electrode of the amplifier transistor 124B and the FD 122B ( Figure 20 The metal film 202A and the metal film 202B are also arranged symmetrically with respect to the pixel middle line in the vertical direction of the pixel 51.

[0271] The metal films 203A and 203B are interconnected to the select transistors 125A and 125B. The metal film 204A is interconnected to the N+ semiconductor region 71-1, which is the charge detection unit of the first spectrometer TA of the pixel 51. The metal film 204B is interconnected to the N+ semiconductor region 71-2, which is the charge detection unit of the second spectrometer TB of the pixel 51.

[0272] The metal films 205A and 205B are interconnections connected to the transfer transistors 121A and 121B. The metal films 206A and 206B are interconnections connected to the reset transistors 123A and 123B.

[0273] The metal films 203A to 206A associated with the first beam splitter TA and the metal films 203B to 206B associated with the second beam splitter TB are arranged symmetrically with respect to a pixel middle line in the vertical direction of the pixel 51. The power supply voltage VDD is supplied to a contact 207 located in the pixel middle portion in the vertical direction of the pixel 51.

[0274] The metal film 201A as a shielding wiring is arranged between the gate electrode of the amplifying transistor 124A and the FD 122A ( Figure 20 ) between the metal film 202A and the contact 207 supplied with the power supply voltage VDD. As a result, the amount of influence of the potential of the FD 122A on the potential fluctuation of the power supply voltage VDD is reduced, and noise is suppressed.

[0275] A metal film 201A as a shielding wiring is similarly arranged between the gate electrode of the amplifying transistor 124A and the FD 122A ( Figure 20 ) between the metal film 202A and the metal film 203A which is a wiring connected to the selection transistor 125A. As a result, the amount of influence of the potential of the FD 122A on the potential fluctuation of the selection transistor 125A is reduced, and noise is suppressed.

[0276] A metal film 201A as a shielding wiring is similarly arranged between the gate electrode of the amplifying transistor 124A and the FD 122A ( Figure 20 ) between the metal film 202A of the first optical splitter TA and the metal film 204A serving as a wiring connected to the N+ semiconductor region 71-1 (which is the charge detection unit of the first optical splitter TA). As a result, the amount of influence of the potential of the FD 122A on the potential fluctuation of the charge detection unit of the first optical splitter TA is reduced, and noise is suppressed.

[0277] The same applies to the metal films 201B to 206B associated with the second beam splitter TB, which are arranged symmetrically with respect to the pixel midline in the vertical direction of the pixel 51 .

[0278] Because the pixel transistors Tr that drive the first beam splitter TA and the pixel transistors Tr that drive the second beam splitter TB in the pixel are symmetrically arranged with respect to the vertical direction, the wiring load between the first beam splitter TA and the second beam splitter TB is evenly adjusted. As a result, the driving variation of the first beam splitter TA and the second beam splitter TB is reduced.

[0279] Figure 20 A planar arrangement example of the metal film M2 as the second layer among the five metal films M1 to M5 of the multilayer wiring layer 111 is shown.

[0280] Figure 20 The relationship between the left and right planes is Figure 18 The relationship in is the same.

[0281] In the metal film M2 serving as the second layer of the multilayer wiring layer 111, the FD 122A of the pixel 51 includes a comb-shaped metal film 211A. The GND (VSS potential) metal film 212A is formed in a comb shape and inserted into the comb-shaped gaps of the metal film 211A serving as the FD 122A. By forming the metal film 211A serving as the FD 122A and the GND (VSS potential) metal film 212A in a comb shape and ensuring a large relative area, the storage capacity of the FD 122A can be increased and the dynamic range can be extended. In addition, the GND metal film 212A is arranged to surround the metal film 211A serving as the FD 122A, and the GND metal film 212A reduces the amount of influence that other potential changes have on the potential of the FD 122A, thereby suppressing noise.

[0282] In the metal film M2, the FD 122B of the pixel 51 is formed at a position symmetrical to the FD 122A with respect to the pixel center line in the vertical direction of the pixel 51. The FD 122B similarly includes a comb-shaped metal film 211B, and the comb-shaped GND (VSS potential) metal film 212B is formed so as to face the comb-shaped metal film 211B. The GND (VSS potential) metal film 212B is arranged to surround the metal film 211B serving as the FD 122B to suppress noise.

[0283] In the metal film M2, the FDs 122A and 122B are arranged so as not to Figure 18 and Figure 19 As a result, the potential fluctuation received from the metal film (wiring) connected to the pixel transistor Tr is reduced, and noise is suppressed. Note that the FDs 122A and 122B can be connected to the pixel transistor Tr. Figure 18 and Figure 19 The pixel transistor Tr partially overlaps with the formation region thereof.

[0284] The metal film 211A as the FD 122A is connected to the metal film M1 through two or more through-holes. The metal film 211B as the FD 122B is also connected to the metal film M1 through two or more through-holes. As a result, the influence of resistance variation due to process variation is reduced and noise is suppressed.

[0285] The metal film 213 disposed at the middle position in the vertical direction of the pixel 51 is a wiring for supplying the power supply voltage VDD. The metal films 214A and 214B disposed above and below the metal film 213 are wiring for transmitting the drive signal TRG supplied to the transfer transistors 121A and 121B. The metal films 215A and 215B disposed outside the metal films 214A and 214B are wiring for transmitting the drive signal RST supplied to the reset transistors 123A and 123B. The metal films 216A and 216B disposed outside the metal films 215A and 215B are wiring for transmitting the selection signal SEL supplied to the selection transistors 125A and 125B.

[0286] By arranging wirings transmitting control signals for controlling a plurality of pixel transistors Tr of the first or second spectrometer TA or TB symmetrically with respect to a pixel middle line in the vertical direction of the pixel 51 , driving variations of the first and second spectrometers TA and TB are reduced.

[0287] Figure 21 A planar arrangement example of the metal film M3 as the third layer among the five metal films M1 to M5 of the multilayer wiring layer 111 is shown.

[0288] Figure 21The relationship between the left and right planes is Figure 18 The relationship in is the same.

[0289] Vertical signal lines VSL0 to VSL3 are arranged in the metal film M3, which serves as the third layer. One of the wirings 221 to 225 is arranged on each side of each vertical signal line VSL0 to VSL3, and each of the wirings 221 to 225 is connected to GND (VSS potential). By providing any one of the wirings 221 to 225 connected to GND between the vertical signal lines VSL0 to VSL3, potential fluctuations from adjacent vertical signal lines VSL are reduced, and noise is suppressed. Note that if the potentials of two adjacent vertical signal lines VSL0 to VSL3 are the same, the GND wiring (any one of the wirings 221 to 225) between the two adjacent vertical signal lines VSL can be omitted.

[0290] The region where the vertical signal lines VSL0 to VSL3 are arranged is a region whose position in the planar direction does not overlap with the FDs 122A and 122B of the metal film M2 in the pixel 51. As a result, potential fluctuations received by the FDs 122A and 122B from the vertical signal lines VSL0 to VSL3 are reduced, and noise is suppressed.

[0291] In the region of the metal film M3 corresponding to the position of the metal films 211A and 211B of the FDs 122A and 122B of the metal film M2, a wiring 231 connected to GND (VSS potential) is arranged. As a result, the metal films 211A and 211B of the FDs 122A and 122B of the metal film M2 and the GND wiring of the metal film M3 are also made to face each other in the stacking direction, thereby increasing the capacitance of the FDs 122, reducing potential fluctuations, and suppressing noise.

[0292] Figure 22 A planar arrangement example of the metal film M4 as the fourth layer among the five metal films M1 to M5 of the multilayer wiring layer 111 is shown.

[0293] Figure 22 The relationship between the left and right planes is Figure 18 The relationship in is the same.

[0294] In the fourth metal film M4 of the multilayer wiring layer 111, voltage supply lines 241-1 and 241-2 for applying a predetermined voltage MIX_A or MIX_B to the P+ semiconductor regions 73-1 and 73-2 (which are voltage applying units of the spectrometer T of the pixel 51) are formed. Figure 22In the example of FIG, the voltage supply line 241-1 is connected to the first spectrometer TA of the pixel 51 indicated by the dotted line via a through hole, and the voltage supply line 241-2 is connected to the second spectrometer TB of the pixel 51 indicated by the dotted line via a through hole. Figure 22 Of the voltage supply lines 241-1 and 241-2, the area indicated by the hatched grid pattern indicates the area connected to Figure 23 The through-hole area of ​​the metal film M5 is shown.

[0295] The wiring area extending in the vertical direction of the voltage supply lines 241-1 and 241-2 of the metal film M4 is an area that does not overlap with the area of ​​the vertical signal lines VSL0 to VSL3 of the metal film M3 in the planar direction. As a result, the influence of the voltage MIX_A or MIX_B of the voltage supply lines 241-1 and 241-2 on the potential of the vertical signal lines VSL0 to VSL3 is reduced, and noise is suppressed.

[0296] Figure 23 A planar arrangement example of the metal film M5 as the fifth layer among the five metal films M1 to M5 of the multilayer wiring layer 111 is shown.

[0297] Figure 23 The relationship between the left and right planes is Figure 18 The relationship in is the same.

[0298] In the fifth metal film M5 of the multilayer wiring layer 111, voltage supply lines 251-1 and 251-2 for applying a predetermined voltage MIX_A or MIX_B to the P+ semiconductor regions 73-1 and 73-2 (which are voltage applying units of the spectrometer T of the pixel 51) are formed. Figure 23 In the example of , as in the case of the voltage supply line 241 - 1 of the metal film M4 , the voltage supply line 251 - 1 is a wiring connected to the first optical splitter TA, and the voltage supply line 251 - 2 is a wiring connected to the second optical splitter TB.

[0299] Note, however, that the voltage supply line 251-1 of the metal film M5 is not directly connected to the first optical splitter TA, but a predetermined voltage MIX_A is applied to the first optical splitter TA through the voltage supply line 241-1 of the metal film M4. Figure 23 In the voltage supply line 251 - 1 of the metal film M5 , a region indicated by a hatched grid pattern indicates a via region in which the voltage supply line 241 - 1 and the voltage supply line 251 - 1 are connected in the stacking direction.

[0300] Similarly, the voltage supply line 251-2 of the metal film M5 is not directly connected to the second beam splitter TB, but a predetermined voltage MIX_B is applied to the second beam splitter TB through the voltage supply line 241-2 of the metal film M4. Figure 23In the voltage supply line 251 - 2 of the metal film M5 , a region indicated by a hatched grid pattern indicates a via region in which the voltage supply line 241 - 2 and the voltage supply line 251 - 2 are connected in the stacking direction.

[0301] refer to Figure 22 Metal film M4 and Figure 23 As can be seen from the metal film M5, the positions of the via regions between the voltage supply lines 241-1 and 251-1 and the via regions between the voltage supply lines 241-2 and 251-2 are offset in the vertical direction. As a result, the via regions between the voltage supply lines 241-1 and 251-1 and the via regions between the voltage supply lines 241-2 and 251-2 can be separated as much as possible in the planar direction, thereby facilitating via formation and stabilizing the manufacturing process.

[0302] Since two layers of the voltage supply line 241 of the fourth metal film M4 and the voltage supply line 251 of the fifth metal film M5 are arranged in the vertical direction of the pixel array unit 20, and the predetermined voltage MIX_A or MIX_B applied to the splitter T of the pixel 51 in the vertical direction is transmitted in the two layers, the wiring resistance in the vertical direction is reduced and the propagation delay is reduced, thereby reducing the in-plane characteristic variation of the pixel array unit 20.

[0303] <8. Example of DTI Construction>

[0304] exist Figures 4 to 6 , a structure in which the DTI 65 is provided as a pixel separation portion in the pixel 51 adopting the spectrometer structure (non-shared spectrometer structure) in which the P+ semiconductor region 73 as the voltage applying unit of the spectrometer T is not shared is described.

[0305] Next, we will refer to Figures 24 to 32 A structure in which a DTI as a pixel separation portion is provided in a pixel 51 having a spectrometer T with a shared spectrometer structure will be described.

[0306] (First Pixel Separation Structure)

[0307] Figure 24 A is a plan view showing the first pixel separation structure. Figure 24 In FIG. 5A , the boundary lines of the pixels 51 indicated by solid lines are used to illustrate the division between adjacent pixels 51 and do not represent any structure. Figures 25 to 32 Same applies.

[0308] Figure 24 B is the beam passing through the optical splitter T. Figure 24 Pixel cross-section of the dashed line segment of A.

[0309] In the first pixel separation structure, as Figure 24 As shown in A of FIG, DTI 301 is arranged at the boundary portion of the pixel 51. The planar shape of the DTI 301 is a lattice shape, and the lattice pitch is equal to the pixel pitch.

[0310] like Figure 24 As shown in FIG. 1B , the DTI 301 is formed by embedding an insulator (e.g., SiO 2 ) in a groove (trench) formed by digging out a predetermined depth from the back side of the substrate 61, which is the light incident surface. The material to be embedded in the groove of the DTI 301 may, for example, consist solely of an insulating layer such as SiO 2 , or may have a dual structure in which the outer side (pixel center side) of a metal layer such as tungsten is covered with an insulator. The DTI 301 is arranged so as to overlap at least a portion of the P+ semiconductor region 73 , which serves as the voltage application unit of the beam splitter T (first beam splitter TA or second beam splitter TB) in a plan view. In addition, an inter-pixel light shielding film 63 is formed on the upper surface of the DTI 301.

[0311] By forming the DTI 301 of the first pixel separation structure, crosstalk caused by infrared light once incident on one pixel 51 being incident on adjacent pixels 51 can be suppressed. In addition, since the infrared light separation characteristics between pixels can be improved, sensitivity can be increased.

[0312] (Second Pixel Separation Structure)

[0313] Figure 25 is a plan view showing a second pixel separation structure.

[0314] In the second pixel separation structure, similarly, as Figure 25 As shown, DTI 302 is arranged in a grid pattern along the pixel boundaries of pixel 51 .

[0315] because Figure 25 The pixel cross-section of the dotted line part is Figure 24 The cross-sectional view of the first pixel separation structure shown in FIG. 1 is the same as that shown in FIG. 1B , and thus is omitted from the illustration.

[0316] Figure 24 The first pixel separation structure in Figure 25 The difference between the first pixel isolation structure and the second pixel isolation structure is that, in the first pixel isolation structure, DTI 301 is also formed at the intersection of the grids, while in the second pixel isolation structure, DTI 302 is not formed at the intersection of the grids. The formation method of DTI 302 and the material embedded in the groove are the same as those of DTI 301.

[0317] By forming the DTI 302 with the second pixel separation structure, crosstalk caused by infrared light once incident on one pixel 51 being incident on adjacent pixels 51 can be suppressed. In addition, since the infrared light separation characteristics between pixels can be improved, sensitivity can be increased.

[0318] However, according to the separation structure, DTI 302 is not formed at the intersection of the lattice. When DTI is formed, the width of the groove portion at the intersection (width in the plane direction) increases, and the occurrence of overcurrent caused by the excessive depth of the groove portion can be suppressed.

[0319] (Third pixel separation structure)

[0320] Figure 26 A is a plan view showing a third pixel separation structure.

[0321] Figure 26 B is the corresponding Figure 26 Pixel cross-section of the dashed line segment of A.

[0322] like Figure 26 As shown in A, in the third pixel separation structure, Figure 24 As in the case of the first pixel separation structure shown in FIG. A, the DTIs 303 are arranged in a lattice at intervals equal to the pixel pitch. The difference between the DTIs 303 of the third pixel separation structure and the DTIs 301 of the first pixel separation structure is the position at which the DTIs 303 are formed.

[0323] That is, the position of the DTI 303 of the third pixel isolation structure is offset by half a lattice pitch in the vertical and horizontal directions from the position of the DTI 301 of the first pixel isolation structure. In other words, the DTI 301 of the first pixel isolation structure is formed so that the intersection of the lattice is located at the boundary of the pixel 51, while the DTI 303 of the third pixel isolation structure is formed so that the intersection of the lattice is located at the center of the planar area of ​​the pixel 51.

[0324] Since the DTI 303 is formed on the line segment connecting the first optical splitter TA and the second optical splitter TB, Figure 26 The pixel cross-section corresponding to the dotted line portion in A is shown in FIG. Figure 26 As shown in B.

[0325] The on-chip lens 62 is formed so that incident light converges at the center of the planar area of ​​the pixel 51, in other words, at a position midway between the first beam splitter TA and the second beam splitter TB. Therefore, the portion where the incident light converges is the intersection of the DTI 303. Since the DTI 303 increases the diffraction of the incident light, sensitivity can be improved.

[0326] (Fourth pixel separation structure)

[0327] Figure 27 A is a plan view showing a fourth pixel separation structure.

[0328] Figure 27 B is the corresponding Figure 27 Pixel cross-section of the dashed line segment of A.

[0329] In the fourth pixel separation structure, a DTI 304 is formed. The DTI 304 has a structure in which the intersection portion of the DTI 303 of the third pixel separation structure is not provided. In other words, the DTI 304 of the fourth pixel separation structure is Figure 26 The third pixel separation structure has the same characteristics as the first pixel separation structure in that the intersection of the grid is formed at the center of the plane area of ​​the pixel 51, and the DTI 304 of the fourth pixel separation structure is the same as the Figure 25 The second pixel separation structure has in common that no separation structure is provided at the intersection portion.

[0330] According to the fourth pixel separation structure, as in the case of the third pixel separation structure, since the intersection portion of the DTI 304 is the central portion of the pixel area, the diffraction of incident light by the DTI 304 increases, and sensitivity can be improved.

[0331] In addition, in the DTI 304 , as in the case of the second pixel isolation structure, since the isolation structure is not formed at the intersection of the grid, the generation of overcurrent due to the formation of excessively deep grooves can be suppressed.

[0332] (Fifth Pixel Separation Structure)

[0333] Figure 28 A is a plan view showing a fifth pixel separation structure.

[0334] Figure 28 B is the corresponding Figure 28 Pixel cross-section of the dashed line segment of A.

[0335] In the fifth pixel separation structure, there is formed a DTI 311. The planar shape of the DTI 311 is a lattice shape, and the lattice pitch is half (1 / 2) of the pixel pitch.

[0336] In other words, the DTI 311 of the fifth pixel separation structure is to Figure 24 The lattice spacing of the DTI 301 of the first pixel separation structure shown is Figure 26The lattice pitch of the DTI 303 of the third pixel separation structure shown is halved. As a result, the DTI 311 is formed at the boundary portion of the pixel 51 and also on the line that divides the rectangular pixel area into two in the vertical and horizontal directions.

[0337] and Figure 28 The pixel cross-section corresponding to the dotted line portion in A is shown in FIG. Figure 28 As shown in B, and with Figure 26 Similar to B.

[0338] According to the fifth pixel separation structure, as in the case of the first pixel separation structure, the occurrence of crosstalk caused by infrared light once incident on one pixel 51 being incident on an adjacent pixel 51 can be suppressed. In addition, as in the case of the third pixel separation structure, the incident light is concentrated at the intersection of the DTI 311. Since the diffraction of the incident light by the DTI 311 is increased, the sensitivity can be improved.

[0339] (Sixth Pixel Separation Structure)

[0340] Figure 29 A is a plan view showing a sixth pixel separation structure.

[0341] Figure 29 B is the corresponding Figure 29 Pixel cross-section of the dashed line segment of A.

[0342] In the sixth pixel separation structure, a DTI 312 is formed. The DTI 312 has a structure in which no Figure 28 The structure of the intersection of the DTI 311 of the fifth pixel separation structure shown in FIG. Specifically, the planar shape of the DTI 312 is a lattice shape, and the lattice spacing is half (1 / 2) of the pixel spacing. Figure 29 As shown in FIG. 3B , the DTI 312 is not provided at the pixel boundary portion and the pixel center portion corresponding to the intersection portion of the grid.

[0343] According to the sixth pixel separation structure, as in the case of the first pixel separation structure, crosstalk caused by infrared light once incident on one pixel 51 being incident on adjacent pixels 51 can be suppressed. Furthermore, as in the case of the third pixel separation structure, the incident light is concentrated at the intersection of the DTIs 312. Since the DTIs 312 increase the diffraction of the incident light, sensitivity can be improved. Furthermore, as in the case of the second pixel separation structure, since the DTIs 312 are not formed at the intersection of the grid, the generation of overcurrent caused by the formation of excessively deep grooves can be suppressed.

[0344] (Pixel structure with anti-reflection structure added)

[0345] In having Figures 24 to 29 In the pixels 51 of the first to sixth pixel separation structures shown, a fine concavo-convex structure can be formed on the light incident surface of the substrate 61 .

[0346] Figure 30 is shown in the Figure 24 The pixel structure shown in the figure is a plan view and a cross-sectional view of a pixel structure in which a concavo-convex structure is provided in a pixel 51 of the first pixel separation structure.

[0347] therefore, Figure 30 and Figure 24 The only difference is whether the concavo-convex portion 321 is provided on the light incident surface of the substrate 61, and the other parts are the same.

[0348] like Figure 30 As shown in the plan view in FIG. 1A , the concavo-convex portion 321 is formed in a region including the central portion of the pixel region. Figure 30 As shown in the cross-sectional view of FIG. 3B , the concave-convex portion 321 has, for example, an inverted pyramid structure, in which a plurality of quadrangular pyramid-shaped regions having vertices on the side of the beam splitter T are regularly arranged. The base shape of each quadrangular pyramid is, for example, a square, and each quadrangular pyramid-shaped region is formed by digging into the substrate 61 so as to protrude toward the beam splitter T. Note that the concave-convex portion 321 may have a normal pyramid structure, in which a plurality of quadrangular pyramid-shaped regions having vertices on the side of the on-chip lens 62, which is the light incident side, are regularly arranged. Note that the apex portion of the inverted pyramid structure or the normal pyramid structure may have a curvature and a rounded shape.

[0349] exist Figure 30 In the example of , the concavoconvex portion 321 has a structure in which quadrangular pyramid shapes are arranged in a 3×3 manner. However, the size and number of the repeating unit (quadrangular pyramid shape) are arbitrary. Figure 30 In the example shown, the concavo-convex portion 321 is formed only near the center of the pixel region. However, the concavo-convex portion may be formed in any region of the light incident surface of the substrate 61 as long as it is a portion where the DTI 301 is not formed. The concavo-convex portion 321 may be formed on the entire light incident surface except for the portion where the DTI 301 is formed.

[0350] Although not shown, the concavo-convex portion 321 can also be formed on a Figures 25 to 29 The light incident surface of the substrate 61 in the pixels 51 of the second to sixth pixel separation structures shown.

[0351] The concavoconvex portion 321 increases diffracted light of incident light and forms a gradient of refractive index, thereby reducing reflection. As a result, the amount of incident light to be photoelectrically converted can be increased, thereby improving sensitivity.

[0352] (Seventh pixel separation structure)

[0353] Figure 31 A is a plan view showing a seventh pixel separation structure.

[0354] Figure 31 B is the corresponding Figure 31 Pixel cross-section of the dashed line segment of A.

[0355] In the seventh pixel separation structure, a DTI 331 is formed. Figure 24 Compared with the DTI 301 of the first pixel separation structure, the DTI 301 is formed at the boundary portion of the pixel 51 as a barrier shared by adjacent pixels 51, and Figure 31 The DTI 331 is formed as a barrier for each pixel. Figure 31 As shown in FIG. 3B , the DTI 331 is formed to serve as a double barrier between adjacent pixels.

[0356] like Figure 31 As shown in the plan view of FIG. 5A , the corners of the rectangular DTI 331 formed along the boundary of the pixel 51 are chamfered so that the sides are not perpendicular and no 90° intersections are formed. As a result, defects and damage can be suppressed when forming the grooves at the intersections, and the generation of noise can be suppressed.

[0357] The DTI 331 can suppress the occurrence of crosstalk caused by infrared light once incident on one pixel 51 being incident on an adjacent pixel 51. In addition, since the separation characteristics of infrared light between pixels can be improved, the sensitivity can be increased.

[0358] (Pixel structure with added anti-reflection structure)

[0359] A concavo-convex structure can also be provided for the seventh pixel separation structure.

[0360] Figure 32 Is in Figure 31 The seventh pixel separation structure shown in FIG. 5 is a plan view and a cross-sectional view showing a pixel 51 having a concave-convex portion 321. Figure 31 and Figure 32 The only difference is whether the concavo-convex portion 321 is provided on the light incident surface of the substrate 61, and the other parts are the same.

[0361] Notice, Figure 30 The concavoconvex portion 321 shown has a structure in which quadrangular pyramid shapes as repeating units are arranged in a 3×3 manner, and Figure 32 The concavoconvex portion 321 has a structure in which quadrangular pyramid shapes are arranged in a 4×4 manner.

[0362] In the seventh pixel separation structure, the provision of the concavoconvex portion 321 also increases diffracted light of the incident light and forms a gradient of the refractive index, thereby reducing reflection. As a result, the amount of incident light to be photoelectrically converted can be increased, thereby improving sensitivity.

[0363] Note that in DTI 301, DTI 302, DTI 303, DTI 304, DTI 311, DTI 312, and DTI 331 shown in the above-mentioned first to seventh pixel separation structures, the sidewalls and bottom surfaces of the DTIs may be covered with a fixed charge film, thus adding a fixed charge film to the structure.

[0364] In the case of adding a fixed charge film, the fixed charge film can be formed on the side wall and bottom surface of a groove portion (groove) formed by digging to a predetermined depth from the back side of the light incident surface side of the substrate 61, and then an insulator can be embedded. As the fixed charge film, it is preferred to use a material that can be deposited on the substrate 61 to generate fixed charges and enhance pinning, such as silicon, and a high refractive index material film or a high dielectric film with a negative charge can be used. As a specific material, for example, an oxide or nitride containing at least one element of hafnium (Hf), aluminum (Al), zirconium (Zr), tantalum (Ta) or titanium (Ti) can be applied. Examples of film forming methods include chemical vapor deposition (hereinafter referred to as CVD method), sputtering method and atomic layer deposition method (hereinafter referred to as ALD method). By using the ALD method, a SiO2 film with a film thickness of about 1 nm can be formed at the same time, and the SiO2 film reduces the interface state during the film formation process. Examples of materials other than the above materials include oxides or nitrides containing at least one of the following elements: lanthanum (La), praseodymium (Pr), cerium (Ce), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), thulium (Tm), ytterbium (Yb), lutetium (Lu), or yttrium (Y). Furthermore, the fixed charge film can be formed of a hafnium oxynitride film or an aluminum oxynitride film.

[0365] Silicon (Si) or nitrogen (N) may be added to the fixed charge film material as long as the insulating properties are not impaired. The concentration is appropriately determined within a range that does not impair the insulating properties of the film. As described above, the addition of silicon (Si) or nitrogen (N) can improve the film's heat resistance and its ability to prevent ion implantation during processing.

[0366] By covering the side walls and bottom surface of the DTI with a fixed charge film, an inversion layer is formed on the surface in contact with the fixed charge film. As a result, since the silicon interface is pinned by the inversion layer, the generation of dark current is suppressed. Suppressing the generation of dark current helps to improve the sensitivity of the pixel 51. In addition, when a groove portion is formed in the substrate 61, physical damage may occur on the side walls and bottom surface of the groove portion, and depinning may occur on the periphery of the groove portion. To address this problem, depinning is prevented by forming a fixed charge film having a large amount of fixed charge on the side walls and bottom surface of the groove portion. In the case of forming a fixed charge film on the side walls and bottom surface of the DTI, the fixed charge film can be formed simultaneously and integrally with the fixed charge film 66 formed on the light incident surface side of the substrate 61.

[0367] <9. Example of Substrate Configuration of Light Receiving Device>

[0368] Figure 1 The light receiving device 1 can adopt Figure 33 Any one of substrate structures A to C.

[0369] Figure 33 A shows an example in which the light receiving device 1 includes a semiconductor substrate 511 and a support substrate 512 below the semiconductor substrate 511 .

[0370] In this case, a pixel array region 551 corresponding to the pixel array unit 20 , a control circuit 552 for controlling each pixel in the pixel array region 551 , and a logic circuit 553 including a signal processing circuit for detecting signals are formed on the upper semiconductor substrate 511 .

[0371] The control circuit 552 includes the aforementioned vertical drive unit 22, horizontal drive unit 24, and other components. The logic circuit 553 includes a column processing unit 23 for performing AD conversion processing on the detection signal, and a signal processing unit 31 for performing distance calculation processing based on the ratio of detection signals obtained by two or more spectrometers T in a pixel, calibration processing, and the like.

[0372] Alternatively, as Figure 33 As shown in FIG. 1B , the light receiving device 1 may be configured such that a first semiconductor substrate 521 and a second semiconductor substrate 522 are stacked, a pixel array region 551 and a control circuit 552 are formed on the first semiconductor substrate 521, and a logic circuit 553 is formed on the second semiconductor substrate 522. Note that the first semiconductor substrate 521 and the second semiconductor substrate 522 are electrically connected via, for example, a through-hole or a Cu-Cu metal bond.

[0373] Alternatively, as Figure 33As shown in FIG. 3 , the light receiving device 1 can be configured such that a first semiconductor substrate 531 and a second semiconductor substrate 532 are stacked. Only a pixel array region 551 is formed on the first semiconductor substrate 531, and a regional control circuit 554 is formed on the second semiconductor substrate 532. The regional control circuit 554 includes a control circuit for controlling each pixel and a signal processing circuit for processing detection signals, arranged in units of one pixel or multiple pixel regions. The first and second semiconductor substrates 531 and 532 are electrically connected, for example, vias or Cu-Cu metal bonding.

[0374] like Figure 33 As with the light receiving device 1 of FIG. 5 , by providing a control circuit and a signal processing circuit in units of pixels or regions, it is possible to set optimal drive timing and gain for each divided control unit, regardless of distance and reflectivity, and to obtain optimal distance information. Furthermore, since distance information can be calculated by driving only a portion of the pixel array region 551, rather than the entire surface, power consumption can be suppressed depending on the operating mode.

[0375] <10. Example of Distance Measurement Module Configuration>

[0376] Figure 34 1 is a block diagram showing a configuration example of a distance measurement module that outputs distance measurement information using the light receiving device 1 .

[0377] The distance measurement module 600 includes a light emitting unit 611 , a light emitting control unit 612 , and a light receiving unit 613 .

[0378] Light emitting unit 611 includes a light source that emits light of a predetermined wavelength and illuminates an object with illumination light whose brightness periodically varies. For example, light emitting unit 611 includes a light emitting diode that emits infrared light with a wavelength in the range of 780 nm to 1000 nm as a light source, and generates illumination light in synchronization with a rectangular wave light emission control signal CLKp provided by light emission control unit 612.

[0379] Note that the light emission control signal CLKp is not limited to a rectangular wave as long as it is a periodic signal. For example, the light emission control signal CLKp may be a sine wave.

[0380] The light control unit 612 supplies a light control signal CLKp to the light emitting unit 611 and the light receiving unit 613 to control the timing of the irradiation of the irradiation light. The frequency of the light control signal CLKp is, for example, 20 megahertz (MHz). Note that the frequency of the light control signal CLKp is not limited to 20 megahertz (MHz) and can also be 5 megahertz (MHz), etc.

[0381] The light receiving unit 613 receives light reflected from an object, calculates distance information of each pixel based on the light reception result, generates a depth image, and outputs the depth image in which the grayscale value of each pixel represents the distance to the object.

[0382] The above-mentioned light receiving device 1 is used as a light receiving unit 613, and the light receiving device 1 as the light receiving unit 613 calculates the distance information of each pixel based on, for example, the light emitting control signal CLKp according to the signal intensity detected by the charge detection unit (N+ semiconductor region 71) of each of the first spectrometer TA and the second spectrometer TB of each pixel 51 of the pixel array unit 20.

[0383] As mentioned above, Figure 1 The light receiving device 1 can be incorporated as the light receiving unit 613 of the distance measuring module 600, which obtains distance information to the subject using an indirect ToF scheme and outputs the distance information. By adopting the various configuration examples of the light receiving device 1 described above (for example, a light receiving device with four vertical signal lines VSL arranged for each pixel column) as the light receiving unit 613 of the distance measuring module 600, the resolution and reading speed of the distance measuring module 600 can be improved.

[0384] As described above, according to the present technology, it is possible to improve the distance measurement characteristics of the light receiving device as a CAPD sensor.

[0385] Note that in this technology, the aforementioned beam splitter structures and vertical signal line VSL wiring can be combined in any combination. For example, in a configuration where four vertical signal lines VSL are arranged for each pixel column, the light receiving device 1 can employ either a shared beam splitter structure or a non-shared beam splitter structure. Furthermore, any combination of pixels having either a shared beam splitter structure or a non-shared beam splitter structure and the first to seventh pixel separation structures can be employed.

[0386] Furthermore, although the above description uses an example of using electrons as signal carriers, holes generated by photoelectric conversion can also be used as signal carriers. In this case, a charge detection unit for detecting signal carriers can be provided in the P+ semiconductor region, a voltage application unit for generating an electric field in the substrate can be provided in the N+ semiconductor region, and the charge detection unit provided in the spectrometer T can detect holes as signal carriers.

[0387] <11. Application Examples of Mobile Objects>

[0388] The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented as a device installed on any type of mobile object, including: an automobile, an electric vehicle, a hybrid vehicle, a motorcycle, a bicycle, a personal mobile device, an airplane, an unmanned aerial vehicle, a ship, and a robot.

[0389] Figure 35 is a block diagram showing a schematic configuration example of a vehicle control system as an example of a mobile body control system to which the technology according to the present disclosure can be applied.

[0390] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Figure 35 In the illustrated example, a vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an exterior information detection unit 12030, an interior information detection unit 12040, and an integrated control unit 12050. Furthermore, the functional configuration of the integrated control unit 12050 includes a microcomputer 12051, an audio and video output unit 12052, and an in-vehicle network interface (I / F) 12053.

[0391] Drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, drive system control unit 12010 functions as a control device for the following devices: a drive force generating device, such as an internal combustion engine or a drive motor, for generating drive force for the vehicle; a drive force transmission mechanism for transmitting drive force to the wheels; a steering mechanism for adjusting the steering angle of the vehicle; and a brake device for generating braking force for the vehicle.

[0392] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for the following devices: a keyless entry system; a smart key system; power windows; or various lights such as headlights, taillights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 can receive input from radio waves or signals from various switches transmitted from a portable device that replaces a key. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door locks, power windows, and lights.

[0393] The vehicle exterior information detection unit 12030 detects information outside the vehicle in which the vehicle control system 12000 is installed. For example, the vehicle exterior information detection unit 12030 is connected to the camera unit 12031. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to capture an image of the vehicle exterior and receives the captured image. Based on the received image, the vehicle exterior information detection unit 12030 can perform object detection or distance detection processing on pedestrians, vehicles, obstacles, signs, or letters on the road surface.

[0394] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output this electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 can be visible light or non-visible light such as infrared light.

[0395] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 for detecting the driver's state. Driver state detection unit 12041 may include, for example, a camera for capturing an image of the driver. Based on the detection information input from driver state detection unit 12041, in-vehicle information detection unit 12040 can calculate the driver's level of fatigue or concentration, or determine whether the driver is dozing off.

[0396] Based on the information outside or inside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, the microcomputer 12051 can calculate a control target value for the driving force generating device, the steering mechanism, or the braking device, and can output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control to implement advanced driver assistance system (ADAS) functions, such as collision avoidance or impact mitigation, vehicle-to-vehicle distance-based following driving, speed maintenance driving, vehicle collision warning, or vehicle lane departure warning.

[0397] In addition, the microcomputer 12051 controls the driving force generating device, steering mechanism, or braking device, etc. based on the information around the vehicle obtained by the external information detection unit 12030 or the internal information detection unit 12040, thereby being able to perform collaborative control aimed at achieving, for example, autonomous driving without relying on the driver's operation.

[0398] Furthermore, based on information outside the vehicle acquired by the vehicle exterior information detection unit 12030, the microcomputer 12051 can output control commands to the body system control unit 12020. For example, the microcomputer 12051 can control the headlights based on the position of a preceding vehicle or oncoming vehicle detected by the vehicle exterior information detection unit 12030, thereby performing cooperative control to prevent glare, such as switching the high beam to the low beam.

[0399] The sound and image output unit 12052 transmits an output signal of at least one of sound and image to an output device, which can visually or auditorily notify information to passengers on the vehicle or outside the vehicle. Figure 35 In the example of FIG, as examples of output devices, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are shown. The display unit 12062 may include, for example, at least one of an onboard display or a head-up display.

[0400] Figure 36 12031 is a diagram showing an example of the installation position of the imaging unit 12031.

[0401] exist Figure 36 , the vehicle 12100 includes camera units 12101 , 12102 , 12103 , 12104 , and 12105 as the camera unit 12031 .

[0402] For example, camera units 12101, 12102, 12103, 12104, and 12105 are located in locations such as the front nose, rearview mirror, rear bumper, rear door, and the upper portion of the windshield inside the vehicle 12100. Camera unit 12101 located on the front nose and camera unit 12105 located on the upper portion of the windshield inside the vehicle primarily capture images in front of vehicle 12100. Camera units 12102 and 12103 located on the rearview mirror primarily capture images from the side of vehicle 12100. Camera unit 12104 located on the rear bumper or rear door primarily captures images from the rear of vehicle 12100. The images captured by camera units 12101 and 12105 are primarily used to detect preceding vehicles or pedestrians, obstacles, traffic lights, traffic signs, lanes, and the like.

[0403] Notice, Figure 36 The figure shows examples of the imaging ranges of imaging units 12101 to 12104. Imaging range 12111 represents the imaging range of imaging unit 12101, which is located on the front nose. Imaging ranges 12112 and 12113 represent the imaging ranges of imaging units 12102 and 12103, respectively, which are located on the rearview mirrors. Imaging range 12114 represents the imaging range of imaging unit 12104, which is located on the rear bumper or rear door. For example, by superimposing the image data captured by imaging units 12101 to 12104, a bird's-eye view image of vehicle 12100 as seen from above can be obtained.

[0404] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0405] For example, microcomputer 12051 can measure the distance to each three-dimensional object within imaging range 12111-12114 and the change in this distance over time (relative speed relative to vehicle 12100) based on the distance information obtained from imaging units 12101-12104, thereby being able to extract the following three-dimensional object as the preceding vehicle: specifically, the three-dimensional object that is closest to vehicle 12100 on the driving road and is traveling at a predetermined speed (e.g., greater than or equal to 0 km / h) in a direction substantially identical to vehicle 12100. Furthermore, microcomputer 12051 can pre-set the inter-vehicle distance to be maintained in front of the preceding vehicle and can perform automatic braking control (including follow-up stop control) and automatic acceleration control (including follow-up start control), etc. As described above, cooperative control can be performed to achieve, for example, autonomous driving, independent of driver operation.

[0406] For example, based on the distance information obtained from the camera units 12101-12104, the microcomputer 12051 can extract 3D object data by classifying it into two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, and other 3D objects such as utility poles. This data can then be used to automatically avoid obstacles. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as either visible to the driver or nearly invisible. The microcomputer 12051 then determines a collision risk, indicating the risk of collision with each obstacle. When the collision risk is equal to or higher than a set value and a collision is possible, the microcomputer 12051 can output a warning to the driver via the audio speaker 12061 or display unit 12062, or can perform driving assistance to avoid a collision by initiating forced deceleration or evasive steering by the drive system control unit 12010.

[0407] At least one of the imaging units 12101-12104 may be an infrared camera for detecting infrared rays. For example, the microcomputer 12051 can identify a pedestrian by determining whether the pedestrian exists in the images captured by the imaging units 12101-12104. For example, this pedestrian identification is performed by extracting feature points from the images captured by the imaging units 12101-12104, which function as infrared cameras; and determining whether the object is a pedestrian by performing pattern matching on a series of feature points representing the object's outline. When the microcomputer 12051 determines that a pedestrian exists in the images captured by the imaging units 12101-12104 and identifies the pedestrian, the audio and video output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the identified pedestrian for emphasis. Furthermore, the audio and video output unit 12052 may control the display unit 12062 to display an icon representing the pedestrian at a desired location.

[0408] The example of the vehicle control system to which the technology of the present disclosure can be applied has been described above. The technology according to the present disclosure is applicable to the camera unit 12031 in the above-mentioned configuration. Specifically, for example, by Figure 1 The light receiving device 1 shown is applied to the image pickup unit 12031, and characteristics such as resolution and reading speed can be improved.

[0409] In addition, the embodiments of the present technology are not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present technology.

[0410] In addition, the effects described in this specification are merely examples and are not restrictive. Therefore, other effects can also be obtained.

[0411] Note that the present technology can also be configured as follows. (1)

[0413] A light receiving device, comprising:

[0414] A pixel array unit, wherein pixels are arranged two-dimensionally in a matrix, each pixel having a first spectrometer and a second spectrometer, wherein the first spectrometer detects the charge photoelectrically converted by the photoelectric conversion unit, and the second spectrometer detects the charge photoelectrically converted by the photoelectric conversion unit, wherein:

[0415] The first spectrometer and the second spectrometer each have a voltage applying unit for applying a voltage.

[0416] The pixel array unit has a groove portion formed by digging to a predetermined depth from the light incident surface side of the substrate, and

[0417] The groove portion is arranged to overlap with at least a portion of the voltage applying unit in a plan view. (2)

[0419] The light receiving device according to (1) above, wherein

[0420] The groove portion has a lattice-like planar shape. (3)

[0422] The light receiving device according to (2) above, wherein

[0423] The grid spacing is equal to the pixel spacing. (4)

[0425] The light receiving device according to (2) above, wherein

[0426] The grid spacing is equal to half the pixel spacing. (5)

[0428] The light receiving device according to any one of (2) to (4) above, wherein

[0429] The grooves are not formed at intersections of the lattices. (6)

[0431] The light receiving device according to any one of (2) to (5) above, wherein

[0432] In the groove portion, intersections of the grids correspond to the positions of the pixel boundaries. (7)

[0434] The light receiving device according to any one of (2) to (5) above, wherein

[0435] In the groove portion, an intersection of the grid corresponds to a center portion of the pixel. (8)

[0437] The light receiving device according to any one of (1) to (3) above, wherein

[0438] The groove portion is doubly formed between adjacent pixels. (9)

[0440] The light receiving device according to any one of (1) to (7) above, wherein

[0441] An insulating layer or a metal layer is embedded in the groove portion. (10)

[0443] The light receiving device according to any one of (1) to (9) above, wherein

[0444] The pixel array unit further includes a light shielding film between pixels on the light incident surface side of the substrate. (11)

[0446] The light receiving device according to any one of (1) to (10) above, wherein

[0447] The voltage applying unit is shared by two adjacent pixels. (12)

[0449] The light receiving device according to any one of (1) to (11) above, wherein

[0450] The pixel has a concavo-convex portion on the light incident surface of the substrate. (13)

[0452] A ranging module, comprising:

[0453] A light receiving device having a pixel array unit in which pixels are two-dimensionally arranged in a matrix, each of the pixels having a first spectrometer and a second spectrometer, wherein the first spectrometer detects charge photoelectrically converted by a photoelectric conversion unit and the second spectrometer detects charge photoelectrically converted by the photoelectric conversion unit.

[0454] The first spectrometer and the second spectrometer each have a voltage applying unit for applying a voltage.

[0455] The pixel array unit has a groove portion formed by digging to a predetermined depth from the light incident surface side of the substrate, and

[0456] The groove portion is arranged to overlap with at least a portion of the voltage applying unit in a plan view.

[0457] Reference Signs List

[0458] 1. Light receiving device

[0459] 20 pixel array unit

[0460] 21 Splitter driver unit

[0461] 51 pixels

[0462] TA First Splitter

[0463] TB Second Splitter

[0464] VSL (VSL0 to VSL3) vertical signal line

[0465] 61 substrate

[0466] 62 On-chip lens

[0467] 71 N+ semiconductor region

[0468] 73 P+ semiconductor region

[0469] 111 multi-layer wiring layer

[0470] M1 to M5 Metal Film

[0471] 121 pass transistor

[0472] 122 FD

[0473] 123 Reset transistor

[0474] 124 Amplifier transistor

[0475] 125 Select transistor

[0476] 127 Additional capacitor

[0477] 128 switching transistors

[0478] 301 to 304 DTI

[0479] 311,312 DTI

[0480] 321 Concave and convex parts

[0481] 331 DTI.

Claims

1. A light receiving device, comprising: A pixel array unit, wherein pixels are arranged two-dimensionally in a matrix, the pixels having a first spectrometer and a second spectrometer, the first spectrometer detecting charges photoelectrically converted by a photoelectric conversion unit, the second spectrometer detecting charges photoelectrically converted by the photoelectric conversion unit, wherein: The first spectrometer includes a first voltage applying unit for applying a first voltage. The second spectrometer includes a second voltage applying unit for applying a second voltage. The pixel array unit has a groove portion formed by digging to a predetermined depth from the light incident surface side of the substrate, and The groove portion is arranged to overlap with at least a portion of the first voltage applying unit or the second voltage applying unit in a plan view.

2. The light receiving device according to claim 1, wherein The groove portion has a lattice-like planar shape.

3. The light receiving device according to claim 2, wherein The grid spacing is equal to the pixel spacing.

4. The light receiving device according to claim 2, wherein The grid spacing is equal to half the pixel spacing.

5. The light receiving device according to claim 2, wherein The grooves are not formed at intersections of the lattices. The light receiving device according to claim 2 , wherein: In the groove portion, the intersection of the grids corresponds to the position of the boundary portion of the pixel.

7. The light receiving device according to claim 2, wherein In the groove portion, the intersection of the grids corresponds to the center of the pixel.

8. The light receiving device according to claim 2, wherein The groove portion is doubly formed between adjacent pixels.

9. The light receiving device according to any one of claims 1 to 8, wherein An insulating layer or a metal layer is embedded in the groove portion.

10. The light receiving device according to any one of claims 1 to 8, wherein The pixel array unit further includes a light shielding film between pixels on the light incident surface side of the substrate.

11. The light receiving device according to any one of claims 1 to 8, wherein The voltage applying unit is shared by two adjacent pixels.

12. The light receiving device according to any one of claims 1 to 8, wherein The pixel has a concavo-convex portion on the light incident surface of the substrate.

13. A distance measuring module, comprising the light receiving device according to any one of claims 1 to 12.

Images