Display device and method for driving a display device

Abstract

Exemplary embodiments of the present inventive concept relate to a display apparatus including pixels, scan lines extending in a row direction and connected to the pixels, data lines extending in a column direction and connected to the pixels, reception lines extending in the column direction and connected to the pixels, and a compensation circuit part generating first sensing data by receiving a current flowing to the pixels through the reception lines, and generating a compensation value by multiplying the first sensing data by a calibration factor corresponding to a position of each of the plurality of pixels, the compensation value compensating for characteristics of a driving transistor included in each of the pixels, wherein the calibration factor includes a line calibration factor corresponding to the reception line, and a method for driving the display apparatus.

Description

TECHNICAL FIELD

[0001] Embodiments of the present inventive concept relate to a display apparatus and a method for driving a display apparatus. More particularly, the present inventive concept relates to a display apparatus performing external compensation and a method for driving a display apparatus. BACKGROUND

[0002] A display apparatus is a display that displays an image. Recently, an organic light emitting diode display has attracted attention.

[0003] An organic light emitting diode display has a self-light emitting characteristic, and, unlike a liquid crystal display, since the organic light emitting diode display does not need a separate light source, the organic light emitting diode display can have a small thickness and weight. In addition, the organic light emitting diode display exhibits high quality characteristics such as low power consumption, high brightness, and high response speed.

[0004] A plurality of pixels included in the organic light emitting diode display each include an organic light emitting diode and a driving transistor connected to the organic light emitting diode. The driving transistor causes a current to flow through the organic light emitting diode according to a data voltage applied to the driving transistor, so that the organic light emitting diode emits light at a brightness corresponding to the data voltage.

[0005] When the driving transistor is degraded or a threshold voltage offset occurs between the driving transistors, an image of a desired color or brightness can not be displayed, and the image quality of the organic light emitting diode display can be deteriorated.

[0006] The above information disclosed in this Background section is only for enhancing the understanding of the background of the present inventive concept, and therefore it can contain information that does not form the prior art that is already known in this technical field to those of ordinary skill in the art. SUMMARY

[0007] A compensation circuit part for compensating for degradation of the driving transistor and a deviation between threshold voltages of the driving transistors can measure the threshold voltage of the driving transistor included in each pixel by receiving a current flowing to the pixel. The threshold voltage of the driving transistor is referred to as a characteristic of the driving transistor. The compensation circuit part compensates for the data voltage based on the measured characteristic of the driving transistor, so that occurrence of image quality deterioration due to degradation of the driving transistor and a characteristic deviation between the driving transistors can be prevented. Such a method is referred to as external compensation.

[0008] Currents flowing to the plurality of pixels are received by a compensation circuit part through a plurality of reception lines. The compensation circuit part can measure characteristics of the driving transistor by measuring voltage values charged in the plurality of reception lines. When the characteristics of the driving transistor are measured, characteristics of the plurality of reception lines are included in the measured voltage values. The plurality of reception lines can have different parasitic capacitances due to errors in a manufacturing process. When the measured values are used as they are to compensate for the data voltage, compensation errors can occur due to the deviation of the parasitic capacitances of the plurality of reception lines.

[0009] The technical problem to be solved by the present inventive concept is to provide a display device that can prevent the occurrence of compensation errors due to the deviation of parasitic capacitances of a plurality of reception lines when external compensation is performed.

[0010] The display device according to an exemplary embodiment of the present inventive concept includes a plurality of pixels; a plurality of scan lines extending in a row direction and connected to the plurality of pixels; a plurality of data lines extending in a column direction and connected to the plurality of pixels; a plurality of reception lines extending in the column direction and connected to the plurality of pixels; and a compensation circuit part connected to the plurality of reception lines,

[0011] wherein the compensation circuit part includes a plurality of sensing data generation circuits each of which generates first sensing data by sensing a current flowing through a reception line, a calibration factor generator that receives the first sensing data and generates a calibration factor corresponding to a position of each of the plurality of pixels, and a calibration operation part that receives the first sensing data and generates a compensation value compensating for characteristics of a driving transistor included in each of the plurality of pixels, and wherein the calibration factor includes a plurality of line calibration factors corresponding to the plurality of reception lines.

[0012] Any one of the plurality of line calibration factors can include a ratio of average second sensing data to average first sensing data with respect to the reception line.

[0013] The average first sensing data can include a value averaged for first sensing data corresponding to a factor detection area corresponding to a preset area of the display device including the plurality of pixels for each of the reception lines.

[0014] The average second sensing data can include a value averaged for second sensing data corresponding to the factor detection area for each of the reception lines.

[0015] Each of the plurality of sensing data generation circuits can include an analog-to-digital converter and an operational amplifier, wherein a current flowing through the reception line can be converted into the first sensing data by the analog-to-digital converter, and the current flowing through the reception line can be converted into the second sensing data by the operational amplifier and the analog-to-digital converter.

[0016] The factor detection area can include one or more scan lines among the plurality of scan lines and a plurality of pixels connected to the one or more scan lines included in the factor detection area.

[0017] The factor detection area can include a plurality of areas spaced apart from each other in the column direction.

[0018] The compensation circuit component can include a look-up table including the plurality of line calibration factors corresponding to the plurality of reception lines.

[0019] The compensation circuit component can include a filter that removes noise included in the calibration factors.

[0020] The filter can include a low-pass filter.

[0021] A display apparatus according to another exemplary embodiment of the inventive concept includes a sensing data generator including a plurality of sensing data generation circuits each connected to a reception line of a plurality of pixels, including an analog-to-digital converter and an operational amplifier, receiving a current flowing through the plurality of reception lines via the plurality of pixels connected to the plurality of reception lines, converting the current into first sensing data by using the analog-to-digital converter, and converting the current into second sensing data by using the operational amplifier and the analog-to-digital converter; a calibration factor generator connected to the plurality of sensing data generation circuits, generating average first sensing data by averaging the first sensing data for each reception line, generating average second sensing data by averaging the second sensing data for each reception line, and calculating a calibration factor that is a ratio of the average second sensing data to the average first sensing data for each reception line; and a calibration operation component generating a compensation value by multiplying the first sensing data by a calibration factor corresponding to a position of the plurality of pixels, the compensation value compensating for characteristics of a driving transistor included in each of the plurality of pixels.

[0022] The display apparatus can further include a filter connected between the calibration factor generator and the calibration operation component, and removing noise included in the calibration factor by using a low-pass filter.

[0023] According to another exemplary embodiment of the present inventive concept, a method for driving a display apparatus is provided. The method for driving the display apparatus includes receiving a current flowing through a plurality of reception lines via a plurality of pixels connected to the plurality of reception lines, converting the current into first sensing data by using a plurality of sensing data generation circuits, each of which includes an analog-to-digital converter, and generating a plurality of compensation values by multiplying the first sensing data by a calibration factor corresponding to each of the plurality of pixels, each of the plurality of compensation values compensating for a characteristic of a driving transistor included in each of the plurality of pixels, wherein the calibration factor includes a plurality of line calibration factors corresponding to the plurality of reception lines.

[0024] The method for driving the display apparatus can further include converting the current into second sensing data by an operational amplifier and the analog-to-digital converter included in each of the plurality of sensing data generation circuits, generating average first sensing data by averaging the first sensing data for each of the plurality of reception lines, generating average second sensing data by averaging the second sensing data for each of the plurality of reception lines, and calculating the calibration factor, which is a ratio of the average second sensing data to the average first sensing data.

[0025] The method for driving the display apparatus can further include storing the plurality of line calibration factors corresponding to the plurality of reception lines as a look-up table.

[0026] The method for driving the display apparatus can further include removing noise included in the calibration factor by using a low-pass filter.

[0027] The average first sensing data can be generated by averaging the first sensing data corresponding to a factor detection area for each reception line, the factor detection area corresponding to a preset area of the display apparatus including the plurality of pixels.

[0028] The average second sensing data can be generated by averaging the second sensing data corresponding to the factor detection area for each reception line.

[0029] The factor detection area can include one or more scan lines among a plurality of scan lines connected to the plurality of pixels and a plurality of pixels connected to the scan lines included in the factor detection area.

[0030] The factor detection area can include a plurality of areas spaced apart from each other in a column direction.

[0031] The display apparatus can remove deviation of parasitic capacitance in the plurality of reception lines and secure sensing data having a high signal-to-noise ratio (SNR). The display apparatus can prevent occurrence of compensation error due to deviation of parasitic capacitance in the plurality of reception lines, thereby performing more accurate external compensation. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 is a block diagram of a display apparatus according to an exemplary embodiment of the inventive concept.

[0033] Figure 2 is a circuit diagram of a pixel according to an exemplary embodiment of the inventive concept.

[0034] Figure 3 is a block diagram of a compensation circuit part according to another exemplary embodiment of the inventive concept.

[0035] Figure 4 is a circuit diagram of a sensing data generator according to an exemplary embodiment of the inventive concept.

[0036] Figure 5 illustrates a factor detection area according to an exemplary embodiment of the inventive concept.

[0037] Figure 6 is a graph illustrating average first sensing data in a factor detection area with respect to a reception line according to an exemplary embodiment of the inventive concept.

[0038] Figure 7 is a graph illustrating average second sensing data in a factor detection area with respect to a reception line according to an exemplary embodiment of the inventive concept.

[0039] Figure 8 is a graph illustrating a calibration factor with respect to a reception line according to an exemplary embodiment of the inventive concept.

[0040] Figure 9 illustrates a look-up table included in a calibration factor generator according to an exemplary embodiment of the inventive concept.

[0041] Figure 10 is a schematic diagram of a method for calculating compensation values with respect to a plurality of pixels by a calibration operation part according to an exemplary embodiment of the inventive concept.

[0042] Figure 11 is a factor detection area according to another exemplary embodiment of the inventive concept.

[0043] Figure 12 is a block diagram of a compensation circuit part according to another exemplary embodiment of the inventive concept.

[0044] Figure 13 is a graph showing a calibration factor before filter filtering by Figure 12 of the filter. DETAILED DESCRIPTION

[0045] Embodiments of the inventive concept will be more fully described in the following detailed description, taken in conjunction with the accompanying drawings, in which like reference numerals refer to like elements in which exemplary embodiments of the inventive concept are shown. As those skilled in the art will appreciate, the described embodiments can be modified in various different ways without departing from the spirit or scope of the inventive concept.

[0046] Also, in the exemplary embodiments, since like reference numerals denote like elements having the same configuration, the first exemplary embodiment is representatively described, and in other exemplary embodiments, only the configuration different from the first exemplary embodiment will be described.

[0047] Accordingly, the drawings and the description are to be regarded as illustrative in nature and are not restrictive. Like reference numerals designate like elements throughout the specification.

[0048] Since the size and thickness of each component shown in the drawings are arbitrarily shown for better understanding and easy description, the inventive concept is not necessarily limited to what is shown. In the drawings, the thickness of layers, films, panels, regions, and the like is exaggerated for clarity.

[0049] Throughout the specification, unless explicitly described to the contrary, the word "comprise", "comprises" or "comprising" will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.

[0050] Figure 1 is a block diagram of a display apparatus according to an exemplary embodiment of the inventive concept.

[0051] Referring to Figure 1 , the display apparatus includes a signal controller 100, a gate driver 200, a data driver 300, a compensation circuit part 400, a light emission driver 500, and a display part 600.

[0052] The signal controller 100 receives a video signal ImS and a synchronization signal from the outside, for example, from a graphic controller. The video signal ImS includes luminance information of a plurality of pixels PX. The luminance includes a predetermined number of gray scales. The synchronization signal can include a vertical synchronization signal Vsync and a horizontal synchronization signal Hsync.

[0053] The signal controller 100 can classify the video signal ImS in units of frames in accordance with the vertical synchronization signal Vsync, and can classify the video signal ImS in units of scan lines SCL1 to SCLn in accordance with the horizontal synchronization signal Hsync. The signal controller 100 appropriately processes the video signal ImS in accordance with the operating conditions of the display member 600 and the data driver 300 based on the video signal ImS and the synchronization signals, and can generate an image data signal DAT, a first control signal CONT1, a second control signal CONT2, and a third control signal CONT3. The signal controller 100 transmits the first control signal CONT1 to the gate driver 200. The signal controller 100 transmits the second control signal CONT2 and the image data signal DAT to the data driver 300. The signal controller 100 transmits the third control signal CONT3 to the light emission driver 500.

[0054] The display member 600 includes a plurality of scan lines SCL1 to SCLn, a plurality of sensing signal lines SSL1 to SSLn, a plurality of data lines DL1 to DLm, a plurality of reception lines RL1 to RLm, a plurality of light emission lines EML1 to EMLn, and a plurality of pixels PX. The plurality of pixels PX can be connected to the plurality of scan lines SCL1 to SCLn, the plurality of sensing signal lines SSL1 to SSLn, the plurality of data lines DL1 to DLm, the plurality of reception lines RL1 to RLm, and the plurality of light emission lines EML1 to EMLn. The plurality of scan lines SCL1 to SCLn extend approximately in a row direction, and thus can extend substantially in parallel to each other. The plurality of sensing signal lines SSL1 to SSLn extend approximately in a row direction, and thus can extend substantially in parallel to each other. The plurality of data lines DL1 to DLm extend approximately in a column direction, and thus can extend substantially in parallel to each other. The plurality of reception lines RL1 to RLm extend approximately in a column direction, and thus can extend substantially in parallel to each other. The plurality of light emission lines EML1 to EMLn extend approximately in a row direction, and thus can extend substantially in parallel to each other. The display member 600 can correspond to a display region in which an image is displayed. The display region can correspond to a screen in which an image is displayed.

[0055] Although not shown, the display member 600 can be supplied with a first power supply voltage ELVDD (refer to Figure 2 ) and a second power supply voltage ELVSS (refer to Figure 2 ). The first power supply voltage ELVDD can be a voltage supplied to the organic light emitting diode OLED (refer to Figure 2A high-level voltage of an anode of the organic light emitting diode OLED included in each of the plurality of pixels PX can be the first power supply voltage ELVDD. A low-level voltage of a cathode of the organic light emitting diode OLED included in each of the plurality of pixels PX can be the second power supply voltage ELVSS. The first power supply voltage ELVDD and the second power supply voltage ELVSS are driving voltages for light emission of the plurality of pixels PX.

[0056] The gate driver 200 is connected to the plurality of scan lines SCL1 to SCLn and the plurality of sensing signal lines SSL1 to SSLn. The gate driver 200 applies a scan signal to the plurality of scan lines SCL1 to SCLn and applies a sensing signal to the plurality of sensing signal lines SSL1 to SSLn in response to the first control signal CONT1. The scan signal can include a gate-on voltage and a gate-off voltage. The sensing signal can include a gate-on voltage and a gate-off voltage. The gate driver 200 can sequentially apply the scan signal of the gate-on voltage to the plurality of scan lines SCL1 to SCLn. The gate driver 200 can sequentially apply the sensing signal of the gate-on voltage to the plurality of sensing signal lines SSL1 to SSLn.

[0057] The data driver 300 is connected to the plurality of data lines DL1 to DLm, samples and holds the image data signal DAT in response to the second control signal CONT2, and applies a data voltage Vdat (refer to Figure 2 ) to the plurality of data lines DL1 to DLm. The data driver 300 can apply the data voltage Vdat to the plurality of data lines DL1 to DLm in response to the scan signal of the gate-on voltage. Each of the data voltages Vdat can have a value within a predetermined voltage range.

[0058] The compensation circuit part 400 is connected to the plurality of reception lines RL1 to RLm, and receives a current Ipx (refer to Figure 3 ) flowing through the plurality of reception lines RL1 to RLm via the plurality of pixels PX. The compensation circuit part 400 can measure a characteristic of a driving transistor TR1 (refer to Figure 2 ) included in each of the plurality of pixels PX using the received current Ipx. The characteristic of the driving transistor TR1 can include a threshold voltage of the driving transistor TR1. The compensation circuit part 400 can calculate a characteristic deviation between the plurality of driving transistors TR1 included in the plurality of pixels PX using the measured characteristic of the driving transistor TR1. The compensation circuit part 400 can generate a compensation value CV based on the characteristic deviation between the plurality of driving transistors TR1, and provide the compensation value CV to the signal controller 100. The compensation value CV can include a value compensating for a deviation between the driving transistors TR1 included in the plurality of pixels PX.

[0059] The compensation circuit part 400 can generate a compensation value CV by which a deviation of the parasitic capacitance of each of the plurality of reception lines RL1 to RLm is removed by using a calibration factor CP (refer to Figure 3 ) with respect to each of the plurality of reception lines RL1 to RLm, in accordance with the compensation value CV. A method for calibrating the deviation of the parasitic capacitance of the plurality of reception lines RL1 to RLm will be described later.

[0060] The signal controller 100 generates an image data signal DAT by applying the compensation value CV to the video signal ImS, and the data driver 300 can generate a data voltage Vdat in accordance with the image data signal DAT to which the compensation value CV is applied. Since the image data signal DAT is generated by applying the compensation value CV to the video signal ImS, deterioration of image quality due to degradation of the driving transistor TR1 and a deviation between the plurality of driving transistors TR1 can be prevented.

[0061] As described above, a method for receiving a current flowing through the plurality of pixels PX and compensating for degradation of the driving transistor TR1 included in each of the plurality of pixels PX and a deviation between the plurality of driving transistors TR1 based on the received current is referred to as external compensation.

[0062] In Figure 1 , the compensation circuit part 400 is provided separately from the signal controller 100, but according to an exemplary embodiment, the compensation circuit part 400 can be included in the signal controller 100.

[0063] The light emission driver 500 is connected to the plurality of light emission lines EML1 to EMLn. The light emission driver 500 applies a light emission signal to the plurality of light emission lines EML1 to EMLn in response to a third control signal CONT3. The light emission signal can include a gate-on voltage and a gate-off voltage. The light emission driver 500 can sequentially or simultaneously apply the light emission signal of the gate-on voltage to the plurality of light emission lines EML1 to EMLn.

[0064] Figure 2 is a circuit diagram of a pixel according to an exemplary embodiment of the inventive concept. A pixel PX located at an n-th pixel row and an m-th pixel column among the plurality of pixels PX included in the display apparatus will be exemplarily described. Figure 1

[0065] Referring to Figure 2 , the pixel PX includes an organic light emitting diode OLED and a pixel circuit 10.

[0066] ​The pixel circuit 10 is formed to control a current flowing through the organic light emitting diode OLED from the first power voltage ELVDD. The pixel circuit 10 can include a driving transistor TR1, a switching transistor TR2, a sensing transistor TR3, a light emission transistor TR4, and a storage capacitor Cst.

[0067] The driving transistor TR1 includes a gate electrode connected to the first node N1, a first electrode to which the first power voltage ELVDD is applied through the light emission transistor TR4, and a second electrode connected to the second node N2. The driving transistor TR1 is connected between the first power voltage ELVDD and the organic light emitting diode OLED, and controls a current corresponding to a voltage of the first node N1 flowing through the organic light emitting diode OLED from the first power voltage ELVDD.

[0068] The switching transistor TR2 includes a gate electrode connected to the scan line SCLn, a first electrode connected to the data line DLm, and a second electrode connected to the first node N1. The switching transistor TR2 is connected between the data line DLm and the driving transistor TR1. The switching transistor TR2 is turned on by a scan signal of a gate on voltage applied to the scan line SCLn, and thus transmits a data voltage Vdat applied to the data line DLm to the first node N1.

[0069] The sensing transistor TR3 includes a gate electrode connected to the sensing signal line SSLn, a first electrode connected to the second node N2, and a second electrode connected to the reception line RLm. The sensing transistor TR3 is connected between the second electrode of the driving transistor TR1 and the reception line RLm. The sensing transistor TR3 is turned on by a sensing signal of a gate on voltage applied to the sensing signal line SSLn, and thus transmits a current flowing to the organic light emitting diode OLED through the driving transistor TR1 to the reception line RLm. Meanwhile, the reception line RLm can be used as a wiring for transmitting an initialization voltage to the second node N2. When the initialization voltage is applied to the second node N2 through the reception line RLm, an anode voltage of the organic light emitting diode OLED can be initialized.

[0070] The light emission transistor TR4 includes a gate electrode connected to the light emission line EMLn, a first electrode to which the first power voltage ELVDD is applied, and a second electrode connected to the first electrode of the driving transistor TR1. The light emission transistor TR4 is turned on by a light emission signal of a gate on voltage applied to the light emission line EMLn, and thus transmits the first power voltage ELVDD to the first electrode of the driving transistor TR1.

[0071] The drive transistor TR1, the switching transistor TR2, and the sensing transistor TR3 can be N-type transistors, and the light emission transistor TR4 can be a P-type transistor. A gate-on voltage for turning on the N-type transistor is a high-level voltage, and a gate-off voltage for turning off the N-type transistor is a low-level voltage. A gate-on voltage for turning on the P-type transistor is a low-level voltage, and a gate-off voltage for turning off the P-type transistor is a high-level voltage. Depending on exemplary embodiments, at least one of the drive transistor TR1, the switching transistor TR2, and the sensing transistor TR3 can be a P-type transistor, and the light emission transistor TR4 can be an N-type transistor.

[0072] The storage capacitor Cst includes a first electrode connected to the first node N1 and a second electrode connected to the second node N2. The data voltage Vdat is transmitted to the first node N1 through the switching transistor TR2, and the storage capacitor Cst is used to maintain the voltage of the first node N1.

[0073] The organic light emitting diode OLED includes an anode connected to the second node N2 and a cathode to which the second power voltage ELVSS is applied. The organic light emitting diode OLED can emit light having a luminance corresponding to a current supplied from the pixel circuit 10. The organic light emitting diode OLED can emit light of one of primary colors or white light. The primary colors exemplarily include three primary colors of red, green, and blue. Alternatively, the primary colors can include yellow, cyan, and magenta.

[0074] During the external compensation, the scan signal of the gate-on voltage is applied to the scan line SCLn, the data voltage Vdat of a predetermined level is applied to the data line DLm, and the light emission signal of the gate-on voltage is applied to the light emission line EMLn. The data voltage Vdat of a predetermined level is applied to the gate electrode of the drive transistor TR1, and a current flows from the first power voltage ELVDD to the organic light emitting diode OLED through the drive transistor TR1. In this case, the sensing signal of the gate-on voltage is applied to the sensing signal line SSLn, and thus the current flowing to the organic light emitting diode OLED can be transmitted to the compensation circuit part 400 through the sensing transistor TR3.

[0075] Hereinafter, a configuration and a method for compensating for variations of parasitic capacitances of a plurality of reception lines RL1 to RLm will be described with reference to Figures 3 to 10 FIGS. 1 to 6.

[0076] Figure 3 is a block diagram of a compensation circuit part according to an exemplary embodiment of the inventive concept. Figure 4 is a circuit diagram of a sensing data generator according to an exemplary embodiment of the inventive concept. Figure 5Factor detection region according to an exemplary embodiment of the present inventive concept. Figure 6 is a graph showing average first sensing data in a factor detection region with respect to a reception line according to an exemplary embodiment of the present inventive concept. Figure 7 is a graph showing average second sensing data in a factor detection region with respect to a reception line according to an exemplary embodiment of the present inventive concept. Figure 8 is a graph showing a calibration factor with respect to a reception line according to an exemplary embodiment of the present inventive concept. Figure 9 A look-up table included in a calibration factor generator according to an exemplary embodiment of the present inventive concept is exemplarily shown. Figure 10 is a schematic diagram of a method for calculating compensation values with respect to a plurality of pixels by a calibration operation part according to an exemplary embodiment of the present inventive concept.

[0077] Referring to Figure 3 and Figure 4 , the compensation circuit part 400 includes a sensing data generator 410, a calibration factor generator 420, and a calibration operation part 430.

[0078] The sensing data generator 410 includes a plurality of sensing data generation circuits 450 connected to a plurality of reception lines RL1 to RLm, respectively. The plurality of sensing data generation circuits 450 receive a current Ipx flowing through the plurality of reception lines RL1 to RLm via a plurality of pixels PX connected to the plurality of sensing data generation circuits 450, and output first sensing data SD1 and second sensing data SD2. The sensing data generator 410 can transmit the first sensing data SD1 to the calibration factor generator 420 and the calibration operation part 430. The sensing data generator 410 can transmit the second sensing data SD2 to the calibration factor generator 420.

[0079] Figure 4 A sensing data generation circuit 450 connected to one of the plurality of reception lines RL1 to RLm is exemplarily shown. The sensing data generation circuit 450 receives a current Ipx flowing through a reception line RL via a pixel PX connected to the reception line RL. The reception line RL has a parasitic capacitor Cp. The parasitic capacitors Cp of the plurality of reception lines RL1 to RLm can be different from each other due to process errors.

[0080] The sensing data generation circuit 450 can include a plurality of switches SW1, SW2, SW3, SW4, SW5, SW6, and SW7, a plurality of capacitors C1, C2, and C3, an operational amplifier OP, and an analog-to-digital converter ADC.

[0081] The operational amplifier OP includes a first input terminal +, a second input terminal -, and an output terminal. The first switch SW1 and the second switch SW2 are connected in parallel. One end of the first switch SW1 and one end of the second switch SW2 are connected to the reception line RL.

[0082] The first switch SW1 transmits the current Ipx of the reception line RL to the analog-digital converter ADC without passing through the operational amplifier OP. The fifth switch SW5 and the sixth switch SW6 are connected between the first switch SW1 and the analog-digital converter ADC, and the current Ipx of the reception line RL can be directly transmitted to the analog-digital converter ADC through the first switch SW1, the fifth switch SW5, and the sixth switch SW6. The current Ipx transmitted without passing through the operational amplifier OP can be converted into the first sensing data SD1 by the analog-digital converter ADC.

[0083] The second switch SW2 transmits the current Ipx of the reception line RL to the second input terminal - of the operational amplifier OP. The reference voltage VR is applied to the first input terminal + of the operational amplifier OP. The third switch SW3 is connected between the second input terminal - and the output terminal of the operational amplifier OP. The first capacitor C1 is connected between the second input terminal - and the output terminal of the operational amplifier OP. The fourth switch SW4 is connected between the output terminal of the operational amplifier OP and the fifth switch SW5. The voltage output to the output terminal of the operational amplifier OP can be converted into the second sensing data SD2 by the analog-digital converter ADC.

[0084] The second capacitor C2 can include a first electrode connected between the fifth switch SW5 and the sixth switch SW6 and a second electrode connected to the ground. The third capacitor C3 can include a first electrode connected between the sixth switch SW6 and the analog-digital converter ADC and a second electrode connected to the ground. The seventh switch SW7 can be connected between the first electrode of the third capacitor C3 and the ground. The second capacitor C2 and the third capacitor C3 can be charged with the current Ipx transmitted through the first switch SW1 or the output voltage of the operational amplifier OP. The sixth switch SW6 can perform a function of separating the charging of the second capacitor C2 and the charging of the third capacitor C3 in time. The seventh switch SW7 can perform a function of discharging the voltage charged in the second capacitor C2 or the third capacitor C3.

[0085] The first sensing data SD1 generated from the sensing data generation circuit 450 can be transmitted to the calibration factor generator 420 and the calibration operation part 430. The second sensing data SD2 generated from the sensing data generation circuit 450 can be transmitted to the calibration factor generator 420.

[0086] The calibration factor generator 420 can receive a plurality of first sensing data SD1 about the plurality of reception lines RL1 to RLm and a plurality of second sensing data SD2 about the plurality of reception lines RL1 to RLm from a plurality of sensing data generation circuits 450 connected to the plurality of reception lines RL1 to RLm.

[0087] The calibration operation section 430 can receive a plurality of first sensing data SD1 about the plurality of reception lines RL1 to RLm from a plurality of sensing data generation circuits 450 connected to the plurality of reception lines RL1 to RLm.

[0088] The calibration factor generator 420 can generate a calibration factor CP by using the plurality of first sensing data SD1 about the plurality of reception lines RL1 to RLm and the plurality of second sensing data SD2 about the plurality of reception lines RL1 to RLm. The calibration factor generator 420 can store the generated calibration factor CP. The calibration factor CP can include a plurality of line calibration factors CP1 to CPm corresponding to the plurality of reception lines RL1 to RLm. The plurality of line calibration factors CP1 to CPm can be respectively calculated by Equation 1.

[0089] (Equation 1)

[0090]

[0091] Here, CPx denotes a line calibration factor corresponding to an x-th reception line, SD1x denotes average first sensing data about the x-th reception line, and SD2x is average second sensing data about the x-th reception line. x is 1 or more and m or less. m can correspond to the number of reception lines RL1 to RLm included in the display section 600.

[0092] The average first sensing data SD1x can be acquired by averaging the first sensing data SD1 corresponding to a certain region (i.e., a preset region) in the display region. The average second sensing data SD2x can be acquired by averaging the second sensing data SD2 corresponding to the region.

[0093] As Figure 5 exemplarily shown in FIG. 6, a factor detection region A corresponding to a certain region can be selected in the display section 600. The factor detection region A can be a region including one or more scan lines among a plurality of scan lines SCL1 to SCLn. The factor detection region A can include a plurality of pixels PX connected to the included scan line(s).

[0094] The calibration factor generator 420 can generate average first sensing data SD1x by averaging the first sensing data SD1 corresponding to the factor detection region A for each of the reception lines RL1 to RLm. The calibration factor generator 420 can generate average second sensing data SD2x by averaging the second sensing data SD2 corresponding to the factor detection region A for each of the reception lines RL1 to RLm.

[0095] As exemplarily shown in FIG. 10A, a deviation DIFF according to the reception lines RL1 to RLm exists in the average first sensing data SD1x of the factor detection region A. The first sensing data SD1 is generated without passing through the operational amplifier OP, and thus the output time of the first sensing data SD1 is short and the signal-to-noise ratio (SNR) is high. On the other hand, the parasitic capacitance of the reception lines RL1 to RLm is included in the first sensing data SD1. The deviation DIFF according to the reception lines RL1 to RLm existing in the average first sensing data SD1x can be caused by a deviation in the parasitic capacitance of the reception lines RL1 to RLm. Figure 6 As exemplarily shown in FIG. 10B, the average second sensing data SD2x of the factor detection region A can have an almost constant value regardless of the reception lines RL1 to RLm. Since the second sensing data SD2 is generated by passing through the operational amplifier OP, the output time of the second sensing data SD2 is long and the signal-to-noise ratio (SNR) is low. On the other hand, the parasitic capacitance of the reception lines RL1 to RLm is not included in the second sensing data SD2.

[0096] Figure 7 As exemplarily shown in FIG. 10C, a calibration factor CP with respect to the reception lines RL1 to RLm can be generated. The calibration factor CP can include line calibration factors CP1 to CPm corresponding to the plurality of reception lines RL1 to RLm, respectively.

[0097] As exemplarily shown in FIG. 10D, the calibration factor CP with respect to the reception lines RL1 to RLm can be generated. The calibration factor CP can include line calibration factors CP1 to CPm corresponding to the plurality of reception lines RL1 to RLm, respectively. Figure 8 As exemplarily shown in FIG. 10E, the plurality of line calibration factors CP1 to CPm corresponding to the plurality of reception lines RL1 to RLm can be stored in the calibration factor generator 420 as a look-up table LUT. For example, as exemplarily shown in FIG. 10E, the line calibration factors CP1 to CPm corresponding to the reception lines RL1 to RLm, respectively, can be stored in the calibration factor generator 420 as a look-up table LUT.

[0098] As exemplarily shown in FIG. 10F, the calibration factor generator 420 can transmit the calibration factor CP to the calibration operation part 430. That is, the calibration factor generator 420 can transmit the line calibration factors CP1 to CPm corresponding to the plurality of reception lines RL1 to RLm, respectively, to the calibration operation part 430.

[0099] Figure 9 As exemplarily shown in FIG. 10G, the calibration operation part 430 can generate a calibration factor CP1 for the reception line RL1 by using the line calibration factor CP1 corresponding to the reception line RL1. The calibration operation part 430 can generate a calibration factor CP2 for the reception line RL2 by using the line calibration factor CP2 corresponding to the reception line RL2. The calibration operation part 430 can generate a calibration factor CPm for the reception line RLm by using the line calibration factor CPm corresponding to the reception line RLm. Figure 9 ​​As shown in FIG. 6, the look-up table LUT includes line calibration factors CP1, CP2, …, CPm corresponding to the reception lines RL1, RL2, …, RLm, respectively. The calibration factor generator 420 can transmit the line calibration factors CP1 to CPm stored in the look-up table LUT to the calibration operation part 430.

[0100] Meanwhile, in the manufacturing process of the display device, the look-up table LUT including the calibration factors CP can be pre-stored in the calibration factor generator 420. In this case, in the display device, the sensing data generator 410 includes only the analog-digital converter ADC and thus the first sensing data SD1 is transmitted only to the calibration operation part 430, and the configuration of generating the second sensing data SD2 can be omitted.

[0101] The calibration operation part 430 generates a compensation value CV with respect to each of the plurality of pixels PX included in the display part 600 by using the first sensing data SD1 and the calibration factor CP.

[0102] As Figure 10 As exemplarily shown in FIG. 6, the calibration operation part 430 can generate the compensation value CV with respect to each of the plurality of pixels PX by multiplying the first sensing data SD1 with respect to each of the plurality of pixels PX included in the display part 600 by the calibration factor CP corresponding to the position of the corresponding pixel PX in the row direction.

[0103] That is, the compensation value CV can be calculated by Equation 2.

[0104] (Equation 2)

[0105] CVx,y = SD1x,y x CPx

[0106] Here, CVx,y is a compensation value with respect to a pixel PX connected to the x-th scan line and the y-th data line, SD1x,y is first sensing data with respect to a pixel PX connected to the x-th scan line (or the x-th reception line) and the y-th data line, and CPx is a line calibration factor corresponding to the x-th reception line. x is 1 or more and m or less, and y is 1 or more and n or less. m can correspond to the number of the reception lines RL1 to RLm included in the display part 600, and n can correspond to the number of the scan lines SCL1 to SCLn included in the display part 600.

[0107] The parasitic capacitance of the reception lines RL1 to RLm included in the first sensing data SD1 can be removed by multiplying the first sensing data SD1 for each of the plurality of pixels PX by the calibration factor CP corresponding to the position of the pixel PX. Because the deviation of the parasitic capacitance between the reception lines RL1 to RLm occurs due to the reception lines RL1 to RLm, the same calibration factor CP can be applied to the pixels PX connected to the same reception line RL1 to RLm regardless of the position in the column direction of the pixel PX. The compensation value CV includes the sensing data from which the deviation of the parasitic capacitance of the reception lines RL1 to RLm is removed.

[0108] Because the compensation value CV is generated by multiplying the first sensing data SD1 having a short output time and a high signal-to-noise ratio by the calibration factor CP, the compensation value CV having a high signal-to-noise ratio can be generated. Because the external compensation is performed by using such a compensation value CV, the compensation error due to the deviation of the parasitic capacitance of the reception lines RL1 to RLm can be eliminated. Therefore, more accurate external compensation can be performed.

[0109] Previously, an exemplary embodiment in which one factor detection region A is selected in the display member 600 was described in Figure 5 Depending on the exemplary embodiment, a plurality of regions can be selected as the factor detection region A in the display member 600. This will be described with reference to Figure 11 .

[0110] Figure 11 is a factor detection region according to another exemplary embodiment of the present inventive concept.

[0111] Referring to Figure 11 , a plurality of factor detection regions Al, A2, and A3 can be selected in the display member 600. The plurality of factor detection regions Al, A2, and A3 can be spaced apart from each other in the column direction. Each of the plurality of factor detection regions Al, A2, and A3 can be a region including one or more scan lines. Each of the plurality of factor detection regions Al, A2, and A3 can include a plurality of pixels PX connected to the included scan lines.

[0112] The calibration factor generator 420 receives the first sensing data SD1 corresponding to the first factor detection region Al, the first sensing data SD1 corresponding to the second factor detection region A2, and the first sensing data SD1 corresponding to the third factor detection region A3. The calibration factor generator 420 can generate the average first sensing data SD1x for each of the reception lines RL1 to RLm by averaging the first sensing data SD1 corresponding to the plurality of factor detection regions Al, A2, and A3 for each of the reception lines RL1 to RLm. Alternatively, the calibration factor generator 420 can generate the average first sensing data SD1x for each of the reception lines RL1 to RLm by calculating the average first sensing data SD1x in each of the plurality of factor detection regions Al, A2, and A3 and performing filtering on the average first sensing data SD1x in each of the plurality of factor detection regions Al, A2, and A3 using, for example, a median filter.

[0113] In addition, the calibration factor generator 420 receives the second sensing data SD2 corresponding to the first factor detection region Al, the second sensing data SD2 corresponding to the second factor detection region A2, and the second sensing data SD2 corresponding to the third factor detection region A3. The calibration factor generator 420 can generate the average second sensing data SD2x for each of the reception lines RL1 to RLm by averaging the second sensing data SD2 corresponding to the plurality of factor detection regions Al, A2, and A3 for each of the reception lines RL1 to RLm. Alternatively, the calibration factor generator 420 can generate the average second sensing data SD2x for each of the reception lines RL1 to RLm by calculating the average second sensing data SD2x in each of the plurality of factor detection regions Al, A2, and A3 and performing filtering on the average second sensing data SD2x in each of the plurality of factor detection regions Al, A2, and A3 using, for example, a median filter.

[0114] The calibration factor generator 420 can calculate the calibration factor CP' including the plurality of line calibration factors CP1' to CPm' by applying the generated average first sensing data SD1x and the generated average second sensing data SD2x to Equation 1.

[0115] The accuracy of the calibration factor CP can be improved by using the first sensing data SD1 and the second sensing data SD2 of the plurality of factor detection regions Al, A2, and A3.

[0116] Meanwhile, noise can be included in the first sensing data SD1 and the second sensing data SD2. Due to the noise included in the first sensing data SD1 and the second sensing data SD2, the calibration factor CP can also include noise. When noise is included in the calibration factor CP, the accuracy of the calibration factor CP can decrease. In order to improve the accuracy of the calibration factor CP, it is necessary to remove noise from the first sensing data SD1 and the second sensing data SD2, and this will be described with reference to Figure 12 and Figure 13 are explained.

[0117] Figure 12 is a block diagram of a compensation circuit part according to another exemplary embodiment of the inventive concept. Figure 13 is a graph showing a calibration factor before being filtered by a filter of Figure 12 .

[0118] With reference to Figure 12 and Figure 13 , the compensation circuit part 400 can further include a filter 440. The filter 440 is connected between the calibration factor generator 420 and the calibration operation part 430.

[0119] The filter 440 receives the calibration factor CP' from the calibration factor generator 420, noise being included in the calibration factor CP'. As exemplarily shown in Figure 13 , the calibration factor CP' including noise can be generated in a form of a mixture of low frequencies and high frequencies.

[0120] The filter 440 can be a low-pass filter, and can remove high frequency components from the calibration factor CP' including noise. The high frequency components correspond to noise generated in a process of generating the first sensing data SD1 and the second sensing data SD2. As exemplarily shown in Figure 8 , the calibration factor CP from which noise is removed can consist of only low frequency components.

[0121] The filter 440 can transmit the calibration factor CP from which noise is removed to the calibration operation part 430. The calibration factor CP from which noise is removed can be generated as a look-up table LUT as exemplarily shown in Figure 9 .

[0122] Except for such differences, the features of the exemplary embodiments described with reference to Figures 1 to 11 may be applied to the exemplary embodiments described with reference to Figure 12 and Figure 13 , and thus the features which are duplicated will not be further described.

[0123] While the inventive concept has been described in connection with the exemplary embodiments currently considered to be the most practical and preferred, it is to be understood that the inventive concept is not to be limited to the disclosed embodiments, but on the contrary, is intended to cover various modifications and equivalent arrangements. Therefore, it will be appreciated that the various modifications can be made and other equivalent embodiments can be derived from the teaching without departing from the true spirit of the inventive concept. The scope of the inventive concept is to be defined by the claims appended hereto.

Claims

1. A display device, wherein, The display device includes: a plurality of pixels; a plurality of scan lines extending in a row direction and connected to the plurality of pixels; a plurality of data lines extending in a column direction and connected to the plurality of pixels; a plurality of reception lines extending in the column direction and connected to the plurality of pixels; and a compensation circuit component connected to the plurality of reception lines, wherein the compensation circuit component includes: a plurality of sensing data generation circuits each including an analog-digital converter and an operational amplifier, a current flowing through a reception line being converted into first sensing data by the analog-digital converter, the current flowing through the reception line being converted into second sensing data by the operational amplifier and the analog-digital converter; a calibration factor generator receiving the first sensing data and the second sensing data and generating a calibration factor corresponding to a position of each of the plurality of pixels; and a calibration operation component receiving the first sensing data and generating a compensation value compensating for a characteristic of a driving transistor included in each of the plurality of pixels, wherein the calibration factor includes a plurality of line calibration factors corresponding to the plurality of reception lines, and wherein any one of the plurality of line calibration factors includes a ratio of average second sensing data to average first sensing data with respect to the reception line.

2. The display device according to claim 1, wherein The average first sensing data includes a value averaged for first sensing data corresponding to a factor detection area for each of the reception lines, the factor detection area corresponding to a preset area of the display device including the plurality of pixels.

3. The display device according to claim 2, wherein The average second sensing data includes a value averaged for second sensing data corresponding to the factor detection area for each of the reception lines.

4. The display device according to claim 3, wherein The factor detection area includes one or more scan lines among the plurality of scan lines and a plurality of pixels connected to the one or more scan lines included in the factor detection area.

5. The display device according to claim 3, wherein The factor detection area includes a plurality of areas spaced apart from each other in the column direction.

6. The display device according to claim 1, wherein The compensation circuit component includes a look-up table including the plurality of line calibration factors corresponding to the plurality of reception lines.

7. The display device according to claim 1, wherein The compensation circuit component includes a filter removing noise included in the calibration factor.

8. The display device of claim 7, wherein, The filter includes a low-pass filter.

9. A display device, wherein, The display device includes: a sensing data generator including a plurality of sensing data generation circuits each connected to a reception line of a plurality of pixels, including an analog-digital converter and an operational amplifier, receiving a current flowing through a plurality of reception lines via a plurality of pixels connected to the plurality of reception lines, converting the current into first sensing data by using the analog-digital converter, and converting the current into second sensing data by using the operational amplifier and the analog-digital converter; a calibration factor generator connected to the plurality of sensing data generation circuits, generating average first sensing data by averaging the first sensing data for each of the reception lines, generating average second sensing data by averaging the second sensing data for each of the reception lines, and calculating a calibration factor that is a ratio of the average second sensing data to the average first sensing data for each of the reception lines; and a calibration operation member that generates a compensation value by multiplying the first sensing data by a calibration factor corresponding to a position of each of the plurality of pixels, the compensation value compensating for a characteristic of a drive transistor included in each of the plurality of pixels.

10. The display device of claim 9, wherein, The display device further includes a filter connected between the calibration factor generator and the calibration operation member, and removes noise included in the calibration factor by using a low-pass filter.

11. A method for driving a display device, wherein, The method includes: receiving a current flowing through a plurality of reception lines via a plurality of pixels connected to the plurality of reception lines; converting the current into first sensing data by using a plurality of sensing data generation circuits, each of the plurality of sensing data generation circuits including an analog-digital converter; converting the current into second sensing data by an operational amplifier and the analog-digital converter included in each of the plurality of sensing data generation circuits; generating average first sensing data by averaging the first sensing data for each of the plurality of reception lines; generating average second sensing data by averaging the second sensing data for each of the plurality of reception lines; calculating a calibration factor that is a ratio of the average second sensing data to the average first sensing data with respect to the reception lines; and generating a plurality of compensation values by multiplying the first sensing data by a calibration factor corresponding to each of the plurality of pixels, each of the plurality of compensation values compensating for a characteristic of a drive transistor included in each of the plurality of pixels, wherein the calibration factor includes a plurality of line calibration factors corresponding to the plurality of reception lines.

12. A method for driving a display device according to claim 11, wherein, The method further includes storing the plurality of line calibration factors corresponding to the plurality of reception lines as a look-up table.

13. The method for driving a display device according to claim 11, wherein, The method further includes removing noise included in the calibration factor by using a low-pass filter.

14. The method for driving a display device according to claim 11, wherein, The average first sensing data is generated by averaging first sensing data corresponding to a factor detection area for each of the reception lines, the factor detection area corresponding to a preset area of the display device including the plurality of pixels.

15. A method for driving a display device according to claim 14, wherein, The average second sensing data is generated by averaging second sensing data corresponding to the factor detection area for each of the reception lines.

16. A method for driving a display device according to claim 15, wherein, The factor detection area includes one or more scan lines among a plurality of scan lines connected to the plurality of pixels and a plurality of pixels connected to the scan lines included in the factor detection area.

17. The method for driving a display device according to claim 15, wherein, The factor detection area includes a plurality of areas spaced apart from each other in a column direction. The factor detection area includes a plurality of areas spaced apart from each other in a column direction.

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