Semiconductor structure and preheating method thereof

Abstract

A semiconductor structure and a preheating method thereof, wherein the semiconductor structure comprises: a memory chip; a temperature detection unit for detecting the temperature of the memory chip before the memory chip is started; and a control chip for heating the memory chip before the memory chip is started, and determining whether the temperature detected by the temperature detection unit reaches a set threshold value, and if the temperature reaches the set threshold value, controlling the memory chip to start. When the semiconductor structure of the present invention works in a low temperature environment, the memory chip can be heated to the set threshold value by the control chip, thereby preventing the bit line, word line, and metal connection (metal contact part) in the memory chip from increasing in resistance due to the low ambient temperature, thereby reducing the writing time when writing data to the memory in a low temperature environment, and improving the stability of memory writing.

Description

Technical Field

[0001] The present invention relates to the field of memory, and in particular to a semiconductor structure and a preheating method thereof. Background Art

[0002] Dynamic Random Access Memory (DRAM) is a semiconductor memory device commonly used in computers. Its storage array area consists of many repeated storage cells. Each storage cell usually includes a capacitor and a transistor. The gate of the transistor is connected to the word line, the drain is connected to the bit line, and the source is connected to the capacitor. The voltage signal on the word line can control the opening or closing of the transistor, and then read the data information stored in the capacitor through the bit line, or write the data information into the capacitor through the bit line for storage.

[0003] Currently, when writing to a memory in a low-temperature environment, there is a problem that the writing time is long and the writing stability still needs to be improved. Summary of the invention

[0004] The technical problem to be solved by the present invention is how to reduce the writing time when writing data to a memory in a low-temperature environment and improve the writing stability.

[0005] To this end, the present invention provides a semiconductor structure, comprising:

[0006] Memory chips;

[0007] A temperature detection unit, used for detecting the temperature of the memory chip before the memory chip is started;

[0008] The control chip is used to heat the memory chip before the memory chip is started, and to determine whether the temperature detected by the temperature detection unit reaches a set threshold value. If the temperature reaches the set threshold value, the memory chip is controlled to start.

[0009] Optionally, the number of the memory chips is 1 or greater than or equal to 2. When the number of the memory chips is greater than or equal to 2, several memory chips are stacked upward in sequence.

[0010] Optionally, the storage chip is located on the control chip, and the storage chip is electrically connected to the control chip.

[0011] Optionally, it further includes a circuit substrate having connecting circuits, the circuit substrate having connecting circuits, the memory chip and the control chip are both located on the circuit substrate, and the memory chip and the control chip are connected via the connecting circuits in the circuit substrate.

[0012] Optionally, the temperature detection unit is electrically connected to the control chip, the number of the temperature detection units is 1 or greater than or equal to 2, and the temperature detection unit is located in the control chip or in the memory chip, or on a circuit substrate between the memory chip and the control chip.

[0013] Optionally, when the number of the temperature detection unit is one, when the control chip determines that the temperature detected by the one temperature detection unit reaches a set threshold, all the storage chips are controlled to start.

[0014] Optionally, when the number of the temperature detection units is 1 and the number of the storage chips is greater than or equal to 2, when the control chip determines that the temperature of the 1 temperature detection unit reaches a set threshold, it first controls the storage chip closest to the control chip to start, and then controls the other storage chips above to start in sequence.

[0015] Optionally, when the number of the temperature detection units is greater than or equal to 2, and the number of the storage chips is greater than or equal to 2, each storage chip has a temperature detection unit, and the control chip determines in turn whether the temperatures detected by all the temperature detection units reach a set threshold. If the temperature detected by a certain temperature detection unit reaches the set threshold, the storage chip corresponding to the temperature detection unit is controlled to start.

[0016] Optionally, after the control chip controls the storage chip to start up, the control chip also controls the storage chip to perform write, read and erase operations.

[0017] Optionally, before the control chip heats the storage chip, the control chip is first started, and the control chip heats the storage chip using the heat generated by itself after starting.

[0018] Optionally, the control chip has an additional heating circuit for heating the storage chip.

[0019] Optionally, before or after heating the memory chip, the control chip determines whether the temperature of the memory chip detected by the temperature detection unit reaches a set threshold value; if it does not reach the set threshold value, the control chip controls the heating circuit to heat the memory chip; if it reaches the set threshold value, the control chip controls the heating circuit to stop heating the memory chip.

[0020] Optionally, the memory chip is a DRAM memory chip.

[0021] The present invention also provides a method for preheating a semiconductor structure, comprising:

[0022] Provide a semiconductor structure, the semiconductor structure comprising a memory chip, a control chip electrically connected to the memory chip, and a temperature detection unit;

[0023] Start control chip;

[0024] Heating the unactivated memory chip by controlling the chip;

[0025] Detecting the temperature of the memory chip by a temperature detection unit;

[0026] The control chip determines whether the temperature detected by the temperature detection unit reaches a set threshold value, and if the temperature reaches the set threshold value, the storage chip is controlled to start.

[0027] Optionally, the number of the temperature detection units is 1 or greater than or equal to 2, and the number of the memory chips is 1 or greater than or equal to 2. When the number of the memory chips is greater than or equal to 2, several memory chips are stacked upward in sequence.

[0028] Optionally, when the number of the temperature detection unit is one, when the control chip determines that the temperature detected by the one temperature detection unit reaches a set threshold, all the storage chips are controlled to start.

[0029] Optionally, when the number of the temperature detection units is 1 and the number of the storage chips is greater than or equal to 2, when the control chip determines that the temperature of the 1 temperature detection unit reaches a set threshold, it first controls the storage chip closest to the control chip to start, and then controls the other storage chips above to start in sequence.

[0030] Optionally, when the number of the temperature detection units is greater than or equal to 2, and the number of the storage chips is greater than or equal to 2, each storage chip has a temperature detection unit, and the control chip determines in turn whether the temperatures detected by all the temperature detection units reach a set threshold. If the temperature detected by a certain temperature detection unit reaches the set threshold, the storage chip corresponding to the temperature detection unit is controlled to start.

[0031] Optionally, after the control chip controls the storage chip to start up, the control chip also controls the storage chip to perform write, read and erase operations.

[0032] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0033] The semiconductor structure of the present invention comprises: a memory chip; a temperature detection unit for detecting the temperature of the memory chip before the memory chip is started; and a control chip for heating the memory chip before the memory chip is started, and judging whether the temperature detected by the temperature detection unit reaches a set threshold value, and if the set threshold value is reached, the memory chip is controlled to start. Through the cooperation of the control chip and the temperature detection unit, the control chip heats the memory chip before the memory chip is started, the temperature detection unit detects the temperature of the memory chip before the memory chip is started, and the control chip judges whether the temperature detected by the temperature detection unit reaches a set threshold value, and if the set threshold value is reached, the memory chip is controlled to start. Therefore, when the semiconductor structure of the present invention works in a low temperature environment, the control chip can make the memory chip heat up to the set threshold value through the control chip, so as to prevent the bit line, word line, and metal connection (metal contact part) in the memory chip from increasing in resistance due to the low ambient temperature, thereby reducing the writing time when writing data to the memory in a low temperature environment, and improving the stability of memory writing.

[0034] Furthermore, the number of the temperature detection unit is 1. Specifically, the temperature precision measurement unit can be located in the control chip, or the temperature detection unit can be located in the memory chip, or the temperature detection unit can be located on the circuit substrate between the memory chip and the control chip. When the control chip determines that the temperature detected by the temperature detection unit reaches the set threshold, it controls all the memory chips to start. When there are multiple memory chips in the semiconductor structure, the aforementioned control structure and control method are relatively simple, and can reduce the writing time when writing data to the memory chip in a low temperature environment, thereby improving the writing stability of the memory chip.

[0035] Furthermore, when the number of the temperature detection units is 1 and the number of the memory chips is greater than or equal to 2, when the control chip determines that the temperature of the 1 temperature detection unit reaches the set threshold, the memory chip closest to the control chip is first controlled to start, and then the other memory chips above are controlled to start in sequence. When there are multiple memory chips in the semiconductor structure, the aforementioned control structure and control method can enable each memory chip to start after reaching the set threshold temperature, thereby improving the accuracy of the startup timing of each memory chip, and reducing the writing time when writing data to each memory chip in a low temperature environment, thereby improving the stability of writing to each memory chip.

[0036] Furthermore, when the number of the temperature detection units is greater than or equal to 2, and the number of the memory chips is greater than or equal to 2, each memory chip has a temperature detection unit, and the control chip sequentially determines whether the temperature detected by all the temperature detection units reaches the set threshold value, if the temperature detected by a certain temperature detection unit reaches the set threshold value, the memory chip corresponding to the temperature detection unit is controlled to start. When there are multiple memory chips in the semiconductor structure, the aforementioned control structure and control method can further improve the accuracy of the startup timing of each memory chip, and can further reduce the writing time when writing data to each memory chip in a low temperature environment, and further improve the stability of writing to each memory chip.

[0037] Furthermore, before the control chip heats the memory chip, the control chip is first started, and the control chip heats the memory chip using the heat generated by itself after starting, without the need for an additional heating circuit, thereby simplifying the structure of the semiconductor structure.

[0038] Furthermore, the control chip may have an additional heating circuit for heating the memory chip. Before or after the control chip heats the memory chip, the control chip determines whether the temperature of the memory chip detected by the temperature detection unit reaches a set threshold. If it does not reach the set threshold, the control chip controls the heating circuit to heat the memory chip. If it reaches the set threshold, the control chip controls the heating circuit to stop heating the memory chip. This achieves precise control of the heating process, so that the temperature of the memory chip can be kept near the set threshold, preventing the temperature of the memory chip from being too high or too low, so that the writing time to the memory can always be kept short.

[0039] The method for preheating a semiconductor structure of the present invention is as follows: before the memory chip is started, the unstarted memory chip is heated by a control chip; the temperature of the memory chip is detected by a temperature detection unit; the control chip determines whether the temperature detected by the temperature detection unit reaches a set threshold value, and if the temperature reaches the set threshold value, the memory chip is controlled to start. Therefore, when the semiconductor structure of the present invention works in a low temperature environment, the control chip can make the memory chip heat up to the set threshold value, thereby preventing the bit line, word line, and metal connection (metal contact part) in the memory chip from increasing in resistance due to the low ambient temperature, thereby reducing the writing time when writing data to the memory in a low temperature environment, and improving the stability of memory writing. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1-7 A schematic diagram of a semiconductor structure according to an embodiment of the present invention;

[0041] Figure 8 Schematic diagram of the process of preheating a semiconductor structure in an embodiment of the present invention. DETAILED DESCRIPTION

[0042] As mentioned in the background art, when writing to a memory in a low-temperature environment, there is a problem that the writing time is long and the writing stability still needs to be improved.

[0043] Research has found that when existing memories operate in a low-temperature environment, the temperature drop will increase the resistance of the bit lines, word lines, and metal connections (metal contacts) in the memory. The increase in resistance will change or lengthen the time it takes to write data to the memory, affecting the stability of memory writing.

[0044] To this end, the present invention provides a semiconductor structure and a preheating method thereof, wherein the semiconductor structure includes: a memory chip; a temperature detection unit, which is used to detect the temperature of the memory chip before the memory chip is started; and a control chip, which is used to heat the memory chip before the memory chip is started, and judge whether the temperature detected by the temperature detection unit reaches a set threshold, and if it reaches the set threshold, control the memory chip to start. Through the cooperation of the control chip and the temperature detection unit, the control chip heats the memory chip before the memory chip is started, the temperature detection unit detects the temperature of the memory chip before the memory chip is started, and the control chip judges whether the temperature detected by the temperature detection unit reaches a set threshold, and if it reaches the set threshold, control the memory chip to start. Therefore, when the semiconductor structure of the present invention works in a low temperature environment, the control chip can make the memory chip heat up to the set threshold through the control chip, so as to prevent the bit line, word line, and metal connection (metal contact part) in the memory chip from increasing in resistance due to the low ambient temperature, thereby reducing the writing time when writing data to the memory in a low temperature environment, and improving the stability of memory writing.

[0045] In order to make the above-mentioned objects, features and advantages of the present invention more clearly understood, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. When describing the embodiments of the present invention in detail, for the sake of convenience, the schematic diagrams will not be partially enlarged according to the general proportion, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0046] Figure 1-7 A schematic diagram of a semiconductor structure according to an embodiment of the present invention; Figure 8 Schematic diagram of the process of preheating a semiconductor structure in an embodiment of the present invention.

[0047] refer to Figure 1 , an embodiment of the present invention provides a semiconductor structure, including:

[0048] Memory chip 201;

[0049] A temperature detection unit 203, used to detect the temperature of the memory chip 201 before the memory chip 201 is started;

[0050] The control chip 301 is used to heat the memory chip 201 before the memory chip 201 is started, and to determine whether the temperature detected by the temperature detection unit 203 reaches a set threshold. If the temperature reaches the set threshold, the memory chip 201 is controlled to start.

[0051] The memory chip 201 is an existing memory capable of writing, reading and / or deleting data. The memory chip 201 is formed by a semiconductor integrated manufacturing process. Specifically, the memory chip 201 may include a memory array and a peripheral circuit connected to the memory array. The memory array includes a number of memory cells and bit lines, word lines, and metal connections (metal contacts) connected to the memory cells. The memory cells are used to store data, and the peripheral circuits are related circuits when operating the memory array. In this embodiment, the memory chip 201 is a DRAM memory chip, which includes a number of memory cells. The memory cells generally include capacitors and transistors. The gate of the transistor is connected to the word line, the drain is connected to the bit line, and the source is connected to the capacitor. In other embodiments, the memory chip 201 may be other types of memory chips.

[0052] The number of the memory chip 201 is at least one. Specifically, the number of the memory chips 201 may be 1 or greater than or equal to 2. When the number of the memory chips is greater than or equal to 2, a plurality of memory chips are stacked upward in sequence to form a memory chip stacking structure. Figure 2 , taking the number of the memory chips 201 as 4 as an example, the 4 memory chips 201 are stacked in sequence from bottom to top to form a memory chip stacking structure, and adjacent memory chips 201 are bonded together by a bonding process or an adhesive process. In one embodiment, a through silicon via interconnect structure (TSV) is formed in the memory chip 201, and the memory chip 201 is electrically connected to the control chip 301 through the through silicon via interconnect structure (TSV). When there are multiple memory chips 201 stacked, each memory chip 201 can be connected to the control chip 201 through a different through silicon via interconnect structure (TSV). In other embodiments, the memory chip 201 can also be connected to the control chip 301 through a metal wire (formed by a wire bonding process).

[0053] In this embodiment, the memory chip 201 is located on the control chip 301, and the memory chip 201 is electrically connected to the control chip 301. Specifically, when there is only one memory chip 201, the control chip 301 is bonded to the memory chip 201, and when there are multiple memory chips 201 forming a memory chip stacking structure, the control chip 301 is bonded to the memory chip 201 at the bottom of the stacking structure.

[0054] In other embodiments, the storage chip 201 and the control chip 301 may be connected in different ways. Figure 4 (or refer to Figure 4-Figure 7 ), the semiconductor structure also includes a circuit substrate 401, the circuit substrate 401 has a connecting circuit, the storage chip 201 and the control chip 301 are both located on the circuit substrate 104, the storage chip 201 and the control chip 301 are connected via the connecting circuit in the circuit substrate 104, and specifically the circuit substrate 401 can be a PCB substrate.

[0055] refer to Figure 1 or Figure 4 , the control chip 301 is formed by a semiconductor integrated manufacturing process. The control chip 301 can be used to heat the memory chip 201 so that the temperature of the memory chip 201 can reach a set threshold value (the set threshold value can be set in the control chip 301, and the specific value of the set threshold value can be set according to actual needs or experience). The control chip 301 is also used to control the startup of the memory chip 201 (the startup of the memory chip includes power-on and self-test) and perform related operations on the memory chip 201 (the related operations include writing data to the memory chip 201, reading data from the memory chip 201, and deleting data stored in the memory chip 201, etc.).

[0056] The semiconductor structure also includes a temperature detection unit 203, which is used to measure the temperature of the memory chip 201 before the memory chip 201 is started. The temperature detection unit 203 is electrically connected to the control chip 301. The temperature detected by the temperature detection unit 203 is transmitted to the control chip. The temperature measured by the temperature detection unit 203 is used as the basis for the control chip 301 to control the startup of the memory chip 201. Specifically, through the cooperation of the control chip 301 and the temperature detection unit 203, the control chip 301 heats the memory chip 201 before the memory chip 201 is started, and the temperature detection unit 203 detects the temperature of the memory chip 201 before the memory chip 201 is started. The control chip 30 determines whether the temperature detected by the temperature detection unit 203 reaches a set threshold value. If the set threshold value is reached, the memory chip 201 is controlled to start. Therefore, when the semiconductor structure of the present invention operates in a low-temperature environment, the memory chip 201 can be heated to the set threshold value through the control chip 301, thereby preventing the bit lines, word lines, and metal connections (metal contacts) in the memory chip from increasing in resistance due to the excessively low ambient temperature, thereby reducing the write time when writing data to the memory in a low-temperature environment and improving the stability of memory writing.

[0057] The temperature detection unit 203 includes a temperature sensor, which is used to sense temperature and convert the sensed temperature into an electrical signal. In a specific embodiment, the temperature sensor is a PN junction temperature sensor or a capacitive temperature sensor, which can be formed in the memory chip 201 or the control chip 301 through a semiconductor integrated manufacturing process, or in the circuit substrate 104 between the memory chip 201 and the control chip 301 (see Figure 5 )superior

[0058] The number of the temperature detection units 203 may be one or greater than or equal to two, and the temperature detection unit 203 may be located in the control chip 301 or in the storage chip 201 .

[0059] In one embodiment, the number of the temperature detection unit 203 is one. Specifically, the one temperature precision detection unit 203 may be located in the control chip 203 (see Figure 1 or Figure 4 ), or the one temperature detection unit 203 may also be located in the memory chip 201 (when there is only one memory chip 201, the one temperature detection unit 203 is directly located in the memory chip 201; when multiple memory chips 201 form a stacked structure, the one temperature detection unit 203 is located in one of the memory chips 201, preferably in the memory chip 201 at the bottom of the stacked structure (refer to Figure 2 or Figure 6 )), or the temperature detection unit 203 may also be located on the circuit substrate 104 between the memory chip 201 and the control chip 301 (refer to Figure 5 ), when the control chip 301 determines that the temperature detected by the one temperature detection unit reaches the set threshold, it controls all the memory chips 201 to start. When there are multiple memory chips 201 in the semiconductor structure, the aforementioned control structure and control method are relatively simple, and can reduce the writing time when writing data to the memory chip in a low temperature environment, thereby improving the writing stability of the memory chip.

[0060] In another embodiment, reference Figure 1 (or Figure 2 ,or Figure 4-Figure 6 ), when the number of the temperature detection unit 203 is 1 and the number of the storage chips 201 is greater than or equal to 2, when the control chip 301 determines that the temperature of the one temperature detection unit reaches the set threshold, the storage chip 201 closest to the control chip 301 is first controlled to start, and then the other storage chips 201 above are controlled to start in sequence. For details, refer to Figure 2 , when there are four memory chips 201, when the control chip 301 determines that the temperature of one temperature detection unit reaches the set threshold, it first controls the memory chip 201 closest to the control chip 301 (the memory chip at the bottom of the stacking structure) to start, and then controls the other three memory chips 201 above to start in sequence. When there are multiple memory chips 201 in the semiconductor structure, the aforementioned control structure and control method can enable each memory chip 201 to start after reaching the set threshold temperature, thereby improving the accuracy of the start-up timing of each memory chip 201, and reducing the writing time when writing data to each memory chip in a low temperature environment, thereby improving the stability of writing to each memory chip.

[0061] In another embodiment, reference Figure 3 (or Figure 7 ), when the number of the temperature detection units 203 is greater than or equal to 2, and the number of the storage chips 201 is greater than or equal to 2, each storage chip 201 has a temperature detection unit 203, and the control chip 301 sequentially determines whether the temperature detected by all the temperature detection units 203 reaches the set threshold. If the temperature detected by a temperature detection unit 203 reaches the set threshold, the storage chip corresponding to the temperature detection unit 203 is controlled to start. Figure 3 (or Figure 7) has four memory chips 201 in the stacked structure shown in the figure, and each memory chip 201 has a corresponding temperature detection unit 203, so each temperature detection unit 203 will detect the temperature of the corresponding memory chip 201 to obtain four temperature detection values, and the control single chip 301 will judge in turn whether the temperatures detected by the four temperature detection units 203 reach the set threshold value. If the temperature detected by a certain temperature detection unit 203 reaches the set threshold value, the memory chip corresponding to the temperature detection unit 203 is controlled to start. For example, when the temperature detected by the temperature detection unit 203 in the memory chip 201 at the bottom of the stacked structure reaches the set threshold value first, the control chip 301 first controls the memory chip 201 at the bottom of the stacked structure to start, and then, when the temperature detected by the corresponding temperature detection unit 203 in the memory chip 201 in the second-to-last layer of the stacked structure also reaches the set threshold value, the control unit 301 then controls the memory chip 201 in the second-to-last layer of the stacked structure to start, and the start-up of the memory chips 201 in the two upper layers is similar. When there are multiple memory chips 201 in the semiconductor structure, the aforementioned control structure and control method can further improve the accuracy of the startup timing of each memory chip 201, and can further reduce the writing time when writing data to each memory chip in a low-temperature environment, thereby further improving the stability of writing to each memory chip.

[0062] In one embodiment, before the control chip 301 heats the memory chip 201, the control chip 301 needs to be started first, such as powering on and self-testing the control chip 301. When the control chip 301 is started, the control chip 301 will not issue instructions to the memory chip 201. Only when the temperature detected by the temperature detection unit reaches the set threshold value, the control chip 301 will control the memory chip 201 to start. The control chip 301 uses the heat generated by itself after startup to heat the memory chip, so there is no need for an additional heating circuit, thereby simplifying the structure of the semiconductor structure.

[0063] In one embodiment, after the control chip 301 controls the memory chip 201 to start up, the control chip 301 also controls the memory chip 201 to perform write, read and erase operations. Specifically, the control chip 301 has a control circuit, and the control circuit is used to control the memory chip 201 to start up and control the memory chip 201 to perform write, read and erase operations.

[0064] In another embodiment, the control chip 301 may have an additional heating circuit for heating the memory chip 201. Before or after the control chip 301 heats the memory chip 201, the control chip determines whether the temperature of the memory chip detected by the temperature detection unit reaches a set threshold value. If the set threshold value is not reached, the heating circuit is controlled to heat the memory chip. If the set threshold value is reached, the heating circuit is controlled to stop heating the memory chip. This achieves precise control of the heating process, so that the temperature of the memory chip 201 can be kept near the set threshold value, preventing the temperature of the memory chip 201 from being too high or too low, so that the writing time to the memory can always be kept short.

[0065] refer to Figure 8 The present invention also provides a method for preheating a semiconductor structure, comprising the steps of:

[0066] Step S101, providing a semiconductor structure, wherein the semiconductor structure includes a memory chip, a control chip electrically connected to the memory chip, and a temperature detection unit;

[0067] Step S102, starting the control chip;

[0068] Step S103, heating the unactivated storage chip by controlling the chip;

[0069] Step S104, detecting the temperature of the memory chip by a temperature detection unit;

[0070] Step S105, determining by the control chip whether the temperature detected by the temperature detection unit reaches a set threshold value, and if so, controlling the storage chip to start.

[0071] Specifically, the number of the temperature detection units is 1 or greater than or equal to 2, the number of the memory chips is 1 or greater than or equal to 2, and when the number of the memory chips is greater than or equal to 2, several memory chips are stacked upward in sequence.

[0072] In one embodiment, when the number of the temperature detection unit is one, when the control chip determines that the temperature detected by the one temperature detection unit reaches a set threshold, all the storage chips are controlled to start up.

[0073] In one embodiment, when the number of the temperature detection units is 1 and the number of the storage chips is greater than or equal to 2, when the control chip determines that the temperature of the 1 temperature detection unit reaches a set threshold, it first controls the storage chip closest to the control chip to start, and then controls the other storage chips above to start in sequence.

[0074] In one embodiment, when the number of the temperature detection units is greater than or equal to 2, and the number of the storage chips is greater than or equal to 2, each storage chip has a temperature detection unit, and the control chip determines in turn whether the temperatures detected by all the temperature detection units reach a set threshold. If the temperature detected by a certain temperature detection unit reaches the set threshold, the storage chip corresponding to the temperature detection unit is controlled to start.

[0075] In one embodiment, after the control chip controls the storage chip to start up, the control chip also controls the storage chip to perform write, read and erase operations.

[0076] It should be noted that the limitations or descriptions of the same or similar parts in this embodiment and the aforementioned embodiments are not repeated in this embodiment. For details, please refer to the limitations or descriptions of the corresponding parts in the aforementioned semiconductor structure embodiments.

[0077] Although the present invention has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art may make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A semiconductor structure, characterized in that: include: Memory chips; A temperature detection unit, used for detecting the temperature of the memory chip before the memory chip is started; A control chip, used for heating the memory chip before the memory chip is started, and determining whether the temperature detected by the temperature detection unit reaches a set threshold value, and if so, controlling the memory chip to start; The number of the memory chips is 1 or greater than or equal to 2. When the number of the memory chips is greater than or equal to 2, the plurality of memory chips are stacked upward in sequence; The storage chip is located on the control chip, and the storage chip is electrically connected to the control chip; The temperature detection unit is electrically connected to the control chip, the number of the temperature detection units is 1 or greater than or equal to 2, and the temperature detection unit is located in the control chip or in the memory chip, or on a circuit substrate between the memory chip and the control chip; When the number of the temperature detection units is greater than or equal to 2, and the number of the storage chips is greater than or equal to 2, each storage chip has a temperature detection unit, and the control chip determines in turn whether the temperatures detected by all the temperature detection units reach the set threshold. If the temperature detected by a certain temperature detection unit reaches the set threshold, the storage chip corresponding to the temperature detection unit is controlled to start.

2. The semiconductor structure according to claim 1, wherein: After the control chip controls the storage chip to start up, the control chip also controls the storage chip to perform write, read and erase operations.

3. The semiconductor structure according to claim 2, wherein: Before the control chip heats the memory chip, the control chip is first started, and the control chip heats the memory chip using the heat generated by itself after starting.

4. The semiconductor structure according to claim 1, wherein: The control chip has an additional heating circuit for heating the storage chip.

5. The semiconductor structure according to claim 4, characterized in that Before or after the control chip heats the memory chip, the control chip determines whether the temperature of the memory chip detected by the temperature detection unit reaches a set threshold value. If it does not reach the set threshold value, the control chip controls the heating circuit to heat the memory chip. If it reaches the set threshold value, the control chip controls the heating circuit to stop heating the memory chip.

6. The semiconductor structure according to claim 1, wherein: The memory chip is a DRAM chip.

7. A method for preheating a semiconductor structure, characterized in that: include: Provide a semiconductor structure, the semiconductor structure comprising a memory chip, a control chip electrically connected to the memory chip, and a temperature detection unit; Start control chip; Heating the unactivated memory chip by controlling the chip; Detecting the temperature of the memory chip by a temperature detection unit; Determining whether the temperature detected by the temperature detection unit reaches a set threshold value through a control chip, and if the temperature reaches the set threshold value, controlling the storage chip to start; The number of the temperature detection units is 1 or greater than or equal to 2, the number of the memory chips is 1 or greater than or equal to 2, and when the number of the memory chips is greater than or equal to 2, the plurality of memory chips are stacked upward in sequence; When the number of the temperature detection units is greater than or equal to 2, and the number of the storage chips is greater than or equal to 2, each storage chip has a temperature detection unit, and the control chip determines in turn whether the temperatures detected by all the temperature detection units reach the set threshold. If the temperature detected by a certain temperature detection unit reaches the set threshold, the storage chip corresponding to the temperature detection unit is controlled to start.

8. The preheating method according to claim 7, characterized in that: After the control chip controls the storage chip to start up, the control chip also controls the storage chip to perform write, read and erase operations.

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