Display device

Abstract

A display device is provided. The display device includes a lower substrate including a display area and a non-display area, a thin film transistor located at the display area, a display element located at the display area and electrically connected to the thin film transistor, and a discharge element located at the non-display area. The discharge element includes at least one electrode layer, at least one discharge layer located on the electrode layer, and at least one first insulating layer located between the electrode layer and the discharge layer, and a distance from an upper surface of the lower substrate to an upper surface of the discharge layer is greater than or equal to a distance from the upper surface of the lower substrate to an upper surface of a top layer of the thin film transistor.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2020-0052897, filed on April 29, 2020, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. TECHNICAL FIELD

[0002] Aspects of one or more example embodiments relate to a display apparatus, and more particularly, to a display apparatus having an electrostatic discharge function. BACKGROUND

[0003] As the information society develops, the demand for display apparatuses to display images in various forms is increasing. In addition, the thickness and weight of display apparatuses have been reduced, and thus the range of use of display apparatuses is expanding.

[0004] Recently, flat panel display panels that facilitate displaying large screen images when compared to a cathode ray tube (CRT) and that facilitate manufacturing flat panel displays having reduced weight and volume have been developed. In addition, display apparatuses having reduced thickness and weight and having a variety of functions have been designed. Accordingly, the electrostatic sensitivity of circuit materials such as system integrated circuit (IC) chips is increasing.

[0005] The above information disclosed in this Background section is for enhancement of understanding of the background of the present disclosure, and therefore, it can contain information that does not constitute the prior art. SUMMARY

[0006] In a comparative display apparatus, static electricity that can be generated during manufacturing and / or use of the display apparatus can flow into a display area and can damage display elements or circuits, thereby causing defects.

[0007] One or more example embodiments relate to a display apparatus having an electrostatic discharge function. However, the present disclosure is not limited thereto, and additional aspects and features will be set forth in part in the description that follows, and in part will become apparent to those having ordinary skill in the art upon examination of the following or can be learned from practice of one or more example embodiments of the present disclosure.

[0008] According to one or more example embodiments of the present disclosure, a display apparatus includes a lower substrate including a display area and a non-display area, a thin film transistor located at the display area, a display element located at the display area and electrically connected to the thin film transistor, and a discharge element located at the non-display area. The discharge element includes at least one electrode layer, at least one discharge layer located on the electrode layer, and at least one first insulating layer located between the electrode layer and the discharge layer, and a distance from an upper surface of the lower substrate to an upper surface of the discharge layer is greater than or equal to a distance from the upper surface of the lower substrate to an upper surface of a top layer of the thin film transistor.

[0009] In an embodiment, the display element can include a pixel electrode, a counter electrode, and an intermediate layer between the pixel electrode and the counter electrode, the intermediate layer including an emission layer.

[0010] In an embodiment, the discharge layer can include the same material as a material of the pixel electrode.

[0011] In an embodiment, the discharge layer can have the same layer structure as a layer structure of the pixel electrode.

[0012] In an embodiment, a direction from an edge of the lower substrate to a center of the lower substrate can be a first direction, a width of an upper surface of the discharge layer in the first direction can be less than or equal to a width of an upper surface of the pixel electrode in the first direction.

[0013] In an embodiment, the first insulating layer can include the same material as a material of a layer in contact with the pixel electrode below the pixel electrode.

[0014] In an embodiment, the first insulating layer can have the same layer structure as a layer structure of a layer in contact with the pixel electrode below the pixel electrode.

[0015] In an embodiment, the discharge element can further include a second insulating layer between the first insulating layer and the discharge layer.

[0016] In an embodiment, the display device can include: a first electrode layer, a first discharge layer above the first electrode layer, and a first-first insulating layer between the first electrode layer and the first discharge layer; and a second electrode layer, a second discharge layer above the second electrode layer, and a first-second insulating layer between the second electrode layer and the second discharge layer.

[0017] In an embodiment, the display device can further include a metal layer on the lower substrate and electrically connecting the first electrode layer and the second electrode layer to each other.

[0018] In an embodiment, the first electrode layer and the second electrode layer can be integrally formed.

[0019] In an embodiment, the first-first insulating layer and the first-second insulating layer can be integrally formed.

[0020] In an embodiment, the display device can further include: an upper substrate; and a sealing member at a non-display region of the lower substrate and between the upper substrate and the lower substrate, the sealing member surrounding the display region. The first discharge layer can be positioned outside a periphery of the sealing member, and the second discharge layer can be positioned within an inner boundary defined by the sealing member.

[0021] In an embodiment, the electrode layer can extend along at least a portion of an edge of the display region.

[0022] In an embodiment, the discharge layer can include a first discharge layer and a second discharge layer spaced apart from each other in a direction in which the electrode layer extends.

[0023] In an embodiment, the discharge layer can include a plurality of isolated shapes of conductive layers spaced apart from each other in a direction in which the electrode layer extends.

[0024] According to one or more example embodiments of the disclosure, a display apparatus includes a lower substrate including a display area and a non-display area, a pixel circuit located at the display area or the non-display area and including a top conductive layer, a display element located at the display area and electrically connected to the pixel circuit, and a discharge element located at the non-display area. The discharge element includes at least one electrode layer, at least one discharge layer located above the electrode layer, and at least one first insulating layer located between the electrode layer and the discharge layer, a distance from an upper surface of the lower substrate to an upper surface of the discharge layer being greater than or equal to a distance from the upper surface of the lower substrate to an upper surface of the top conductive layer of the pixel circuit.

[0025] In an embodiment, a direction from an edge of the lower substrate to a center of the lower substrate can be a first direction, a width of an upper surface of the discharge layer in the first direction can be less than or equal to a width of an upper surface of the top conductive layer of the pixel circuit in the first direction.

[0026] In an embodiment, the discharge element can include a first electrode layer, a first discharge layer located above the first electrode layer, and a first-first insulating layer located between the first electrode layer and the first discharge layer, and a second electrode layer, a second discharge layer located above the second electrode layer, and a first-second insulating layer located between the second electrode layer and the second discharge layer.

[0027] In an embodiment, the display apparatus can further include a metal layer located on the lower substrate and electrically connecting the first electrode layer and the second electrode layer to each other. BRIEF DESCRIPTION OF DRAWINGS

[0028] The above and other aspects and features of the present disclosure will become clearer after a detailed description of illustrative, non-limiting example embodiments thereof, with reference to the attached drawings, in which:

[0029] Figure 1 is a schematic perspective view of a portion of a display apparatus according to an embodiment;

[0030] Figure 2 is a schematic perspective view of a portion of a display apparatus according to an embodiment; Figure 1 is an enlarged schematic plan view of an example of portion A of

[0031] Figures 3 to 9 is an example of a schematic cross-sectional view taken along line I-I' of Figure 2 of FIG. 1 according to one or more embodiments. DETAILED DESCRIPTION

[0032] Hereinafter, example embodiments will be described in greater detail with reference to the accompanying drawings, in which like numerals refer to like elements throughout. The disclosure may, however, be embodied in various forms, and should not be construed as being limited only to the embodiments set forth herein. Rather, these embodiments are provided as examples so that this disclosure will be thorough and complete, and will fully convey the aspects and features of the disclosure to those skilled in the art. Therefore, processes, elements and techniques not necessary for understanding the aspects and features of the disclosure can not be described in detail. Unless otherwise specified, like numerals refer to like elements throughout the drawings and written description, and thus description thereof can not be repeated.

[0033] In the drawings, the relative sizes and / or proportions of the elements, layers, and regions can be exaggerated for clarity. For ease of explanation, spatially relative terms such as "below", "under", "lower", "down", "above", "upper", and the like, can be used herein for describing one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or in operation, in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "under" other elements or features would then be oriented "above" the other elements or features. Thus, the example term "below" can encompass both an orientation of above and below. The device can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein should be interpreted accordingly. In addition, the x-axis, y-axis, and z-axis in the figures are not limited to the three axes of a Cartesian coordinate system, and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.

[0034] It will be understood that, although the terms "first", "second", "third", etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Therefore, the first element, component, region, layer or section described below can be called a second element, component, region, layer or section without departing from the spirit and scope of the disclosure.

[0035] It will be understood that when an element or layer is referred to as being “on” another element or layer, “connected to” or “coupled to” another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer or one or more intervening elements or layers can be present. In addition, it will also be understood that when an element or layer is referred to as being “between” two elements or layers, it can be the only element or layer between the two elements or layers or one or more intervening elements or layers can also be present.

[0036] The terminology used herein is for the purpose of describing specific embodiments and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” “comprising,” “includes” “including,” “has” “having” and the like, when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of,” when preceding a list of two or more items, cover all cases of that list, whether head or tail, underlined or plain, and whether or not separated by commas. For example, “at least one of a, b, and c,” covers the cases of a alone, b alone, c alone, both a and b together, both a and c together, both b and c together, and all three a, b, and c together.

[0037] As used herein, expressions such as “A or B”, “at least one of A and / or B”, or “at least one of A and / or B or more” can include all available combinations of the listed items. For example, expressions such as “A or B”, “at least one of A and B”, or “at least one of A or B” can mean all cases of (1) including at least one A, (2) including at least one B, or (3) including both at least one A and at least one B.

[0038] As used herein, the terms “substantially,” “approximately,” and similar terms are used as terms of approximation and not as terms of degree, and are intended to account for the inherent deviations in measured or calculated values that would be recognized by those of ordinary skill in the art. Furthermore, the use of “may” when describing embodiments of the disclosure indicates that one or more embodiments of the disclosure. As used herein, the term “use” and variations thereof can be considered synonymous with and be used interchangeably with the term “utilize” and variations thereof. Furthermore, the term “exemplary” is intended to mean an example or an illustration.

[0039] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and / or the present specification, and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0040] Figure 1 is a schematic perspective view of a portion of a display device 1 according to an embodiment.

[0041] Referring to Figure 1 , the display device 1 can include a display area DA at which (e.g., in which or on which) light is emitted and a non-display area NDA at which (e.g., in which or on which) light is not emitted. For example, a lower substrate 100 (e.g., see Figure 2 ) of the display device 1 can be provided with the display area DA and the non-display area NDA. In some embodiments, the non-display area NDA can surround the display area DA (e.g., around a periphery of the display area DA), although the present disclosure is not limited thereto.

[0042] Although Figure 1 the display device 1 is shown as including the display area DA having a rectangular shape, the present disclosure is not limited thereto, and the display area DA can have any suitable shape, such as, for example, a circular shape, an elliptical shape, and / or a polygonal shape, etc.

[0043] The display device 1 can provide an image through the display area DA. The display device 1 can include a liquid crystal display device, an electrophoretic display device, an organic light emitting display device, an inorganic light emitting display device, a quantum dot light emitting display device, a field emission display device, a surface-conduction electron emitter display device, a plasma display device, and / or a cathode ray tube display device, etc., although the present disclosure is not limited thereto.

[0044] Figure 2 is an enlarged schematic plan view of an example of a portion A of Figure 1

[0045] Referring to Figure 2 , the display device 1 can include the display area DA and the non-display area NDA located on the lower substrate 100.

[0046] In the display area DA, the pixels P can be positioned at locations where the scan lines SL extending in the x-axis direction and the data lines DL extending in the y-axis direction cross (e.g., intersect) each other. In this case, the pixels P can correspond to sub-pixels that emit light of different colors from each other. Each pixel P can include a display element 200 (see​Figure 3 ), and can emit red, green, blue, or white light. Each pixel P can include a pixel circuit connected to the scan line SL and the data line DL, and an organic light emitting diode as a display element 200 connected to the pixel circuit, for example.

[0047] The pixel circuit can include a thin film transistor (e.g., a drive thin film transistor and / or a switching thin film transistor, etc.) and one or more capacitors (e.g., a storage capacitor, etc.).

[0048] The switching thin film transistor is connected to the scan line SL and the data line DL, and can transmit a data signal input via the data line DL to the drive thin film transistor in response to a scan signal input via the scan line SL.

[0049] The storage capacitor is connected to the switching thin film transistor and the drive voltage supply line PL, and can store a voltage corresponding to a difference between a voltage received from the switching thin film transistor and a drive voltage (e.g., drive power) supplied to the drive voltage supply line PL.

[0050] The drive thin film transistor is connected to the drive voltage supply line PL and the storage capacitor, and can control a drive current flowing in the display element 200 via the drive voltage supply line PL in response to a value (e.g., a level) of the voltage stored in the storage capacitor. The display element 200 can emit light having a desired brightness according to the drive current, and the emitted light can be red light, green light, blue light, or white light.

[0051] The non-display area NDA is an area surrounding (e.g., around a periphery of) the display area DA and at which (e.g., in which or on which) no pixel P is disposed, and thus no image is provided from the non-display area NDA.

[0052] The drive portion (e.g., a driver or a drive circuit) 20, the power supply wiring 30, the discharge element 300, and the sealing member 500 can be positioned at (e.g., in or on) the non-display area NDA.

[0053] The driving section 20 may include a light-emitting driving circuit and / or a scanning driving circuit, etc. The light-emitting driving circuit is located at the non-display area NDA of the lower substrate 100 (e.g., located in or on the non-display area NDA of the lower substrate 100) and generates an emission control signal. The light-emitting driving circuit transmits the generated emission control signal to each pixel P via an emission control line. The scanning driving circuit is located at the non-display area NDA of the lower substrate 100 (e.g., located in or on the non-display area NDA of the lower substrate 100) and generates a scan signal. The scanning driving circuit transmits the generated scan signal to each pixel P via a scan line SL.

[0054] The power supply wiring 30 is located at the non-display area NDA of the lower substrate 100 (e.g., located in or on the non-display area NDA of the lower substrate 100), and may surround at least a portion of the display area DA (e.g., may surround at least a portion of the periphery of the display area DA). The power supply wiring 30 may provide driving power to the pixel P via the driving voltage supply line PL, or provide common power to the common electrode of the display element 200.

[0055] The discharge element 300 is positioned at the non-display area NDA of the lower substrate 100 (e.g., positioned within or on the non-display area NDA of the lower substrate 100). The discharge element 300 can release static electricity generated during the manufacture and / or use of the display device 1. Therefore, it is possible to prevent, or substantially prevent, the introduction of static electricity generated during the manufacture and / or use of the display device 1 into the display area DA, which could potentially damage the display element 200 and / or pixel circuitry, resulting in defects. Thus, damage that may be caused by static electricity can be prevented or reduced.

[0056] See below for reference. Figures 3 to 9 In more detail, the discharge element 300 may include an electrode layer 330, a discharge layer 310 disposed on the electrode layer 330, and a first insulating layer 321 disposed between the electrode layer 330 and the discharge layer 310.

[0057] When the display device 1 includes an upper substrate 400, a sealing member 500 may be disposed between the lower substrate 100 and the upper substrate 400. In other words, the upper substrate 400 may be positioned above the lower substrate 100, and the sealing member 500 for joining the lower substrate 100 and the upper substrate 400 together may be positioned between the lower substrate 100 and the upper substrate 400.

[0058] The upper substrate 400 can be a package substrate, a cover glass, or a color filter unit substrate, but the disclosure is not limited thereto. The upper substrate 400 can have an area smaller than that of the lower substrate 100, and a pad (or referred to as a "pad" or a "solder pad") area disposed at an edge of the lower substrate 100 can be exposed (e.g., can not be covered by the upper substrate 400).

[0059] The sealing member 500 can be disposed between the upper substrate 400 and the lower substrate 100 at (e.g., in or on) the non-display area NDA of the lower substrate 100, and can surround the display area DA (e.g., around a periphery of the display area DA). The sealing member 500 can include an inorganic material, for example, such as a frit or an epoxy resin. Accordingly, a space defined by the lower substrate 100, the upper substrate 400, and the sealing member 500 at a side of the display area DA can be blocked from the outside, and thus, external moisture and / or foreign matter can be prevented or substantially prevented from intruding into an inside of the display device 1.

[0060] The sealing member 500 can at least partially overlap with the adjacent elements, and thus, a dead space of the display device 1 can be reduced. For example, in some embodiments, the sealing member 500 can be disposed to cover or overlap with an outer end portion of the power supply wiring 30 or the discharge element 300.

[0061] Figures 3 to 9 is an example of a schematic cross-sectional view taken along a line I-I' of Figure 2 according to one or more embodiments.

[0062] Referring to Figure 3 , the pixel circuit and the display element 200 electrically connected to the pixel circuit can be positioned at (e.g., in or on) the display area DA on the lower substrate 100. The driving part 20, the power supply wiring 30, the discharge element 300, and the sealing member 500 can be positioned at (e.g., in or on) the non-display area NDA on the lower substrate 100.

[0063] The lower substrate 100 can include various suitable materials, for example, such as a glass material, a metal material, or a plastic material (e.g., such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyimide). The lower substrate 100 can have various suitable structures, for example, such as a single layer structure or a multi-layer structure in which a barrier layer formed of an inorganic material such as silicon oxide is disposed between two polyimide layers.

[0064] The upper substrate 400 can include a transparent material. For example, the upper substrate 400 can include a glass material or a plastic material (e.g., such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyimide), but the present disclosure is not limited thereto. In some embodiments, the upper substrate 400 can include the same material as or a different material from the material of the lower substrate 100, or can include a combination of the same material as and a different material from the material of the lower substrate 100.

[0065] A buffer layer 101 can be formed on the lower substrate 100. The buffer layer 101 can include an inorganic material, such as, for example, silicon oxide, silicon nitride, and / or silicon oxynitride, and can have a single-layer structure or a multi-layer structure. The buffer layer 101 can be positioned at (e.g., in or on) the display area DA, and can be formed to extend to at least a portion of the non-display area NDA. The buffer layer 101 can improve the smoothness of the upper surface of the lower substrate 100, and / or can prevent or reduce the intrusion of foreign matter and / or moisture from the outside of the lower substrate 100 into the semiconductor layer 121 of the thin film transistor 120.

[0066] A pixel circuit is positioned at (e.g., in or on) the display area DA on the lower substrate 100, and can include the thin film transistor 120 and a conductive layer. The display element 200 can be electrically connected to the pixel circuit. For example, the pixel electrode 210 of the display element 200 (e.g., included in the display element 200) can be electrically connected to the thin film transistor 120.

[0067] The thin film transistor 120 can include a semiconductor layer 121, a gate electrode 123, a source electrode 125, and a drain electrode 127. The semiconductor layer 121 can include, for example, amorphous silicon, polycrystalline silicon, or an organic semiconductor material. The gate electrode 123 can include various suitable conductive materials including molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and can have various suitable layer structures. For example, the gate electrode 123 can include a Mo layer and an Al layer, or can have a multi-layer structure of Mo / Al / Mo.

[0068] The source electrode 125 and the drain electrode 127 can include various suitable conductive materials including Mo, Al, Cu, or Ti, and can have various suitable layer structures. For example, the source electrode 125 and the drain electrode 127 can include a Ti layer and an Al layer, or can have a multi-layer structure of Ti / Al / Ti.

[0069] To ensure insulation between the semiconductor layer 121 and the gate electrode 123, a gate insulating layer 103 including an inorganic material (e.g., such as silicon oxide, silicon nitride, and / or silicon oxynitride) can be provided between the semiconductor layer 121 and the gate electrode 123. A first interlayer insulating layer 105, which can be an insulating layer including an inorganic material (e.g., such as silicon oxide, silicon nitride, and / or silicon oxynitride) as a layer having a desired or suitable dielectric constant, can be positioned on the gate electrode 123. Further, a second interlayer insulating layer 107, which can be an insulating layer including an inorganic material (e.g., such as silicon oxide, silicon nitride, and / or silicon oxynitride), can be provided on the first interlayer insulating layer 105. The source electrode 125 and the drain electrode 127 can be positioned on the first interlayer insulating layer 105 (specifically, on the second interlayer insulating layer 107). As such, an insulating layer (e.g., an insulating film) including an inorganic material can be formed by a chemical vapor deposition (CVD) method or an atomic layer deposition (ALD) method. This can be applied in the same or substantially the same manner to one or more of the embodiments described below and modification examples thereof.

[0070] The planarization layer 109 can be provided on the thin film transistor 120. When an organic light emitting diode as an example of the display element 200 is positioned on the thin film transistor 120, the planarization layer 109 can planarize or substantially planarize an upper surface of a protective film covering the thin film transistor 120. The planarization layer 109 can include, for example, an organic material such as acrylic, benzocyclobutene (BCB), or hexamethyldisiloxane (HMDSO). Although Figures 3 to 9 The planarization layer 109 is shown as a single layer, but the planarization layer 109 can have a multi-layer structure, and various suitable modifications to the planarization layer 109 are possible as would be understood by one of ordinary skill in the relevant art.

[0071] In the display region DA of the lower substrate 100, the display element 200 can be positioned at (e.g., in or on) the planarization layer 109. The display element 200 can be, for example, an organic light emitting diode including a pixel electrode 210, a counter electrode 230, and an intermediate layer 220 including an emission layer provided between the pixel electrode 210 and the counter electrode 230.

[0072] As Figures 3 to 9As shown in the middle, the pixel electrode 210 can be in contact with any one of the source electrode 125 and the drain electrode 127 through an opening formed in the planarization layer 109 to be electrically connected to the thin film transistor 120. The pixel electrode 210 can be a (semi-)transmissive electrode or a reflective electrode. In some embodiments, the pixel electrode 210 can include a reflective film including, for example, Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, and / or a mixture thereof, and a transparent or semi-transparent electrode layer formed on the reflective film. The transparent or semi-transparent electrode layer can include, for example, at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO). In some embodiments, the pixel electrode 210 can have a stacked structure, for example, such as ITO / Ag / ITO.

[0073] The pixel defining layer 110 can be disposed on (e.g., above) the planarization layer 109. The pixel defining layer 110 has an opening corresponding to each sub-pixel to define a pixel (e.g., to define a light emitting area). In this case, the opening is formed to expose at least a portion of a central portion of the pixel electrode 210. Further, the pixel defining layer 110 can increase a distance between an edge of the pixel electrode 210 and the counter electrode 230 above the pixel electrode 210 to prevent or substantially prevent an arc from being generated from the edge of the pixel electrode 210. The pixel defining layer 110 can include, for example, an organic material such as polyimide or HMDSO.

[0074] The intermediate layer 220 of the display element 200 can include a low molecular material or a polymer material.

[0075] When the intermediate layer 220 includes a low molecular material, the intermediate layer 220 can have a structure in which a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL) are stacked as a single structure or a complex structure, and can include various suitable organic materials, for example, such as copper phthalocyanine (CuPc), N,N'-di(naphthalen-1-yl)-N,N'-diphenyl-benzidine (NPB), and tris-8-hydroxyquinoline aluminum (Alq3). In some embodiments, the layers described above can be formed in a vacuum deposition method.

[0076] When the intermediate layer 220 includes a polymer material, the intermediate layer 220 can have a structure including an HTL and an EML. In this case, the HTL can include PEDOT, and the EML can include a polyphenylenevinylene (PPV)-based polymer material and a polyfluorene-based polymer material. In some embodiments, the intermediate layer 220 can be formed by a screen printing method, an inkjet printing method, or a laser-induced thermal imaging (LITI) method. However, the present disclosure is not limited thereto, and the intermediate layer 220 can have various suitable structures. Furthermore, the intermediate layer 220 can include a unitary layer spanning the plurality of pixel electrodes 210, or can be patterned as a layer corresponding to each of the pixel electrodes 210 (e.g., patterned as a layer superposed with the pixel electrodes 210 when viewed in a direction perpendicular or substantially perpendicular to the lower substrate 100).

[0077] The counter electrode 230 of the display element 200 is disposed at (e.g., in or on) the display area DA. In an example embodiment, the counter electrode 230 can include a unitary layer to cover the entire surface of the display area DA, and can be disposed at (e.g., in or on) the display area DA. In other words, the counter electrode 230 can be integrally formed with respect to the plurality of display elements 200 to correspond to the pixel electrodes 210 of the display elements 200. In this case, the counter electrode 230 covering the display area DA can extend to a portion of the non-display area NDA located outside (e.g., adjacent to) the display area DA. In another example embodiment, the counter electrode 230 can include a layer patterned to correspond to each of the pixel electrodes 210 (e.g., patterned as a layer superposed with the pixel electrodes 210 when viewed in a direction perpendicular or substantially perpendicular to the lower substrate 100), and can be disposed at (e.g., in or on) the display area DA.

[0078] The counter electrode 230 can be a light-transmitting electrode or a reflective electrode. In some embodiments, the counter electrode 230 can be a transparent or semi-transparent electrode, and can include a thin film of a metal having a relatively low work function, including, for example, Li, Ca, LiF / Ca, LiF / Al, Al, Ag, Mg, and / or a mixture thereof. In some embodiments, in addition to the thin film of the metal, the counter electrode 230 can further include a transparent conductive oxide (TCO) film, such as, for example, ITO, IZO, ZnO, or In2O3.

[0079] In some embodiments, the display apparatus 1 can further include an encapsulation layer positioned to cover and protect the display element 200. The encapsulation layer can prevent or substantially prevent the display element 200 from being damaged by external moisture and / or oxygen. The encapsulation layer can cover the display area DA, and can extend to at least a portion of the non-display area NDA (or a portion of the non-display area NDA). The encapsulation layer can include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer.

[0080] The data line DL (see, for example, Figure 2 ) can be disposed at the same layer as (e.g., in or on) the layers of the source electrode 125 and the drain electrode 127 of the thin film transistor 120. Accordingly, the data line DL can include the same material as the source electrode 125 and the drain electrode 127, and the data line DL can have the same or substantially the same layer structure as the layers of the source electrode 125 and the drain electrode 127. The pixel electrode 210 can be disposed on the planarization layer 109 that is an insulating layer covering the source electrode 125, the drain electrode 127, and also the data line DL, and the connection wiring can be partially disposed on the planarization layer 109.

[0081] The driving part 20, the power supply wiring 30, the discharging element 300, and the sealing member 500 can be positioned at (e.g., in or on) the non-display area NDA on the lower substrate 100.

[0082] The driving part 20 can include one or more thin film transistors and wirings connected to the thin film transistors included in the driving part 20. The thin film transistors included in the driving part 20 can be formed in the same or substantially the same process as the thin film transistor 120 in which the pixel circuit is formed.

[0083] The power supply wiring 30 can include the same material as the material of the driving voltage supply line PL. For example, the power supply wiring 30 can have a multi-layer structure of Ti / Al / Ti. An outer end (e.g., an outer edge) portion of the power supply wiring 30 can be covered by the sealing member 500, and an inner end (e.g., an inner edge) portion of the power supply wiring 30 opposite to the outer end portion can be covered by the conductive film 212. When the inner end portion of the power supply wiring 30 is covered by the conductive film 212, one side of the conductive film 212 can be connected to the power supply wiring 30, and the other side of the conductive film 212 can be connected to the counter electrode 230, thereby supplying power. However, the present disclosure is not limited thereto, and in other embodiments, the power supply wiring 30 can extend toward the display area DA to be directly connected to the counter electrode 230. The conductive film 212 can include the same material as the material of the pixel electrode 210. For example, the conductive film 212 can have a stack structure of ITO / Ag / ITO.

[0084] The discharge element 300 can include a discharge layer 310, a first insulating layer 321, and an electrode layer 330.

[0085] The discharge layer 310 of the discharge element 300 can be positioned at the top of the discharge element 300 and can allow static electricity generated during the manufacturing and / or use of the display device 1 to be concentrated on the discharge element 300. In other words, the discharge layer 310 is located in front of the moving path of the static electricity to absorb the static electricity in advance, and thus, static electricity generated inside or outside the display device 1 cannot reach other elements disposed at (e.g., disposed in or disposed on) the display area DA. In this case, the discharge layer 310 can include a conductive layer including a conductive material to be electrified.

[0086] In an example embodiment, the discharge layer 310 can include the same material as that of the pixel electrode 210 and can have the same or substantially the same layer structure as that of the pixel electrode 210. In this case, the discharge layer 310 can be concurrently (e.g., simultaneously) formed in a forming process of the pixel electrode 210. For example, the discharge layer 310 and the pixel electrode 210 can each have a stack structure of ITO / Ag / ITO. However, the present disclosure is not limited to the above example embodiment.

[0087] To increase the static electricity absorption effect, the discharge layer 310 can be formed such that a height at which the discharge layer 310 is positioned or a width of the discharge layer 310 satisfies a suitable condition (e.g., a preset condition).

[0088] For example, in an embodiment, the discharge layer 310 can be formed such that a distance from an upper surface of the lower substrate 100 to an upper surface of the discharge layer 310 is greater than or equal to a distance from the upper surface of the lower substrate 100 to an upper surface of a top conductive layer (e.g., a top layer of the thin film transistor 120) included in the pixel circuit and positioned at (e.g., positioned in or positioned on) the display area DA or the non-display area NDA on the lower substrate 100. In other words, the discharge layer 310 can be formed such that a height of the upper surface of the discharge layer 310 from the upper surface of the lower substrate 100 is greater than or equal to a height of the upper surface of the top conductive layer (e.g., the top layer of the thin film transistor 120) included in the pixel circuit from the upper surface of the lower substrate 100. Thus, the discharge layer 310 can function as a kind of lightning rod such that static electricity is further concentrated on the discharge layer 310 rather than on the top conductive layer included in the pixel circuit, and thus, the static electricity discharge effect of the discharge element 300 can be improved (e.g., can be significantly improved).

[0089] As Figure 4As shown, in some embodiments, various protruding conductive layers 40 may be positioned at the same layer (e.g., in the same layer or on the same layer) as conductive layers (e.g., thin-film transistor 120, etc.) included in pixel circuitry, which are disposed on the lower substrate 100 of the display device 1 at the display area DA or non-display area NDA (e.g., in or on the display area DA or non-display area NDA). In this case, the protruding conductive layers 40 may absorb static electricity generated during the manufacture and / or use of the display device 1 and may provide a path for static electricity to reach the display area DA. According to one or more example embodiments, because the discharge layer 310 may be positioned relative to the upper surface of the lower substrate 100 at a height greater than or equal to the upper surface of the top layer of the thin-film transistor 120, static electricity may be prevented or substantially prevented from being introduced into the protruding conductive layers 40, and thus static electricity may be concentrated on the discharge layer 310.

[0090] In another embodiment, the distance from the upper surface of the lower substrate 100 to the upper surface of the discharge layer 310 can be greater than the distance from the upper surface of the lower substrate 100 to the upper surface of the pixel electrode 210 or the upper surface of the conductive film 212. In other words, the height of the upper surface of the discharge layer 310 relative to the upper surface of the lower substrate 100 can be greater than the height of the upper surface of the pixel electrode 210 or the upper surface of the conductive film 212 relative to the upper surface of the lower substrate 100.

[0091] For example, such as Figure 5 As shown, in some embodiments, the discharge element 300 may further include a second insulating layer 322 disposed between the first insulating layer 321 and the discharge layer 310. Therefore, the discharge layer 310 may be positioned at a height higher than the pixel electrode 210 or conductive film 212 from the upper surface of the lower substrate 100 by the height of the second insulating layer 322, thus allowing the discharge layer 310 to absorb static electricity earlier than the pixel electrode 210 or conductive film 212. In this case, the second insulating layer 322 may be a layer comprising a material that is the same as or different from the material of the first insulating layer 321.

[0092] In another embodiment, when a direction from an edge of the lower substrate 100 to a center of the lower substrate 100 is a first direction, a width of an upper surface of the discharge layer 310 in the first direction can be less than or equal to a width of an upper surface of the pixel electrode 210, an upper surface of the conductive film 212, or an upper surface of a top conductive layer of the pixel circuit in the first direction. In other words, with respect to a moving direction of the electrostatic in the electrostatic moving path, the discharge layer 310 can have a width that is smaller than a width of an element (e.g., the pixel electrode 210, the conductive film 212, or the top conductive layer of the pixel circuit) into which the electrostatic can be introduced. Thus, considering that the electrostatic can flow mainly to a place having a higher surface charge density, and that the surface charge density is inversely proportional to the radius, the electrostatic can be further concentrated on the discharge layer 310.

[0093] The first insulating layer 321 of the discharge element 300 is provided between the electrode layer 330 and the discharge layer 310. The first insulating layer 321 allows the discharge layer 310 to be positioned higher than a top conductive layer (e.g., a top layer of the thin film transistor 120, etc.) included in the pixel circuit, which is positioned on the lower substrate 100 at the display region DA or the non-display region NDA (e.g., positioned in or on the display region DA or the non-display region NDA).

[0094] In an embodiment, the first insulating layer 321 can include the same material as a material of a layer positioned below the pixel electrode 210 and in contact with the pixel electrode 210, and can have the same layer structure as a layer structure of the layer positioned below the pixel electrode 210 and in contact with the pixel electrode 210. In this case, the first insulating layer 321 can be formed concurrently (e.g., simultaneously) in a forming process of the layer positioned below the pixel electrode 210 and in contact with the pixel electrode 210. For example, when the planarization layer 109 is the layer positioned below the pixel electrode 210 and in contact with the pixel electrode 210, the first insulating layer 321 can include the same material as a material of the planarization layer 109, and can have the same layer structure as a layer structure of the planarization layer 109, such that the first insulating layer 321 and the planarization layer 109 can be formed concurrently (e.g., simultaneously) with each other.

[0095] The electrode layer 330 of the discharge element 300 is electrically connected to a gate electrode positioned below the electrode layer 330, and transmits the electrostatic introduced from the discharge layer 310 above the electrode layer 330 to the gate electrode below the electrode layer 330. For example, a contact hole can be formed in a layer provided between the electrode layer 330 and the gate electrode below the electrode layer 330 to allow the electrode layer 330 and the gate electrode below the electrode layer 330 to contact each other.

[0096] In an embodiment, the electrode layer 330 can include the same material as that of the source electrode 125 and the drain electrode 127, and can be positioned at the same layer as a layer of the source electrode 125 and the drain electrode 127. For example, the electrode layer 330, the source electrode 125, and the drain electrode 127 can include a Ti layer and an Al layer, or can have a multi-layer structure of Ti / Al / Ti. In this case, the electrode layer 330 can be formed concurrently (e.g., simultaneously) in a forming process of the source electrode 125 and the drain electrode 127.

[0097] The gate electrode under the electrode layer 330 can be electrically connected to a ground electrode to discharge or drain absorbed static electricity. Also, the gate electrode under the electrode layer 330 can include the same material as that of the gate electrode 123, and can be positioned at the same layer (e.g., positioned in the same layer or positioned on the same layer) as a layer of the gate electrode 123 positioned under the display element 200 at (e.g., in or on) the display area DA of the lower substrate 100. In this case, the gate electrode under the electrode layer 330 can be formed concurrently (e.g., simultaneously) in a forming process of the gate electrode 123 under the display element 200. Accordingly, the gate electrode under the electrode layer 330 can include, for example, various suitable conductive materials including Mo, Al, Cu, or Ti, and can have various suitable layer structures. For example, the gate electrode under the electrode layer 330 can include a Mo layer and an Al layer, or can have a multi-layer structure of Mo / Al / Mo.

[0098] In some embodiments, as shown in FIG. 1A, the electrode layer 330 (e.g., the discharge element 300 shown in FIG. 1B) can be positioned by extending on the lower substrate 100 along at least a portion of an edge of the display area DA. In this case, the discharge layer 310 of the discharge element 300 can include a first discharge layer and a second discharge layer arranged to be spaced apart from each other in a direction along which the electrode layer 330 extends, or can include a plurality of isolated-shaped conductive layers. In other words, the discharge layer 310 or the conductive layers included in the discharge layer 310 can be positioned to be spaced apart from each other in the direction along which the electrode layer 330 extends. Figure 2 Figure 2 In some embodiments, as shown in FIG. 1A, the electrode layer 330 (e.g., the discharge element 300 shown in FIG. 1B) can be positioned by extending on the lower substrate 100 along at least a portion of an edge of the display area DA. In this case, the discharge layer 310 of the discharge element 300 can include a first discharge layer and a second discharge layer arranged to be spaced apart from each other in a direction along which the electrode layer 330 extends, or can include a plurality of isolated-shaped conductive layers. In other words, the discharge layer 310 or the conductive layers included in the discharge layer 310 can be positioned to be spaced apart from each other in the direction along which the electrode layer 330 extends.

[0099] ​The sealing member 500 is disposed between the lower substrate 100 and the upper substrate 400 to bond or attach the lower substrate 100 and the upper substrate 400 to each other. The sealing member 500 can include a frit or an epoxy resin. The frit can be a paste including a laser or infrared absorber that can be included in a main material of SiO2, an organic binder, a filler to reduce a coefficient of thermal expansion, etc. The frit paste can be cured by removing the organic binder and moisture through a drying and sintering process, and then be cured. The laser or infrared absorber can include a transition metal compound. The frit can be cured by a laser or the like to form the sealing member 500.

[0100] Reference will now be made to Figures 6 to 9 An example embodiment in which the display apparatus 1 includes a plurality of discharge layers 310 is described.

[0101] In some embodiments, the display apparatus 1 can include a plurality of discharge layers 310. Although two discharge layers 310 are illustrated for convenience of explanation, Figures 6 to 9 It is illustrated that two discharge layers 310, but the disclosure is not limited thereto, and the plurality of discharge layers 310 can include any suitable number of discharge layers 310.

[0102] Reference will now be made to Figure 6 In some embodiments, the discharge element 300 can include a first electrode layer 330-1, a first discharge layer 310-1 positioned above the first electrode layer 330-1, a 1-1 insulating layer (or referred to as a "first-first insulating layer") 321-1 positioned between the first electrode layer 330-1 and the first discharge layer 310-1, a second electrode layer 330-2, a second discharge layer 310-2 positioned above the second electrode layer 330-2, and a 1-2 insulating layer (or referred to as a "first-second insulating layer") 321-2 positioned between the second electrode layer 330-2 and the second discharge layer 310-2. In more detail, the first discharge layer 310-1 can be positioned above the 1-1 insulating layer 321-1 and can be in contact with the first electrode layer 330-1 via a contact hole formed in the 1-1 insulating layer 321-1. The second discharge layer 310-2 can be positioned above the 1-2 insulating layer 321-2 and can be in contact with the second electrode layer 330-2 via a contact hole formed in the 1-2 insulating layer 321-2. Thus, static electricity absorbed by the first discharge layer 310-1 can be transmitted to the first electrode layer 330-1, and static electricity absorbed by the second discharge layer 310-2 can be transmitted to the second electrode layer 330-2.

[0103] In this case, each of the first discharge layer 310-1 and the second discharge layer 310-2 can function to absorb static electricity. For example, when the first discharge layer 310-1 is positioned closer to the edge of the lower substrate 100 than the second discharge layer 310-2, externally generated static electricity can first pass through the area in which the first discharge layer 310-1 is positioned. In this case, even when static electricity is not absorbed by the first discharge layer 310-1 and passes through the area in which the first discharge layer 310-1 is positioned, the static electricity can be absorbed by the second discharge layer 310-2, and thus, the static electricity can be effectively prevented from reaching the display area DA.

[0104] In some embodiments, a 2-1 insulating layer (or referred to as a "second-first insulating layer") can also be provided between the first discharge layer 310-1 and the 1-1 insulating layer 321-1, and / or a 2-2 insulating layer (or referred to as a "second-second insulating layer") can also be provided between the second discharge layer 310-2 and the 1-2 insulating layer 321-2. In other words, when the discharge layer 310 is formed, since the 2-1 insulating layer and / or the 2-2 insulating layer is provided between some or all of the discharge layers 310 and the 1-1 insulating layer and / or the 1-2 insulating layer provided thereunder, the discharge layer 310 can be formed to have a greater height with respect to the upper surface of the lower substrate 100 than in an embodiment in which there is no 2-1 insulating layer and 2-2 insulating layer.

[0105] In an embodiment, the discharge element 300 can further include a metal layer 340 positioned above the lower substrate 100 and electrically connecting the first electrode layer 330-1 and the second electrode layer 330-2 to each other. The upper surface of the metal layer 340 can be in contact with the lower surface of the gate electrode below the first electrode layer 330-1 and the lower surface of the gate electrode below the second electrode layer 330-2. Thus, static electricity absorbed by the first discharge layer 310-1 or the second discharge layer 310-2 can be deposited (e.g., can be aggregated or collected) in the metal layer 340 to be released or discharged therefrom. For example, the metal layer 340 can be electrically connected to a ground electrode to release or discharge the deposited static electricity.

[0106] In another embodiment, referring to FIG. 4, the discharge element 300 can further include a metal layer 340 positioned above the lower substrate 100 and electrically connecting the first electrode layer 330-1 and the second electrode layer 330-2 to each other. The upper surface of the metal layer 340 can be in contact with the lower surface of the gate electrode below the first electrode layer 330-1 and the lower surface of the gate electrode below the second electrode layer 330-2. Thus, static electricity absorbed by the first discharge layer 310-1 or the second discharge layer 310-2 can be deposited (e.g., can be aggregated or collected) in the metal layer 340 to be released or discharged therefrom. For example, the metal layer 340 can be electrically connected to a ground electrode to release or discharge the deposited static electricity. Figure 7, the first electrode layer 330-1 and the second electrode layer 330-2 can be integrally formed, and the gate electrode below the first electrode layer 330-1 and the gate electrode below the second electrode layer 330-2 can be integrally formed. In other words, the first discharge layer 310-1 and the second discharge layer 310-2 can be in contact with the electrode layer 330. The first discharge layer 310-1 can be in contact with the electrode layer 330 via a contact hole formed in the 1-1 insulating layer 321-1, and the second discharge layer 310-2 can be in contact with the electrode layer 330 via a contact hole formed in the 1-2 insulating layer 321-2. In this case, the static electricity absorbed by each of the first discharge layer 310-1 and the second discharge layer 310-2 is transmitted to the integrally formed electrode layer 330, and thus, the static electricity absorbed by each of the first discharge layer 310-1 and the second discharge layer 310-2 can be gathered to be discharged or drained therefrom without having a separate metal layer 340.

[0107] In another embodiment, referring to Figure 8 , the 1-1 insulating layer 321-1 and the 1-2 insulating layer 321-2 can be integrally formed. In this case, the integrally formed first insulating layer 321 can include a contact hole allowing the first discharge layer 310-1 to be in contact with the first electrode layer 330-1 and a contact hole allowing the second discharge layer 310-2 to be in contact with the second electrode layer 330-2. The contact holes can be formed to correspond to the first discharge layer 310-1 and the second discharge layer 310-2, respectively. In other words, the first discharge layer 310-1 and the second discharge layer 310-2 can be in contact with the first electrode layer 330-1 and the second electrode layer 330-2, respectively, via the contact holes formed in the integrally formed first insulating layer 321.

[0108] In some embodiments, the 1-1 insulating layer 321-1 and the 1-2 insulating layer 321-2 can be integrally formed like the first insulating layer 321 of Figure 8 , and the first electrode layer 330-1 and the second electrode layer 330-2 can be integrally formed like the electrode layer 330 of Figure 7 . In this case, the first discharge layer 310-1 and the second discharge layer 310-2 can be in contact with the integrally formed electrode layer 330 through the contact holes formed in the integrally formed first insulating layer 321.

[0109] In another embodiment, referring to Figure 9For example, as shown in FIG. 3A, the first discharge layer 310-1 can be positioned outside the sealing member 500 (e.g., toward the edge of the lower substrate 100), and the second discharge layer 310-2 can be positioned inside the sealing member 500 (e.g., toward the display area DA). In other words, when the discharge element 300 includes the discharge layer 310, some of the discharge layer 310 can be positioned outside the sealing member 500, and the other discharge layer 310 can be positioned inside the sealing member 500. Accordingly, the first discharge layer 310-1 positioned outside the sealing member 500 can mainly absorb static electricity outside the sealing member 500, and the second discharge layer 310-2 can absorb the remaining static electricity that is not absorbed by the first discharge layer 310-1, passes through the sealing member 500, and is introduced into the sealing member 500.

[0110] Various modifications can be made to the pattern of the discharge layer 310 disposed inside or outside the sealing member 500 as needed or desired. In an example embodiment, the discharge layer 310 can be positioned inside or outside the sealing member 500 to be alternately arranged in a zigzag pattern on a plan view. In other words, while some of the discharge layer 310 can be positioned outside the sealing member 500 to be spaced apart from each other at a desired interval (e.g., a predetermined interval), the other discharge layer 310 can be positioned inside the sealing member 500 to be spaced apart from each other at a desired interval (e.g., a predetermined interval) corresponding to the space between the discharge layer 310 positioned outside the sealing member 500. Accordingly, the absorption of the remaining static electricity that passes through the space between the discharge layer 310 positioned outside the sealing member 500 can be increased by the discharge layer 310 positioned inside the sealing member 500.

[0111] The above-described configuration of the metal layer 340 (e.g., refer to Figure 8 ) can be applied in the same or substantially the same manner when some of the discharge layer 310 is positioned outside the sealing member 500 and the other discharge layer 310 is positioned inside the sealing member 500. For example, as shown in Figure 9 , the metal layer 340 can pass through an area in which the sealing member 500 is positioned (e.g., an area located under the sealing member 500). In this case, the upper surface of the metal layer 340 can be in contact with the lower surface of the gate electrode under the first electrode layer 330-1 and the lower surface of the gate electrode under the second electrode layer 330-2.

[0112] Further, in some embodiments, the above-described configuration of the second insulating layer 322 (e.g., refer to Figure 5 ) can be applied to any of the embodiments described with reference to Figures 6 to 9 , such that the second insulating layer 322 can be further disposed under some of the discharge layer 310 or all of the discharge layer 310.

[0113] Although the various structures of the display apparatus 1 are mainly described above, the present disclosure is not limited thereto. For example, the various structures of the display apparatus 1 described in the present disclosure can be applied to a method of manufacturing the display apparatus 1.

[0114] According to one or more of the above-described embodiments, various display apparatuses having an electrostatic discharge function can be implemented. However, the present disclosure is not limited to such functions, aspects, and features.

[0115] While certain example embodiments have been described, those skilled in the art having the benefit of this disclosure will readily appreciate that many modifications are possible without departing from the spirit and scope of this disclosure. It will be understood that the description of features or aspects within each embodiment is generally intended to be taken up as applicable to other similar features or aspects in other embodiments unless otherwise described. Accordingly, as would be apparent to one of ordinary skill in the art, except where otherwise indicated, features, characteristics, and / or elements described in connection with a particular embodiment are not necessarily limited to that particular embodiment, and can be employed in connection with other embodiments as well. It will be appreciated that the foregoing is a description of various example embodiments and is not intended to be interpreted as limiting the specific example embodiments disclosed herein and that various modifications to the disclosed example embodiments, as well as other example embodiments, are intended to be included within the spirit and scope of the disclosure as defined in the claims and the full scope of equivalents thereof.

Claims

1. A display device, the display device comprising: The lower substrate includes the display area and the non-display area; Thin-film transistors are located in the display area; A display element is located in the display area and is electrically connected to the thin-film transistor; as well as The discharge element is located in the non-display area. The discharge element includes at least one electrode layer, at least one discharge layer located on the at least one electrode layer, and at least one first insulating layer located between the at least one electrode layer and the at least one discharge layer. Wherein, the distance from the upper surface of the lower substrate to the upper surface of the at least one discharge layer is greater than or equal to the distance from the upper surface of the lower substrate to the upper surface of the top layer of the thin-film transistor, and The at least one electrode layer is electrically connected to a gate electrode located below the at least one electrode layer, so as to discharge the static electricity introduced by the at least one discharge layer via the gate electrode.

2. The display device according to claim 1, wherein, The display element includes a pixel electrode, a counter electrode, and an intermediate layer located between the pixel electrode and the counter electrode, the intermediate layer including an emitting layer.

3. The display device according to claim 2, wherein, The at least one discharge layer comprises the same material as the pixel electrode.

4. The display device according to claim 3, wherein, The at least one discharge layer has the same layer structure as the pixel electrode.

5. The display device according to claim 4, wherein, The direction from the edge of the lower substrate to the center of the lower substrate is a first direction, and the width of the upper surface of the at least one discharge layer in the first direction is less than or equal to the width of the upper surface of the pixel electrode in the first direction.

6. The display device according to claim 2, wherein, The at least one first insulating layer comprises the same material as the layer located below the pixel electrode and in contact with the pixel electrode.

7. The display device according to claim 6, wherein, The at least one first insulating layer has the same layer structure as the layer located below the pixel electrode and in contact with the pixel electrode.

8. The display device according to claim 7, wherein, The discharge element further includes a second insulating layer located between the at least one first insulating layer and the at least one discharge layer.

9. The display device according to claim 1, wherein, The discharge element includes: A first electrode layer, a first discharge layer located above the first electrode layer, and a first-first insulating layer located between the first electrode layer and the first discharge layer; and The second electrode layer, the second discharge layer located above the second electrode layer, and the first and second insulating layers located between the second electrode layer and the second discharge layer.

10. The display device of claim 9, further comprising a metal layer located on the lower substrate and electrically connecting the first electrode layer and the second electrode layer to each other.

11. The display device according to claim 9, wherein, The first electrode layer and the second electrode layer are integrally formed.

12. The display device according to claim 9, wherein, The first-first insulating layer and the first-second insulating layer are integrally formed.

13. The display device according to claim 9, further comprising: Upper base; as well as A sealing member is located at the non-display area of ​​the lower substrate and between the upper substrate and the lower substrate, the sealing member surrounding the display area. The first discharge layer is located outside the periphery of the sealing member, and the second discharge layer is located within the internal boundary defined by the sealing member.

14. The display device according to claim 1, wherein, The at least one electrode layer extends along at least a portion of the edge of the display area.

15. The display device according to claim 14, wherein, The at least one discharge layer includes a first discharge layer and a second discharge layer spaced apart from each other in the direction along which the at least one electrode layer extends.

16. The display device according to claim 14, wherein, The at least one discharge layer comprises a plurality of conductive layers spaced apart from each other in the direction along which the at least one electrode layer extends.

17. A display device, the display device comprising: The lower substrate includes the display area and the non-display area; A pixel circuit, located in the display area or the non-display area, and including a top conductive layer; A display element is located in the display area and is electrically connected to the pixel circuit; as well as The discharge element is located in the non-display area. The discharge element includes at least one electrode layer, at least one discharge layer located above the at least one electrode layer, and at least one first insulating layer located between the at least one electrode layer and the at least one discharge layer. Wherein, the distance from the upper surface of the lower substrate to the upper surface of the at least one discharge layer is greater than or equal to the distance from the upper surface of the lower substrate to the upper surface of the top conductive layer of the pixel circuit, and The at least one electrode layer is electrically connected to a gate electrode located below the at least one electrode layer, so as to discharge the static electricity introduced by the at least one discharge layer via the gate electrode.

18. The display device according to claim 17, wherein, The direction from the edge of the lower substrate to the center of the lower substrate is a first direction, and the width of the upper surface of the at least one discharge layer in the first direction is less than or equal to the width of the upper surface of the top conductive layer of the pixel circuit in the first direction.

19. The display device according to claim 17, wherein, The discharge element includes: A first electrode layer, a first discharge layer located above the first electrode layer, and a first-first insulating layer located between the first electrode layer and the first discharge layer; and The second electrode layer, the second discharge layer located above the second electrode layer, and the first and second insulating layers located between the second electrode layer and the second discharge layer.

20. The display device of claim 19, further comprising a metal layer located on the lower substrate and electrically connecting the first electrode layer and the second electrode layer to each other.

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