Integrated circuit for current detection, current detection circuit and calibration method thereof

By introducing a calibration circuit into the current detection circuit, the variable input voltage is converted into a calibration current, which solves the problem of inaccurate current detection caused by common-mode error and realizes high-precision current detection under a wide range of variable input voltage.

CN113655265BActive Publication Date: 2025-10-24CHENGDU MONOLITHIC POWER SYST
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Patent Information

Application Number
CN202110916227.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-08-24
Filing Date
2021-08-10
Publication Date
2025-10-24
Estimated Expiration
2041-08-10

AI Technical Summary

Technical Problem

In existing current detection circuits, common-mode error affects the accuracy of current detection, especially when the power supply provides a wide range of variable input voltages, leading to inaccuracy in the current detection signal.

Method used

By introducing a calibration circuit into the current sensing circuit, the variable input voltage is converted into a calibration current and fed into the current sensing operational amplifier through a low-impedance path, thereby reducing the influence of common-mode error and improving the accuracy of the current sensing signal.

Benefits of technology

It effectively reduces the change in current detection signal caused by variations in variable input voltage, improving the accuracy and reliability of current detection, especially in high-voltage applications.

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Abstract

The application discloses a current detection circuit, a calibration method thereof and an integrated circuit with the current detection circuit. The current detection circuit comprises: a current detection operational amplifier, a first input end of which is coupled to a first end of a current detection resistor to receive a variable input voltage, a second input end of which is coupled to a second end of the current detection resistor, and an output end of which provides a current detection signal representing a current flowing through the current detection resistor; and a calibration circuit coupled to the first input end of the current detection operational amplifier. The calibration circuit converts the variable input voltage into a calibration current and provides the calibration current to the current detection operational amplifier to reduce a change of the current detection signal caused by a change of the variable input voltage.
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Description

TECHNICAL FIELD

[0001] The present application relates to electronic circuits, and in particular, to a current sense circuit and its calibration method and integrated circuit for current sensing. BACKGROUND

[0002] In modern power management, current sense is widely used in precision closed loop control or circuit protection. One common current sense scheme is to insert a sense resistor into the current path to conduct the desired current, and then measure the voltage across the sense resistor by a current sense op-amp.

[0003] Figure 1 A prior art current sense op-amp is shown. In the circuit shown, a sense resistor RSNS is coupled to sense a current Iin. The current sense op-amp includes an operational amplifier OP and resistors R1-R4, and is coupled to the sense resistor RSNS to receive voltages Vin1 and Vin2, and to generate a current sense signal Vs_out based thereon. Figure 1

[0004] Ideally, the current sense signal Vs_out is directly proportional to the current Iin, and only related to it. But in practical applications, this conclusion is not correct due to the limited common mode rejection benefit of the current sense op-amp. Common mode rejection is the characteristic of an amplifier that rejects any common mode signal (common signal at both inputs) at the output, and amplifies any differential mode signal (potential difference between the two inputs). Common mode rejection can be expressed as common mode rejection ratio:

[0005]

[0006] where Ad is the differential mode gain of the current sense op-amp, and Acm is the common mode gain of the current sense op-amp. Then the actual output of the current sense signal Vs_out in (1) can be expressed as: Figure 1

[0007] Vs_out = Vd * Ad + Vcm * Acm (2)

[0008] where Vd is the differential mode input voltage of the current sense op-amp, and its formula is:

[0009] Vd = Vin1 - Vin2 = Iin * RSNS (3)

[0010] Vcm is the common mode input voltage of the current sense op-amp, and its formula is:

[0011]

[0012] From formula (2), it can be seen that Figure 1 ​​The current sensing accuracy of the circuit shown is affected by the common mode error (Vcm*Acm). Since the common mode gain Acm is mainly determined by the mismatch between resistors R1-R4, a common solution to improve the current sensing accuracy is to reduce the resistor mismatch, for example, using larger die area for the resistors or laser trimming the resistors. However, this will inevitably increase the overall cost. SUMMARY

[0013] In view of the problems in the prior art, the purpose of the present application is to provide a current sensing circuit that can reduce the effect of common mode error to improve the current sensing accuracy.

[0014] According to an embodiment of the present application, a current sensing circuit is provided for sensing a current flowing through a current sense resistor, wherein the current sense resistor receives a variable input voltage. The current sensing circuit comprises: a current sensing op-amp having a first input, a second input and an output, wherein the first input is coupled to a first terminal of the current sense resistor to receive the variable input voltage, the second input is coupled to a second terminal of the current sense resistor, and the output provides a current sensing signal representing the current flowing through the current sense resistor; and a calibration circuit coupled to the first input of the current sensing op-amp, wherein the calibration circuit converts the variable input voltage into a calibration current and provides the calibration current to the current sensing op-amp, thereby reducing the variation of the current sensing signal caused by the variation of the variable input voltage.

[0015] According to another embodiment of the present application, an integrated circuit for current sensing is provided, comprising: a first pin coupled to a first terminal of a current sense resistor to receive a variable input voltage, a second pin coupled to a second terminal of the current sense resistor, a third pin providing a current sensing signal representing a current flowing through the current sense resistor, and a fourth pin receiving a supply voltage, wherein the variable input voltage is generated by a power converter based on the supply voltage; an operational amplifier having a first input, a second input and an output, wherein the output is coupled to the third pin; a first resistor coupled between the first pin and the first input of the operational amplifier; a second resistor coupled between the second input of the operational amplifier and a reference voltage; a third resistor coupled between the second pin and the second input of the operational amplifier; and a linear regulator coupled to the fourth pin and generating a first supply voltage based on the supply voltage.

[0016] According to yet another embodiment of the present application, a calibration method for a current sensing circuit is provided, wherein the current sensing circuit is used to sense a current flowing through a current sense resistor. The calibration method comprises: converting, by a first transimpedance amplifier, a voltage across the current sense resistor into an amplified current; converting, by a calibration circuit, a variable input voltage at a first terminal of the current sense resistor into a calibration current based on a trimming code; and converting, by a transresistance amplifier, a combination of the amplified current and the calibration current into a current sensing signal representing the current flowing through the current sense resistor.

[0017] According to the embodiment of the present application, when the common-mode rejection of the current detection operational amplifier is not good, such as the current detection operational amplifier resistor mismatch, the calibration circuit converts the variable input voltage into calibration current and provides the calibration current to the current detection operational amplifier, so as to reduce the change of the current detection signal caused by the change of the variable input voltage, and improve the current detection precision. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 A current detection operational amplifier of the prior art is shown;

[0019] Figure 2 A basic schematic diagram of a current detection circuit 200 according to an embodiment of the present application is shown;

[0020] Figure 3 A block diagram of a current detection circuit 200A according to an embodiment of the present application is shown;

[0021] Figure 4 A graph showing the relationship between the calibration current and the variable input voltage under different trimming codes according to an embodiment of the present application is shown;

[0022] Figure 5 A trimming flowchart of a current detection circuit used in product testing according to an embodiment of the present application is shown;

[0023] Figure 6 A block diagram of a current detection circuit 200B having a high-voltage region and a low-voltage region according to an embodiment of the present application is shown;

[0024] Figure 7 A circuit diagram of a first transconductance amplifier 202A and a transimpedance amplifier 203A according to an embodiment of the present application is shown;

[0025] Figure 8 A circuit diagram of a differential trimming circuit 211A and a second transconductance amplifier 212A according to an embodiment of the present application is shown;

[0026] Figure 9 A circuit diagram of a signal conversion circuit 204A according to an embodiment of the present application is shown;

[0027] Figures 10 to 12 Block diagrams of current detection circuits according to other embodiments of the present application are shown respectively;

[0028] Figure 13 An integrated circuit integrating a current detection circuit according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0029] Specific embodiments of the present application will now be described in detail with reference to the following figures. Like numbers in different figures represent the same or similar elements. Further, various implementation examples will be described and / or illustrated herein in the context of methods. However, those skilled in the art will understand that the legal scope of the present application is not limited to methods. In other words, the present application extends to any combination of hardware and / or software arranged to work the underlying principles of the present application. In addition, the following description of some embodiments, particularly with respect to the description of the figures, is not meant to limit the application to the specific illustrative embodiments described. Those skilled in the art will recognize that changes can be made to form and implement alternate embodiments of the application having down to the scope of the intent of the application. Those skilled in the art will further recognize that some of the features of the various embodiments described herein can be combined or deleted to form alternate embodiments of the application. In addition, some of the features of the application could be applied to other embodiments of the application.

[0030] Throughout this specification, reference has been made to "one embodiment," "an embodiment," "one example," or "an example" meaning that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in at least one embodiment of the application. The appearances of the phrases "in one embodiment," "in an embodiment," "one example," or "an example" in various places in the specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures, or characteristics can be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art will appreciate that the drawings provided herein are for illustration purposes and are not necessarily drawn to scale. It is understood that when a component is "connected to" or "coupled to" another component, it can be directly connected or coupled to the other component or intervening components can be present. In contrast, when a component is "directly connected to" or "directly coupled to" another component, there are no intervening components present. Like reference numerals designate like elements. The term "and / or" as used herein refers to any and all combinations of one or more of the associated listed items.

[0031] As mentioned above, the current sensing accuracy of conventional current sensing op-amps is mainly limited by the common-mode error. The current sensing resistor is coupled to the power supply to detect the current provided by the power supply to the downstream circuit, which provides a wide range of variable input voltage, and the situation is even worse in this application. In this case, the common-mode input voltage can be described as:

[0032]

[0033] where Vhv represents the variable input voltage supplied by the power supply. The current sensing signal can be represented as:

[0034]

[0035] As can be seen from equation (6), although the current Iin flowing through the current sensing resistor RSNS is constant, the current sensing signal Vs_out will change with the change of the variable input voltage Vhv supplied by the power supply. To solve this problem, embodiments of the present application demonstrate a current sensing circuit in which a calibration current generated based on the variable input voltage Vhv is fed into the current sensing op-amp, thereby reducing the change of the current sensing signal caused by the change of the variable input voltage.

[0036] Figure 2 A basic schematic of a current sensing circuit 200 according to an embodiment of the present application is shown. A current sense resistor RSNS is coupled between a power supply and a downstream circuit to sense a current lin. The current sense resistor RSNS has a first end and a second end, where the first end is coupled to the power supply to receive a variable input voltage Vhv and the second end is coupled to the downstream circuit. During normal operation, the variable input voltage Vhv can vary over a large voltage range, for example, from 1 V to 36 V. The current sensing op-amp includes an operational amplifier Al and resistors R1-R4 coupled across the current sense resistor RSNS to generate a current sense signal Vs_out representative of the current lin.

[0037] In Figure 2 The operational amplifier Al has a non-inverting input, an inverting input, and an output. A first end of the resistor R1 is coupled to the first end of the current sense resistor RSNS, and a second end of the resistor R1 is coupled to the non-inverting input of the operational amplifier Al. A first end of the resistor R2 is coupled to the non-inverting input of the operational amplifier Al, and a second end of the resistor R2 is coupled to a reference voltage Vref (e.g., a reference ground). A first end of the resistor R3 is coupled to the second end of the current sense resistor RSNS, and a second end of the resistor R3 is coupled to the inverting input of the operational amplifier Al. A first end of the resistor R4 is coupled to the inverting input of the operational amplifier Al, and a second end of the resistor R4 is coupled to the output of the operational amplifier Al. The operational amplifier Al generates the current sense signal Vs_out at its output based on a voltage Vhp at the non-inverting input and a voltage Vhn at the inverting input.

[0038] In contrast to the prior solution shown in Figure 1 Figure 2 The circuit further includes a calibration circuit 201. The calibration circuit 201 is coupled to the first end of the current sense resistor RSNS and converts the variable input voltage Vhv into a calibration current Ical. The calibration current Ical can be fed into the operational amplifier Al through a low impedance path to eliminate or minimize the V hv cm , *A, thereby reducing the variation of the current sense signal Vs out caused by the variation of the variable input voltage Vhv. In some embodiments, the calibration current Ical is proportional to the variable input voltage Vhv.

[0039] Figure 3 ​A block diagram of a current sensing circuit 200A according to an embodiment of the present application is shown. The operational amplifier Al includes a first trans-impedance amplifier 202, a trans-resistance amplifier 203 and a signal conversion circuit 204. The first trans-impedance amplifier 202 has a non-inverting input, an inverting input, a first output and a second output, wherein the non-inverting input is coupled to a common terminal of resistors Rl and R2 to receive a voltage Vhp, and the inverting input is coupled to a common terminal of resistors R3 and R4 to receive a voltage Vhn. The first trans-impedance amplifier 202 generates a first amplified current Ip and a second amplified current In at its first output and second output, respectively, based on the voltages Vhp and Vhn. The trans-resistance amplifier 203 has a first input, a second input, a first output and a second output, wherein the first input of the trans-resistance amplifier 203 is coupled to the first output of the first trans-impedance amplifier 202, and the second input of the trans-resistance amplifier 203 is coupled to the second output of the first trans-impedance amplifier 202. The signal conversion circuit 204 has a first input, a second input and an output, wherein the first input of the signal conversion circuit 204 is coupled to the first output of the trans-resistance amplifier 203 to receive a first voltage Vop, and the second input of the signal conversion circuit 204 is coupled to the second output of the trans-resistance amplifier 203 to receive a second voltage Von. The signal conversion circuit 204 generates a current sensing signal Vs_out at its output based on the first voltage Vop and the second voltage Von.

[0040] In Figure 3In the illustrated embodiment, the calibration circuit 201 A includes a differential trim circuit 211 and a second trans-impedance amplifier 212. The differential trim circuit 211 has an input, a first output, and a second output, where the input is coupled to the first end of the sense resistor RSNS. The differential trim circuit 211 converts the variable input voltage Vhv into a first calibration voltage Vcal+ at its first output and a second calibration voltage Vcal- at its second output. The second trans-impedance amplifier 212 has a same-direction input, an opposite-direction input, a first output, and a second output, where the same-direction input is coupled to the first output of the differential trim circuit 211 to receive the first calibration voltage Vcal+, and the opposite-direction input is coupled to the second output of the differential trim circuit 211 to receive the second calibration voltage Vcal-. The first output of the second trans-impedance amplifier 212 is coupled to the first input of the trans-impedance amplifier 203, and the second output of the second trans-impedance amplifier 212 is coupled to the second input of the trans-impedance amplifier 203. The second trans-impedance amplifier 212 generates a first calibration current Ical+ at its first output and a second calibration current Ical- at its second output based on the calibration voltages Vcal+ and Vcal-, respectively. The calibration currents Ical+ and Ical- are matched, they can have the same magnitude that varies (e.g., proportionally) with the variable input voltage Vhv, but are in opposite directions. When a calibration current flows from the second trans-impedance amplifier 212 into the trans-impedance amplifier 203, then another calibration current flows from the trans-impedance amplifier 203 into the second trans-impedance amplifier 212, and vice versa.

[0041] If the equivalent resistance of the trans-impedance amplifier 203 is RL, then we have:

[0042] Vop-Von = (Ip-In) * RL + [(Ical+) - (Ical-)] * RL (7)

[0043] The above equation shows how the calibration currents are fed into Figure 3 The illustrated operational amplifier. The calibration is performed in the current domain through a low-impedance path after the initial gain stage (e.g., 202), so the accuracy requirement of the calibration circuit is reduced. In addition, this calibration is independent of the components in the input signal path and their associated variations.

[0044] If the transconductance of the first trans-impedance amplifier 202 is gml, then we have:

[0045] Ip-In = (Vhp-Vhn) * gml (8)

[0046] The difference between the calibration voltages Vcal+ and Vcal- is a function of the variable input voltage Vhv, and the function f(Vhv) can be adjusted by the trim code. If the transconductance of the second trans-impedance amplifier 212 is gm2, then the calibration currents Ical+ and Ical- can be expressed as:

[0047] (Ical+)-(Ical-) = [(Vcal+)-(Vcal-)] * gm2 = f(Vhv) * gm2 (9)

[0048] Combining equations (6) to (8), we have:

[0049] Vop-Von = (Vhp-Vhn) * gm1 * RL + f(Vhv) * gm2 * RL (10)

[0050] The trim code for adjusting the function f(Vhv) is usually determined at product testing. Therefore, when the trim code changes, the calibration currents Ical+ and Ical- and the calibration voltages Vcal+ and Vcal- also change.

[0051] Figure 4 A graph showing the relationship between the calibration currents and the variable input voltage under different trim codes according to an embodiment of the present application is shown. From the waveforms, it can be seen that when the trim code is 0, both the calibration currents Ical+ and Ical- are 0. The dashed waveforms correspond to the calibration currents under the maximum trim code, and the dotted waveforms correspond to the calibration currents under the minimum trim code. A trim code of 0 means that the calibration circuit does not provide any differential calibration current [(Ical+)-(Ical-)] to the current sense op-amp Al. The maximum trim code causes the maximum positive differential calibration current to be applied to the current sense op-amp Al by adding current in the positive path (e.g. the first input of the transimpedance amplifier 203) and subtracting current in the negative path (e.g. the second input of the transimpedance amplifier 203). The minimum trim code works in the opposite mode. The minimum trim code causes the maximum negative differential calibration current to be applied to the current sense op-amp Al by subtracting current in the positive path and adding current in the negative path.

[0052] Figure 5 A flowchart for trimming the current sense circuit in product testing according to an embodiment of the present application is shown, comprising steps S301-S305.

[0053] At step S301, the variable input voltage Vhv is set to a first voltage value Vhv1, and at step S302, the current sense signal Vs_out is measured to obtain a first current sense voltage Vmeas1.

[0054] At step S303, the variable input voltage Vhv is set to a second voltage value Vhv2, and at step S304, the current sense signal Vs_out is measured to obtain a second current sense voltage Vmeas2.

[0055] At step S305, a trimming code is generated based on the difference between the voltages Vmeasl and Vmeas2, which can be achieved by calculation or look-up table. The trimming code can then be programmed, for example, into a one-time programmable memory.

[0056] In some embodiments, due to process and mismatch variations, a second adjustment of the trimming code is needed. At step S306, the trimming code obtained at step S305 is provided to the differential trimming circuit 211, and steps S301 to S304 are performed again to determine whether the difference between Vmeasl and Vmeas2 is close to 0. If the difference between Vmeasl and Vmeas2 is close to 0, the flow jumps to step S307 to program the memory. Otherwise, the flow jumps to step S308 to further adjust the trimming code.

[0057] In some exemplary embodiments, the first voltage value Vhv1 is the maximum value of the variable input voltage Vhv (e.g. 36V), and the second voltage value Vhv2 is the minimum value of the variable input voltage Vhv (e.g. 1V). However, this is not intended to limit the present application, and other values within the operating range of Vhv can also be used.

[0058] Figure 6 A block diagram of a current sensing circuit 200B with high voltage and low voltage regions according to an embodiment of the present application is shown. The trans-impedance amplifier 203, the signal conversion circuit 204 and the second trans-impedance amplifier 212 are all powered by a first supply voltage VDD Lv (e.g. 5V supplied by a linear regulator) which is lower than the variable input voltage Vhv, and thus operate in the low voltage region. The first trans-impedance amplifier 202 is powered by a second supply voltage VDD hv. The second supply voltage VDD hv can be equal to the variable input voltage Vhv, or a voltage higher than the variable input voltage Vhv provided by a positive charge pump. Thus, the differential trimming circuit 211 and the first trans-impedance amplifier 202 both operate in the high voltage region.

[0059] From Figure 6 It can be seen that since the calibration is performed directly in the low voltage region, for applications where overvoltage situation can occur but the reliability requirement is relatively high, such as automotive electronics, an internal circuit protection scheme with simpler structure can still be used. In addition, if the input signal path is inserted before the operational amplifier Al completes the high voltage to low voltage signal conversion and initial amplification, parasitic parameters which can affect the precision of the operational amplifier can be introduced, Figure 6 The embodiment shown avoids this problem. The current sensing circuit is connected to a low noise linear regulator (LDO), and all calibration operations are performed in the low voltage region, further improving the noise immunity of the current sensing circuit.

[0060] Figure 7A circuit diagram of the first trans-impedance amplifier 202A and the trans-impedance amplifier 203A according to an embodiment of the present application is shown. The first trans-impedance amplifier 202A includes transistors M1-M8, resistors R5, R6 and current sources IS0-IS6, which are connected as shown in FIG. 7. The transistors M1-M4, the resistors R5, R6 and the current sources IS1, IS2 form a level shifting circuit. The output of the level shifting circuit is provided to an initial amplification stage, which includes transistors M5-M8 and current sources IS0, IS3-IS4, to generate a first amplification current Ip and a second amplification current In.

[0061] The transistors described above each have a drain, a source and a gate. The drains of the transistors M1 and M2 are each coupled to the second supply voltage VDD-hv. The gate of the transistor M1 receives the voltage Vhn and the gate of the transistor M2 receives the voltage Vhp. The resistor R5 is coupled between the source of the transistor M1 and the drain of the transistor M3. The current source IS1 is coupled between the source of the transistor M3 and the reference ground. The resistor R6 is coupled between the source of the transistor M2 and the drain of the transistor M4. The current source IS2 is coupled between the source of the transistor M4 and the reference ground.

[0062] The first end of the current source IS0 is coupled to receive the second supply voltage VDD-hv and the second end is coupled to the sources of the transistors M5 and M6. The gate of the transistor M5 is coupled between the source of the transistor M1 and the first end of the resistor R5. The source of the transistor M7 is coupled to the drain of the transistor M5 and the gate of the transistor M7 is coupled between the second end of the resistor R5 and the drain of the transistor M3. The drain of the transistor M7 is coupled together with the first end of the current source IS3 and to the trans-impedance amplifier 203A to provide the first amplification current Ip. The second end of the current source IS3 is coupled to the reference ground. The gate of the transistor M6 is coupled between the source of the transistor M2 and the first end of the resistor R6. The source of the transistor M8 is coupled to the drain of the transistor M6 and the gate of the transistor M8 is coupled between the second end of the resistor R6 and the drain of the transistor M4. The drain of the transistor M8 is coupled together with the first end of the current source IS4 and to the trans-impedance amplifier 203A to provide the second amplification current In. The second end of the current source IS4 is coupled to the reference ground.

[0063] The trans-impedance amplifier 203A includes current sources IS7- IS10. The current sources IS7 and IS8 have a first terminal, both coupled to receive a first supply voltage VDD Lv. The current source IS9 is coupled between a second terminal of the current source IS7 and a reference ground, and the current source IS10 is coupled between a second terminal of the current source IS8 and the reference ground. A first amplification current Ip and a first calibration current Ical+ are provided to a common terminal of the current sources IS7 and IS9, resulting in a first voltage Vop. A second amplification current In and a second calibration current Ical- are provided to a common terminal of the current sources IS8 and IS10, resulting in a second voltage Von. Since the output resistances of all current sources are finite, the equivalent input impedance RL of the trans-impedance amplifier 203A can be represented as:

[0064] RL = RIS9 / / RIS7 = RIS10 / / RIS8 (11)

[0065] where RIS7-RIS10 are the output resistances of the current sources IS7-IS10.

[0066] In one embodiment, the initial amplification stage of the first transconductance amplifier 202A further includes a current source IS5 coupled in parallel to the current source IS3, and a current source IS6 coupled in parallel to the current source IS4, and the trans-impedance amplifier 203A further includes resistors Rfb1, Rfb2 and an error amplifier EA. The resistors Rfb1 and Rfb2 are used to detect the common-mode voltage of the first voltage Vop and the second voltage Von. The error amplifier EA compares the detected common-mode voltage with a reference threshold voltage CMREF, and generates a feedback signal CMFB based on the comparison result to control the current sources IS5 and IS6.

[0067] Figure 8 A circuit diagram of the differential trimming circuit 211A and the second transconductance amplifier 212A according to one embodiment of the present application is shown. The differential trimming circuit 211A includes resistors R7-R10, variable resistors Rtriml, Rtrim2, and transistors M9, M10. The resistors R7, R9, Rtriml and the transistor M9 are coupled in series between a variable input voltage Vhv and a reference ground. The resistors R8, R10, Rtrim2 and the transistor M10 are likewise coupled in series between the variable input voltage Vhv and the reference ground. The variable resistors Rtriml and Rtrim2 have their resistance values varied with the variation of a trimming code, so that the calibration voltages Vcal+ and Vcal- can be trimmed in opposite ways by matching parameters.

[0068] According to Figure 8In the illustrated embodiment, the first end of resistor R7 is coupled to the variable input voltage Vhv, and the second end is coupled to the drain of transistor M9. The source of transistor M9 and the first end of resistor R9 are coupled together and provide a first calibration voltage Vcal+. Variable resistor Rtrim1 is coupled between the second end of resistor R9 and the reference ground. The first end of resistor R8 is coupled to the variable input voltage Vhv, and the second end is coupled to the drain of transistor M10. The source of transistor M10 and the first end of resistor R10 are coupled together and provide a second calibration voltage Vcal-. Variable resistor Rtrim2 is coupled between the second end of resistor R10 and the reference ground. However, it is worth noting that these components and connection methods are not restrictive, and the differential fine-tuning circuit can also adopt other suitable circuit structures.

[0069] The second transconductance amplifier 212A includes transistors M11, M12 and current sources IS11, IS12, which are connected as follows: Figure 8 The second transconductance amplifier 212A converts the calibration voltages Vcal+ and Vcal- into calibration currents Ical+ and Ical-, and then feeds the calibration currents into the operational amplifier A1 through a low impedance path.

[0070] Figure 9 FIG2 shows a circuit diagram of a signal conversion circuit 204A according to an embodiment of the present invention. The signal conversion circuit receives a first voltage Vop and a second voltage Von from a transimpedance amplifier, amplifies a differential voltage (Vop-Von), and converts the differential voltage into a current detection signal Vs_out.

[0071] although Figure 9 The signal conversion circuit shown can perform signal amplification and differential signal conversion, but this is not intended to limit the present invention. The signal conversion circuit can only perform signal amplification, such as Figure 10 As shown, the current detection amplifier has differential outputs Vs_outp and Vs_outn. In other embodiments, the signal conversion circuit can be omitted, such as Figure 11 In this case, Vop and Von generated by the transimpedance amplifier 203 are directly used as the outputs of the current detection operational amplifier.

[0072] The current detection circuit according to the embodiment of the present invention can be chopper-stabilized. Figure 12 As shown, the chopping switches 210 , 220 and 230 chop the calibration currents Ical+, Ical−, the input of the first transconductance amplifier 202 and the output of the transimpedance amplifier 203 , respectively.

[0073] Figure 13An integrated circuit with integrated current sense circuit is shown. The integrated circuit has multiple pins and integrates a current sense op-amp and other modules.

[0074] As shown, a power supply provides a supply voltage Vbat, which is exemplarily up to 36V. A power converter (e.g., a buck converter or a buck-boost converter) is coupled to the power supply to receive the supply voltage Vbat and generate a variable input voltage Vhv, which can vary between 1V and 36V. A sense resistor RSNS is coupled to the power converter to receive the variable input voltage Vhv and conduct a current lin flowing through the sense resistor RSNS. Figure 13 A pin P11 of the integrated circuit is coupled to a first end of the sense resistor RSNS to receive the variable input voltage Vhv, a pin P22 is coupled to a second end of the sense resistor RSNS, and a pin P33 provides a current sense signal Vs_out representing the current lin to an external circuit, such as an external microcontroller (MCU). The current sense op-amp includes resistors R1-R4 and an operational amplifier Al, where first ends of the resistors R1 and R3 are coupled to the pins P11 and P22, respectively. An output of the operational amplifier Al is coupled to the pin P33. The sense resistor RSNS cannot be too high to avoid generating loss, nor too low to obtain high sense accuracy. In some embodiments, the sense resistor RSNS has a resistance between 5-10 milliohms. For example, the sense resistor RSNS can have a resistance of 7.5 milliohms, the resistors R1 and R3 can have a resistance of 10 kiloohms, and the resistors R2 and R4 can have a resistance of 1 megaohm.

[0075] To reduce the variation of the current sense signal Vs_out caused by the variation of the variable input voltage Vhv, some embodiments integrate a calibration circuit 201 into the integrated circuit. The calibration circuit 201 is coupled to the pin P11 to receive the variable input voltage Vhv and convert the variable input voltage Vhv into a calibration current Ical. The calibration current Ical is fed into the operational amplifier Al through a low impedance path to cancel or minimize the V hv *A cm .

[0076] A pin P44 of the integrated circuit is coupled to the power supply to receive the supply voltage Vbat. A linear voltage regulator (LDO) 205 inside the integrated circuit receives the supply voltage Vbat from the pin P44 and converts it into a first supply voltage VDD-lv. In some embodiments, the integrated circuit also integrates a first supply circuit 206 to receive the supply voltage Vbat from the pin P44 and supply power to the MCU through a pin P55.

[0077]

[0078] ​The integrated circuit further integrates a second power supply circuit 207 coupled to the second end of the current sense resistor RSNS through pin P66. The second power supply circuit 207 supplies power to a load through at least one pin P77. In further embodiments, the integrated circuit also includes at least one pin P88 to receive a control signal from the MCU, which is used to control the second power supply circuit 207.

[0079] The first power supply circuit 206 and the second power supply circuit 207 can use various topologies. For example, the first power supply circuit 206 can include two transistors that, together with external components, form a buck converter. The second power supply circuit 207 can include four transistors in a full-bridge circuit that, together with external components, can regulate the power supplied to the load.

[0080] Although the above embodiments show many detailed circuits, it is contemplated by those skilled in the art that these detailed circuits are only for illustration and not intended to limit the present application. Other suitable circuit structures with the same or similar functions also satisfy the spirit and scope of the present application. In addition to MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), Figure 7 and Figure 8 The circuits shown can also use other suitable semiconductor devices. The reference ground used above can be replaced by a negative voltage provided by a negative charge pump. In addition, the polarities of the current and voltage signals shown in the figures are for better illustration and can be adjusted or exchanged according to actual applications.

[0081] In the specification, related terms such as first and second, etc. can only be used to distinguish one entity or action from another entity or action, and do not necessarily or imply any relationship or order between these entities or actions. The numerical order such as "first", "second", "third" etc. only refers to different individuals in a plurality of individuals, and does not mean any order or sequence, unless the claim language is specifically limited. The order of the text in any one claim does not mean that the processing steps must be carried out in the order of time or logical order, unless the claim language is specifically limited. These processing steps can be interchanged in any order without departing from the scope of the present application, as long as such interchanges do not make the claim language contradictory and do not appear logically absurd.

[0082] Although the present application has been described with reference to several exemplary embodiments, it should be understood that the terms used are illustrative and exemplary, rather than limiting. Since the present application can be embodied in many different forms without departing from the spirit or essential characteristics thereof, it should be understood that the above-described embodiments are not limited to any of the foregoing details, but are to be broadly interpreted in the spirit and scope of the appended claims, and all changes and modifications that fall within the limits of the claims or their equivalents are intended to be embraced by the foregoing disclosure.

Claims

1. A current sensing circuit for sensing a current flowing through a current sense resistor, wherein the current sense resistor receives a variable input voltage, the current sensing circuit comprising: a current sensing op-amp having a first input, a second input, and an output, wherein the first input is coupled to a first terminal of the current sense resistor to receive the variable input voltage, the second input is coupled to a second terminal of the current sense resistor, and the output provides a current sensing signal representative of the current flowing through the current sense resistor; and a calibration circuit coupled to the first input of the current sensing op-amp, wherein the calibration circuit converts the variable input voltage into a calibration current and provides the calibration current to the current sensing op-amp to reduce variations in the current sensing signal caused by variations in the variable input voltage; wherein the current sensing op-amp comprises: an operational amplifier having a first input, a second input, and an output, wherein the output provides the current sensing signal; a first resistor having a first terminal and a second terminal, wherein the first terminal is coupled to the first terminal of the current sense resistor to receive the variable input voltage, and the second terminal is coupled to the first input of the operational amplifier; a second resistor coupled between the first input of the operational amplifier and the second terminal of the first resistor; a third resistor having a first terminal and a second terminal, wherein the first terminal is coupled to the second terminal of the current sense resistor, and the second terminal is coupled to the second input of the operational amplifier; and a fourth resistor coupled between the second input of the operational amplifier and the output; wherein the operational amplifier comprises: a first transconductance amplifier having a first input, a second input, a first output, and a second output, wherein the first input is coupled to a common terminal of the first resistor and the second resistor, the second input is coupled to a common terminal of the third resistor and the fourth resistor, and the first transconductance amplifier generates a first amplification current and a second amplification current at its first output and second output, respectively, based on voltages at its first input and second input; and a transimpedance amplifier having a first input, a second input, a first output, and a second output, wherein the first input of the transimpedance amplifier is coupled to the first output of the first transconductance amplifier, the second input of the transimpedance amplifier is coupled to the second output of the first transconductance amplifier, and the calibration current is fed into the inputs of the transimpedance amplifier; wherein the calibration circuit comprises: a differential trimming circuit having an input, a first output, and a second output, wherein the input is coupled to the first terminal of the first resistor, and the differential trimming circuit generates a first calibration voltage and a second calibration voltage at its first output and second output, respectively, based on the variable input voltage and a trimming code; and a current mirror having an input and an output, wherein the input is coupled to the first output of the differential trimming circuit, and the current mirror generates a current at its output based on the first calibration voltage. a second transconductance amplifier having a first input, a second input, a first output, and a second output, wherein the first input of the second transconductance amplifier is coupled to the first output of the differential trimming circuit, the second input of the second transconductance amplifier is coupled to the second output of the differential trimming circuit, the first output of the second transconductance amplifier is coupled to the first input of the transimpedance amplifier, the second output of the second transconductance amplifier is coupled to the second input of the transimpedance amplifier, the second transconductance amplifier generates a first calibration current and a second calibration current at its first output and second output, respectively, based on the first calibration voltage and the second calibration voltage; 2. The current sensing circuit of claim 1, wherein the operational amplifier further comprises: a signal conversion circuit having a first input, a second input, and an output, wherein the first input of the signal conversion circuit is coupled to the first output of the transimpedance amplifier to receive the first voltage, the second input of the signal conversion circuit is coupled to the second output of the transimpedance amplifier to receive the second voltage, the signal conversion circuit generates a current sensing signal at its output based on the first voltage and the second voltage; 3. The current sensing circuit of claim 1, wherein the transimpedance amplifier and the second transconductance amplifier are powered by a first supply voltage, the first transconductance amplifier is powered by a second supply voltage, wherein the first supply voltage is lower than the second supply voltage.

4. The current sensing circuit of claim 1, further comprising: a first chopping switch for chopping the calibration current; a second chopping switch for chopping the voltage at the first input and the second input of the first transconductance amplifier, respectively; and a third chopping switch for chopping the voltage at the first output and the second output of the transimpedance amplifier, respectively.

5. An integrated circuit for current sensing, comprising: a first pin coupled to a first end of a current sense resistor to receive a variable input voltage; a second pin coupled to a second end of the current sense resistor; a third pin to provide a current sensing signal representing a current flowing through the current sense resistor; a fourth pin to receive a supply voltage, wherein a power converter is coupled between the first pin and the fourth pin and generates the variable input voltage based on the supply voltage; an operational amplifier having a first input, a second input, and an output, wherein the output is coupled to the third pin; a first resistor coupled between the first pin and the first input of the operational amplifier; a second resistor coupled between the second input of the operational amplifier and a reference voltage; a third resistor coupled between the second pin and the second input of the operational amplifier; a fourth resistor coupled between the second input of the operational amplifier and the output; a calibration circuit coupled to the first pin, wherein the calibration circuit converts the variable input voltage into a calibration current and provides the calibration current to the operational amplifier to reduce a variation of the current sensing signal caused by a variation of the variable input voltage; and a linear regulator coupled to the fourth pin to generate a first supply voltage based on the supply voltage; wherein the operational amplifier comprises: a first trans-impedance amplifier having a first input, a second input, a first output, and a second output, wherein the first input of the first trans-impedance amplifier is coupled to a common terminal of the first resistor and the second resistor, the second input of the first trans-impedance amplifier is coupled to a common terminal of the third resistor and the fourth resistor, the first trans-impedance amplifier generates a first amplified current and a second amplified current at the first output and the second output thereof, respectively, based on voltages at the first input and the second input thereof; and a trans-impedance amplifier having a first input, a second input, a first output, and a second output, wherein the first input of the trans-impedance amplifier is coupled to the first output of the first trans-impedance amplifier, the second input of the trans-impedance amplifier is coupled to the second output of the first trans-impedance amplifier, a calibration current is fed into the inputs of the trans-impedance amplifier; wherein the calibration circuit comprises: a differential trimming circuit having an input, a first output, and a second output, wherein the input is coupled to a first terminal of the first resistor, the differential trimming circuit generates a first calibration voltage and a second calibration voltage at the first output and the second output thereof, respectively, based on a variable input voltage and a trimming code; and a second trans-impedance amplifier having a first input, a second input, a first output, and a second output, wherein the first input of the second trans-impedance amplifier is coupled to the first output of the differential trimming circuit, the second input of the second trans-impedance amplifier is coupled to the second output of the differential trimming circuit, the first output of the second trans-impedance amplifier is coupled to the first input of the trans-impedance amplifier, the second output of the second trans-impedance amplifier is coupled to the second input of the trans-impedance amplifier, the second trans-impedance amplifier generates a first calibration current and a second calibration current at the first output and the second output thereof, respectively, based on the first calibration voltage and the second calibration voltage.

6. The integrated circuit of claim 5, further comprising: a fifth pin coupled to the microcontroller, wherein the microcontroller is coupled to the third pin to receive the current detection signal; and a first power supply circuit coupled between the fourth pin and the fifth pin and supplies power to the microcontroller based on the supply voltage.

7. The integrated circuit of claim 6, further comprising: a sixth pin coupled to the second terminal of the current sense resistor; a seventh pin coupled to the load; and a second power supply circuit coupled between the sixth pin and the seventh pin and supplies power to the load based on the voltage at the second terminal of the current sense resistor.

8. The integrated circuit of claim 7, further comprising: an eighth pin coupled to the microcontroller to receive a control signal from the microcontroller to control the second power supply circuit.

9. The integrated circuit of claim 5, wherein the operational amplifier further comprises: a signal conversion circuit having a first input, a second input, and an output, wherein the first input of the signal conversion circuit is coupled to the first output of the trans-impedance amplifier to receive the first voltage, the second input of the signal conversion circuit is coupled to the second output of the trans-impedance amplifier to receive the second voltage, the signal conversion circuit generates the current detection signal at the output thereof based on the first voltage and the second voltage. ​ 10. The integrated circuit of claim 5, wherein the transimpedance amplifier and the second transconductance amplifier are powered by a first supply voltage, the first transconductance amplifier is powered by a second supply voltage, and the first supply voltage is lower than the second supply voltage.

11. The integrated circuit of claim 5, further comprising: a first chopping switch for chopping the calibration current; a second chopping switch for chopping the voltage at the first input and the second input of the first transconductance amplifier, respectively; and a third chopping switch for chopping the voltage at the first output and the second output of the transimpedance amplifier, respectively.

12. A calibration method for the current sensing circuit of any one of claims 1 to 4, wherein the current sensing circuit is configured to sense a current flowing through the current sense resistor, the calibration method comprising: converting, by the first transconductance amplifier, a voltage across the current sense resistor into an amplified current; converting, by the calibration circuit, a variable input voltage at the first terminal of the current sense resistor into a calibration current based on a trimming code; and converting, by the transimpedance amplifier, a combination of the amplified current and the calibration current into a current sensing signal representing the current flowing through the current sense resistor; wherein the calibration circuit comprises: a differential trimming circuit having an input terminal, a first output terminal, and a second output terminal, wherein the input terminal is coupled to the first terminal of the first resistor, and the differential trimming circuit is configured to generate, based on the variable input voltage and the trimming code, a first calibration voltage and a second calibration voltage at its first output terminal and second output terminal, respectively; and a second transconductance amplifier having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein the first input terminal of the second transconductance amplifier is coupled to the first output terminal of the differential trimming circuit, the second input terminal of the second transconductance amplifier is coupled to the second output terminal of the differential trimming circuit, the first output terminal of the second transconductance amplifier is coupled to the first input terminal of the transimpedance amplifier, the second output terminal of the second transconductance amplifier is coupled to the second input terminal of the transimpedance amplifier, and the second transconductance amplifier is configured to generate, based on the first calibration voltage and the second calibration voltage, a first calibration current and a second calibration current at its first output terminal and second output terminal, respectively.

13. The calibration method of claim 12, further comprising: setting the variable input voltage to a first voltage value; measuring the current sensing signal to obtain a first current sensing voltage; setting the variable input voltage to a second voltage value; measuring the current sensing signal to obtain a second current sensing voltage; and generating the trimming code based on a difference between the first current sensing voltage and the second current sensing voltage.

14. The calibration method of claim 12, further comprising: chopping the calibration current using a first chopping switch; chopping the voltage at the first input and the second input of the first transconductance amplifier using a second chopping switch; and chopping the voltage at the first output and the second output of the transimpedance amplifier using a third chopping switch. ​ ​ ​ ​ ​

Citation Information

Patent Citations

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