Semiconductor device desaturation state detection circuit

Abstract

The present invention provides a semiconductor device desaturation state detection circuit, the semiconductor device desaturation state detection circuit comprises a driving unit for driving the semiconductor device, a first current limiting resistor, a first unidirectional conductive element, a second unidirectional conductive element, a pull-up resistor, a voltage stabilizing unit, a fault signal generating unit and a controller. The technical solution of the present invention can reduce the detection cost of the semiconductor device entering the desaturation state.

Description

Technical Field

[0001] The present invention relates to the field of detection technology, and in particular to a semiconductor device desaturation state detection circuit. Background Art

[0002] In the design process of the inverter, the desaturation state of the IGBT (Insulated Gate Bipolar Transistor) is mainly detected by integrating an isolation driver chip with desaturation protection.

[0003] However, the isolation driver chip with integrated desaturation protection is often used for desaturation state detection in isolation scenarios; and the isolation driver chip with integrated desaturation protection is high in cost, which will increase the detection cost of the IGBT. Summary of the invention

[0004] The present invention provides a semiconductor device desaturation state detection circuit, aiming to reduce the detection cost of the semiconductor device entering the desaturation state.

[0005] To achieve the above object, the present invention provides a semiconductor device desaturation state detection circuit, comprising a driving unit for driving the semiconductor device, a first current limiting resistor, a first unidirectional conductive element, a second unidirectional conductive element, a pull-up resistor, a voltage stabilizing unit, a fault signal generating unit and a controller;

[0006] The input end of the semiconductor device is connected to the positive pole of the DC bus through the first current limiting resistor, the output end of the semiconductor device is connected to the negative pole of the DC bus after being connected to the ground end of the drive unit, and the controlled end of the semiconductor device is connected to the output end of the drive unit;

[0007] The input end of the first unidirectional conductive element and the input end of the second unidirectional conductive element are connected together and then connected to the input end of the voltage stabilizing unit on one hand, and connected to the first power supply point on the other hand via the pull-up resistor; the output end of the first unidirectional conductive element is connected to the output end of the driving unit, and the output end of the second unidirectional conductive element is connected to the input end of the semiconductor device;

[0008] The first output end of the voltage stabilizing unit is connected to the controlled end of the fault signal generating unit, and the second output end of the voltage stabilizing unit is grounded; the input end of the fault signal generating unit is connected to the second power supply point, and the output end of the fault signal generating unit is connected to the controller, and the controller determines whether the semiconductor device enters a desaturation state according to the detection signal output by the fault signal generating unit.

[0009] Optionally, the voltage stabilizing unit includes: a voltage stabilizing diode and a voltage dividing circuit;

[0010] The cathode of the voltage-stabilizing diode is connected to the first power supply point, and the anode of the voltage-stabilizing diode is connected to the input end of the voltage-dividing circuit;

[0011] The first output end of the voltage divider circuit is connected to the controlled end of the fault signal generating unit, and the second output end of the voltage divider circuit is connected to the output end of the fault signal generating unit and then grounded.

[0012] Optionally, the voltage divider circuit includes a first resistor and a second resistor;

[0013] The first end of the first resistor and the first end of the second resistor are connected together to form the input end of the voltage divider circuit. The second end of the first resistor is the first output end of the voltage divider circuit connected to the controlled end of the fault signal generating unit. The second end of the second resistor is the second output end of the voltage divider circuit connected to the output end of the fault signal generating unit and grounded.

[0014] Optionally, the voltage stabilizing unit further includes an energy storage element, one end of the energy storage element is connected to the first end of the second resistor, and the other end of the energy storage element is connected to the second end of the second resistor.

[0015] Optionally, the fault signal generating unit includes an NPN transistor and a third resistor;

[0016] The first end of the third resistor is the input end of the fault signal generating unit and is connected to the second power supply point, and the second end of the third resistor and the collector of the NPN transistor are connected together to form the output end of the fault signal generating unit;

[0017] The emitter of the NPN transistor is the output end of the fault signal generating unit, which is connected to the second output end of the voltage stabilizing unit and then grounded; the base of the NPN transistor is the controlled end of the fault signal generating unit connected to the first output end of the voltage stabilizing unit.

[0018] Optionally, the first unidirectional conducting element is a first diode;

[0019] The anode of the first diode is the input end of the first unidirectional conductive element, and the cathode of the first diode is the output end of the first unidirectional conductive element;

[0020] The second unidirectional conductive element is a second diode;

[0021] An anode of the second diode is an input end of the second unidirectional conducting element, and a cathode of the second diode is an output end of the second unidirectional conducting element.

[0022] Optionally, the method further includes a second current limiting resistor connected between the controlled end of the semiconductor device and the output end of the driving unit.

[0023] Optionally, the semiconductor device is an IGBT tube, the gate of the IGBT tube is the controlled end of the semiconductor device, the emitter of the IGBT tube is the output end of the semiconductor device, and the collector of the IGBT tube is the input end of the semiconductor device.

[0024] Optionally, the semiconductor device is a MOS tube, the gate of the MOS tube is the controlled end of the semiconductor device, the source of the MOS tube is the output end of the semiconductor device, and the drain of the MOS tube is the input end of the semiconductor device.

[0025] Optionally, it further includes an alarm circuit for giving an alarm according to an alarm control signal output by the controller when the controller determines that the semiconductor device is in a desaturated state;

[0026] The input end of the alarm circuit is connected to the first output end of the controller.

[0027] According to the technical solution of the present invention, during the normal opening or normal shut-down process of the semiconductor device, one of the first unidirectional conductive element and the second unidirectional conductive element will be in the conducting state, so that the voltage stabilizing unit is turned off, and the fault signal generating unit outputs a high-level electrical signal to the controller under the action of the pull-up resistor; and when the semiconductor device enters the desaturation state, the first unidirectional conductive element and the second unidirectional conductive element will be in the cut-off state, so that the voltage stabilizing unit is broken down, and the fault signal generating unit outputs a low-level electrical signal to the controller. In other words, once the semiconductor device is in the desaturation state, the level output by the fault signal generating unit to the controller will be triggered to flip, and the controller determines whether the semiconductor device is short-circuited and enters the desaturation state according to the level output by the fault signal generating unit. With such a setting, it is not necessary to use an isolated driving chip integrated with desaturation protection to detect whether the semiconductor device enters the desaturation state, thereby saving the detection cost of the semiconductor device entering the desaturation state; and the semiconductor device desaturation state detection circuit of the present application can be applied to the desaturation state detection in non-isolated scenarios, thereby expanding the application range of semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0029] Figure 1 It is a structural block diagram of an embodiment of a semiconductor device desaturation state detection circuit of the present invention;

[0030] Figure 2 A schematic diagram of the circuit structure of an embodiment of a semiconductor device desaturation state detection circuit according to the present invention;

[0031] Figure 3 FIG. 4 is a structural block diagram of another embodiment of a semiconductor device desaturation state detection circuit according to the present invention.

[0032] Description of Figure Numbers:

[0033]

[0034] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back...), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0037] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or suggesting their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0038] Figure 1 It is a structural block diagram of an embodiment of a semiconductor device desaturation state detection circuit of the present invention.

[0039] The semiconductor device desaturation state detection circuit is used to detect whether the semiconductor device enters the desaturation state. The semiconductor device desaturation state detection circuit includes a driving unit 10 for driving the semiconductor device T1, a first current limiting resistor Rr1, a first unidirectional conductive element 20, a second unidirectional conductive element 30, a pull-up resistor Rp, a voltage stabilizing unit 40, a fault signal generating unit 50 and a controller 60; wherein,

[0040] The input end of the semiconductor device T1 is connected to the positive pole DC+ of the DC bus via a first current limiting resistor Rr1, the output end of the semiconductor device T1 is connected to the negative pole DC- of the DC bus after being connected to the ground end of the drive unit 10, and the controlled end of the semiconductor device T1 is connected to the output end of the drive unit 10; optionally, a second current limiting resistor Rr2 is arranged between the controlled end of the semiconductor device T1 and the output end of the drive unit 10 to perform current limiting protection on the semiconductor device T1 through Rr2.

[0041] The input end of the first unidirectional conductive element 20 and the input end of the second unidirectional conductive element 30 are connected together and connected to the input end of the voltage stabilizing unit 40 on one hand, and connected to the first power supply point Vcc1 via the pull-up resistor Rp on the other hand; the output end of the first unidirectional conductive element 20 is connected to the output end of the driving unit 10, and the output end of the second unidirectional conductive element 30 is connected to the input end of the semiconductor device T1;

[0042] A first output end of the voltage stabilizing unit 40 is connected to a controlled end of a fault signal generating unit 50, and a second output end of the voltage stabilizing unit 40 is grounded; an input end of the fault signal generating unit 50 is connected to a second power supply point Vcc2, and an output end of the fault signal generating unit 50 is connected to a controller 60, which determines whether the semiconductor device T1 enters a desaturation state based on a detection signal output by the fault signal generating unit 50.

[0043] The driving unit 10 may be a non-isolated driving chip, and the supply voltage range may be 13V to 20V.

[0044] The first unidirectional conductive element 20 and the second unidirectional conductive element 30 have two states: on and off. The first unidirectional conductive element 20 and the second unidirectional conductive element 30 can be diodes, transistors, etc.

[0045] The voltage stabilizing unit 40 has the following characteristics: when any one of the first unidirectional conductive element 20 and the second unidirectional conductive element 30 is turned on, the voltage stabilizing unit 40 is turned off; when the first unidirectional conductive element 20 and the second unidirectional conductive element 30 are turned off at the same time, the voltage stabilizing unit 40 is broken down.

[0046] The fault signal generating unit can be realized by a switch circuit composed of a triode and a MOS tube.

[0047] Optionally, the semiconductor device T1 may be an IGBT tube. In this case, the gate of the IGBT tube is the controlled end of the semiconductor device T1, the emitter of the IGBT tube is the output end of the semiconductor device T1, and the collector of the IGBT tube is the input end of the semiconductor device T1.

[0048] Optionally, the semiconductor device T1 may also be a MOS tube, such as a P-MOS tube or an N-MOS tube. In this case, the gate of the MOS tube is the controlled end of the semiconductor device T1, the source of the MOS tube is the output end of the semiconductor device T1, and the drain of the MOS tube is the input end of the semiconductor device T1.

[0049] The working principle of the semiconductor device desaturation state detection circuit is as follows:

[0050] During the normal turn-on process of the semiconductor device T1, the output terminal OUT of the driving unit 10 changes from a low level to a high level. In this process, the voltage difference across the first unidirectional conductive element 20 gradually decreases, and finally the first unidirectional conductive element 20 changes from a conducting state to a cut-off state. At the same time, as the gate voltage of the semiconductor device T1 rises, the voltage Vce between the collector and the emitter of the semiconductor device T1 gradually decreases until the semiconductor device T1 is saturated and turned on, and finally the second unidirectional conductive element 30 changes from a cut-off state to a conducting state. When the first unidirectional conductive element 20 is turned off and the second unidirectional conductive element 30 is turned on, the voltage stabilizing unit 40 is turned off. At this time, the fault signal generating unit 50 is in a cut-off state, and under the pull-up action of the pull-up resistor Rp, the controller 60 receives a high-level electrical signal, and the controller 60 determines that the semiconductor device T1 is in a normal turn-on state.

[0051] During the normal shutdown process of the semiconductor device T1, the output terminal OUT of the driving unit 10 changes from a high level to a low level. In this process, the voltage difference across the first unidirectional conductive element 20 increases, and finally the first unidirectional conductive element 20 changes from a cut-off state to a conducting state. At the same time, as the gate voltage of the semiconductor device T1 decreases, the voltage Vce between the collector and the emitter of the semiconductor device T1 gradually increases, and finally the second unidirectional conductive element 30 changes from a conducting state to a cut-off state. It should be noted that in this process, since the voltage at the output terminal of the first unidirectional conductive element 20 is first pulled down, and the second unidirectional conductive element 30 is also in a conducting state when the semiconductor device T1 is in a saturated conducting state, the first unidirectional conductive element 20 has entered a conducting state before the second unidirectional conductive element 30 is cut off. Therefore, during the normal shutdown process of the semiconductor device T1, the voltage stabilizing unit 40 is always in the cut-off state. At this time, the fault signal generating unit 50 is also in the cut-off state. Under the pull-up action of the pull-up resistor Rp, the controller 60 receives a high-level electrical signal, and the controller 60 determines that the semiconductor device T1 is in the normal shutdown state.

[0052] However, in the process that the output terminal OUT of the driving unit 10 changes from a low level to a high level, if the semiconductor device T1 is short-circuited and enters a desaturated state, then the voltage Vce between the collector and the emitter of the semiconductor device T1 will increase rapidly (close to the bus voltage), and finally the second unidirectional conductive element 30 changes from a conducting state to a cut-off state, at which time the first unidirectional conductive element 20 and the second unidirectional conductive element 30 are cut off at the same time. When the first unidirectional conductive element 20 and the second unidirectional conductive element 30 are cut off at the same time, the voltage stabilizing unit 40 will be broken down by the power supply voltage of the first power supply point Vcc1, so that the controlled end of the fault signal generating unit 50 is at a low level, and the fault signal generating unit 50 is turned on accordingly. In this case, the controller 60 receives a low-level electrical signal, and the controller 60 determines that the semiconductor device T1 is short-circuited and enters a desaturated state.

[0053] In summary, during the normal opening or normal shut-down process of the semiconductor device T1, one of the first unidirectional conductive element 20 and the second unidirectional conductive element 30 will be in the on state, so that the voltage stabilizing unit 40 is turned off, and the fault signal generating unit 50 outputs a high-level electrical signal to the controller 60 under the pull-up action of the pull-up resistor Rp; and when the semiconductor device T1 enters the desaturation state, the first unidirectional conductive element 20 and the second unidirectional conductive element 30 will both be in the off state, thereby causing the voltage stabilizing unit 40 to be broken down, and the fault signal generating unit 50 will output a low-level electrical signal to the controller 60 accordingly. In other words, once the semiconductor device T1 is in the desaturation state, it will trigger the level of the fault signal generating unit 50 output to the controller 60 to flip, and the controller 60 can determine whether the semiconductor device T1 is short-circuited and enters the desaturation state according to the level output by the fault signal generating unit 50. With such a configuration, there is no need to use an isolated driver chip with integrated desaturation protection to detect whether the semiconductor device T1 enters the desaturation state, thereby saving the cost of detecting whether the semiconductor device T1 enters the desaturation state; and, the semiconductor device desaturation state detection circuit of the present application can be applied to desaturation state detection in non-isolated scenarios, thereby expanding the scope of application of the semiconductor device T1.

[0054] Optional, see Figure 2 In one embodiment, the voltage stabilizing unit 40 includes a voltage stabilizing diode Z1 and a voltage divider circuit 401; wherein the cathode of the voltage stabilizing diode Z1 is connected to the first power supply point Vcc1, and the anode of the voltage stabilizing diode Z1 is connected to the input end of the voltage divider circuit 401; the first output end of the voltage divider circuit 401 is connected to the controlled end of the fault signal generating unit 50, and the second output end of the voltage divider circuit 401 is connected to the output end of the fault signal generating unit 50 and then grounded.

[0055] The voltage divider circuit 401 may be formed by a plurality of resistors connected in series, or may be formed by a combination of a plurality of resistors and capacitors.

[0056] The working principle of the voltage stabilizing unit 40 is as follows:

[0057] In the normal turn-on process of the semiconductor device T1, the first unidirectional conductive element 20 is turned off, the second unidirectional conductive element 30 is turned on, and the semiconductor device T1 is saturated and turned on. The cathode of the voltage-stabilizing diode Z1 is pulled down to a low level through the second unidirectional conductive element 30 and the semiconductor device T1, and the voltage-stabilizing diode Z1 is not broken down. In this case, the fault signal generating unit 50 outputs a high-level electrical signal to the controller 60 under the pull-up action of the pull-up resistor Rp, and the controller 60 determines that the semiconductor device T1 is in a normal turn-on state.

[0058] During the normal shutdown process of the semiconductor device T1, the output terminal OUT of the driving unit 10 changes from a high level to a low level close to 0V, the first unidirectional conductive element 20 is turned on, and the second unidirectional conductive element 30 is turned off. The cathode of the voltage-stabilizing diode Z1 is pulled down to a low level through the first unidirectional conductive element 20, and the voltage-stabilizing diode Z1 is not broken down. In this case, the fault signal generating unit 50 outputs a high-level electrical signal to the controller 60 under the pull-up action of the pull-up resistor Rp, and the controller 60 determines that the semiconductor device T1 is in a normal shutdown state.

[0059] However, in the process of the output terminal OUT of the driving unit 10 changing from a low level to a high level, if the semiconductor device T1 is short-circuited and enters a desaturated state, then the voltage Vce between the collector and the emitter of the semiconductor device T1 will increase rapidly (close to the bus voltage), and finally the second unidirectional conductive element 30 is changed from a conducting state to a cut-off state, at which time the first unidirectional conductive element 20 and the second unidirectional conductive element 30 are cut off at the same time. When the first unidirectional conductive element 20 and the second unidirectional conductive element 30 are cut off at the same time, the voltage-regulating diode Z1 is broken down by the power supply voltage of the first power supply point Vcc1, and the voltage-regulating diode Z1 is equivalent to a short-circuited state. At this time, after the voltage-dividing circuit 401 and the voltage-regulating diode Z1 divide the power supply voltage of the first power supply point Vcc1, a high level is provided to the controlled end of the fault signal generating unit 50, so that the fault signal generating unit 50 is changed from a cut-off state to a conducting state. When the fault signal generating unit 50 is turned on, the input end of the controller 60 is pulled down to a low level, and the controller 60 determines that the semiconductor device T1 is short-circuited and enters a desaturated state.

[0060] Optional, see Figure 2 In one embodiment, the voltage divider circuit 401 includes a first resistor R1 and a second resistor R2, wherein the first end of the first resistor R1 and the first end of the second resistor R2 are connected together to form an input end of the voltage divider circuit 401, the second end of the first resistor R1 is a first output end of the voltage divider circuit 401 connected to the controlled end of the fault signal generating unit 50, and the second end of the second resistor R2 is a second output end of the voltage divider circuit 401 connected to the output end of the fault signal generating unit 50 and grounded.

[0061] During the normal shutdown process of the semiconductor device T1, if the semiconductor device T1 is short-circuited and enters the desaturation state, the voltage Vce between the collector and the emitter of the semiconductor device T1 will increase rapidly (close to the bus voltage), and finally the first unidirectional conductive element 20 and the second unidirectional conductive element 30 are turned off at the same time. When the first unidirectional conductive element 20 and the second unidirectional conductive element 30 are turned off at the same time, the voltage regulator diode Z1 is broken down by the power supply voltage of the first power supply point Vcc1, and the voltage regulator diode Z1 is equivalent to a short-circuit state. At this time, the first resistor R1, the second resistor R2 and the voltage regulator diode Z1 divide the power supply voltage of the first power supply point Vcc1, and provide a high level for the controlled end of the fault signal generating unit 50, so that the fault signal generating unit 50 is turned on, and the input end of the controller 60 is pulled down to a low level. The controller 60 determines that the semiconductor device T1 is short-circuited and enters the desaturation state.

[0062] Optional, see Figure 2 In one embodiment, the voltage stabilizing unit 40 further includes an energy storage element C1 , one end of the energy storage element C1 is connected to the first end of the second resistor R2 , and the other end of the energy storage element C1 is connected to the second end of the second resistor R2 .

[0063] In the normal turn-on process of the semiconductor device T1, the first unidirectional conductive element 20 is turned off, the second unidirectional conductive element 30 is turned on, and the semiconductor device T1 is saturated and turned on. In this process, due to the junction capacitance of the Zener diode Z1, part of the leakage current will flow into the energy storage element C1 through the Zener diode Z1. Optionally, the energy storage element C1 can be a capacitor, and the capacitance of the capacitor can be set to be much larger than the junction capacitance of the Zener diode Z1 to avoid the leakage current from erroneously triggering the fault signal generating unit 50, resulting in a detection error.

[0064] In the process of the output terminal OUT of the driving unit 10 changing from a low level to a high level, if the semiconductor device T1 is short-circuited and enters a desaturated state during this process, then the voltage Vce between the collector and the emitter of the semiconductor device T1 will increase rapidly (close to the bus voltage), and finally the first unidirectional conducting element 20 and the second unidirectional conducting element 30 are turned off at the same time. When the first unidirectional conducting element 20 and the second unidirectional conducting element 30 are turned off at the same time, the voltage zener diode Z1 is broken down by the power supply voltage of the first power supply point Vcc1, and the current charges the energy storage element C1 through the voltage zener diode Z1 and the pull-up resistor Rp. The voltage of the energy storage element C1 quickly exceeds 0.7V, and then the current flows into the fault signal generating unit 50 through the first resistor R1, the voltage zener diode Z1, and the second resistor R2, so that the fault signal generating unit 50 is turned on, and the input terminal of the controller 60 is pulled down to a low level. The controller 60 determines that the semiconductor device T1 is short-circuited and enters a desaturated state.

[0065] Optional, see Figure 2 In one embodiment, the fault signal generating unit 50 includes an NPN transistor Q1 and a third resistor R3; the first end of the third resistor R3 is the input end of the fault signal generating unit 50 and is connected to the second power supply point Vcc2, and the second end of the third resistor R3 is connected together with the collector of the NPN transistor Q1 to form the output end of the fault signal generating unit 50; the emitter of the NPN transistor Q1 is the output end of the fault signal generating unit 50, which is connected together with the second output end of the voltage stabilizing unit 40 and then grounded GND; the base of the NPN transistor Q1 is the controlled end of the fault signal generating unit 50 and is connected to the first output end of the voltage stabilizing unit 40.

[0066] Specifically, in the normal turn-on process of the semiconductor device T1, the first unidirectional conduction element 20 is turned off, the second unidirectional conduction element 30 is turned on, and the semiconductor device is saturated and turned on, and the voltage-stabilizing diode Z1 is not broken down. At this time, due to the junction capacitance of the voltage-stabilizing diode Z1, part of the leakage current will flow into the energy storage element C1 through the voltage-stabilizing diode Z1. Optionally, the energy storage element C1 is a capacitor, and the capacitance of the capacitor can be set to be much larger than the junction capacitance of the voltage-stabilizing diode Z1 to avoid the leakage current from falsely triggering the NPN transistor Q1. In the normal turn-on process of the semiconductor device T1, the NPN transistor Q1 is in the cut-off state, and the input end of the controller 60 is at a high level under the pull-up action of the pull-up resistor Rp, thereby determining that the semiconductor device T1 is in a normal turn-on state.

[0067] During the normal shutdown process of the semiconductor device T1, the output terminal OUT of the driving unit 10 changes from a high level to a low level close to 0V, the first unidirectional conductive element 20 is turned on, the second unidirectional conductive element 30 is turned off, and the voltage zener diode Z1 is not broken down. In this case, the NPN transistor Q1 is in the off state, and the input terminal of the controller 60 is in a high level under the pull-up effect of the pull-up resistor Rp, thereby determining that the semiconductor device T1 is in a normal shutdown state.

[0068] However, in the process of the output terminal OUT of the driving unit 10 changing from a low level to a high level, if the semiconductor device T1 is short-circuited and enters a desaturated state, then the voltage Vce between the collector and the emitter of the semiconductor device T1 will increase rapidly (close to the bus voltage), and finally the first unidirectional conductive element 20 and the second unidirectional conductive element 30 are cut off at the same time. When the first unidirectional conductive element 20 and the second unidirectional conductive element 30 are cut off at the same time, the voltage regulator diode Z1 is broken down by the power supply voltage of the first power supply point Vcc1, and the voltage regulator diode Z1 is equivalent to a short-circuit state. At this time, after the first resistor R1, the second resistor R2 and the voltage regulator diode Z1 divide the power supply voltage of the first power supply point Vcc1, a high level is provided to the base of the NPN transistor Q1, so that the NPN transistor Q1 is turned on, and then the input terminal of the controller 60 is pulled down to a low level, and the controller 60 determines that the semiconductor device T1 is short-circuited and enters a desaturated state.

[0069] Optional, see Figure 2 In one embodiment, the first unidirectional conducting element 20 is a first diode D1; the anode of the first diode D1 is the input end of the first unidirectional conducting element 20, and the cathode of the first diode D1 is the output end of the first unidirectional conducting element 20; and the second unidirectional conducting element 30 is a second diode D2; the anode of the second diode D2 is the input end of the second unidirectional conducting element 30, and the cathode of the second diode D2 is the output end of the second unidirectional conducting element 30.

[0070] Optionally, in one embodiment, the detection circuit also includes a signal amplification and shaping circuit (not shown in the figure); the output end of the controller 60 is connected to the input end of the signal amplification and shaping circuit, and the output end of the signal amplification and shaping circuit is connected to the input end of the drive unit 10.

[0071] The signal amplification and shaping circuit is used to amplify and shape the control signal output by the controller 60 and transmit it to the drive unit 10, so that the drive unit 10 can effectively identify the control signal output by the controller 60 and perform corresponding actions. Optionally, when it is detected that the semiconductor device T1 is short-circuited and enters a desaturated state, the controller 60 transmits the control instruction to the drive unit 10 through the signal amplification and shaping circuit, and the drive unit 10 sets the level of its output terminal OUT to a low level to turn off the semiconductor device T1.

[0072] Optional, see Figure 3 In one embodiment, the detection circuit further includes an alarm circuit 70; the alarm circuit 70 is used to give an alarm according to an alarm control signal output by the controller 60 when the controller 60 determines that the semiconductor device T1 is in a desaturated state. The input end of the alarm circuit 70 is connected to the first output end of the controller 60.

[0073] The alarm circuit 70 can be a display screen, such as an LED display screen or an LCD display screen; the alarm circuit 70 can also be a buzzer, an indicator light, etc., which can be set according to actual needs.

[0074] The above descriptions are only optional embodiments of the present invention, and are not intended to limit the patent scope of the present invention. All equivalent structural changes made using the contents of the present invention's specification and drawings, or directly / indirectly applied in other related technical fields, are included in the patent protection scope of the present invention.

Claims

1. A semiconductor device desaturation state detection circuit, It is characterized in that It includes a driving unit for driving the semiconductor device, a first current limiting resistor, a first unidirectional conductive element, a second unidirectional conductive element, a pull-up resistor, a voltage stabilizing unit, a fault signal generating unit and a controller; The input end of the semiconductor device is connected to the positive pole of the DC bus through the first current limiting resistor, the output end of the semiconductor device is connected to the negative pole of the DC bus after being connected to the ground end of the drive unit, and the controlled end of the semiconductor device is connected to the output end of the drive unit; The input end of the first unidirectional conductive element and the input end of the second unidirectional conductive element are connected together and then connected to the input end of the voltage stabilizing unit on one hand, and connected to the first power supply point on the other hand via the pull-up resistor; the output end of the first unidirectional conductive element is connected to the output end of the driving unit, and the output end of the second unidirectional conductive element is connected to the input end of the semiconductor device; The first output end of the voltage stabilizing unit is connected to the controlled end of the fault signal generating unit, and the second output end of the voltage stabilizing unit is grounded; the input end of the fault signal generating unit is connected to the second power supply point, and the output end of the fault signal generating unit is connected to the controller, and the controller determines whether the semiconductor device enters a desaturation state according to the detection signal output by the fault signal generating unit; When the first unidirectional conductive element and the second unidirectional conductive element are turned off at the same time, the voltage stabilizing unit is broken down and provides a high level to the fault signal generating unit; When one of the first unidirectional conducting element or the second unidirectional conducting element is turned off, the voltage stabilizing unit is not broken down and provides a low level to the fault signal generating unit.

2. The semiconductor device desaturation state detection circuit according to claim 1, It is characterized in that The voltage stabilizing unit comprises: a voltage stabilizing diode and a voltage dividing circuit; The cathode of the voltage-stabilizing diode is connected to the first power supply point, and the anode of the voltage-stabilizing diode is connected to the input end of the voltage-dividing circuit; The first output end of the voltage divider circuit is connected to the controlled end of the fault signal generating unit, and the second output end of the voltage divider circuit is connected to the output end of the fault signal generating unit and then grounded.

3. The semiconductor device desaturation state detection circuit according to claim 2, It is characterized in that The voltage divider circuit includes a first resistor and a second resistor; The first end of the first resistor and the first end of the second resistor are connected together to form the input end of the voltage divider circuit. The second end of the first resistor is the first output end of the voltage divider circuit connected to the controlled end of the fault signal generating unit. The second end of the second resistor is the second output end of the voltage divider circuit connected to the output end of the fault signal generating unit and grounded.

4. The semiconductor device desaturation state detection circuit according to claim 3, It is characterized in that The voltage stabilizing unit further includes an energy storage element, one end of the energy storage element is connected to the first end of the second resistor, and the other end of the energy storage element is connected to the second end of the second resistor.

5. The semiconductor device desaturation state detection circuit according to claim 1, It is characterized in that The fault signal generating unit includes an NPN transistor and a third resistor; The first end of the third resistor is the input end of the fault signal generating unit and is connected to the second power supply point, and the second end of the third resistor and the collector of the NPN transistor are connected together to form the output end of the fault signal generating unit; The emitter of the NPN transistor is the output end of the fault signal generating unit, which is connected to the second output end of the voltage stabilizing unit and then grounded; the base of the NPN transistor is the controlled end of the fault signal generating unit connected to the first output end of the voltage stabilizing unit.

6. The semiconductor device desaturation state detection circuit according to claim 1, It is characterized in that The first unidirectional conductive element is a first diode; The anode of the first diode is the input end of the first unidirectional conductive element, and the cathode of the first diode is the output end of the first unidirectional conductive element; The second unidirectional conductive element is a second diode; An anode of the second diode is an input end of the second unidirectional conducting element, and a cathode of the second diode is an output end of the second unidirectional conducting element.

7. The semiconductor device desaturation state detection circuit according to claim 1, It is characterized in that It also includes a second current limiting resistor connected between the controlled end of the semiconductor device and the output end of the driving unit.

8. The semiconductor device desaturation state detection circuit according to claim 1, It is characterized in that The semiconductor device is an IGBT tube, the gate of the IGBT tube is the controlled end of the semiconductor device, the emitter of the IGBT tube is the output end of the semiconductor device, and the collector of the IGBT tube is the input end of the semiconductor device.

9. The semiconductor device desaturation state detection circuit according to claim 1, It is characterized in that The semiconductor device is a MOS tube, the gate of the MOS tube is the controlled end of the semiconductor device, the source of the MOS tube is the output end of the semiconductor device, and the drain of the MOS tube is the input end of the semiconductor device.

10. The semiconductor device desaturation state detection circuit according to claim 1, It is characterized in that It also includes an alarm circuit for giving an alarm according to an alarm control signal output by the controller when the controller determines that the semiconductor device is in a desaturated state; The input end of the alarm circuit is connected to the first output end of the controller.

Images